2012.03.232012.03.232012.03.23

2012.03.23

2012.03.232012.03.23

2012.03.232012.03.23

EDISONEDISON

BRYANBRYAN

LORENLOREN

BYBY

DAKAR10F/FG(45W CPU)

MP(A02) BUILD

1310A2491301-0-MTR

MODEL,PROJECT,FUNCTION

701XXX

X0121-OCT-2002

1310xxxxx-0-0

2012.03.23

DAKAR10F/FG MAIN BOARD

C CSREVDATE CHANGE NO.

E

D

C

B

A

7 6 5 4 3 2 1

7 6 5 4 3

E

D

C

B

A

8

FF

P/N

VER:

DATEDATEEE

DESIGNDRAWER

CHECK

8

INVENTECTITLE

SIZE CODE

SHEET of

DOC.NUMBER REV

1

POWER

THIS DRAWING AND SPECIFICATIONS,HEREIN,ARE THE PROPERTY OF INVENTECCORPORATION AND SHALL NOT BE REPODUCED,COPIED,OR USED IN WHOLE ORIN PART AS THE BASIS FOR THE MANUFACTURE OR SALE OF ITEMS WITHOUTWRITTEN PERMISSION,INVENTEC CORPORATION,2009 ALL RIGHT RESERVED.

HSF Property:ROHS or Halogen-Free

RESPONSIBLE

SIZE=FILE NAME:

2

6. POWER +V3LA/+V3A/+5A7. POWER +V1.5/+V0.75

9. POWER VCCIO

45. CPU 5 POWER46. CPU 6 GND

70. PICK BUTTON BOARD(8 PIN)69. EMI68. POWER BUTTON BOARD67. PICK BUTTON BOARD(4 PIN)66. USB BOARD65. VRAM 464. VRAM 363. VRAM 262. VRAM 161. VGA 660. VGA 559. VGA 458. VGA 357. VGA 256. VGA 1

31. USB 3.0 CONTROLLER(REMOVE)

50. PCH 4 AXG25. SPEAKER/HP JACK/MIC JACK

16. LOAD SWITCH-2

14. ENABLE PIN13. POWER VCORE_DGPU

34. LCM CONN33. USB 3.0 CONN

38. DDR3 DIMM037. HDMI CEC36. HDMI CONN35. CRT CONN

32. USB 3.0 CONN W/ S&C

30. USB 2.0 CONN29. SATA HDD/ODD CONN28. MINI2 3G/LTE27. MINI1 WLAN/DEBUG CARD26. CARDREADER

TABLE OF CONTENTS

15. LOAD SWITCH-1

17. PCB SCREW18. HALL SENSOR

10. POWER VCCSA

PAGEPAGE

52. PCH 6 MISC53. PCH 7 POWER54. PCH 8 POWER55. PCH 9 GND

51. PCH 5 USB

24. AUDIO CODEC

21. EC22. LAN

39. DDR3 DIMM1

41. CPU 1

43. CPU 3 DRAM42. CPU 2

48. PCH 249. PCH 3

8. POWER +V1.8S

3. BLOCK DIAGRAM4. POWER MAP

23. RJ45 & TRANSFORMER

5. POWER CHARGER

2. INDEX

PAGE

1. COVER PAGE

11. POWER VCORE

47. PCH 1

44. CPU 4 POWER

40. FAN & THERMAL SENSOR

19. LED

12. POWER VGFX

20. K/B & TP/B CONN

702

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

A3 CS

Block Diagram

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

204-PIN SODIMM1

(1333/1600 MHZ)

DDR3@1.5/0.75V

204-PIN SODIMM0

(1333/1600 MHZ)DDR3@1.5/0.75V

RJ45

ENE-P2809ATHERMAL SENSOR

BATTERY CHARGER &DC/DC & IMVP 7

6-CellLI-ION BATTERY

DDR3 INTERFACE

DDR3 INTERFACE

TOUCH PADKEYBOARD

HDA

USB_10:WEBCAM

INTERNAL MIC IN

EXT MIC IN

HEADPHONE

USB_0: USB CONNUSB_2: USB CONNUSB_8: CARD READERUSB_9: MINICARD WLAN

USB3.0

LVDS

CRT

FDI

NPCE885LA0DX

HDMI

LCM

PEG

USB_8:

USB_1: USB3.0 CONN

CARD READERREA_RTS5129

SATA0:HDD

SATA5: ODD

USB2.0

SATA2 ESATA

SATA

EC WINDBOND

USB2.0

IVY BRIDGE \SANDY BRIDGE

QC 45W

37.5 X 37.5 X 5 mmSOCKET-RPGA989

DMI 2.0

AMDW/ POWER EXPRESS

THAMES LE \ THAMES XT \SEYMOUR XTX

29X 29 MM

PCIE

PCIE_1:LANPCIE

SPI

SPIWINB_W25Q32BVSSIG

SPI FLASH 4MB

SLEEP & CHARGE

REA_ALC269Q_VB6

AUDIO CODEC

PCHPANTHER POINT25 X 25 X 2.3 mm

ATHEROS_AR8161/8162

PCIE_2:WLAN

703

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

Block Diagram

CSA3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

VDD CORE IS NEW IC TPS51728

FUSE

BATTERY PACK

1880UF_1.1MΩ // 2276UF_0.203MΩ

560UF_25MΩ // 80UF_0.93MΩ

CHANGING POINTS~~TPS51211 IS NEW IC

CHARGE IS NEW IC BQ24725

+V1.8S IS NEW IC RT8068

VCC CORE IS NEW IC TPS51650

POWER BUDGET ~~IC SPEC (MAX CURRENT )

V0.85 IS NEW IC TPS 51641V3_V5 IS NEW IC TPS51123

VTT IS NEW IC TPS51219

INRUSH ~~L/S TURN NOAVG CURRENT ~~TEST RESULT(MAX CURRENT)PEAK CURRENT ~~RATIO OF INTERNAL PREDICTION

F 340K

PEAK 46A AVG 38.7A

INRUSH 0.496A

POWER BUDGET 6A

INRUSH 0.55A

INRUSH 0.984A

INRUSH 1.06A

INRUSH 0.464A

INRUSH 0.6A

13UF_5.803MΩ

+V3S_DGPU56.12UF_1.505MΩ

POWER BUDGET 4.711APEAK2.592A

+V1.5S_DGPU

NMOS

NMOS

POWER BUDGET 19.218 A

PEAK 11.53A AVG 6.704A560UF_25MΩ // 359.9UF_0.213MΩ

TPS51219

OCP 13.2A R=115K

+V1.05_+-5%

330UF_15MΩ // 480UF_0.560MΩ

5.9UF_9.497MΩPOWER BUDGET 4.711A

RT8068

75.6UF_0.986MΩ

NMOS

+V3A

3300UF_25MΩ //6.7UF_5.458MΩ

POWER BUDGET 12.186 A3.6UF_8.409MΩ PEAK2.592A

POWER BUDGET 4.711A

PEAK 6A AVG 1.262A

POWER BUDGET 14.745 A122.42UF_0.658MΩ

330UF_25MΩ // 49.1UF_6.648MΩ

OCP 10.52A R=140K

+V5A_+-5%

PEAK 9.23A AVG 1.809A

F 300K

TPS51123

+VCORE_+-0.5%

+VCORE_+-0.5%

VDD_CORE

TPS51650

TPS51728

POWER BUDGET 94AF 280KOCP 104.5APEAK 94A AVG 45.3A

POWER BUDGET 46A

OCP 50A

F 340K

90W 10A 6036A0002901

65W-75W 8A 6036A0003401

ADAPTOR

120W 12A 6036A0006001

CHG_EN

ACPRES

BQ24725RGRR

BATT_IN

EC_SMB2

CHARGER

+VBAT

F 375KOCP 8.40A R=120K

TPS51216

PEAK 19.82A AVG8.802 A

F 340K

OCP 20.1A R=56.2K

POWER BUDGET 33.033 A

PEAK 7.31A AVG1.7 A

TPS51123

+V3LA_+-5%

+V1.5_+-5%

TPS51216

PEAK2.592A

NMOS

NMOS

PEAK2.592A

POWER BUDGET 4.711A

+V0.75S

+V1.5S

+V3S

NMOS

PEAK2.592APOWER BUDGET 4.711A

+V1.8S

+V3_LAN

OCP 6AF 340K

NMOS

TSP51461

PEAK2.592APOWER BUDGET 4.711A

+V5S

+V0.85S_+-0.5%

+V1.5_CPU

NMOS

704

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

Block Diagram

CSA3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

NEAR EC

120W 12A(6036A0006001)90W 10A(6036A0002901)

FUSE6000

NEAR EC

NEAR IC

65W-75W 8A(6036A0003401)

705

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21L6000

G4G3G2G1

987654321 CN6050

2

1

3Q6002

2 1R6022

21R6021

4321

R6001

3 2 145 6 7 8

Q6000

3 2 145 6 7 8

Q6001

21

R6008

321

4 5678

Q6011

321

45678

Q6010

21R6020

20

21

1312

89

16

19

15

7

10

18

143

17

11

25 14

6

U6000

2 1R6010

G2G1

4321

CN6000

21

R6003

1 TP60031 TP60041 TP6005

21

C76022

1R

6019

21

R60

182

1C

6014

21R6015

21R6017

21R6016

21 R6009

21R6011

21

C6004

21

C6050

21R6052

21 R6054 21 R6053

21R6051

21R6050

21

D6703

21

D6702

21

D6701

21

FUSE6050

21

PAD6000

21

C60

13

21

C60

12

21

C60

11

21

C60

10

21

C7600

21C6027

21

C6026

21

C6028

21C6023

21

C60

25

21

C60

24

21C6020

21

C6022

21

C6021

21

C6032

21C6034

21

C6035

21

C6036

21

C6037

21

C6029

21C6031

21C6030

21

C6001

21

C6002

21

C6003

21C6033

21 R6802

21

C6800

21

C7601

4 3

21

L7600

21FUSE6000

21

R6801

21

R6800

21

R7600

21

R6012

21

R6007

21

R6005

21

R6004

21R6006

21

R6013

21 R6014

21

R6002

4321

R6000

21

D67

00

3

21

D6001

3

21

D60003

21

D6002

321

45678

Q6012

0_5%_2

SHORT_0402

110K_5%_2

4.3K_5%_2

91K_5%_2

CSC0402_DY

100PF_50V_2

HW_I_ADC

21E6

21D221D337C656D8

21D221D337C356C8

21E621E8

21E621E8

21E621E8

21D221D321D221D3

ETQP3W4R7WFN

470PF_50V_2 4.7UF_25V_5 4.7UF_25V_5

AO

N7410

BAT54C_30V_0.2A

0.01_1%_6

LITTLEFUSE_R451015_15A_65V

1000PF_50V_2

SYN_200045GR009G18TZR_9P

SSM3K7002FU_DY

1M_5%_2_DY

1000PF_50V_2

TP30TP30

3M_5%_2_DY

ACES_50315_0047N_002_4P

4.7K_5%_3

TPCA8065_H

LITTLEFUSE_R451012_12A_65V

TP30

10PF_50V_2

NFE31PT222Z1E9LPVADPTR

RSC_0603_DY

TPCA8065_H

0.1UF_16V_2

0.02_1%_6

0.1U

F_2

5V_3

4.7U

F_2

5V_50.047UF_16V_2

VRCHARGER_LG

1UF_10V_2

P3V3AL

ACPRES

POWERPAD_2_0610

AO

N7410

SB

R3U

40P

1_D

Y

BAT54C_30V_0.2A

4.7_5%_3

1UF_25V_3

10_5%_5

EC_SMB2_CLK

TI_BQ24725ARGRR_QFN_20P

0.1UF_16V_2

VRCHARGER_HG

VRCHARGER_PH

0.1UF_16V_2

100PF_50V_2

2200PF_50V_2

SHORT_0402

1K_5%_2

EZJZ0V500AA_DY

RS

C_1

206_

DY

CS

C08

05_D

Y

CSC0402_DY

RSC_0603_DY

0.1U

F_2

5V_3

4.7U

F_2

5V_5

4.7U

F_2

5V_5

CS

C08

05_D

Y

CSC0805_DY

RSC_0603_DY

PVBAT

1M_5%_2

33_5%_2

33_5%_2

0.1UF_25V_3

RSC_0603_DY

4.3K_5%_2

EC_SMB2_DATA

P3V3AL

HW_V_ADC

CSC0603_DY

EZJZ0V500AA_DY

TPCA8065_H

10K_5%_3

3.32K_1%_3

PVBAT

0.1UF_25V_3

SHORT_0402

PVADPTR

0.1UF_16V_2_DY

A3 CS

Block Diagram

BATT_IN

EC_SMB1_DATAEC_SMB1_CLK

0.1UF_25V_3

EZJZ0V500AA_DY

PVPACK

220K_1%_2

33K_5%_2_DY

RSC_0603_DY

CSC0402_DY

PVPACK

P3V3AL

0.1UF_25V_3

DIODES_BAV99

4.3K_5%_220.5K_1%_2

RS

C_1

206_

DY

PVADPTR

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BIC

A2A1

BI

OUT

12

NMOS_4D3S

D

G

S

OUT

G

G

G

G

GND

GND

SMC

SMD

TS

B-I

ID

BATT+

BATT+

G

D S

NM

OS

_4D3S

D

G S

NM

OS

_4D3S

D

G S

NMOS_4D3S

D

G

S

NMOS_4D3S

D

G

S

VCC

TML

SR

P

SR

N

SDA

SCL

REGN

PHASE

LOD

RV

IOUT

ILIM

HIDRV

GN

DC

MS

RC

BTST

BA

TD

RV

AC

P

AC

OK

AC

N

AC

DR

V

ACDET

6

5

4

3

2

1

BIBI

OUT

OUT

C

A2A1

VOUT=((R6100/R6101)+1)*2

VO=(( R6150/R6151)+1)*2

706

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21L6100

21L6150

321 45678

Q6100

3 2 145 6 7 8

Q6150

21

R61

102

1R

6160

21

C6150

21

C6100

3 2 145 6 7 8

Q6151

321 45678

Q6101

21

C6110

21

R6150

21

R6151

21

C6161

21

C6160

21

R7615

21C6155

21R6155

21

C6123

21

C7615

21

C6120

21

C61

2217

8

3

7 24

16

5 2

9 22

1425

14

23

11 20

15

6

1813

12 19

10 21U610021

R6114

21C6115

21

C61112

1

R7610

21

R6113

21

C6121

21

C7610

21

PAD6110

21

R6100

21

R6101

6C614C8

14C7

14C814D4

14D6

14D6

14C7

14C7

6D3

6B3 14D5

14C614C8

6C3 14C8

14D6

14D7

120K

_1%

_2

AO

N74

10

POWERPAD_2_0610

0.1UF_16V_2

AO

N7410

4.7UF_25V_5

5V_PG

0.22UF_6.3V_2

2VREF

VBATP

RSC_0402_DY

VRP5V0A_PH

10K_1%_2

EN_3V

140K

_1%

_2

VRP5V0A

2.2_5%_3

4.7UF_25V_5

VRP5V0A_LG

1UF

_25V

_3

10UF_6.3V_3

VRP5V0A_LDO

A3 CS

Block Diagram

15.4K_1%_2

2.2_5%_3

PVBAT

SKIP_3V_5V

VRP5V0A_VIN

VRP5V0A_PHVRP5V0A_LG

VRP3V3A_LDO

VRP3V3A_HGVRP3V3A_PHVRP3V3A_LG

10K_1%_2

0.1UF_16V_2VRP5V0A_HG

TI_TPS51123RGER_QFN_24P

EN_3V_5V

1UF_6.3V_2

VBATP

6.8K_1%_2

CSC0402_DY

VRP3V3A

150UF_6.3V150UF_6.3V

EN_5V

AO

N7702A

RSC_0603_DY

4.7UF_25V_5

ETQP3W3R3WFNA

ON

7702

A

4.7UF_25V_5

CSC0402_DY

RSC_0603_DY

ETQP3W3R3WFN

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

12

NM

OS

_4D

3S

D

GS

NM

OS

_4D3S

D

G S

+

+

OUT

SG

D

S G

D

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

VF

B1

VF

B2

GN

DS

KIP

SE

L

VR

EG

5E

NC

TM

L

TO

NS

EL

VIN

TR

IP2

TR

IP1

EN

0

VR

EF

DRVL2

VBST2

VREG3

VO2 VO1

PGOOD

VBST1

DRVH1

LL1

DRVL1

LL2

DRVH2

OUT

IN

IN

MODE=100KOHM:TRACKING DISCHARGE

VOUT=REFIN=1.8*(R6201/(R6200+R6201))

707

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R6200

4321

L6200

3 2 145 6 7 8

Q6200

21

C62

20

3 2 145 6 7 8

Q6201

1

5

4

3

6

2

9

1512

18

21

13

16

17

8

20

10

19

7

11

14

U6200

21

PA

D62

20

21

PA

D62

10

21

C62

00

21

C62

12

21

C62

11

21

C62

10

21

R76

202

1C

7620

21C6215

21R6215

21

C62

16

21

C62

21

21

R62

02

21

C62

18

21

C62

17

21

R62

01

21

R62

03

14C2

14C2

14D1

14D1

10.2K_1%_2

2.2U

F_6

.3V

_3

VRP1V5_LG

VRP1V5_HG

FD

MS

0310AS

TI_TPS51216RUKR_QFN_20P

10U

F_6

.3V

_3

PO

WE

RP

AD

1X1M

560U

F_2

.5V

VRP1V5

1V5_PG

PVBAT

PO

WE

RP

AD

_2_0

610

Block Diagram

CSA3

CS

C04

02_D

Y

P0V75S

P5V0A

EN_0V75

EN_1V5

DDR3L_SEL

P0V75M_VREF

FD

MC

8884

0.22

UF

_6.3

V_2

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

0.1UF_16V_22.2_5%_3

VRP1V5_PH

RS

C_0

603_

DY

PCMC104T_1R0MN

0.01

UF

_50V

_2

54.9

K_1

%_2

75K

_1%

_2

100K

_5%

_20.1U

F_1

6V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

NM

OS

_4D3S

D

G SSG

D

IN

VTTSNS

VTTREF

VTTGND

VTT

VREF

VLDOIN

VDDQSNS

VBSTV5IN

TRIP

TML

SW

S5

S3

REFIN

PGOOD

PGND

MODE

GND

DRVL

DRVH

12

OUT

12

+

OUT

708

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

C69

70

21

C69

75

21

C69

72

21R6971

21

R69

73

9876 5

432

1110 1

U6970

21

C69

74

21

R69

72

21L6970

21

C69

71

21

R69

70

14B1

14A2

100K_5%_2

1V8S_PGRICHTEK_RT8068AZQW_WDFN_10P

10U

F_6

.3V

_3

EN_1V8

PAN_ELL5PR2R2N

10U

F_6

.3V

_3

10U

F_6

.3V

_3

CS

C04

02_D

Y

20.5

K_1

%_2

10_5

%_2

Block Diagram

CSA3

P3V3S

1UF

_10V

_2

10K

_1%

_2

VRP1V8S

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

BIN

OUT

LX

LX

LX

PGOOD

EN

PVIN

PVIN

SVIN

NC

FB

TML

OUT

VOUT=1.05V@REFIN=3.3V; VOUT=1.0V@REFIN=GND

709

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

3 2 145 6 7 8

Q6300

21

R63

02

21

C63

20

21

R63

082

1R

6306

21R6307

3 2 145 6 7 8

Q6301

4

1

9

6

12

2

17 16

8

15

3

7

14

10

11

5

13

U6300

21

C63

01

21

C63

00

21

PA

D63

102

1C

6312

4321

L6300

21

C63

11

21

C63

10

21

R76

30

21C6315

21

C63

16

21

C76

30

21

R63

03

21R6315

2 1C6319

21

C63

18

44A3

44A3

46B4

14A8

14A814B6

14B7

P5V0A

PVBAT

VRP1V0_VCCP_LG

2.2U

F_6

.3V

_3

FD

MC

8884 4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

CYN_PCMB063T_R68MS_4P

0.01

UF

_50V

_2

10K

_1%

_2

52.3

K_1

%_2

0.01UF_50V_2

TI_TPS51219RTER_QFN_16P

VCC_SENSE_VCCIO

VSS_SENSE_VCCIO

2.2U

F_6

.3V

_3

11.3

K_1

%_2

VCCIO_SEL

0_5%_2_DY

22U

F_6

.3V

_5

VRP1V05S

VRP1VO_VCCP_HG

VCCP_PG

100K

_5%

_2

FD

MS

0310AS

0.1UF_16V_2

EN_VCCP

2.2_5%_3

PO

WE

RP

AD

_2_0

610

A3 CS

Block Diagram

560U

F_2

.5V

RS

C_0

603_

DY

CS

C04

02_D

Y

VRP1VO_VCCP_PH

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

NM

OS

_4D3S

D

G SSG

D

IN

VSNS

VREF

V5

TR

IP

SW

REFIN

PW

PD

PG

OO

D

PG

ND

MO

DE

GSNS

GN

D

EN

DL

DH

CO

MP

BS

T

OUT

+

12

IN

43

21

IN

OUT

7010

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R6525

21R6524

4321

L6500

21

C6522

21

C6503

21

C6502

21

C6501

21

C6500

21

R7650

21C6515

21

C7650

21R6521

21R6520

21

C6521

21C6520

2 5

242322

15 141718

25

987

1110

416

212019

61

13

3

12

U6500

21

C65

24

21

C65

23

21

C6511

21

C6510

14A6 21B6

45A2

45A2

14B5

45A2

14A6

22UF_6.3V_5

SA_PG

1UF

_6.3

V_2

0.1UF_16V_2

3300PF_50V_2

0.22UF_6.3V_2

5.11K_1%_2

RSC_0402_DY

SHORT_0402

SHORT_0402

VRPVSA_PH

VCCSA_VID1

VCCSA_VID0

EN_SA

VCCSA_SENSE

22UF_6.3V_5

A3 CS

Block Diagram

22UF_6.3V_5 22UF_6.3V_5_DY

0.01UF_50V_2

P5V0A

1UF

_6.3

V_2

TI_TPS51461RGER_QFN_24P

VRPVCCSA

0.1UF_16V_2

CYN_PCMB063T_R33MS_4P

RSC_0603_DY

CSC0402_DY

22UF_6.3V_5

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

43

21 OUT

IN

IN

IN

INV

RE

F

VO

UT

VID

1V

ID0

V5F

ILT

V5D

RV

TML

SLE

WP

GO

OD

MO

DE

GN

D

EN

CO

MP

BST

SW

SW

SWVIN

VIN

VIN

PGND

PGND

PGND

SW

SW

OUT

100K

100K

24K

DNP

R6723

R6635

R6636

DNP DNP

DNP

3.3KDNP

100K

4.7K

42.2K

71.5K 71.5K

3+0DIS.

75KR6627

R6711

R6712

DNP

DNP

DNP

0

DNP

0

0

42.2K

2+13+2

DNP

DNP

DNP

0

0

0

0

DNP DNP

DNP

0

DNP

0

DNP

0R6724

R6722

0

0

0

0

0

0

0

0

0 DNP

DNP

DNP

0

0

R6713

200K

56K

R6715

R6720

R6726

R6725

R6721

R6716

R6714

0

DNP

90.9K

2+0R6620

R6621

R6622

30K

44.2K

39K

DNP

0

DNP

0

39K

R6626

0

R6719

DNP

0

DNP

DNP

0

0

DNP

90.9K

44.2K

UMA/PX

DNP

DNP

DNP

DNP

DNP

DNP

DNP

DNP

DNP

7011

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 R6622

21

R6711

21

R66272

1

R6626

21C6623

321

C6603

21R6718

21

R6631

21

R6630

21C6726

21C6632

4321

L6620

4321

L6610

3 2 145 6 7 8

Q6621

3 2 145 6 7 8

Q6611

21

R67

30

21R6602

21R6607

21

R67

29

21

C66

21

21

C66

20

21

C66

19

21

C66

18

21

C66

17

21

C66

16

21

C66

15

21

C66

14

21

C66

13

21

C66

12

21

C66

11

21

C66

10

21

C6699

21PAD6610

21R6619

21R6623

21

C6631

321 C6601

321 C6600

21R6604

21C6625

21R6609

21R6605

21R6603

21

R7661

21

C7661

21 R6610

21R6608

321

C660221

R7662

21

C7662

21

C66

35

21

R66

33

21

R66

32

3 2 145 6 7 8

Q6610

3 2 145 6 7 8

Q6620

21

C6630

21 R6617

21C6622

21

C6629

21R6601

21C6624

21R6606

21R6616

21

R67

32

21

R66

34

21 R6620

21

R6624

21

R6618

21 R6621

21R6635

21 R663621R6625

13

15

20

19

17

36

43

48

14

41

42

23

31 32 33 34

21

30

49

24

22

2827 292625

10 1

39

45

35

16

21112

40

44

37

47

7 6 38 5 49

38

46

18

U6600

21R6731

21

R67

26

21

R67

22

21

R67

20

21

R67

24

21

C6727

21

R6719 21

R672121

R6723 21R6725

21R6728

21

C6634

21R6713

21

C6633

21

R6628

21R6715

21

R6716

21

R6714

21

R6629

21

R6712

11C8 11B7

PVBAT_CPU

FD

MS

0306AS

240K_1%_2

11D6

0.022UF_16V_2

11D1 11D3 12D5

CPU_CSN2

240K_1%_2

ETQP4LR36AFM

28.7K_1%_2

12D5

CPU_CSP1

CPU_CSN1

0.022UF_16V_2

100K_5%_NTC

28.7K_1%_2

ETQP4LR36AFM

100K_5%_NTC

130_

1%_2

11D111B3PVBAT_CPU

11B711A711A4

100K_5%_NTC

RSC_0402_DY

12D

5

42.2K_1%_2

71.5K_1%_2

RSC_0402_DY

VREF_CPU

100K_1%_2

11A711D4

11D611D7

11A4

11A344C2

44C2

40B449B7

11A7 11B7 11C8 11D4 11D6 11D7

12D

7

11C744C2

11C744C2

11C8 11D611D7

11B7

11C740B449B7

11A344C2

11D5

11D

3

11D

3

11C

3

11C

3

12B

7

12A

7

12B7

12B

5

12A

5

12C

5

12C

5

11A411B711C811D411D611D7

21C341D6

11A411A7

11B711C8 11D4

11D6 11D7

11C7

45C3

21D3

11A411A711D411D7

11D5

11D5

11D5

FD

MC

7696F

DM

C7696

0.1UF_16V_2

CP

U_C

SN

3

AXG_PG

0_5%_2_DY

0_5%

_2

0_5%

_2

0_5%

_2

0_5%

_2

0_5%_2_DY

2.2UF_6.3V_3VR_SVID_CLK

TI_TPS51650RSLR_QFN_48P

Block Diagram

CSA3

VR_ON

CORE_PG

PVCORE

470UF_2V470UF_2V

VREF_CPU

0_5%_2_DY

RSC_0603_DY

CP

WM

3

4.7UF_10V_3

RSC_0603_DY

17.8K_1%_2

17.8K_1%_2

P5V0A

PVBAT

54.9

_1%

_2

VR_SVID_CLK

VR_SVID_DATA

0.1U

F_1

6V_2

P1V05S

4.7U

F_2

5V_5POWERPAD_2_0610

PVBAT

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

68UF_25V

P5V0A15.4K_1%_2

VREF_CPU

0.1UF_16V_2_DY

PVCORE

470UF_2V470UF_2V

10_5%_3

2.2UF_10V_3

2.2_5%_3

0.1UF_16V_22.2_5%_3

CSC0402_DY

2K_5

%_2

P3V3A

2K_5

%_2

AXG_PG

CORE_PG

RSC_0402_DY

100K

_5%

_2

0.1UF_16V_2_DY

P3V3A

0_5%_2_DY

0_5%_2_DY

100K

_5%

_NT

C

15.4K_1%_2

VR_SVID_DATA

20K_1%_2

24K_1%_2

0_5%_2

RSC_0402_DY

PVBAT_CPU

V5_CPU

V5_CPU

VS

SS

EN

SE

CP

U_C

SP

1

CP

U_C

SN

1

CP

U_C

SP

3

CP

U_C

SN

2

CP

U_C

SP

2

VC

CS

EN

SE

GP

WM

1G

PW

M2

GSKIP#

GP

U_C

SN

2

GP

U_C

SP

2

GP

U_C

SN

1

GP

U_C

SP

1

VREF_CPU

CPU_PROCHOT#

VR_ON

EN_PVCORE

24K_1%_2P3V3A 4.

7UF

_25V

_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

CSC0402_DY

CPU_CSP2

FD

MS

0306AS

10K_5%_3

VR_SVID_ALERT#

GFX_VCC_SENSE

11A4

2.2UF_6.3V_3

VREF_CPU

44B

3

44B

3

15.4K_1%_2

47PF_50V_2

VREF_CPU

75K_1%_2

RSC_0402_DY

4.7K_1%_2

RSC_0402_DY

P3V3A

100K_1%_2

47PF_50V_2

11A411C8

0_5%_2

0_5%_2

VREF_CPU

0_5%_2_DY

7.5K_1%_2

GFX_VSS_SENSE

VREF_CPU

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

BI

IN

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

ININININ

V3R3

VDIO

GOCP-R

ALERT#

CPGOOD

CP

WM

3

V5DRV

V5

VREF

CDL2

PGND

GPGOOD

GC

SN

2

GT

HE

RM

GS

KIP

#

GP

WM

1

VR_HOT#

GC

SP

2

GND

GF_IMAX

SLEW

GC

SN

1

GC

OM

P

GC

SP

1

GV

FB

GG

FB

CC

OM

P

CT

HE

RM

CBST2

CSW1

GP

WM

2

VR_ON

CO

CP

-R

CV

FB

CG

FB

CSW2

CDL1

VBAT

CDH1

CC

SP

2

CC

SN

2

CF

-IMA

X

CC

SP

3

CC

SN

1

CC

SP

1

CC

SN

3

CDH2

CBST1

VCLK

OU

T

OU

T

OU

T

ININININ

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

IN

BI

+

IN

OUT

SG

D

IN

SG

DIN

IN

OUT

OUT

OUT

+

1 2

IN

+

+

IN

OUT

OUT

+

IN

NM

OS

_4D3S

D

G S

NM

OS

_4D3S

D

G S

IN

OUT

7012

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21C6628

21C6725

21C6722

21R6710

21R6705

4321

L6720

4321

L6710

4321

L6630

3 2 145 6 7 8

Q6631

3 2 145 6 7 8

Q6711

3 2 145 6 7 8

Q6721

3 2 145 6 7 8

Q6720

3 2 145 6 7 8

Q6710

3 2 145 6 7 8

Q6630

21R6707

21R6702

21R6612

21R6614

21R6615

21R6613

21

C67

17

21

C67

16

21

C67

15

21

C67

14

21

C67

13

21

C67

12

21

C67

11

21

PAD6710

21

C67

10

321

C6700

21R6704

21R6703

321

C6701

21R6709

21R6708

21C6626

21R6611

672

3

9

4 5

81

U6630

21

R7663

21

C7663

21

R7671

21

C7671

21

C66

27

21

C67

21

21C6720

21

R7672

21

C7672

21C6723

21

C67

24

21R6701

672

3

9

4 5

81

U6710

21R6706

672

3

9

4 5

81

U6720

PVBAT_AXG

FD

MS

0306AS

FD

MS

0306AS

P5V0A

ETQP4LR36AFM

100K_5%_NTC17.8K_1%_2

FD

MC

7696

P5V0A

1UF

_6.3

V_2

FD

MS

0306AS

169K_1%_2

11A6 GPU_CSP2

0.022UF_16V_2

169K_1%_2

ETQP4LR36AFM

100K_5%_NTC

GPU_CSP1

0.022UF_16V_2

28.7K_1%_2

12C5

240K_1%_2

GPU_CSN1

11D3

CPU_CSP3

11D111B3

RSC_0603_DY

CSC0402_DY

11D6

0.022UF_16V_2

28.7K_1%_2

POWERPAD_2_0610

12C1

12A5 12C1

11D6

11A6

11B5

11B5

11B5

11A5

12A5 12C5

11A4

11A6

FD

MC

7696

PVBAT_AXG

FD

MC

7696

CPU_CSN3

PVBAT_CPU

PVAXG

470UF_2V

100K_5%_NTC

ETQP4LR36AFM

28.7K_1%_2

PVBAT

A3 CS

Block Diagram

GPWM1

GPWM2

CPWM3

GPU_CSN2

PVBAT_AXG

P5V0A

GSKIP#

TI_TPS51601DRBR_SON_8P

1UF

_6.3

V_2

P5V0A

2.2_5%_3 0.1UF_16V_2

CSC0402_DY

RSC_0603_DY

TI_TPS51601DRBR_SON_8P

2.2_5%_3

1UF

_6.3

V_2

0.1UF_16V_2

CSC0402_DY

RSC_0603_DY

P5V0A

TI_TPS51601DRBR_SON_8P

2.2_5%_3 0.1UF_16V_2

17.8K_1%_2

470UF_2V

PVAXG

17.8K_1%_2

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

PVCORE

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

NM

OS

_4D3S

D

G S

VDD

SWSKIP#

PWM

PAD

GND DRVL

DRVHBST

OUT

12

+

IN

+

IN

OUT

OUT

IN

VDD

SWSKIP#

PWM

PAD

GND DRVL

DRVHBST

IN

OUT

OUT

IN

VDD

SWSKIP#

PWM

PAD

GND DRVL

DRVHBST

OUT

OUT

IN

SG

DSG

DSG

D

NM

OS

_4D3S

D

G S

NM

OS

_4D3S

D

G SIN

P.S. R6750(R1)R6751(R2)R6753(R3)R6754(R4)

R6750(R1)

R6753(R4) 10 K

N/A

111.05

SEYMOUR XTX

VOUT VOUT

R6751(R2)

0.9

0

1

0

1

0

1

0.9

N/A1.15

G1G0

0 1 R6754(R3)

N/AN/A

VOUT

THAMES LETHAMES XT

0.9

VGA TYPE：

1

RESISTOR VALUE

2.2 K

10 K16.5 K

7013

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

4

3

9

5

6

7

1

28

U6950

21PAD6751

21PAD6750

21

R67

58

4321

L6750

21

C69

51

21

C69

54

21

C69

52

321

C6752

21R6754

21R6753 2

1R

6751

21

R67

50

21

C70

11

21

C6751

3 2 145 6 7 8

Q6751

3 2 145 6 7 8

Q6750

321

C67

50

21R7030

21

C70

10

21R7020

21R7016

21

C67

62

21

C67

61

21

R70

17

2

1

R7018

21 R7019

21

PAD6950

21

C69

50

21

R69

502

1R

6951

21

PA

D67

60

21

C67

60

21

C6753

21

R76

752

1C

7675

21

R6752

21R6755

1

9

2

12

16

11

4

8

17

14

7

3

15 5

6

10

13U6750

21 R6756

21

C67

572

1C

6754

21

C69

55

13B1

13C2

13A6

13C3

13B216A116A816C4

13C8

13A3

13D216A1

16A816C4

13D214A6

14B8

14D2

21D6

45D3

49A113A2

56C556F7

13A214A614B814D2

21D645D3

49A1

56D5 56F7

13D1

13B252C6

ANPEC_APL5930KAI_TRL_SOP_8P

EN_VPCIE

10K

_1%

_2

P5V0A22

UF

_6.3

V_5

REA_RT8208BGQW_WQFN_16P

13K

_1%

_2

VRPVCORE_DGPU

1UF

_6.3

V_2

VRPVCORE_DGPU_LG

VRPVCORE_DGPU_PH

4.7U

F_2

5V_5

4.7U

F_2

5V_5

4.7U

F_2

5V_5

POWERPAD_2_0610

560UF_2.5V

1UF

_6.3

V_2

EN_VPCIE

P1V5S_DGPU

470UF_2V

VRPVCORE_DGPU

0_5%_2_DY

10K_5%_2

DGPU_PWR_EN EN_DGPU

PVCORE_DGPU

0.1U

F_1

6V_2

POWERPAD_2_0610

PVPCIE

VRPVPCIE

POWERPAD_2_0610

0_5%_2_DY

1K_5%_2

100K_5%_2_DY

10K

_5%

_2

DGPU_PWRGD

DGPU_PWR_EN

SLP_S3#_3R

VRPVPCIE

P3V3S_DGPU

RS

C_0

603_

DY

CS

C04

02_D

Y 2.2K

_1%

_2

470U

F_2

V

P1V5S_DGPU

VRPVCORE_DGPU_HG

1UF

_10V

_2

10K_1%_2

PWRCNTL_1

2.2_5%_3

PO

WE

RP

AD

_2_0

610

SLP_S3#_3R

Block Diagram

A3 CS

240K_5%_2

PVBAT

P5V0A1U

F_6

.3V

_2

PWRCNTL_0

10K

_1%

_2

16.5K_1%_2

EN_DGPU

1UF

_10V

_22.7K

_1%

_2

68P

F_5

0V_2

10_5%_2

22U

F_6

.3V

_5

0.1UF_16V_2

FD

MS

7692

PAN_ETQP4LR36WFC_4P

FD

MS

0306AS

DGPU_PWRGD

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

+

SG

D

NM

OS

_4D3S

D

G S

+

IN

IN

IN

OUTIN

OUT

OUT

1 2

IN

IN

OUT

12

IN

VOUT

VDDP

VDD

UGATE

TON

PHASE

PGOOD

LGATE

GND

G1

G0

FB

EN_DEM D1

D0

CS

BOOT

VIN

VCNTL

POKENVIN

VOUT

VOUT

FB

GND

OUT

OUT

1 2

IN 1 2

IN

+

VCCSA DGPUVCCIO P1V8S

DDR_P1V53V & 5V

7014

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

C6151

21

C6101

2

13

D7040

21

PAD6121

21 R7000

2

1

3

Q7000

21

C7006

21

C7005

21

C70

20

21R7021

21R7010

3

21

D7000

21 R7012

21

C7003

2 1

C7001

3

21

D7001

2 1

C7002

21

R7013

21PAD6200

21PAD6201

21R7050

21

C7050

21PAD6900

21

C7040

21

C7004

3

21

D7002

21R7040

21

R7041

21PAD6500

21PAD6150

21PAD6100

21

C70

00

21

PAD6120

21 R7002

21 R7001

21 R7003

21

R70

22

21PAD6300

21PAD6301

14A8

6C114C814D4

14D815D6

21F6

6B614C8

8B4

7C721D349B3

7C713A213D2

14A6

14B8

21D6

45D3

49A1

6B3

6D6

14C815D6

21F6

6C114C814D6

10A514A621B6

13A213D2

14A6

14D2

21D6

45D3

49A1

6C36C6

7B314C2

9C6

9B1

9C614A814B6

15D421C3

10B4

6B56C114D414D6

6B614C6

6B4

6D6

8B2

7C1

13A213D214B814D221D645D3

49A1

10C1

6C8

6B5

9D6

6B4

VRP5V0A

P5V0A

P5VAUXON

VRP3V3A_LDO

P15V0A

0.1UF_16V_2

0.1UF_16V_2

0.01UF_50V_2

EN_1V8

0.1UF_16V_2

EN_1V5

CSC0402_DY

P1V5

10K_5%_2

P3V3S

0_5%_2

10K_5%_2

P3V3S

10K

_5%

_2

1UF_25V_3

P3V3S

DIODES_BAV99

SLP_S5#_3R

EN_0V75

0.1U

F_1

6V_2

0.1UF_16V_2

DIODES_BAV99

47K_5%_2SLP_S3#_3R

1V5_PG

VRP5V0A_LG

EN_5V

P5VAUXON

P1V8S

VRP5V0A

Block Diagram

CSA3

SA_PG SA_PG

SLP_S3#_3R

VCCP_PG

P1V05S

VBATP

1V5_PG

VCCP_PG

10K_5%_2

0_5%_3

RSC_0402_DY

POWERPAD_2_0610

POWERPAD_2_0610

VRP1V05S

VCCP_PG

EC_PW_ON#

SSM3K7002BFU

0.04

7UF

_16V

_2

EN_SA

BAT54C_30V_0.2A_DY

SKIP_3V_5VVRP5V0A

VRP3V3A_LDO

0_5%_2

47K_5%_2

EN_3V_5V

CSC0402_DY

EN_3V

P3V3S

POWERPAD_2_0610

POWERPAD_2_0610

POWERPAD_2_0610

VRP1V8S

VRP1V5

RSC_0402_DY

SLP_S3#_3R

PVSA

POWERPAD_2_0610

VRPVCCSA

BAT54_30V_0.2A

VRP3V3A

P3V3AL

POWERPAD_2_0610330UF_6.3V_DY

P5V0AL

VRP5V0A_VIN

EN_VCCP

POWERPAD1X1M

330UF_6.3V_DY

VRP5V0A_LDO

POWERPAD1X1M

P3V3_LDO

POWERPAD_2_0610

0_5%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

IN

OUT

OUT

OUT

1 2

1 2

IN

IN

1 2IN

OUTIN

OUTIN

IN

1 2IN

1 2

1 2

IN

IN

OUT

IN

IN

1 2

1 2IN

1 2

OUT

OUT

OUT

OUT

OUT

++

NC

IN 1 2

IN

G

DS

IN

IN

IN

IN

IN

C

A2

A1

OUT

OUT

IN

IN

7015

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R7112

21R7110

21R7108

321

45678

Q7112

321

45678

Q7109

2

13

D74902

1

3

Q7104

2

1

3

Q7111

2

1

3

Q7110

2

1

3

Q7108

2

1

3

Q7106

2

1

3

Q7103

2

1

3

Q7101

21

C71

01

21

C7100

21

R7104

21

R7100

4

36521

Q7102

21

R7492

4

5 3

21

U7490

4

36521

Q7105

4

36521

Q7107

21

R7106

21PAD7100

21

R7105

21

R71

092

1R

7111

21

R71

14

21

R71

13

21

R7491

2 1

PAD7101

21

C71

03

21

C71

02

2 1

PAD7102

21

C71

05

21

C71

04

21

PAD7103

21

C71

07

21

C71

06

21

R71

07

SHORT_0402

P1V5

SHORT_0402

SHORT_0402

P5V0A

AO6402AL

15B415B816A749B1

40A840B1

56D6

15A415B4

16A7

49B1

15A415B4

15B8

16A7

49B1

15A415B4

15B8

16A7

49B1

14C8 14D8 21F6

14D821C3

P15V0A

P5V0S

P0V75S

P3V3ALP3V3AL

P15V0A

P1V5S

PVBAT P3V3_LDO

P3V3A

P3V3ALP3V3S

2200

PF

_50V

_2

22U

F_6

.3V

_5

CS

C04

02_D

Y

AM7330N_DY

22U

F_6

.3V

_5

SLP_S3_3R

POWERPAD_2_0610

AM7330N

SSM3K7002BFU

BAT54_30V_0.2A

THRM_SHUTDWN#

120K_1%_2

POWERPAD_2_0610

SSM3K7002BFU

POWERPAD_2_0610

POWERPAD_2_0610

TI_TPS3801_01_SC70_5P

SSM3K7002BFU

SLP_S3_3R

SSM3K7002BFU

200_

5%_2

SSM3K7002BFU

SLP_S3_3R

200_

5%_2

SSM3K7002BFU

SLP_S3_3R

22U

F_6

.3V

_5

2200PF_50V_2

SSM3K7002BFU

CS

C04

02_D

Y

470K

_5%

_2

680P

F_5

0V_2

10K_5%_2

P5VAUXON

100K_5%_2

100K_5%_2_DY

EC_PW_ON#

200_

5%_2

AO6402AL

510K_1%_2

AO6402AL

200_

5%_2

A3 CS

Block Diagram

200_5%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

VD

D

SENSE RESET#

GN

D

GN

D

D

G

S

NMOS_4D1S

D

G

S

NMOS_4D1S

1 2

IN

IN

IN

IN

OUT

12

12

1 2

NMOS_4D3S

D

G

S

NMOS_4D3S

D

G

S

NC

G

DS

G

DS

G

DS

G

DS

G

DS

G

DS

G

DS

D

G

S

NMOS_4D1S

OUT

IN

DGPU_HOLD_RST#1 : RESET IS RELEASED

1 : POWER SWITCH TURNED OFF

LOW 0 : KEEP DGPU IN RESET

1 : DGPU POWER IS STABLE

0 : DGPU POWER IS NOT STABLE

0 : DGPU POWER SWITCH TURNED ONHIGH

DURING RESET

HIGH

AFTER RESET

DGPU_PWRGD

DGPU_PWR_EN#

POWER EXPRESS

LOW

7016

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

321

45678

Q7121

2

1

3

Q7115

2

1

3

Q7119

321

45678

Q7114

321

45678

Q7113

21R7047

21

R7038

21R7042

21

R7121

21

C70

24

21

C70

23

2

1

3Q7018

21

R70

342

1

3Q7019

21

R70

33

21

C70

22

21R7035

2

1

3Q7002

S

G

D

Q7003

21

R70

31

21 R7039

21

C70

21

2

1

3

Q7120

21

R7115

21

C7108

4

36521

Q7118

21

R7119

21

C7110

21R7120

21 R7116

13B2 13D2 16A816C4

13B213D216A116C4

51B651C7

16A616C7

13B213D216A116A8

16B716C7

16B7 16D7

16A516D7

16A616B7

16A516B7

200_5%_2

DIODES_DMP2305U_SOT23_3P

SSM3K7002BFU

0_5%_2

CS

C04

02_D

Y

CS

C04

02_D

Y

0_5%_2_DY

P1V8S

Block Diagram

CSA3

0_5%_2

P3V3S

10K_5%_2

DGPU_PWR_EN

DGPU_PWR_EN

CS

C04

02_D

Y

P3V3S

P3V3S P3V3S_DGPU

DGPU_PWR_EN#

P1V5S_DGPU

DGPU_PWR_EN_3R

1M_5

%_2

P15V0A

P3V3_LDO

10K

_5%

_2

CS

C04

02_D

Y

SSM3K7002BFU

10K

_5%

_2

DGPU_PWR_EN

0_5%_2_DY

SLP_S3_3R

DGPU_PWR_EN_3R

AO6402AL

0_5%_6_DY

P1V8S_DGPU

200_5%_2

DGPU_PWR_EN_15R

SSM3K7002BFU

220K_5%_2

680PF_50V_2

SSM3K7002BFU

SSM3K7002BFU

P1V5

SSM3K7002BFU

DGPU_PWR_EN_15R

DGPU_PWR_EN_3R

680PF_50V_2

220K_5%_2

DGPU_PWR_EN_15RAM7330N_DY

AM7330N

AM7330N

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

NMOS_4D3S

D

G

S

G

DS

G

DS

NMOS_4D3S

D

G

S

NMOS_4D3S

D

G

S

IN

IN

IN

G

DS

OUT

G

DS

IN

IN

G

DS

G

S D

IN

G

DS

OUT

IN

IN

D

G

S

NMOS_4D1S

IN

CPU

FAN

3G

WLANPCB

REFERENCE 0~49(PCB SCREW)

BOUNDARY SCAN TEST POINT

GPU

7017

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

1 ST21

1 ST18

1 ST17

1 ST16

1 S3

1 S18

1 S20

1 S8

1 S7

1 S6

1 S5

1 S2

1 S1

1 TP91 TP8 1 TP10

1 TP1

1 TP6

1 TP5

1 TP7

1 TP41 TP3

1 TP2

1 S15

1 S14

1S13

1 S10

1 S11

1 S12

1 FIX5

1 FIX6

1 FIX7

1 FIX1

1 FIX2

1 FIX3

1 FIX81 FIX4

SCREW330_600_1P

SCREW330_600_1P

SCREW330_600_1P

FIX_MASK

FIX_MASK

FIX_MASK

FIX_MASK

A3 CS

TP30

PVAXG

PVBAT

TP30

PVCORE

TP30

TP30

FIX_MASK

TP30

TP30

FIX_MASK

FIX_MASK

TP30 TP30

TP30

Block Diagram

PVADPTR

PVCORE_DGPU

FIX_MASK

SCREW300_1000_1P

SCREW540_1000_NP_1P

SCREW220_700_1P

SCREW300_1000_1P

SCREW330_600_1P

SCREW330_600_1P

SCREW300_1000_1P

SCREW300_1000_1P

SCREW300_1000_1P

SCREW300_1000_1P

SCREW300_1000_1P

TP30

4.2MM

4.2MM

4.2MM

SCREW330_600_1P STDPAD_1.15_6-TOP

STDPAD_1.15_6-TOP

STDPAD_1.15_6-TOP

STDPAD_1.15_6.0_TOP2MM

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

REFERENCE 50-99(HALL SENSOR)

7018

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

D50

21

R50

21

C50

1

23

U50

21D3LID_SW#_3

SFI_SFI0402ML120C_LF_SMD_2P_DY

100K_5%_2

1000PF_50V_2

MAG_MH248BESO_SOT23_3P

P3V3AL

Block Diagram

CSA3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

21

OUTGND

OUT

VDD

WIFI/WIMAX/3G/LTE LED

REFERENCE 100~199(LED)

DC IN / BATTERY CHARGE LED

D155 BRIGHT:WHILE CHARGING BATTERY FROM AC-ADAPTERBLINK:LOW BATTERY

D152 BRIGHT:BOTH AC-ADAPTER IS PLUGGED IN AND BATTERY IS FULL CHARGED

POWER ON LEDD154 BRIGHT WHEN SYSTEM IS POWER OND154 BLINK WHEN SYSTEM GO TO SLEEP

7019

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

D154

21R160

21

D152

1 TP104

1 TP103

1 TP102

1 TP100

21

D155

21R154

21

D156

21R155

21R152

21B6

21D6

21B6

21B6

PWR_WLED#

TP30220_5%_2

P5V0A

19_217_T1D_CP1Q2QY_3T

P5V0A

19_217_T1D_CP1Q2QY_3T

WL_OLED#

150_5%_2

Block Diagram

CSA3

HT_191UYTP30

HT_191UY

P3V3AL

150_5%_2TP30

220_5%_2

BAT_OLED#

TP30

DCIN_WLED#

P3V3S

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

IN

IN

REFERENCE 250~299(KB/TP CONN)REFERENCE 200~249(POWER CONN)

KEYBOARD CONN

POWER CONN

TOUCHPAD CONN

7020

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

G2G1

4321

CN281

G2G1

987654

3433323130

3

29282726252423222120

2

19181716151413121110

1

CN250

21R251

G2

G1

87654321

CN280

21

D200

21

D260

21

D259

21

D258

21D257

21D256

21D255

21D254

21D253

21D252

21D251

21D250

43

21

CN200

32 1

D280

21R252

21R250

21R253

38C839C848A8

20A521D320A521D3

20A721D320A721D3

38C839C848A8

21D3

21D621D621B6

20D321B3

21B3

20C621B3

6

PCH_3S_SMCLK

PHP_PESD5V2S2UT_SOT23_3P_DY

IM_DAT_5IM_CLK_5

IM_CLK_5IM_DAT_5

PCH_3S_SMDATA

P5V0S P3V3S

P5V0S

ACES_50503_0044N_001_4P

ACES_50503_0084N_001_8P

SFI_SFI0402ML120C_LF_SMD_2P_DY

PWR_SWIN#_3

ACES_50224_0020N_001_2P

SFI_SFI0402ML120C_LF_SMD_2P_DY

SCAN_OUT<4>

SCAN_OUT<16>

SCAN_OUT<17>

SCAN_OUT<2>SCAN_OUT<13>SCAN_OUT<15>SCAN_OUT<1>SCAN_OUT<0>SCAN_OUT<11>SCAN_OUT<9>SCAN_OUT<5>SCAN_OUT<6>SCAN_OUT<10>SCAN_OUT<14>SCAN_OUT<8>SCAN_OUT<12>SCAN_OUT<7>SCAN_OUT<3>SCAN_IN<7>SCAN_IN<2>SCAN_IN<3>SCAN_IN<4>SCAN_IN<0>SCAN_IN<5>SCAN_IN<6>SCAN_IN<1>

PTWO_196094_34021_3_34P

SFI_SFI0402ML120C_LF_SMD_2P_DY SFI_SFI0402ML120C_LF_SMD_2P_DY

NUM_LED#_3 200_5%_2SCROLL_LED#_3 200_5%_2_DYCAPS_LED#_3 200_5%_2

7

1

5043

SCAN_IN<7..0>27

3

12814106591101151324

SCAN_OUT<17..0>

0_5%_2_DY

SCAN_IN<7..0>

SCAN_IN<4>

SCAN_IN<3>

SCAN_IN<2>

1

SFI_SFI0402ML120C_LF_SMD_2P_DY

SFI_SFI0402ML120C_LF_SMD_2P_DY

SCAN_IN<6>

SCAN_IN<5>

4

SCAN_IN<7> SFI_SFI0402ML120C_LF_SMD_2P_DY

3

5

SFI_SFI0402ML120C_LF_SMD_2P_DY

7

6

2

SFI_SFI0402ML120C_LF_SMD_2P_DY

SFI_SFI0402ML120C_LF_SMD_2P_DY

SFI_SFI0402ML120C_LF_SMD_2P_DYSCAN_IN<1>

SCAN_IN<0>0 SFI_SFI0402ML120C_LF_SMD_2P_DY

Block Diagram

CSA3

17

16

P3V3S

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

OUT

INININ

IN

OUT

BI

BIBI

BI

BIBI

G

G

4

3

2

1

G

G

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

G2

G1

8

7

6

5

4

3

2

1

21

21

21

21

21

21

21

21

21

21

21

21

G

G

2

1

GM: 100K

REFERENCE 300~389(KBC)

FOR ESD PROTECT

3.CEC

1.CHARGE

CLOSE PIN4

PM: 10K

3 CELL IDPM:6CELL STUFF

EC_SMB3

2.GPU THERMAL

EC_SMB2

1.BATTERY

EC_SMB1

GM:3CELL OPEN

21 70

MODEL,PROJECT,FUNCTION

X01

XXX 21-OCT-2002

1310xxxxx-0-0

1TP331

21R331

21R330

3

87

4

2

5

1

6

U302

3

87

4

2

5

1

6

U300

1TP330

21

C323

21

R323

2 1R3352 1R334

21

C31

6

2

13

D300

21R303

1TP326

1TP325

1 TP324

1TP3231TP322

1TP321

1TP320

1TP319

1TP318

1TP317

1TP316

1TP315

1TP314

1TP311

21

C31

8

21 R319

21R315

21

R345

21

R344

21R302

21R301

2

1

3

Q300

21R339

12

85

13

4142434748495051

353637383940

5253

6160595857565554

111113

81

3433

31

30

22

1666

65

11832

63

62

64

77

U301

104

4

44

115

88764619

125

7

32

1128127126

122

112110

107106105101

100999897

121

91

8483

82

6867

757473

123

9

28

27

26

25

24

23212017

8072157114

120

1091110

6

119

69

117

70

114

8

124

94

93

1089695

79

511

689784518

8786

9290

29

102

103

U301

2 1R300

2 1R346

21

R32

6

21

R31

2

21

R324

1TP307

1TP306

1TP3051TP3041TP303

21

R333

21

C311

21

R320

21

C30

9

21 R314

21 R313

21

C31

7

21

C31

5

21 L300

21

C31

4

21

C30

5

21

C30

6

21

C31

2

21

C30

4

21

C30

3

21

C30

2

21

C30

1

21

C30

0

21

C31

3

21R318

2 1R321

2 1R322

2 1R3172 1R316

21

R332

2 1PAD319

21

C310

21R342

21R34121R340

19C720C740C6

19A719A7

21B1

32A8

20C7

32A8

19B4

52C2

21C621C847A6

47A6

21C621C847A6

21C7 21D647A6

21C7 21D647A6

21C6 21C747A6

21D647A6

21C6 21C747A6

49A549A6

20C7

24A222D7

50D7

14C814D815D6 21B6

13A213D214A614B814D245D349A1

5A721D337C656D85A721D337C356C821D327C221D327B2

30A320A5 20A720A5 20A7

5D3 21D25D3 21D25A7 21D2 37C6 56D85A7 21D2 37C3 56C821D2 27C2

47B7 47B818C4

30B6

20B3

10A514A621B640C8

11C741D6

32A8

20D6

5B721E6

49B3

5D521E65D321E6

41D552C2

20C6 20D3

21E656D6

21D321B6 40C8

22B5

21F4

49A5 49B3

27C3 47C327C3 47C327C3 47C327C3 47C3

27C3 47C351A7

27C3 27C7 28C3 51A8 57A6

27B7 47C2

52C2

51C7 52D6

11A821D1 49B7 49C2

5B821E6

49A8

21C747A621C847A6

36B237B1

21C747A621C847A6

32A8

34B5

5B721E8

5D321E85D521E8

5D321D35D321D3

21D3 49B7 49C2

33C6

14D2 49B3

21D2 27B2

14D8 15D433D8

49A649B7

32A8

32A6

PWR_WLED#CAPS_LED#_3FAN1_PWM

DCIN_WLED#BAT_OLED#

1UF_6.3V_2WINB_NPCE885LA0DX_LQFP_128P

H_PROCHOT_EC

EC_ILIM_SEL TP30

NUM_LED#_3

TP30

EC_CTL2

EC_SPI_CLK_R

EC_SPI_SO_REC_SPI_SI_R

WL_OLED#

EC_PWRSW#

EC_3S_A20GATE

3.3K_5%_2_DY

EC_SPI_SOEC_SPI_CS1#

3.3K_5%_2

EC_SPI_SO

10K_5%_2_DY

3.3K_5%_2_DYEC_SPI_CLK

3.3K_5%_2

WINB_W25Q32BVSSIG_SOIC_8P

EC_SPI_CLKEC_SPI_SI

P3V3A

P3V3A

P3V3A

P3V3A

EC_SPI_CS0#

10K_5%_2

0.1U

F_1

6V_2

10U

F_6

.3V

_5_D

Y

P3V3AL_EC

WINB_W25Q32BVSSIG_SOIC_8P_DY

EC_SPI_SI

AGND_KBC

ACPRESENT

TP30

TP30

0.1UF_16V_2

10_5%_2

SCROLL_LED#_3

EC_MUTE#WOL_AUX_ON#

33_5%_2

33_5%_2

33_5%_2

0.1U

F_1

6V_2

_DY

100K_5%_2

PCH_LCM_BKLTEN

10K_5%_2_DY

P3V3S

10K_5%_2

P3V3AL_EC

BAT54_30V_0.2A

P5VAUXON VCC_POR#

P3V3AL

100K_5%_2

TP30

SLP_S3#_3R

100K_5%_2

EC_SMB2_CLKEC_SMB2_DATA

AOAC_ON#WLON#

USB_OC#_2IM_DAT_5IM_CLK_5

EC_SMB1_CLKEC_SMB1_DATAEC_SMB2_CLKEC_SMB2_DATAAOAC_ON#

FLASH_OVERRIDELID_SW#_3

TP30TP30

SB_USB_2

TP30

10K_5%_2PWR_SWIN#_3

SA_PGFAN_TACH1

10K_5%_2

CPU_PROCHOT#

SCAN_OUT<5>680PF_50V_2

EC_CTL1

POWERPAD1X1M

10K_5%_2

1.8K_5%_2

10K

_5%

_2

SCAN_OUT<17..0>

SCAN_OUT<2>SCAN_OUT<1>

HW_I_ADC

0.1U

F_1

6V_2

WINB_NPCE885LA0DX_LQFP_128P

P3V3AL_EC

EC_32KHZ

HW_V_ADCBATT_IN

0.1U

F_1

6V_2

0_5%_1

10K_5%_2

43_5%_2

H_PECI

P1V05S

SCAN_IN<7..0>

0_5%_1LCM_BKLTENVGA_LCM_BKLTEN

0.1U

F_1

6V_2

P3V3S

P3V3S

FBM_11_160808_121T

10U

F_6

.3V

_5_D

Y

0.1U

F_1

6V_2

H_PROCHOT_EC

SSM3K7002BFU

P3V3AL_RP3V3AL

P3V3AL

P3V3S

3.3K_5%_23.3K_5%_2

10K

_5%

_2

Block Diagram

C CS

2.2_5%_3

10

32

6

45

87

9

1110

1312

14

1615

17

012

543

67

SCAN_OUT<0>

SCAN_OUT<3>SCAN_OUT<4>

SCAN_OUT<9>

SCAN_OUT<11>SCAN_OUT<10>

SCAN_OUT<12>

SCAN_OUT<16>SCAN_OUT<15>

SCAN_OUT<17>

SCAN_IN<0>SCAN_IN<1>SCAN_IN<2>

SCAN_IN<5>SCAN_IN<4>SCAN_IN<3>

SCAN_IN<6>SCAN_IN<7>

100K_5%_2

SCAN_OUT<6>SCAN_OUT<7>

SCAN_OUT<13>SCAN_OUT<14>

0.1U

F_1

6V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

FAN_TACH1

4.7U

F_6

.3V

_3

SCAN_OUT<8>

TP30

10K_5%_2

1.8K_5%_2

TP30

TP30

TP30

TP30

TP30

TP30

TP30TP30

AGND_KBC

TP30

P3V3AL

TP30

LAN_RST#

VCC_POR#

EC_PECI

PCI_3S_CLKRUN#

LPC_3S_AD<3>LPC_3S_AD<2>LPC_3S_AD<1>LPC_3S_AD<0>

LPC_3S_FRAME#CLK_KBPCI

BUF_PLT_RST#

PCI_3S_SERIRQ

KBRST#

RUNSCI0#_3

EN_PVCORERSMRST#

ACPRESLCM_BKLTEN

TP30

P3V3AL

LOW_BAT#_3

P3V3AL_R

EC_SPI_SIEC_SPI_SO

0.1U

F_1

6V_2

HDMI_HPD_EC

EC_SPI_CLKEC_SPI_CS0#

P3V3AL

EC_CTL3

EC_BKLTEN

HW_I_ADC

BATT_INHW_V_ADC

0.1U

F_1

6V_2

EC_SMB1_CLKEC_SMB1_DATA

RSMRST#

USB_OC#_1

SLP_S5#_3R

WLON#

EC_PW_ON#SB_USB_1

PCH_PWROK

SB_USB_0

USB_OC#_0

TP30

DOC.NUMBER

of

INVENTECTITLE

DATE

CODE

E

D

C

B

A

7 6 5 4 3 2 1

7 6 5 4 3

E

D

C

B

A

FF

8

CHANGE by

8

REV

2 1

SHEET

SIZE

IN

12

OUT

BIBI

INOUT

OUTOUT

OUT

IN

IN

BIBI

BIBI

OUT

OUT

IN

OUT

DI_ID0

CLK

/HOLD_IO3

VCC

GND

/WP_IO2

DO_IO1

/CS

DI_ID0

CLK

/HOLD_IO3

VCC

GND

/WP_IO2

DO_IO1

/CS

IN

OUT

IN

IN

OUT

OUT

NC

IN

IN

OUT

OUTIN

ININ

OUT

IN

OUTIN

OUT

G

DS

OUTOUT

BIBI

BIBI

BIBI

KBSOUT11_P80_DAT/GPIOC3

KBSOUT10_P80_CLK/GPIOC2

GPIO55/CLKOUT/IOX_DIN_DIO

VTT

PECI

GPIO87/CIRRXM/SIN_CR

GP(I)O83/SOUT_CR/TRIST#

GPIO00/EXTCLK

VCC_POR#

GPIO40/F_PWM

GPIO45/E_PWM

GPIO33/H_PWM

GPIO66/G_PWM

GPIO32/D_PWM

GPIO13/C_PWM

GPIO21/B_PWM

GPIO15/A_PWM

GPIO01/TB2

GPIO14/TB1

GPIO56/TA1

KBSIN7/GPIOA7

KBSIN6/GPIOA6

KBSIN5/GPIOA5

KBSIN4/GPIOA4

KBSIN3/GPIOA3

KBSIN2/GPIOA2

KBSIN1/GPIOA1/N2TMS

KBSIN0/GPIOA0/N2TCK

GPIO57/KBSOUT17

GPIO60/KBSOUT16

KBSOUT15/GPIO61/XOR_OUT

KBSOUT14/GPIO62

KBSOUT13/GPIO63

KBSOUT12/GPIO64

KBSOUT9/GPOC1/SDP_VIS#

KBSOUT8/GPIOC0

KBSOUT7/GPIOB7

KBSOUT6/GPIOB6/RDY#

KBSOUT5/GPIOB5/TDO

KBSOUT4/GPOB4/JEN0#

KBSOUT3/GPIOB3/TDI

KBSOUT2/GPIOB2/TMS

KBSOUT1/GPIOB1/TCK

KBSOUT0/GPOB0/JENK#

F_SDIO_F_SDIO0

F_SDI_F_SDIO1

GPIO51/N2TCK

GPIO36

GPIO20/TA2/IOX_DIN_DIO

GPIO34/CIRRXL

GPIO02

VCORF

GPIO16

GP(I)O84/IOX_SCLK/XORTR#

GPO82/IOX_LDSH/TEST#

GPIO30/F_WP#

GPIO05/AD4

GPIO97/DA3

GPIO04/AD5

GPIO03/AD6

GPIO07/AD7

GPIO06/IOX_DOUT

GPIO81/F_WP#

GPIO77/SPI_DI

GPIO76/SPI_DO

GPIO75/SPI_SCK

GPIO41/F_WP#

GPIO72

GPIO71

GPIO70

GPIO53/SDA4A

GPIO52/PSDAT3/RDY#

GPIO50/PSCLK3/TDO

GPIO47/SCL4A

GPIO46/SDA4B/CIRRXM/TRST#

GPIO44/SCL4B/TDI

GPIO43/SDA3B/TMS

GPIO42/SCL3B/TCK

GPIO24 GPIO27/PSDAT2

GPIO35/PSDAT1

GPIO26/PSCLK2

GPIO37/PSCLK1

GPIO96/DA2

GPIO95/DA1

GPIO94/DA0

GPIO93/AD3

GPIO92/AD2

GPIO91/AD1

GPIO90/AD0

VREF

F_CS0#

F_SCK

GPIO31/SDA3A

GPIO74/SDA2

GPIO22/SDA1/N2TMS

GPIO23/SCL3A

GPIO73/SCL2

GPIO17/SCL1/N2TCKGPIO67/N2TMS

GPIO10/LPCPD#

GPIO65/SMI#

ECSCI#/GPIO54

KBRST#/GPIO86

GPIO85/GA20

SERIRQ/GPIOF0

LRESET#/GPIOF7

LCLK/GPIOF5

LFRAME#/GPIOF6

LAD0/GPIOF1

LAD1/GPIOF2

LAD2/GPIOF3

LAD3/GPIOF4

GPIO11/CLKRUN#

AG

ND

GN

D6

GN

D5

GN

D4

GN

D3

GN

D2

GN

D1

VD

D

AV

CC

VC

C5

VC

C4

VC

C3

VC

C2

VC

C1

OUT

OUT

OUTOUT

OUT

OUT

OUT

IN

OUT

IN

BI

OUT

IN

BI

IN

IN

OUT

OUTIN

OUT

OUT

BI

OUT

OUT

OUT

OUTOUT

OUTBI

BIBIBIBI

BI

IN

IN

IN

BI

OUT

IN

IN

OUT

OUTIN

OUT

ININ

OUTIN

OUT

OUT

IN

IN

FOR SW MODE

REFERENCE 400~499(LAN)

FOR LDO MODE

C417:8161 STUFF 8162 OPEN

7022

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

78

3

1 3029

1411 1512

272625

3536 33 32

10

24

2

28

40

23

39 38

5

41 37

4

6

13

9

1634 31

2221

20191817

U400

21

C418

21

C42

4

21

C40

6

S

G

D

Q400

2 1R404

21

C42

7

21

C41

421

C41

2

21

C40

3

21

R402

21R406

21L400

21

C40

5

21

C40

7

2 1R403

21

C40

8

21

C40

2

21

R40121C42121C422

21 C420

21

C42

52

1

C423

21

C419

21

C417

21

C416

21

C40

4

21PAD400

21

C40

1

21 R400

21

C40

0

21

C42

6

21 R405

21

C41

521

C41

3

21

C41

0

21X400

21

C40

9

48C748C748D848D8

22A522A5

21B6

23B823B8

23B823B823C6

23B823C6

48C

748

D7

48D

8

23C823D6

48D848D8

22B5

23B8

22B5

23C823D6

21D6

P3V3A_LAN

CLK_PCIE_LAN_DNCLK_PCIE_LAN_DPPCIE_LAN_TX_DPPCIE_LAN_TX_DN

PCIE_LAN_RX_C_DPPCIE_LAN_RX_C_DN

LAN_X1LAN_X2

PCIE_WAKE#LAN_RST#

ATHEROS_AR8161_BL3A_R_QFN_40P

0.1UF_16V_2

PAVDDH_LAN

0.1U

F_1

6V_2

1UF

_6.3

V_2

PAVDDH_LAN

30K_5%_2

P3V3S

1000

PF

_50V

_2_D

Y

0.1UF_16V_2 0.1UF_16V_2

1UF_6.3V_2_DY

LAN_TRD3_DPLAN_TRD2_DNLAN_TRD2_DPLAN_TRD1_DNLAN_TRD1_DP

1UF

_6.3

V_2

_DY

10U

F_6

.3V

_5_D

Y

P3V3A_LAN

10U

F_6

.3V

_3_D

Y

0.1U

F_1

6V_2

_DY

LQM21PN2R2MC0D_DY

PVLX_LAN

CLKREQ_LAN#

CS

C04

02_D

Y

DIODES_DMP2305U_SOT23_3PP3V3A

1UF

_6.3

V_2

0.1U

F_1

6V_2

10K_5%_2_DY

10K_5%_2

0.1U

F_1

6V_2

RSC_0603_DY

PDVDDL_LAN1U

F_6

.3V

_2

PDVDDL_LAN

PAVDDL_LAN

1UF

_6.3

V_2

4.7U

F_6

.3V

_3

0.1U

F_1

6V_2

PVLX_LAN

100K_5%_2

0.1UF_16V_2

LAN_TRD0_DP

PAVDDL_LAN

PCIE_LAN_RX_DPPCIE_LAN_RX_DN

LAN_X2

0.04

7UF

_16V

_2

0.1UF_16V_20.1UF_16V_2

LAN_TRD3_DN

2.37K_1%_2

LAN_X1

33P

F_5

0V_2

PAVDDVCO_LAN

P3V3A_LAN

PAVDDL_LAN

POWERPAD_2_0610

25MHZ

33P

F_5

0V_2

LAN_TRD0_DN

WOL_AUX_ON#

Block Diagram

CSA30.

1UF

_16V

_2

0_5%_3

0.1UF_16V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

1 2

TX_P

TX_N

TESTMODE

SMDATA

SMCLK

PPS

NC

LED_2

AVDDH

TRXN3

XTLO

XTLI

WAKEN

VDD33

TR

XP

1

TR

XP

0

TR

XN

1

TR

XN

0

RX

_PR

X_N

RE

FC

LK_P

RE

FC

LK_N

RBIAS

PERSTN

LXLE

D_1

LED

_0

ISOLATN

GN

D

DV

DD

L_R

EG

CLKREQN

AVDDL_REG

AV

DD

L

AVDDH_REG

AV

DD

33A

VD

DL

AV

DD

LT

RX

P3

AV

DD

LT

RX

N2

TR

XP

2

G

S D

OUT

ININININOUT

BI

IN

INOUT

ININ

OUT

OUT

OUT

BIBIBIBIBIBIBI

REFERENCE 400~499(LAN)

7023

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

C47

6

6543

21 U461

6543

21 U460

15

13

14

23

24

3

12

2

1

9

8

7

6

5

4

22

21

20

19

18

17

16

11

10

U470

21

C46

1

21

C46

0

1416

31

911

86

7

54

2 15

1312

10

U471

G2G1

87654321 JACK470

21

R47

0

21

C475

2 1R476

2 1R478

2 1R479

2 1R477

21

R47

5

21

R47

4

21

R47

3

21

R47

2

21

R47

1

21

C47

7

21

C47

9

21

C47

8

21

C47

4

21

C47

3

21

C48

3

21

C47

2

21

C48

2

21

C47

1

21

C48

1

21

C47

0

21

C48

0

10P

F_5

0V_2

CS

C04

02_D

Y

75_5

%_3

BOTH_NA0069RLF_SMD_24P

PANJIT_PJSRV05_4_DSSOT236P

PANJIT_PJSRV05_4_DSSOT236P

LAN_TRD1_DN

LAN_TRD2_DP

LAN_TRD2_DN

LAN_TRD3_DP

LAN_TRD3_DN

P3V3AL

0.1U

F_1

6V_2

22B523D6

23B223C2

23B223C2

23B223C323C223D323C223D3

23B2 23D5

23B2 23D5

23B2 23D5

23C2 23D523C2 23D5

23B2 23D523B2 23D5

23B2 23D5

22B523B8

22B523C822B523C8

22B523B8

23B223C2

23B223C323B223C2

22B5

22B523D6

22B523C6

22B523C6

22B5

23C2 23D5

23C2 23D5

23C3 23D5

23C3 23D5

23D3 23D5

23D3 23D5

23C2 23D5

23C2 23D5

22B5

22B5

LAN_TRD0_DN

LAN_C_DP

LAN_D_DP

LAN_RD_DPLAN_TD_DNLAN_TD_DP

SANTA_130456_051_8P

Block Diagram

CSA3

75_5

%_3

75_5

%_3

75_5

%_3

RSC_0603_DY

RSC_0603_DY

75_5

%_3

0.1U

F_1

6V_2

0.1U

F_1

6V_2 LAN_C_DN

LAN_D_DN

LAN_C_DP

LAN_TD_DNLAN_TD_DP

LAN_RD_DNLAN_RD_DP

LAN_D_DP

LAN_TRD1_DN

LAN_TRD0_DNLAN_TRD0_DP

LAN_TRD1_DP

RSC_0402_DY

RSC_0402_DY

75_5

%_3

1000PF_2000V_6

CS

C04

02_D

Y

0.1U

F_1

6V_2

CS

C04

02_D

Y

0.1U

F_1

6V_2

CS

C04

02_D

Y

0.1U

F_1

6V_2

CS

C04

02_D

Y

BOTH_TS21C_HF_SOP_16P

0.1U

F_1

6V_2

LAN_D_DN

LAN_RD_DNLAN_C_DN

1UF

_6.3

V_2

P3V3AL0.

1UF

_16V

_2

LAN_TRD0_DP

LAN_TRD1_DP

LAN_C_DN

LAN_C_DP

LAN_RD_DN

LAN_RD_DP

LAN_TD_DP

LAN_TD_DN

LAN_D_DP

LAN_D_DN

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

I/O 4

VDD

I/O 3I/O 2

GND

I/O 1

I/O 4

VDD

I/O 3I/O 2

GND

I/O 1

TXTC

TX4-

TX4+

TX1-

TX+

TDCT

TD4-

TD1-

TD+

TDCT

TD3-

TD3+

TD2-

TD2+

TDCT

TXTC

TXTC

TX2+

TX2-

TX3+

TX3-

TXTC

TD4+

TDCT

TX-

TX+

TD-

TD+

RX-

RX+

RD-

RD+

RCT

NC

NC

TCT TCT

NC

NC

RCT

G

G

P8

P7

RX-

P5

P4

RX+

TX-

TX+

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUTOUT

OUTOUT

OUT

IN

INININ

IN

IN

ININ

ININ

IN

ININ

ININ

IN

IN

ANALOG

DIGITAL

BLM18PG121SN1(6014B0041601_0603)

CLOSE TO PIN13

(THERMAL PAD 4X4 VIAS)

BLM18PG121SN1(6014B0041601_0603)

REFERENCE 500~549(AUDIO CODEC)CLOSE TO PIN27

TIED UNDER OR NEAR CODEC

RESERVE FOR EMI

7024

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 R503

2 1C516

2 1C517

2 1C515

2 1C514

21

C5232

1

C512

2710

44

45

41

40

48

18

13

5 8

11

43

42

46

39

4 12

20

29

17

16

3031

22

21

15

14

24

23

28

19

33 32

32

49

47

71 9

3436 35

6

37

26

38

25

U500

21R505

21R516

21R515

21PAD500

21

C51

8

21

C51

0

21

C52

2

21

C50

8

21

C50

9

21

C52

9

21

C53

1

21

C53

2

21

C50

6

21

C50

7

21

C50

5

21

C50

0

21

C53

6

21 R502

21 R506

2 1C521

21 R50721C520

21 R501

21 R500

21R514

21

C50

4

21

C50

1

21

C513

21

C519

21

C502

21

C503

SHORT_0402

HDA_R_BITCLK

HDA_R_SDIN0

SPK_OUT_L_P0.

1UF

_16V

_2

4.7U

F_6

.3V

_3

25B8

SPK_OUT_L_N

SPK_OUT_R_P

SPK_OUT_R_N

AGND_AUDIO

0.1U

F_1

6V_2

P3V3S

4.7U

F_6

.3V

_3

2.2UF_6.3V_3

AGND_AUDIOP5V0S_AUDIO_AVDD

P5V0S_PVDD

AGND_AUDIO

REA_ALC269Q_VB6_CGT_QFN_48P

0.1UF_16V_2

22_5%_2HDA_3S_BITCLK

100_5%_2

25B8

25B8

25B8

25C5

25B2

47C8

47C7

47B7

21D6

47B7

47C7

47C7

25C2

25C2

25D3

25D3

25A3

25B3

34B3

CSC0402_DY

AGND_AUDIO

POWERPAD1X1M

CSC0402_DY

AGND_AUDIO

0.1UF_16V_2

A3 CS

Block Diagram

4.7U

F_6

.3V

_3

0.1U

F_1

6V_2

0.1U

F_1

6V_2

0_5%_3

0.1U

F_1

6V_2

_DY

10U

F_6

.3V

_3_D

Y

20K_1%_2

20K_1%_2

39.2K_1%_2

MICS

HPS

0.1U

F_1

6V_2

1UF

_6.3

V_2

0.1U

F_1

6V_2

22P

F_5

0V_2

_DY

PCSPKR_PCH_3

HDA_3S_SDIN0

0_5%_3

47K_1%_2

100PF_50V_2

4.7K_1%_2

EC_MUTE#HDA_3S_SDOUT

HDA_3S_SYNCHDA_3S_RST#

MIC_L

MIC_R

MIC_REF_RMIC_REF_L

HP_LHP_R

10UF_6.3V_3AGND_AUDIO

AGND_AUDIO

P5V0S

P3V3A

P5V0S_AUDIO_AVDDP5V0S

P5V0S_AUDIO_AVDD

2.2UF_6.3V_32.2UF_6.3V_3

4.7U

F_6

.3V

_3

MIC_IN_CLK_R

CSC0402_DY

CSC0402_DY

CSC0402_DY

1UF

_6.3

V_2

MIC_IN_DATA

MIC_IN_CLK

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

ININ

IN

IN

ININ

IN

IN

IN

BI

BI

GND

SPDIFO

EAPD

PVDD2

SPK-R+

SPK-R-

PVSS2

PVSS1

SPK-L-

SPK-L+

PVDD1

AVDD2

AVSS2

CB

P

CB

N

CP

VE

E

HP

-OU

T-R

HP

-OU

T-L

MIC

1-V

RE

FO

-L

MIC

1-V

RE

FO

-R

MIC

2-V

RE

FO

LDO

-CA

P

VR

EF

AV

SS

1

AV

DD

1

LINE1-R

LINE1-L

MIC1-R

MIC1-L

MONO-OUT

JDREF

Sense-B

MIC2-R

MIC2-L

LINE2-R

LINE2-L

Sense A

PC

BE

EP

RE

SE

T#

SY

NC

DV

DD

-IO

SD

AT

A-I

N

DV

SS

2

BIT

-CLK

SD

AT

A-O

UT

PD

#

GP

IO1/

DM

IC-C

LK

GP

IO0/

DM

IC-D

AT

A

DV

DD

1

BI

BI

OUTOUTOUTOUT

OUT

OUT

OUT

OUT

1 2

EMI CAPACITORS TO CLOSE TO JACK SIDE

INTERNAL SPEAKERS

MICPHONE

AUDIO JACKS

NOTE:SPK TRACE SHOULD 30~40 MILS WIDTH

REFERCE 600~649(JACK/MIC/SPEAKER)

RESERVE FOR EMI

HEADPHONE

RESERVE FOR EMI

7025

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

R600

21

R601

G2G1

6

543

21

JACK601

G2G1

6

543

21

JACK600

1TP607

1

TP606

1TP605

1

TP604

1TP603

1TP602

1TP601

1TP600

21C607

21

C606

21

C60

5

21

C60

2

21

C60

3

21

C60

4

21

C60

9

21

C60

8

21

C61

1

21

C61

0

G2G1

4321

CN600

32

1

D600

21

C601

21

C600

21

R604

21

R605

21

R603

21R602

120_5%_2

120_5%_2

24B2

AGND_AUDIOPHP_PESD5V2S2UT_SOT23_3P_DY

HP_R

1K_5%_2

MIC_R 24C2

24C2

HP_L

24D3

24B2

24C7

24D324C724C724C7

24D3

24D3

CSC0402_DY

470P

F_5

0V_2

_DY

470P

F_5

0V_2

_DY

TP30

MICS

470P

F_5

0V_2

_DY

AGND_AUDIO

TP30

470P

F_5

0V_2

_DY

TP30

470P

F_5

0V_2

_DY

SPK_OUT_L_P

470P

F_5

0V_2

_DY

HPS

Block Diagram

CSA3

AGND_AUDIO

TP30

TP30

SINGA_2SJ_T351_019_6P

470P

F_5

0V_2

_DY

470P

F_5

0V_2

_DY

SPK_OUT_R_PSPK_OUT_R_NSPK_OUT_L_N

2.2UF_6.3V_3

MIC_L2.2UF_6.3V_3

1K_5%_2

2.2K_5%_2

MIC_REF_R

MIC_REF_L

TP30

TP30TP30

AGND_AUDIO

SINGA_2SJ_T351_019_6P

AGND_AUDIOCSC0402_DY

2.2K_5%_2

ACES_50224_0040N_001_4P

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

OUT

OUT

ININ

ININ

G1

1

2

3

4 G2

IN

BI

IN

BI

IN

RESERVE FOR EMI

REFERNCE 900~999(CARDREADER)

7026

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R901

11

6

34

G2G1

987

2

5

1

10

CN900

21

C901

23

724

25

16 15 14 13

12

11

10

922

21

20

19

18

8

61

17

32 54

U900

21

C905

21

C906

21

C904

21

C902

21

C903

21

C900

21PAD900

21R900

SD_R_CLK SD_CLK

SHORT_0402

26B3

SD_CMD

SD_CD#

26B5

26C726C526C5

26D5

26C5

26C5

26B3

26B3

26B3

26B3

26B3

51B2

51B2

26B3

26B3

26C7

SD_WP

SD_D2SD_D1SD_D0

SD_CMD

SD_CLK

SD_CD#

TAI_PSDAT0_09GLBS1ZZ4H1_11P

P3V3S_CR

4.7UF_6.3V_3

CARD_REF

2.2UF_6.3V_3

REA_RTS5129_QFN_24P

1UF_6.3V_2

P3V3S_CARD

0.1UF_16V_2

A3 CS

Block Diagram

SD_D2

SD_D3

P3V3S

POWERPAD_2_0610

0.1UF_16V_2

6.2K_1%_2

1UF_6.3V_2

0.1UF_16V_2

P3V3S_CR

SD_D0

USB_CR_DN

USB_CR_DP

SD_WP

SD_D1

SD_D3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BI

WRIT_PROTECT

VSS2

VSS1

VDD

G2

G1

DAT2

DAT1

DAT0

CMD

CLK

CD-DAT3

CARD_DETECT

BI

BIBI

BI

XD_D7

XD_CD#V18

TML

SP

9

SP

8

SP

7

SP

6

SP5

SP4

SP3

SP2SP14

SP13

SP12

SP11

SP

10

SP1

SD

RE

G

RR

EF

GP

IO0

DP

DM

CA

RD

_3V

3

3V3_

IN

BIBI

BIBI

BI

BI

BI

BI

BI

BI

BIBI

1 2

BI

SUPPORT AOAC:OPEN SUPPORT AOAC:STUFF

REFERENCE 1300~1349(WLAN)

MINI CARD 1(WLAN)

RESERVE FOR EMI

7027

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21C1303

1

20

3638

3230

1113

47

3331

22

2523

49

19

8

17

10121416

42

4644

G2G1

7

35

51

9

6

525048

4341

40

4

393735

34

29282726

21

2

1815

45

24

CN1300

2

1

3

Q1301

4

36521

Q1300

21

C1306 21

C1307

21

R1304

21

C1302

21

C1301

21R1300

21

C1304

21

C1305

21 R1302

21 R1303

21 R1301

PCIE_WLAN_TX_DN

22B549A549B3

48B7

48D848D8

48D8

48B7

51A721E327C328C351A857A6

48B748D748D8

27C752B6

21E347C2

48D8

21E3 27C728C3 51A857A6

21E3 47C321E3 47C321E3 47C3

51B2

21E3 47C3

48D248D3

48D2 48D3

21D2 21D3

21E3 47C3

21D2 21D3

27B752B6

51B2

PCIE_WAKE#

CLK_PCIE_WLAN_DN

PCIE_WLAN_RX_DPPCIE_WLAN_RX_DN CSC0402_DY

CLK_PCIE_WLAN_DP

CLK_PCI_DEBUGBUF_PLT_RST#

CLKREQ_WLAN#

BTIFON#

PCI_3S_SERIRQ

PCIE_WLAN_TX_DP

0_5%_2

0_5%_2

P1V5S

P3V3S

0_5%_5

BUF_PLT_RST#

LPC_3S_AD<0>LPC_3S_AD<1>LPC_3S_AD<2>

0.1UF_16V_210UF_6.3V_3

USB_WLAN_DP

0_5%_2

LPC_3S_AD<3>

PCH_3A_ALERT_CLKPCH_3A_ALERT_DAT

0.1UF_16V_2

AM3423P_DY

AOAC_ON#

LPC_3S_FRAME#

WLON#

SSM3K7002BFU

CSC0402_DY

CSC0402_DY10UF_6.3V_3

P3V3A

Block Diagram

CSA3

BTIFON#

USB_WLAN_DN

BELLW_80003_4021_52P

0_5%_2_DY

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

W_DISABLE#

WAKE#

USB_D-

USB_D+

SMB_DATA

SMB_CLK

REFCLK-

REFCLK+

PWR_LED#

PETP0

PETN0

PERP0

PERN0

PERST#

NUM_LED#

LPC_PCI_CLK

LPC_FRAME#

LPC_DEBUG_RST#

LPC_AD3

LPC_AD2

LPC_AD1

LPC_AD0

LED_WWAN#

LED_WPAN#

LED_WLAN#

GG

CLKREQ#

CH_DATA

CH_CLK

CAPS_LED#

GND

1.5V

3.3V

GND

1.5V

Reserved

Reserved

GND

GND

Reserved

Reserved

GND

GND

GND

1.5VGND

GND

GND

3.3V

GND

GND

+V3AL

+3.3VAUX

G

DS

IN

S

PMOS_4D1SG

D

IN

IN

IN

BI

BI

BIBI

BIBI

IN

IN

ININ

ININ

BI

IN

OUTOUT

ININ

IN

REFERENCE 1400~1499(3G)

CLOSE TO CONN SIDE

7028

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

1

20

3638

3230

1113

47

3331

22

2523

49

19

8

17

10121416

42

4644

G2G1

7

35

51

9

6

525048

4341

40

4

393735

34

29282726

21

2

1815

45

24

CN1400

21C140721C1408

21C140621C1405

2

1

3

Q1400

21

C14

12

21

C14

11

21

C14

10

1TP1402

1TP1401

1TP1400

21

C14

04

21

C14

03

4

6

3

1

52

U1400

P6P1P2

P7

P5

G2 G1

P3

CN1401

21

C1400

21

C1401

21

C1402

TAI_PMPAT5_06GLBS7NI4H1_6P

52D6

47B3

47B3

47B3

28A428A6

28A4

51B251B2

21E3 27C327C7 51A857A6

28A4 28B6

28C328C328B6 28D3

52D6

28D3

28A428D3

47B3

MSATA_DET

SATA_MINICARD_TX_DP

SATA_MINICARD_RX_DP

SATA_MINICARD_TX_DNSATA_MINICARD_C_TX_DP

UIM_CLKUIM_DATA

UIM_RST

SATA_MINICARD_C_TX_DN

3G_OFF#

USB_3G_DNUSB_3G_DP

BUF_PLT_RST#

UIM_PWR

SATA_MINICARD_C_RX_DNSATA_MINICARD_C_RX_DP

BELLW_80003_4021_52P

P3V3S

0.01UF_50V_2

UIM_CLKUIM_RSTUIM_PWR

0.01UF_50V_2

0.01UF_50V_2

0.01UF_50V_2TP24

SSM3K7002BFU

3G_ON#

NXP_IP4223CZ6_SOT457_6P_DY

UIM_DATA

P1V5S

22U

F_6

.3V

_5

0.1U

F_1

6V_2

0.1U

F_1

6V_2

22UF_6.3V_50.1UF_16V_2

TP24

P3V3S

0.1UF_16V_2

UIM_PWR

0.1U

F_1

6V_2

4.7U

F_6

.3V

_3

Block Diagram

CSA3

TP24

SATA_MINICARD_RX_DN

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OUT

OUT

W_DISABLE#

WAKE#

USB_D-

USB_D+

SMB_DATA

SMB_CLK

REFCLK-

REFCLK+

PWR_LED#

PETP0

PETN0

PERP0

PERN0

PERST#

NUM_LED#

LPC_PCI_CLK

LPC_FRAME#

LPC_DEBUG_RST#

LPC_AD3

LPC_AD2

LPC_AD1

LPC_AD0

LED_WWAN#

LED_WPAN#

LED_WLAN#

GG

CLKREQ#

CH_DATA

CH_CLK

CAPS_LED#

GND

1.5V

3.3V

GND

1.5V

Reserved

Reserved

GND

GND

Reserved

Reserved

GND

GND

GND

1.5VGND

GND

GND

3.3V

GND

GND

+V3AL

+3.3VAUXBIBI

OUT

BIBI G

DS

IN VIO

VBUSGND

VIO

VIO VIO

BI BIININ

G

I_O

VPP

VCC

RST

CLK

G

GND

IN

IN

BIBI

BIBI

SATA ODD

PLACE CLOSE TO CONNECTOR(<100MILS)

40MIL

REFERENCE 1700~1749(HDD)

SATA HDD

REFERENCE 1750~1799(ODD)

PLACE CLOSE TO CONNECTOR(<100MILS)

7029

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

R1750

2

1

3

Q1750

21

R1752

21R1751

2 1C1758

21

R1754

436 5 2 1

Q1751

S7S6S5S4S3S2S1

P6P5P4P3P2P1

G2G1

CN1750

G2G1

9876543

222120

2

19181716151413121110

1 CN1700

21

C1754

21

C17

02

21

C17

55

21

C17

03

21

C17

06

21

C17

56

21

C17

57

21C175321C1752

21C175121C1750

21C1701

21C1700

21C1705

21C1704

52D2

47C347C3

47C347C3

47B3

51B651C7

52B652D7

47B3

47B347B3

SATA_HDD_RX_C_DPSATA_HDD_RX_C_DN

SATA_HDD_TX_C_DNSATA_HDD_TX_C_DP

SANTA_194911_1_22P

SSM3K7002BFU_DY

SATA_ODD_PWREN

10K_5%_2_DY

0.01UF_50V_20.01UF_50V_2

0.01UF_50V_20.01UF_50V_2

22U

F_6

.3V

_5

0.1U

F_1

6V_2

P5V0S

22U

F_6

.3V

_5

SATA_HDD_RX_DPSATA_HDD_RX_DN

SATA_HDD_TX_DNSATA_HDD_TX_DP

22U

F_6

.3V

_5

A3 CS

Block Diagram

0.1U

F_1

6V_2

SATA_ODD_TX_DP

0.01UF_50V_20.01UF_50V_2

0.01UF_50V_20.01UF_50V_2

SATA_ODD_DA#

SATA_ODD_PRSNT#

SATA_ODD_RX_C_DPSATA_ODD_RX_C_DN

SATA_ODD_TX_C_DNSATA_ODD_TX_C_DP

SYN_127382FR013G212ZR_13P

SATA_ODD_TX_DN

SATA_ODD_RX_DNSATA_ODD_RX_DP

P5V0S

TPC6111_DY

0_5%_6

22U

F_6

.3V

_5

CSC0402_DY

CSC0402_DY

P3V3S

100K_5%_2_DY

1M_5%_2_DY

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OUT

G

DS

S

PM

OS

_4D

1SG

D

GND

A+

A-

GND

B-

B+

GND

DP

+5V

+5V

MD

GND

GND

G

G

G2

G1

V12

V12

V12

GND

RESERVED

GND

V5

V5

V5

GND

GND

GND

V3.3

V3.3

V3.3

GND

B+

B-

GND

A-

A+

GND

OUT

IN

OUT

OUT

OUT

OUT

ININ

ININ

REFERENCE 2000~2099(USB)

7030

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

87654

321 U2000

G2G1

4321

CN2002

21

C2002

21PAD2000

21

R2001

21

R2000

21

C2003

21

C2000

21

C2001

21

C2004

21D3

51C251C2

21D3

A3 CS

Block Diagram

CSC0402_DY

ROHM_BD82020FVJ_TSSOP_8P

SB_USB_2

22UF_6.3V_5_DY

POWERPAD_2_0610

10K_5%_2

1UF_6.3V_2

0.1UF_16V_2

P5V0A_USB3

P5V0A

RSC_0402_DY22UF_6.3V_5

P5V0A_USB3

ACES_50224_0040N_001_4P

USB_P2_DNUSB_P2_DP

P5V0A_USB_PW1

P3V3AL

USB_OC#_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OC#

OUT

OUT

OUT

EN

IN

IN

GND

BIBI

G1

1

2

3

4 G2

OUT

IN

1 2

REMOVE USB3.0 CONTROLLER IC

REFERENCE 2400~2499

7031

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

Block Diagram

CSA3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

USB2.0 FROM SLEEP&CHARGE IC

REFERENCE 2400~2499(USB3.0)

USB2.0 FROM PCH

7032

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

2134

L2440

2134

L2432

21

R2435

21

R2408

21 R2459

21R2460

17

12

9

14

1516

1413

5

310

211

876

U24012

1

R2448

G4G3G2G1

987654321 CN2401

21

R2436

21R2458

21C2441

21C2440

21

C2427

21

C2426

21 R2456

21 R2457

21R245421R2455

21

R2447

21 R2446

2134

L2404

21

C2442

21

C2432

LOTES_AUSB0026_P002A_9P

USB3_SSTX1_DPUSB3_SSTX1_DN

USB3_SSRX1_DPUSB3_SSRX1_DN

USB_P0_L_DPUSB_P0_L_DN

21B6

20K_1%_2

10K_5%_20.1UF_16V_2

32B6

51C6

32A8

32B851C2

32A8

21D3

21D6

32C851C2

32C851C2

32C7

21E621D6

32C7

21C3

51C6

51C6

0_5%_2P5V0A

P3V3AL

USB_OC#_0

0_5%_2

TI_TPS2541A_QFN_16P

USB3_PCH_TX1C_DP

0_5%_2_DY

USB_P0_DP 0_5%_2

USB3_PCH_RX1_DN

0_5%_2

0_5%_2

0_5%_2

USB_P0_DN 0_5%_2

P5V0A_USB1

EC_ILIM_SEL

USB_P0_DN

USB_P0_DP

USB_IC_DP

100K_5%_2_DY

P5V0A

EC_CTL3EC_CTL2

USB_IC_DN

Block Diagram

CSA3

EC_CTL1

P5V0A_USB2

22UF_6.3V_5 0.1UF_16V_2 1000PF_50V_2

USB3_PCH_TX1_DP

0.1UF_16V_2

P5V0A_USB1

0_5%_5_DY

SB_USB_0

USB_IC_DPUSB_IC_DN

USB_P0_R1_DNUSB_P0_R1_DP

51C6

32B4

0.1UF_16V_2

USB3_PCH_RX1_DP

32B4

WCM_2012_900T0_5%_2

USB_P0_R_DP

USB3_PCH_TX1C_DN

WCM_2012_900T

USB3_PCH_TX1_DN

USB3_PCH_TX1C_DPUSB3_PCH_TX1C_DN

32B6

WCM_2012_900T

USB_P0_R_DN

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

ININININ

PWPD

OU

T

NC

INILIM_S

EL

ILIM1

ILIM0

GND

FAULT#

DSC

DP

_OU

TD

P_IN

DM

_OU

TD

M_IN

CTL3

CTL2

CTL1

G

G

G

G

SSTX+

SSTX-

GND

SSRX+

SSRX-

PGND

D+

D-

VBUS

BI

BI

OUT

BIBI

BIBI

BI

BIBI

BI

BI

BIBI

BIBI

BI

IN

USB2.0 FROM PCH

USB 3.0 CONNECTOR

REFERENCE 2400~2499(USB3.0)

CURRENT LIMIT 2.5A

7033

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

2134 L2402

2134

L2439

87654

321 U2404

21

R2409

21

C2450

G4G3G2G1

987654321 CN2402

21

C2454

21C2445

21C2446

21

C2452

2134

L2405

21

C2453

LOTES_AUSB0026_P002A_9P

USB3_SSTX2_DPUSB3_SSTX2_DN

USB3_SSRX2_DPUSB3_SSRX2_DN

USB_P1_L_DPUSB_P1_L_DN

WCM_2012_900T

WCM_2012_900T

WCM_2012_900TUSB3_PCH_TX2C_DPUSB3_PCH_TX2C_DN

USB3_PCH_RX2_DN51C6

51C2

USB3_PCH_RX2_DP

USB3_PCH_TX2C_DN

33B3

21D6

21C3

51C2

33C4

33C4

51C6

51C6

33B3

51C6

ROHM_BD82024FVJ_TSSOP_8P

P5V0A_USB2

P5V0A_USB2

Block Diagram

CSA3

0.1UF_16V_2

P3V3AL

330UF_6.3V

1000PF_50V_2USB_OC#_1

10K_5%_2

SB_USB_1

47UF_6.3V_5

P5V0A

USB_P1_DN

0.1UF_16V_2

0.1UF_16V_2

USB3_PCH_TX2C_DP

USB_P1_DP

USB3_PCH_TX2_DN

USB3_PCH_TX2_DP

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BIBI

BI

BI

BIBI

BI

BI

BIBI

OUT

OUT

OUT

OC#EN

IN

IN

GND

+

G

G

G

G

SSTX+

SSTX-

GND

SSRX+

SSRX-

PGND

D+

D-

VBUS

OUT

IN

REFFERENCE 3000~3049(LCM)

PM:4.7KGM:2.2K

PM: 10KGM:OPEN

(60130B4720ZT)

7034

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

C30

02

21

R3018

21 R3017

21R3016

21 R3015

21 R3014

21R303421R3033

21R3032

21R3031

21R3030

21R3029

21R302821R3027

21R3026

21R3025

21R3024

21R3023

21R302121R3022

21R302021R3019

21 R3013

21R3012

21R3011

21

R3035

2

1

3

Q3002

2

1

3

Q3001

S

G

D

Q3000

21

R3006

G2G1

987654

30

3

29282726252423222120

2

19181716151413121110

1CN3000

21

C3006

21R3001

21

R30

00

21

C30

00

2 1C3003

21

R3004

21

C30

01

21PAD3003

21

R3002

21

R3005

21

C30

04

21

C3007

21

R3003

21 R3009

21R3010

21

C30

11

21

C30

10

21

C30

09

56D656D6

34A634A6

34A634A6

34A634A6

34A6

21E

6

50D7

57B6

51B2

24A624A6

51B2

50C6

57A657A6

57A6

57A657A6

57A657A6

57A6

50C6

50C6

50C6

50C6

50C650C6

50C6

34C3

50C750D7

34A6

34C3

57B6

50D7

34C334C3

34C334C3

34B334B3

SSM3K7002BFU

VGA_LVDS_DDCCLK

LVDS_DDCDATALVDS_DDCCLK0_5%_1

VGA_LVDS_DDCDATA

MIC_IN_DATA_R

ACES_50203_03001_001_30P

100_5%_2

INV_PWM_3_REC_BKLTEN_R

LVDS_TXCL_DPLVDS_TXCL_DN

LVDS_TXDL2_DPLVDS_TXDL2_DN

LVDS_TXDL1_DPLVDS_TXDL1_DN

LVDS_TXDL0_DP

CSC0402_DY

EC_BKLTEN

100_5%_2

100_5%_20_5%_1PCH_INV_PWM_3

0_5%_1VGA_INV_PWM_3

USB_CAM_DN

0.1U

F_2

5V_3

4.7U

F_2

5V_5

PVBAT

MIC_IN_DATAMIC_IN_CLK

USB_CAM_DP

100K_5%_2

0.1U

F_1

6V_2

P3V3S

PCH_LVDS_TXDL0_DP

0_5%_10_5%_1

0_5%_10_5%_1

0_5%_10_5%_1

0_5%_10_5%_1VGA_LVDS_TXDL0_DN

VGA_LVDS_TXDL0_DP

VGA_LVDS_TXDL1_DN

VGA_LVDS_TXCL_DPVGA_LVDS_TXCL_DN

VGA_LVDS_TXDL2_DPVGA_LVDS_TXDL2_DN

VGA_LVDS_TXDL1_DP

0_5%_1

0_5%_1

0_5%_1

0_5%_1

0_5%_10_5%_1

0_5%_10_5%_1

PCH_LVDS_TXDL1_DP

PCH_LVDS_TXDL0_DN

PCH_LVDS_TXDL1_DN

PCH_LVDS_TXDL2_DP

PCH_LVDS_TXCL_DNPCH_LVDS_TXCL_DP

PCH_LVDS_TXDL2_DN

LVDS_TXDL0_DN

0_5%_1

0_5%_1

PCH_LVDS_DDCDATAPCH_LVDS_DDCCLK

0_5%_1

0_5%_10_5%_1

DIODES_DMP2305U_SOT23_3P

PCH_LCM_VDDEN#

P3V3S

2.2K_5%

_2

P3V3S

470K_5%_2

SSM3K7002BFU

P3V3S

0.1U

F_1

6V_2

0.01

UF

_50V

_2

47K

_5%

_2

A3 CS

Block Diagram

0.1U

F_1

6V_2

LVDS_TXDL0_DN

LVDS_TXDL0_DP

VGA_LCM_VDDEN

PCH_LCM_VDDEN

LVDS_TXDL1_DNLVDS_TXDL1_DP

LVDS_TXDL2_DNLVDS_TXDL2_DP

LVDS_TXCL_DNLVDS_TXCL_DP

LCM_VDDEN

2.2K_5%

_2

100_5%_2

P3V3S_LCMP3V3S_MOS_LCM

POWERPAD_2_0610

10U

F_6

.3V

_3

680PF_50V_2

1000PF_50V_210K_5%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

ININ

ININ

ININ

BIBI

BIBI

IN

IN

IN

IN

G

DS

G

DS

G

S D

BIBI

G

G

9

8

7

6

5

4

30

3

29

28

27

26

25

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

1 2

ININ

ININ

IN

IN

IN

IN

INBIBI

OUTOUT

OUTOUT

OUTOUT

OUTOUT

IN

ININ

ININ

ININ

IN

IN

(60130B2020ZT)

GM:2.2K

PM:10KGM:2.2K

PM:2K

REFERENCE 3050~3099(CRT)

RESERVE CAP FOR EMI

(60130B1030ZT)

7035

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

D3050

G2G1

98765432

151413121110

1CN3051

21 R3077

21 R3076

21 R3070

21 R3071

21 R3072

21 R3073

21 R3074

21 R3075

21 R306921 R3068

21 R3065

21R3064

21 R3066

21 R3067

21

FUSE3050

21

C30

52

21

C3054

21

C3053

21

R3050

21

R3051

21 R3052

21 R30531

TP3051

1TP3050

21 R3063

21 R3062

21

R3061

21

R3060

21

C3057

21

C3055

21

C3056

1 1615

98765432

1413121110

U3050

21

C30

51

21

C30

50

21

R30

56

21

R30

55

21

R30

54

21L3050

21L3051

21L3052

2.2K_5%_2

CRT_DDCCLK_OUT

CRT_DDCDATA_OUT

PCH_CRTR

VGA_CRTB

VGA_CRTG

VGA_CRTR

150_

1%_2

CRTB_L

CRTG_L

TI_TPD7S019_15DBQR_SSOP_16P

CRT_VSYNC_R_OUT

CRTR_L

2.2K_5%_2

100_5%_2

100_5%_2

0.1UF_16V_2_DY

TP24

TP24

Block Diagram

CSA3

0.1UF_16V_2_DY

P5V0S

0.22UF_6.3V_2

CRTB_LCRTG_L

0.22UF_6.3V_2

CRT_VSYNC_OUT

CRT_HSYNC_OUT

P3V3S

CRT_DDCCLKCRT_DDCDATA

CRT_HSYNC

CRT_VSYNC

2.2K_5%_2

30_5%_2

30_5%_2

P3V3S

CRT_DDCDATA

CRT_DDCCLK

CRT_DDCCLK_OUT

PCH_CRTB

2.2K_5%_2

P5V0S_CRTVDD

0.22UF_6.3V_2

CRT_VSYNC

CRT_HSYNC

CRT_VSYNC_R_OUT

CRT_HSYNC_R_OUT

CRT_DDCDATA_OUT

P5V0S_CRTVDD

120NH,5%

120NH,5%

PCH_CRTG

CRTR

CRTB

0_5%_1

0_5%_1

0_5%_1

0_5%_1

0_5%_1

0_5%_1

150_

1%_2

PCH_CRT_VSYNC

VGA_CRT_HSYNC

VGA_CRT_DDCDATA

PCH_CRT_DDCDATA

VGA_CRT_VSYNC

PCH_CRT_HSYNC

0_5%_1

0_5%_1

0_5%_1

VGA_CRT_DDCCLK

0_5%_1

0_5%_1

0_5%_1

0_5%_1

0_5%_1 PCH_CRT_DDCCLK

CRT_HSYNC_R_OUT

SUYIN_070546HR015M25KZR_15P

CRT_DDCDATA_R_OUT

CRT_DDCCLK_R_OUT

CRTG_LCRTB_L

35A3

35A3

50B7

56E2 56D3

56E2 56D3

56E2 56D3

35C335A7

35C335A7

35C335A7

35A3

35D4 35C3

35D435C3

35D4 35C3

35A435A4

35B4

35B4

35A4

35A4

35C5

50B7

35A4

35A4

35C3

35C3

35C5

50B7

50A6

56F756D3

56A3

50A6

56F756D3

50A6

56A3

50A6

35A3

35D4 35A735D4 35A735D4

CRTR_L

120NH,5%

150_

1%_2

CRTG

18P

F_5

0V_2

18P

F_5

0V_2

18P

F_5

0V_2

35A7

CRTR_L

P5V0S_CRT2

SMD1812P110TF

SS3040HE

P5V0S

P5V0S_CRT1

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

IN

IN

IN

IN

ININ

ININ

ININ

IN

BI

BIININ

IN

IN

ININ

IN

IN

IN

VCC-SYNC SYNC_OUT2

SYNC_IN2

DDC_OUT1BYP

VCC-DCC

GND

VIDEO_3

VIDEO_2

VIDEO_1

VCC-VIDEO

SYNC_OUT1

SYNC_IN1

DCC_OUT2

DDC_IN2

DDC_IN1

OUT

OUT

OUT

OUT

OUT

OUT

OUT

21

G2

G1

9

8

7

6

5

4

3

2

15

14

13

12

11

10

1

IN

IN

IN

OUT

OUT

OUT

OUT

IN

(60130B2020ZT)

GM: 2.2K

40MIL

CLOSE TO CONNECTOR

PM:499_5%

(60130B1030ZT)

GM: 2.2KPM:10K

PM:2K

(6013A0076801)

REFERENCE 3150~3199(HDMI)

GM:680_5%

PLACE CLOSE TO CONNECTOR

7036

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

4132

L3154

4132

L3153

4132

L3152

4132

L3151

2

13

D3150

G4G3G2G1

98765432

19181716151413121110

1 CN3150

21R3180

21R3181

21C3156

21C3154

21C3152

21C3157

21C3155

21C3153

21C315921

C3158

21 R3177

21 R3176

21 R3175

21R3174

21

R3179

21

R3178

21C316121

C3160

21C3163

21C3165

21C3167

21C3164

21C3162

21C3166

2

1

3

Q3152

21

C3151

1TP3151

21

R3152

21

R3153

S

G

D

Q3150

S

G

D

Q3151

21R3159

21R3157

21R3158

21R3160

21R3161

21R3162

21R3163

21 R3164

21

R3165

5

4

3

2

1U3150

21

C3150

2 1

D3155

21FUSE3150

21R3154

21

R3150

36A7

HDMI_TXC_C_DP

HDMI_TX1_C_DPHDMI_TX1_C_DN

HDMI_TX0_C_DP

WCM_2012HDMI_121T

WCM_2012HDMI_121T

36A736A2

WCM_2012HDMI_121T

P5V0AL_HDMI_VDD1

SMD1812P110TF

HDMI_TX0_R_DNHDMI_TX0_R_DP

P5V0AL

BAT54_30V_0.2A

2.2K_5%_2

P5V0AL

2.2K_5%_2

P3V3S

PCH_HPDET

680_5%_2

HDMI_TX1_C_DP

P3V3S

P3V3S

P3V3S

VGA_HDMI_DDCDATA

PCH_HDMI_DDCCLK

PCH_HDMI_DDCDATA

HDMI_TXC_C_DP

100PF_50V_2

SBR3U40P1

HPDET

VGA_HDMI_TX2_DN

VGA_HDMI_TX1_DN

VGA_HDMI_TX0_DN

VGA_HDMI_TXC_DP

PCH_HDMI_TX2_DN

PCH_HDMI_TX1_DN

PCH_HDMI_TXC_DP

680_5%_2

2.2K_5%_2

SSM3K17FU

SSM3K17FU

0.1UF_6.3V_1

0.1UF_6.3V_1

0.1UF_6.3V_1

0.1UF_6.3V_1

0.1UF_6.3V_1

680_5%_2

HDMI_CN_DDCDATAHDMI_DDCDATA

HDMI_TX0_C_DP

VGA_HPDET

VGA_HDMI_TX0_DP

PCH_HDMI_TX2_DP

PCH_HDMI_TX0_DN

PCH_HDMI_TXC_DN

HDMI_CN_DDCCLK

0_5%_1

0_5%_1

HPDET_IC

P5V0AL_HDMI_VDD2

SYN_100042GR019M26DZL_19P

SSM3K7002BFU

HDMI_CEC

HDMI_CN_DDCDATA

0_5%_1

0_5%_1

0_5%_1

0_5%_1

VGA_HDMI_DDCCLK

HDMI_DDCDATA

2.2K_5%_2

HDMI_TX1_C_DN

0.1UF_6.3V_1

HDMI_DDCCLK

1K_5%_2

470K_5%_2 22PF_50V_2_DY

TP24

Block Diagram

CSA3

680_5%_2

HDMI_TX2_C_DN

680_5%_2

680_5%_2

TC7SZ08FU

HDMI_HPD_EC

PLT_RST#

100K_5%_2

HDMI_TXC_C_DP

HDMI_TX2_C_DN

HDMI_TX1_C_DPHDMI_TX1_C_DNHDMI_TX2_C_DP

VGA_HDMI_TX2_DP

0.1UF_6.3V_1

0.1UF_6.3V_1

0.1UF_6.3V_1

HDMI_TX0_C_DN

HDMI_TXC_C_DN

PCH_HDMI_TX1_DP0.1UF_6.3V_1

HDMI_TX0_C_DP

0.1UF_6.3V_1

0.1UF_6.3V_1

0.1UF_6.3V_1

0.1UF_6.3V_1

VGA_HDMI_TXC_DN

VGA_HDMI_TX1_DP

PCH_HDMI_TX0_DP

680_5%_2

680_5%_2

HDMI_TXC_C_DN

HDMI_TX0_C_DN

0.1UF_6.3V_1

0.1UF_6.3V_1

HDMI_CN_DDCCLK

HDMI_DDCCLK

HDMI_TX2_C_DP

36A2

50B3

36D5 36A2

56B3

50B3

50B3

36C5 36A2

56F3

56F3

56F3

56F3

50B3

50B3

50B3

37C336C336D6

36D5 36A2

56C5

56F3

50B3

50B3

50B3

36C3

37C1

37D6

37C3 36C6

56B3

36C8

36D5 36A2

36C8

36D5 36A2

37B121D6

51A741C7

36C536B7

36D536A7

36D536A7

36D536A7

36D536A7

56F3

36C536B7

50B3

36D536A7

56F3

56F3

50B3

36C5 36A2

36D5 36A2

37D3 36C6

36D6

36D5 36A2

36A2

36A7 36A236A7 36A2

36A7

36B7

36B7 36A236B7 36A2

37D3

36A2

HDMI_TX2_C_DPHDMI_TX2_C_DN

HDMI_TX1_R_DPHDMI_TX1_R_DN

HDMI_TX0_C_DN

HDMI_TXC_R_DPHDMI_TXC_R_DNHDMI_TXC_C_DN

HDMI_TX2_R_DPHDMI_TX2_R_DN

WCM_2012HDMI_121T

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

ININ

ININ OUT

OUTOUTOUTOUTOUTOUTOUT

G

D S

IN

BI

ININ

ININ

ININ

ININ

BIBI

BI BI

BI BI

G

DS

G

DS

IN

IN

IN

IN

IN

IN

IN

IN

OUT

NC

IN+-

G4

G3

G2

G1

TMDS Data0-

TMDS Data0 Shield

TMDS Data0+

TMDS Data1-

TMDS Data1 Shield

TMDS Data1+

TMDS Data2-

TMDS Data2 Shield

Hot Plug Detect

+5V Power

DDC/CEC GND

DDC Data

DDC Clock

Reserved

CEC

TMDS Clock-

TMDS Clock Shield

TMDS Clock+

TMDS Data2+

IN

ININ

ININ

IN

OUT

ININ

OUT

BI

BI

BI

BI

BI

BI

ININ

ININ

7037

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

R3200

21

R3201

21 R3215

4

65

7

3

9

16

21 20

19

10 1112131415

1718

8

U3202

2

13

D3200

2

1

3

Q3203

21

C32

02

21

C32

00

5

4

1

2

3

U3203

21

R32

12

21

R32

11

21

R3205

21R3206

21

R3204

21R3214

21

R3213

21

R3210

21

R32

02

5

4

1

2

3

U3200

21R3227

21

C32

052

1R

3208

21

R32

09

S

G

D

Q3200

S

G

D

Q3201

2.2K_5%_2

2.2K_5%_2

HDMI_DDCCLK_CEC

P3V3AL

HDMI_CN_DDCCLK

HDMI_DDCDATA_CEC

36C4

36C3 36C6

37A8

37A6

37D837C6

37D537C5

37B3

36C3 36C6

36C3

37B6

37B3

21D6 36B2

37B6

37B6 37B6

0_5%_2_DY

HPDET_IC

4.7K

_5%

_2

4.7K

_5%

_2

PHP_74LVC1G17_SOT753_5P

P3V3AL

33_5%_2

0.1U

F_1

6V_2

P3V3AL

RENESAS_R5F211B4D61SP_LSSOP_20P

HDMI_CN_DDCDATA

CEC_XOUT

CEC_XIN

CEC_IN

EC_SMB2_CLK EC_SMB2_DATA

CEC_OUT

HDMI_DDCCLK_CECHDMI_DDCDATA_CEC

P3V3AL

BAT54_30V_0.2A

P3V3AL

74LVC1G14GVSSM3K17FU

SSM3K17FU

HDMI_CEC

SSM3K7002BFU22K_5%_2

P3V3AL

CEC_OUT

A3 CS

Block Diagram

RS

C_0

402_

DY

P3V3AL

HDMI_HPD_EC

68_5%_2

P3V3AL

CEC_IN

27K_5%_2

100K_5%_2

4.7K_5%_2 4.7K_5%_2

47K

_5%

_2

CEC_XOUT CEC_XIN

47K

_5%

_2

P3V3AL

1UF

_6.3

V_2

0.1U

F_1

6V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

INOUT

OUT

IN

BI

BI

BI

BI

BIBI

BI

IN

IN

OUT

OUT

BI

BI

OUT

IN

G

DS

NC

+

-

-

NC

+

G

DS

XOUT-P4_7

XIN-P4_6

VSS-AVSS

VCC-AVCC

RESET#

P4_5-INT0#-RXD1

P4_2-VREF

P3_7-CNTR0#-SSO-TXD1

P3_5-SSCK-SCL-CMP1_2 P3_4-SCS#-SDA-CMP1_1

P3_3-TCIN-INT3#-SSI00-CMP1_0

P1_7-CNTR00-INT10# P1_6-CLK0-SSI01

P1_5-RXD0-CNTR01-INT11#

P1_4-TXD0

P1_3-KI3#-AN11-TZOUT

P1_2-KI2#-AN10-CMP0_2

P1_1-KI1#-AN9-CMP0_1

P1_0-KI0#-AN8-CMP0_0

MODE

NC

G

DS

REFERENCE 4100~4299(DDR)

LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN

ALL VREF TRACES SHOULD HAVE 20 MIL TRACE WIDTH

NOTE:PLACE C4100 ON COMMON PATH FOR BOTH DIMM'S

CHA

IF SA0_DIM0=0 , SA1_DIM0=0

SO-DIMMA TS ADDRESS IS 0X30SO-DIMMA SPD ADDRESS IS 0XA0

NOTE:

1.5A

SO-DIMMA TS ADDRESS IS 0X32SO-DIMMA SPD ADDRESS IS 0XA2IF SA0_DIM0=1 , SA1_DIM0=0

PLACE THESE CAPS CLOSE TO VTT1 AND VTT2

7038

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

20420325

201914

196195190

13

189185184179178173172168167162

9

161156155151150145144139138134

8

13312812772716665616055

3

54494844

433837323126

2

1126

199

9994938887828176

124123118117112111106105100

75

30

12512277

G2G1

198

CN4100

113

200202201197

121114

110

120116

186

188

169

171

152

154

135

137

62

64

45

47

27

29

10

12

232118

194192182180

16

193191183181176174166164177175

6

165163160158148146159157149147

4

1421401321301431411311297068

17

58566967595752504240

15

53514139363424223533

75

18717015313663462811

7473

104102103101

115

79108109

8589869091929596

7880

1198384

107

9798

CN4100

21 R4145 21R4115

21

R4118

21

R4117

21

R4132

21

R4133

21

C4100

21

R4103

21

R4101

21

R4102

21

R4100

21

R4104

21

C4119

21

C4120

21

C4121

21

C4122

21

C4117

21

C4118

21

C4150

21

C4116

21

C4114

21

C4115

21

C4102

21

C4101

21

C4103

21

C4104

21

C4110

21

C4108

21

C4109

21

C4105

21

C4107

21

C4106

DIMM0_VREF_CA

0.1UF_16V_22.2UF_6.3V_3

2.2UF_6.3V_3 0.1UF_16V_2

P1V5

P3V3S

2.2UF_6.3V_3

10UF_6.3V_3

17

31

16

P1V5

41

P3V3S

6160

10UF_6.3V_3

30

P0V75S

1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2

10UF_6.3V_310UF_6.3V_310UF_6.3V_31UF_6.3V_21UF_6.3V_21UF_6.3V_2

PCH_3S_SMDATA

M_CLK_DDR1_DPM_CLK_DDR0_DN

M_A_DQS7_DP

M_A_DQS1_DN

M_A_DQS6_DP

M_A_DQS2_DPM_A_DQS3_DPM_A_DQS4_DPM_A_DQS5_DP

M_A_DQS1_DP

1514131211109876543

10

10UF_6.3V_3

55

1413

10K_5%_2

10K_5%_2_DY

10K_5%_2

SA1_DIM0

SA0_DIM0

10K_5%_2_DY

6362

5958

5657

5453

5152

50494847

4546

4344

42

403938373635

3334

32

292827262524232221201918

15

12

1011

987

56

4

23

10

M_A_DQ<63..0>

A3 CS

Block Diagram

M_A_A<15..0>

DIMM0_VREF_DQP0V75M_VREF

0_5%_2_DY

DIMM0_VREF_CA

0_5%_2_DY

P3V3S

1UF_6.3V_2

0.1UF_16V_2

DIMM0_VREF_DQ

1K_1%_2

1K_1%_21K_1%_2

P1V5

PM_EXTTS#1_R

10K_5%_2

P0V75M_VREF

1K_1%_2

330UF_2.5V_DY

2

BELLW_80001_1021_204P

M_A_DQ<0>M_A_DQ<1>M_A_DQ<2>M_A_DQ<3>M_A_DQ<4>

M_A_DQ<6>M_A_DQ<7>M_A_DQ<8>M_A_DQ<9>M_A_DQ<10>M_A_DQ<11>M_A_DQ<12>M_A_DQ<13>M_A_DQ<14>M_A_DQ<15>M_A_DQ<16>M_A_DQ<17>M_A_DQ<18>M_A_DQ<19>M_A_DQ<20>M_A_DQ<21>M_A_DQ<22>M_A_DQ<23>M_A_DQ<24>M_A_DQ<25>M_A_DQ<26>M_A_DQ<27>M_A_DQ<28>M_A_DQ<29>M_A_DQ<30>M_A_DQ<31>M_A_DQ<32>M_A_DQ<33>M_A_DQ<34>M_A_DQ<35>M_A_DQ<36>M_A_DQ<37>M_A_DQ<38>M_A_DQ<39>M_A_DQ<40>M_A_DQ<41>M_A_DQ<42>M_A_DQ<43>M_A_DQ<44>M_A_DQ<45>M_A_DQ<46>M_A_DQ<47>M_A_DQ<48>M_A_DQ<49>M_A_DQ<50>M_A_DQ<51>M_A_DQ<52>M_A_DQ<53>M_A_DQ<54>M_A_DQ<55>M_A_DQ<56>M_A_DQ<57>M_A_DQ<58>M_A_DQ<59>M_A_DQ<60>M_A_DQ<61>M_A_DQ<62>M_A_DQ<63>

M_A_A<0>M_A_A<1>M_A_A<2>M_A_A<3>M_A_A<4>M_A_A<5>M_A_A<6>M_A_A<7>M_A_A<8>M_A_A<9>M_A_A<10>M_A_A<11>M_A_A<12>M_A_A<13>M_A_A<14>M_A_A<15>

M_A_BS0M_A_BS1M_A_BS2M_CS#0M_CS#1M_CLK_DDR0_DP

M_CLK_DDR1_DNM_CKE0M_CKE1M_A_CAS#M_A_RAS#M_A_WE#

SA0_DIM0SA1_DIM0

PCH_3S_SMCLK

M_ODT0M_ODT1

M_A_DQS0_DP

M_A_DQS0_DN

M_A_DQS2_DNM_A_DQS3_DNM_A_DQS4_DNM_A_DQS5_DNM_A_DQS6_DNM_A_DQS7_DN

M_A_DQ<5>

PM_EXTTS#1_RDDR3_DRAMRST#

BELLW_80001_1021_204P

48A8 39C8 20A7

43D443D4

43B5

43B5

43B5

43B543B543B543B5

43B5

38C8

38C8

43D8

43A4

39C3 38C3

43A843A843A843C543C543D4

43D443D443D443A843A843A838A638A6

48A8 39C8 20A7

43C543C5

43B5

43B5

43B543B543B543B543B543B5

39C3 38B541A5 39C3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

ININ

OUTOUT

INININ

ININ

INININ

IN

INININ

IN

IN

INININININ

IN

G2

G1

VTT2

VTT1

VSS52

VSS51

VSS50

VSS49

VSS48

VSS47

VSS46

VSS45

VSS44

VSS43

VSS42

VSS41

VSS40

VSS39

VSS38

VSS37

VSS36

VSS35

VSS34

VSS33

VSS32

VSS31

VSS30

VSS29

VSS28

VSS27

VSS26

VSS25

VSS24

VSS23

VSS22

VSS21

VSS20

VSS19

VSS18

VSS17

VSS16

VSS15

VSS14

VSS13

VSS12

VSS11

VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

VSS4

VSS3

VSS2

VSS1

VREF_CA

VREF_DQ

RESET#

EVENT#

NCTEST

NC2

NC1

VDDSPD

VDD18

VDD17

VDD16

VDD15

VDD14

VDD13

VDD12

VDD11

VDD10

VDD9

VDD8

VDD7

VDD6

VDD5

VDD4

VDD3

VDD2

VDD1

DQS7#

DQS6#

DQS5#

DQS4#

DQS3#

DQS2#

DQS1#

DQS0#

DQS7

DQS6

DQS5

DQS4

DQS3

DQS2

DQS1

DQS0

DM7

DM6

DM5

DM4

DM3

DM2

DM1

DM0

ODT1

ODT0

SDA

SCL

SA1

SA0

WE#

RAS#

CAS#

CKE1

CKE0

CK1#

CK1

CK0#

CK0

S1#

S0#

BA2

BA1

BA0

A15

A14

A13

A12/BC#

A11

A10/AP

A9

A8

A7

A6

A5

A4

A3

A2

A1

A0

DQ63

DQ62

DQ61

DQ60

DQ59

DQ58

DQ57

DQ56

DQ55

DQ54

DQ53

DQ52

DQ51

DQ50

DQ49

DQ48

DQ47

DQ46

DQ45

DQ44

DQ43

DQ42

DQ41

DQ40

DQ39

DQ38

DQ37

DQ36

DQ35

DQ34

DQ33

DQ32

DQ31

DQ30

DQ29

DQ28

DQ27

DQ26

DQ25

DQ24

DQ23

DQ22

DQ21

DQ20

DQ19

DQ18

DQ17

DQ16

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

OUTOUT

IN

+

IN

ININ

ININININININ

BIBI

IN

IN

IN

LAYOUT NOTE: PLACE CAPS NEAR SO-DIMM0 POWER PIN

REFERENCE 4100~4299(DDR)

SO-DIMMB SPD ADDRESS IS 0XA4SO-DIMMB TS ADDRESS IS 0X34

CHB

PLACE THESE CAPS CLOSE TO VTT1 AND VTT2

NOTE:

1.5A

ALL VREF TRACES SHOULD HAVE 20 MIL TRACE WIDTH

7039

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

204203

25201914

196195190

13

189185184179178173172168167162

9

161156155151150145144139138134

8

13312812772716665616055

3

54494844

433837323126

2

1126

199

9994938887828176

124123118117112111106105100

75

30

12512277

G2G1

198

CN4101

113

200202201197

121114

110

120116

18817115413764472912

18616915213562452710

232118

194192182180

16

193191183181176174166164177175

6

165163160158148146159157149147

4

1421401321301431411311297068

17

58566967595752504240

15

53514139363424223533

75

18717015313663462811

7473

104102103101

115

79108109

8589869091929596

7880

1198384

107

9798 CN4101

21R4166

21R4167

21

R4122

21

R4121

21

R4135

21

R4134

21

R4108

21

R4106

21

R4105

21

R4107

21

C4145

21

C4144

21

C4143

21

C4142

21

C4130

21

C4131

21

C4129

21

C4132

21

C4128

21

C4133

21

C4141

21

C4140

21

C4127

21

C4126

21

C4125

21

C4137

21

C4139

21

C4151

21

C4124

21

C4138

DIMM1_VREF_CA P1V5 P0V75M_VREF

DIMM1_VREF_DQ

P1V5

P3V3S

P0V75S

P3V3S

DIMM1_VREF_DQP0V75M_VREFP1V5

DIMM1_VREF_CA

38C341A538B538C3

43A4

39A639A7

43C143C1

43A4

43C143C1

43B1

43B143B143B143B143B143B1

43B1

43D143D143D1

43D1

43A4

43A443A443A4

43A1

43D1

43B1

43B1

43B1

43B1

43D1

43B143B1

20A738C848A8

43D4

43B1

43B1

39C839C8

4

M_B_A<8>M_B_A<9>M_B_A<10>M_B_A<11>

M_B_DQ<19>

1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2 10UF_6.3V_3

BELLW_80001_5021_204P

DDR3_DRAMRST#PM_EXTTS#1_R

M_B_WE#

PCH_3S_SMCLKSA1_DIM1SA0_DIM1

M_CS#3M_CS#2

M_B_RAS#

M_ODT3M_ODT2

M_B_DQS0_DP

M_B_DQS7_DNM_B_DQS6_DNM_B_DQS5_DNM_B_DQS4_DNM_B_DQS3_DNM_B_DQS2_DN

M_B_DQS0_DN

M_B_DQ<9>M_B_DQ<8>M_B_DQ<7>

M_B_DQ<63>M_B_DQ<62>M_B_DQ<61>M_B_DQ<60>

M_B_DQ<6>

M_B_DQ<59>M_B_DQ<58>M_B_DQ<57>M_B_DQ<56>M_B_DQ<55>M_B_DQ<54>M_B_DQ<53>M_B_DQ<52>M_B_DQ<51>M_B_DQ<50>

M_B_DQ<5>

M_B_DQ<49>M_B_DQ<48>M_B_DQ<47>M_B_DQ<46>M_B_DQ<45>M_B_DQ<44>M_B_DQ<43>M_B_DQ<42>M_B_DQ<41>M_B_DQ<40>

M_B_DQ<4>

M_B_DQ<39>M_B_DQ<38>M_B_DQ<37>M_B_DQ<36>M_B_DQ<35>M_B_DQ<34>M_B_DQ<33>M_B_DQ<32>M_B_DQ<31>M_B_DQ<30>

M_B_DQ<3>

M_B_DQ<29>M_B_DQ<28>M_B_DQ<27>M_B_DQ<26>M_B_DQ<25>M_B_DQ<24>M_B_DQ<23>M_B_DQ<22>M_B_DQ<21>M_B_DQ<20>

M_B_DQ<2>

M_B_DQ<18>M_B_DQ<17>M_B_DQ<16>M_B_DQ<15>M_B_DQ<14>M_B_DQ<13>M_B_DQ<12>M_B_DQ<11>M_B_DQ<10>

M_B_DQ<1>M_B_DQ<0>

M_CKE3M_CKE2M_CLK_DDR3_DN

M_CLK_DDR2_DP

M_B_CAS#

M_B_BS2M_B_BS1M_B_BS0

M_B_A<7>M_B_A<6>M_B_A<5>M_B_A<4>M_B_A<3>M_B_A<2>

M_B_A<15>M_B_A<14>M_B_A<13>M_B_A<12>

M_B_A<1>M_B_A<0>

BELLW_80001_5021_204P

M_B_A<15..0>

15

M_CLK_DDR3_DP

36

57

1K_1%_2

1K_1%_2

0_5%_2_DY

1K_1%_2

2.2UF_6.3V_3

0.1UF_16V_22.2UF_6.3V_3

1UF_6.3V_2

2.2UF_6.3V_3

10UF_6.3V_310UF_6.3V_3

M_B_DQS5_DP

10UF_6.3V_3

31

10K_5%_210K_5%_2_DY

63

M_B_DQS1_DN

M_B_DQS7_DP

M_B_DQS3_DP

M_CLK_DDR2_DN

61605958

5655

5354

5251

4950

474645

4344

4241403938

343332

2928272625242322212019181716

1314

1112

10

89

765

3210

11109

765

3210

10UF_6.3V_3

A3

1UF_6.3V_2

CS

Block Diagram

1UF_6.3V_2

M_B_DQS2_DPM_B_DQS1_DP

10UF_6.3V_3

35

37

4

PCH_3S_SMDATA

62

30

M_B_DQ<63..0>

M_B_DQS6_DP

M_B_DQS4_DP

48

SA1_DIM1SA0_DIM1

10K_5%_2_DY

1UF_6.3V_2 1UF_6.3V_2

8

12

151413

10K_5%_2

1K_1%_2

0_5%_2_DY

0.1UF_16V_2

0.1UF_16V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

ININ

ININ

IN

IN

INININININ

INININ

IN

IN

INININININ

VTT2

VTT1

VSS9

VSS8

VSS7

VSS6

VSS52

VSS51

VSS50

VSS5

VSS49

VSS48

VSS47

VSS46

VSS45

VSS44

VSS43

VSS42

VSS41

VSS40

VSS4

VSS39

VSS38

VSS37

VSS36

VSS35

VSS34

VSS33

VSS32

VSS31

VSS30

VSS3

VSS29

VSS28

VSS27

VSS26

VSS25

VSS24

VSS23

VSS22

VSS21

VSS20

VSS2

VSS19

VSS18

VSS17

VSS16

VSS15

VSS14

VSS13

VSS12

VSS11

VSS10

VSS1

VREF_DQ

VREF_CA

VDDSPD

VDD9

VDD8

VDD7

VDD6

VDD5

VDD4

VDD3

VDD2

VDD18

VDD17

VDD16

VDD15

VDD14

VDD13

VDD12

VDD11

VDD10

VDD1

RESET#

NCTEST

NC2

NC1

G2

G1

EVENT#

WE#

SDA

SCL

SA1

SA0

S1#

S0#

RAS#

ODT1

ODT0

DQS7

DQS6

DQS5

DQS4

DQS3

DQS2

DQS1

DQS0

DQS#7

DQS#6

DQS#5

DQS#4

DQS#3

DQS#2

DQS#1

DQS#0

DQ9

DQ8

DQ7

DQ63

DQ62

DQ61

DQ60

DQ6

DQ59

DQ58

DQ57

DQ56

DQ55

DQ54

DQ53

DQ52

DQ51

DQ50

DQ5

DQ49

DQ48

DQ47

DQ46

DQ45

DQ44

DQ43

DQ42

DQ41

DQ40

DQ4

DQ39

DQ38

DQ37

DQ36

DQ35

DQ34

DQ33

DQ32

DQ31

DQ30

DQ3

DQ29

DQ28

DQ27

DQ26

DQ25

DQ24

DQ23

DQ22

DQ21

DQ20

DQ2

DQ19

DQ18

DQ17

DQ16

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ1

DQ0

DM7

DM6

DM5

DM4

DM3

DM2

DM1

DM0

CKE1

CKE0

CK1#

CK1

CK0#

CK0

CAS#

BA2

BA1

BA0

A9

A8

A7

A6

A5

A4

A3

A2

A15

A14

A13

A12

A11

A10_AP

A1

A0

ININ

ININ

IN

IN

IN

ININ

OUTOUT

INININ

BI

ININ

OUT

BI

OUT

IN

FAN CN

REFERENCE 4300~4349(FAN)

REFERENCE 4411~4449(THERMAL )

PM THERMAL SHOUTDOWN CPU SIDE AT 71.9 C

GM THERMAL SHOUTDOWN VGA SIDE AT 63.4 C

PM THERMAL SHOUTDOWN VGA SIDE AT 80.2 C

R4442

R4443

R4446

75K

10F

59K

39K

48.7K

R4441

GM THERMAL SHOUTDOWN CPU SIDE AT 68.6 C

THERMAL SHOUTDOWN

18.2K

10FG

32.4K

43.2K

30.1K

7040

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 R4441

21R4443

21

R44

46

21

R44

42

21

R44

47

G2G1

4321

CN4300

2

1

3

Q441121

R4445

1 TP4301

1 TP4300

21R4413

21

R43

06

21

R43

00

21

C43

05

21

C43

00

21

C44

41

1

6

8

5

7

4

3

2

U4441 21

R44

44

21

C43

02

21

C4412

21

R4414

EC

B

Q4412

21

C43

01

21

C43

07

21PAD4300

21L4300

21

C43

06

ENE_P2809A2_SOT23_8P

0.1U

F_1

6V_2

P5V0AL

100K_5%_2

39K_1%_2 59K

_1%

_210

0K_1

%_N

TC

P5V0AL

75K_1%_2

100K

_1%

_NT

C48

.7K

_1%

_2

P5V0AL

THRM_SHUTDWN#56D6 40B141D552C1

21B6

15D8 40A8 56D6

21B6

11A411C749B7

15D8PM_THRMTRIP#

330_5%_2

ACES_50273_0047N_001_4P

4.7U

F_6

.3V

_310

K_5

%_2

CS

C04

02_D

Y

SSM3K7002BFU

CSC0402_DY

10K

_5%

_2

FAN1_PWM

TP30

TP30

220p

F_5

0V_2

CS

C04

02_D

Y

P5V0S

KC_FBM_11_160808_101_T_2P_DY

POWERPAD_2_0610

0.1U

F_1

6V_2

MMBT4401

2M_5%_2

A3

THRM_SHUTDWN#

CS

Block Diagram

P5V0S_FAN

22U

F_6

.3V

_5_D

Y

P3V3S

P3V3S

FAN_TACH1

CORE_PG

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

G

G

4

3

2

1

G

DS

VCC

TMSNS2

TMSNS1

RHYST2

RHYST1

OT2

OT1

GND

OUT

OUT

IN

IN

IN

B

CEIN

1 2

S3 CIRCUIT: DRAM_RST# TO MEMORY SHOULD BE HIGH DURING S3

DMI&FDI TERMINATIONVOLTAGE

PROCESS STRAP SETTING

STUFF R4502

SANDY BRIDGE/IVY BRIDGE

SET TOVSS WHEN LOW

SET TOVCC WHEN HIGH

SANDY BRIDGE ONLY

NV_CLE (DEFAULT)

STUFF R4500/R4501

PLACE CLOSE TO CPT AND NVRAM CONNECTOR

REFERENCE 4500~4699(CPU)

- MB TRACE IMPEDANCE < 68 MOHMS(WORST CASE RESISTANCE)

- MAX LENGTH = 500 MILS

LOW IN C6/C7

- TRACE WIDTH = 15MILS AND

CAD NOTE: ALL DDR_COMP SIGNALS SHOULD BE ROUTED SUCH TAHT

7041

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R4600

AP33

AP30AR27

AN32

AP26AR28

AR26

A4A5AK1

R8

V8

AN34

AR33

AL32

C26

AP27AP29

AM34

AN33

A15A16

AL35

AL33

AR32AT31AR31AP32AT30AR30AR29AT28

A27A28

CN4500

2

1

3

Q4600

21

C4620

21

R4601

21

R4604

21

R4602

21 R4603

21R1418

21R4520

21R4519

21R4517

21R4516

1 TP4509

1 TP4506

1 TP45071 TP4508

1 TP45051 TP4504

1 TP45031 TP4502

21R4514

21R451321R4512

21R451021R4511

21

R4505

21R4506

21

R4508

21R4507

21

C4500

21

R4503

21 R4504

1TP4501

1TP4500

21

R4509

21 R4501

21

R4502

21

R4500

DRAMRST_CNTRL

DRAMRST_CNTRL_PCH

SHORT_0402

0.047UF_16V_2

1K_5%_2

38C3 39C3

41D8

49A3

40A452C1

21A652C2

48B348B3

41A5

52C2

11C721C3

48D3

45D645D8

49B7

41D5

41B2

41B241B241B2

49B8

41B2

41C1

41C1

41C1

41C1

41C1

52B2

36B251A7

41D2

DDR3_DRAMRST#

SM_RCOMP2SM_RCOMP1

TP30TP30

SM_RCOMP0

PM_DRAM_PWRGD_R

LOTES_ACA_ZIF_069_P01_989P

H_SNB_IVB#

H_PM_SYNC

PM_THRMTRIP#

CPU_PROCHOT#_R

H_PECI

CLK_DMI_PCH_DPCLK_DMI_PCH_DN

CPU_DRAMRST#

H_CPUPWRGD

51_5%_2

1K_5%_2

56_5%_2

CPU_PROCHOT#

1K_5%_2

1.5K_5%_2

130_1%_2

200_5%_2

P1V5S

1K_5%_2

SSM3K7002BFU

750_1%_2

4.99K_1%_2

PM_DRAM_PWRGD

62_5%_2

H_SNB_IVB#

Block Diagram

CSA3

2.2K_5%_2

P1V8S

P1V05S

140_1%_225.5_1%_2200_1%_2

1K_5%_21K_5%_2

P1V05S

51_5%_2_DY

51_5%_2

51_5%_2

51_5%_2

H_PRDY#H_PREQ#

H_TCKH_TMSH_TRST#

SYS_RESET#

H_TDIH_TDO

H_TMS

H_TCK

H_TDIH_PREQ#

H_TRST#

TP30

TP30TP30

TP30

TP30

TP30

TP24

TP24

P1V05S

2.2K_5%_2_DY

NV_CLE

10K_5%_2

CSC0402_DY

PLT_RST#

CPU_DRAMRST#

P1V5P3V3A

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

JTA

G &

BP

MM

ISC

DD

R3

PW

R M

AN

AG

EM

EN

TT

HE

RM

AL

MIS

C

CLO

CK

S

UNCOREPWRGOOD

PROC_SELECT#

SKTOCC#

PM_SYNC

BPM#[7]

BPM#[6]

BPM#[5]

BPM#[4]

BPM#[3]

BPM#[2]

BPM#[1]

BPM#[0]

DBR#

TDO

TDI

TRST#

TMS

TCK

PREQ#

PRDY#

RESET#

SM_DRAMPWROK

THERMTRIP#

PROCHOT#

PECI

CATERR#

DPLL_REF_CLK

DPLL_REF_CLK#

BCLK

BCLK#

SM_RCOMP[0]

SM_DRAMRST#

SM_RCOMP[2]

SM_RCOMP[1]

G

DS

OUTOUT

IN

IN

ININ

INININ

OUT

OUTIN

INININ

INOUT

OUT

ININ

IN

OUT

IN

IN

BI

OUT

OUT

OUT

OUT

OUT

REFERENCE 4500~4699(CPU)

- MAX LENGTH = 500 MILS

- TYPICAL IMPEDANCE = 14.5 MOHMS

PEG_ICOMPO SIGNALS SHOULD BE ROUTED WITH

SHOULD BE SHORTED NEAR BALLS AND ROUTED WITH

- TYPICAL IMPEDANCE < 25 MOHMS

CAD NOTE: DP_COMPIO AND ICOMPO SIGNALS

- TYPICAL IMPEDANCE = 43 MOHMS

- MAX LENGTH = 500 MILS

SHOULD BE SHORTED AND ROUTED WITH

CAD NOTE: PEG_ICOMPI AND RCOMPO SIGNALS

CLOSE TO CPU

7042

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21C4611

21C4610

21C4609

21C4608

21C4607

21C4606

21C4605

21C4604

21C4592

21C4593

21C4594

21C4595

21C4596

21C4597

21C4598

21C4599

21C4600

21C4601

21C4602

21C4603

21C4591

21C4590

21C4589

21C4588

21C4584

21C4585

21C4586

21C4587

21C4582

21C4583

21C4581

21C4580

E25F26D28F27E29G27H29J28J30K28K31L29L32M31M32M29

D25E26D27F28E28G28H28J27J29K27K30L28L31M30M33M28

C32B33D31D33E32E34F35G30G33H31H34J32J35L34M35K33

B32C33E31D34F32E33E35F30F33G31G34H32H35K34L35J33

H22J21J22

H20

E17D18C20B21

F17D19C19B20

H17

J17

F18E19H19A21

G18E20G19A22

J19

J18

F15D16E16C18

G15C16F16C17

A17B16

A18

D15C15

D21F21E22G21

C21F20D22G22

B24A25B25B27

B23A24B26B28

CN4500

21

R4522

21

R4521

42C342C3

42C3

42A4

42A4

PEG_TX5_DP

PEG_TX6_DP

PEG_TX7_DP

PEG_TX8_DP

PEG_TX9_DP

PEG_TX10_DP

PEG_TX11_DP

PEG_TX12_DP

42B4

PEG_TX13_DP

PEG_TX14_DP

PEG_TX4_DP

PEG_TX3_DP

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_C_TX8_DP

PEG_C_TX9_DP

PEG_C_TX10_DP

PEG_C_TX11_DP

PEG_C_TX12_DP

PEG_C_TX13_DP

PEG_C_TX14_DP

PEG_TX15_DP PEG_C_TX15_DP

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_C_TX7_DP

PEG_C_TX6_DP

PEG_C_TX5_DP

PEG_C_TX4_DP

PEG_C_TX3_DP

PEG_TX2_DP PEG_C_TX2_DP

PEG_C_TX1_DP

PEG_TX0_DP PEG_C_TX0_DP

PEG_TX15_DN PEG_C_TX15_DN

PEG_TX14_DN PEG_C_TX14_DN

PEG_TX13_DN PEG_C_TX13_DN

PEG_TX12_DN PEG_C_TX12_DN

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_TX8_DN PEG_C_TX8_DN

PEG_TX9_DN PEG_C_TX9_DN

PEG_TX10_DN PEG_C_TX10_DN

PEG_TX11_DN PEG_C_TX11_DN

PEG_TX7_DN PEG_C_TX7_DN

PEG_TX6_DN PEG_C_TX6_DN

PEG_TX5_DN PEG_C_TX5_DN

PEG_TX4_DN PEG_C_TX4_DN

PEG_TX3_DN PEG_C_TX3_DN

PEG_TX2_DN PEG_C_TX2_DN

PEG_TX1_DN PEG_C_TX1_DN

PEG_TX0_DN PEG_C_TX0_DN 57D6

42C4

PEG_TX3_DN

PEG_TX1_DNPEG_TX0_DN

42A4

42C342C3

PEG_TX2_DN

PEG_TX15_DP

FDI_LSYNC0

49D3

42B4 57B6

42B4

57D6

57D6

57D6

57D6

57C6

57C6

57C6

57C6

57C6

57B6

57B6

57B6

57D157D157D157D157D157D1

57C1

57C1

57C157C1

49D6

49D6

49D6

42B342B342B342B342B342B342B342B342B342B342A342A342A342A342A342A3

42D342D342D342C3

42C342C342C342C3

42C3

42B342B3

57C1

57C157C1

57B157B157B157B157B1

57D157D157D157D157D157C157C1

57C157C157B157B157B157B157B1

49C349C3

49C3

49C349C3

49C349C349C349C349D3

49D349D3

49D349D349D349D349D349D349D349D3

49D649D649D6

49D649D649D6

49C649C649C649C6

49C6

49D649D6

42C4

42B4

42C4

42B4

42B4

42B4

42B4

42B4

42B4

42B4

42B4

42B4

57C6

42B4

42B4

57B6

42B4 57B6

42B4 57B6

42B4 57B6

42B4

42B4 57C6

42B4 57C6

42B4 57C6

42A4 57C6

42A4 57D6

42A4 57D6

42A4 57D6

57D6

57D6

57D6

57C6

57B6

57B6

FDI_TX2_DP PEG_C_RX0_DPPEG_C_RX1_DPPEG_C_RX2_DPPEG_C_RX3_DPPEG_C_RX4_DPPEG_C_RX5_DP

PEG_C_RX7_DP

PEG_C_RX10_DP

PEG_C_RX8_DNPEG_C_RX7_DN

DMI_RX0_DN

P1V0S_VCCP_PEG_ICOMPI

DMI_RX3_DP

P1V0S_VCCP_EDP_COMPIO

LOTES_ACA_ZIF_069_P01_989P

DMI_TX2_DN

PEG_TX0_DPPEG_TX1_DPPEG_TX2_DPPEG_TX3_DPPEG_TX4_DPPEG_TX5_DPPEG_TX6_DPPEG_TX7_DPPEG_TX8_DPPEG_TX9_DPPEG_TX10_DPPEG_TX11_DPPEG_TX12_DPPEG_TX13_DPPEG_TX14_DP

PEG_TX4_DNPEG_TX5_DNPEG_TX6_DNPEG_TX7_DNPEG_TX8_DNPEG_TX9_DNPEG_TX10_DNPEG_TX11_DNPEG_TX12_DNPEG_TX13_DNPEG_TX14_DNPEG_TX15_DN

PEG_C_RX6_DP

PEG_C_RX8_DPPEG_C_RX9_DP

PEG_C_RX11_DPPEG_C_RX12_DPPEG_C_RX13_DPPEG_C_RX14_DPPEG_C_RX15_DP

PEG_C_RX0_DNPEG_C_RX1_DNPEG_C_RX2_DNPEG_C_RX3_DNPEG_C_RX4_DNPEG_C_RX5_DNPEG_C_RX6_DN

PEG_C_RX9_DNPEG_C_RX10_DNPEG_C_RX11_DNPEG_C_RX12_DNPEG_C_RX13_DNPEG_C_RX14_DNPEG_C_RX15_DN

FDI_LSYNC1

FDI_INT

FDI_FSYNC1FDI_FSYNC0

FDI_TX7_DPFDI_TX6_DPFDI_TX5_DPFDI_TX4_DPFDI_TX3_DP

FDI_TX1_DPFDI_TX0_DP

FDI_TX7_DNFDI_TX6_DNFDI_TX5_DNFDI_TX4_DNFDI_TX3_DNFDI_TX2_DNFDI_TX1_DNFDI_TX0_DN

DMI_RX2_DPDMI_RX1_DPDMI_RX0_DP

DMI_RX3_DNDMI_RX2_DNDMI_RX1_DN

DMI_TX3_DPDMI_TX2_DPDMI_TX1_DPDMI_TX0_DP

DMI_TX3_DN

DMI_TX1_DNDMI_TX0_DN

P1V05S

24.9_1%_2

Block Diagram

CSA3

PEG_TX1_DPP1V05S

24.9_1%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OUTOUTOUTOUTOUTOUTOUTOUTOUT

OUTOUTOUTOUTOUTOUTOUTOUT

OUTOUT

OUTOUTOUTOUTOUTOUT

OUTOUTOUTOUTOUTOUTOUT

OUTOUT

OUTOUT

OUT

OUTOUT

OUT

OUTOUT

OUTOUT

OUTOUT

OUTOUT

OUTOUTOUTOUT

OUT

OUTOUT

OUT

ININ

IN

ININ

OUT

eDP

Inte

l(R)

FD

ID

MI

PC

I EX

PR

ES

S*

- G

RA

PH

ICS

eDP_ICOMPO

eDP_HPD

eDP_COMPIO

eDP_TX#[3]

eDP_TX#[2]

eDP_TX#[1]

eDP_TX#[0]

eDP_TX[3]

eDP_TX[2]

eDP_TX[1]

eDP_TX[0]

eDP_AUX#

eDP_AUX

PEG_TX[15]

PEG_TX[14]

PEG_TX[13]

PEG_TX[12]

PEG_TX[11]

PEG_TX[10]

PEG_TX[9]

PEG_TX[8]

PEG_TX[7]

PEG_TX[6]

PEG_TX[5]

PEG_TX[4]

PEG_TX[3]

PEG_TX[2]

PEG_TX[1]

PEG_TX[0]

PEG_TX#[15]

PEG_TX#[14]

PEG_TX#[13]

PEG_TX#[12]

PEG_TX#[11]

PEG_TX#[10]

PEG_TX#[9]

PEG_TX#[8]

PEG_TX#[7]

PEG_TX#[6]

PEG_TX#[5]

PEG_TX#[4]

PEG_TX#[3]

PEG_TX#[2]

PEG_TX#[1]

PEG_TX#[0]

PEG_RX[15]

PEG_RX[14]

PEG_RX[13]

PEG_RX[12]

PEG_RX[11]

PEG_RX[10]

PEG_RX[9]

PEG_RX[8]

PEG_RX[7]

PEG_RX[6]

PEG_RX[5]

PEG_RX[4]

PEG_RX[3]

PEG_RX[2]

PEG_RX[1]

PEG_RX[0]

PEG_RX#[15]

PEG_RX#[14]

PEG_RX#[13]

PEG_RX#[12]

PEG_RX#[11]

PEG_RX#[10]

PEG_RX#[9]

PEG_RX#[8]

PEG_RX#[7]

PEG_RX#[6]

PEG_RX#[5]

PEG_RX#[4]

PEG_RX#[3]

PEG_RX#[2]

PEG_RX#[1]

PEG_RX#[0]

PEG_RCOMPO

PEG_ICOMPO

PEG_ICOMPI

FDI1_LSYNC

FDI0_LSYNC

FDI_INT

FDI1_FSYNC

FDI0_FSYNC

FDI1_TX[3]

FDI1_TX[2]

FDI1_TX[1]

FDI1_TX[0]

FDI0_TX[3]

FDI0_TX[2]

FDI0_TX[1]

FDI0_TX[0]

FDI1_TX#[3]

FDI1_TX#[2]

FDI1_TX#[1]

FDI1_TX#[0]

FDI0_TX#[3]

FDI0_TX#[2]

FDI0_TX#[1]

FDI0_TX#[0]

DMI_TX[2]

DMI_TX[3]

DMI_TX[1]

DMI_TX[0]

DMI_TX#[3]

DMI_TX#[2]

DMI_TX#[1]

DMI_TX#[0]

DMI_RX[3]

DMI_RX[2]

DMI_RX[1]

DMI_RX[0]

DMI_RX#[3]

DMI_RX#[2]

DMI_RX#[1]

DMI_RX#[0]

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

ININ

INININ

IN

ININININ

INININ

ININ

ININININ

INININ

IN

INININ

INININININ

OUTOUTOUTOUTOUTOUTOUT

REFERENCE 4500~4699(CPU)

SOCKET,CPU,989P,TIN,3.0MM,STR,SMD,TR

7043

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

AF9AD9

AG3AH3

V7V5AF8W4V4AD8W5V1W6W3V2V3W7W2W1AD10

AM15AR12AM8AL6M6J3G6C4

AM14AR11AM9AL5N6K3F6D4

AH15AJ15AK14AL14AK15AL15AH14AJ14AN12AP12AL11

AM11AM12AL12AN11AP11

AL8AL9AH9AH8AK9AJ9AK8AJ8AJ6AJ5AH6AH5AK5AK6AG5AG6

M7N9M9

M10N7N8

N10M8K2J2J4J5J1K1K5K4G7G8F7F9G9

G10F8

F10C3C2C6D6D2D3D5C5

AL3AK3

AB5

AA6

AA5

AB6

V10

V9

AE8

V6AF10AE10

AH2AG2

AH1AG1

W10AA3AB3

W9AA4AB4

CN4500

AB9AB8

AD4AE4

R4R5AB10T1R1AB7R3T5R2T3T4T2T6R7T7AA8

AP15AK12AP9AN5N3K6F3D7

AP14AK11AP8AN6M3J6G3C7

AT15AR15AN15AT12AT14AR14AN14AT11AH12AJ12AR8

AH11AT9AT8

AJ11AR9AR5AR6AN8AP6AT6AT5AN9AP5AP2AN1AN2AN3AP3AR3AM6AM5

M1M2N5M4N1N2N4M5K7K8

J10J9K9

K10J8J7G2F2F5G5G1F1F4G4D8D9A8A9C8

D10A7C9

AE3AD3

AD1

AD2

AE1

AE2

R10

R9

AA10

R6AA7AA9

AE5AD5

AE6AD6

T10AB1AA1

T9AA2AB2

CN4500

39B839B839B8

39B839B839B8

39B8

39B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38B8

38C838C8

38C838D8

38C8

38C8

38C8

38C8

38C8

38C8

38C838C838C8

38D838D838D8

38D8

39D5

39D839D839C8

39C839C839C8

39C8

39C8

39C8

39C8

39C8

39C8

39C839C8

39B839B839B839B8

39B8

39B839B839B8

39C839C8

38D5

9 M_A_DQ<9>M_A_DQ<10>M_A_DQ<11>

M_A_DQ<6>

M_B_DQS4_DNM_B_DQS5_DNM_B_DQS6_DN

M_B_DQS3_DNM_B_DQS2_DNM_B_DQS1_DN

M_B_DQS7_DN

M_B_DQS0_DP

M_B_DQ<27>M_B_DQ<26>

M_B_DQ<31>M_B_DQ<32>

M_B_DQ<30>M_B_DQ<29>M_B_DQ<28>

M_B_DQ<55>M_B_DQ<54>M_B_DQ<53>

M_B_DQ<51>

M_B_A<1>

M_B_DQ<56>

LOTES_ACA_ZIF_069_P01_989P

M_A_DQ<63>M_A_DQ<62>M_A_DQ<61>M_A_DQ<60>M_A_DQ<59>M_A_DQ<58>M_A_DQ<57>M_A_DQ<56>M_A_DQ<55>M_A_DQ<54>M_A_DQ<53>M_A_DQ<52>M_A_DQ<51>M_A_DQ<50>M_A_DQ<49>M_A_DQ<48>M_A_DQ<47>M_A_DQ<46>M_A_DQ<45>M_A_DQ<44>M_A_DQ<43>M_A_DQ<42>M_A_DQ<41>M_A_DQ<40>M_A_DQ<39>M_A_DQ<38>M_A_DQ<37>M_A_DQ<36>M_A_DQ<35>M_A_DQ<34>M_A_DQ<33>M_A_DQ<32>M_A_DQ<31>M_A_DQ<30>M_A_DQ<29>M_A_DQ<28>M_A_DQ<27>M_A_DQ<26>M_A_DQ<25>M_A_DQ<24>M_A_DQ<23>M_A_DQ<22>M_A_DQ<21>M_A_DQ<20>M_A_DQ<19>M_A_DQ<18>M_A_DQ<17>M_A_DQ<16>M_A_DQ<15>M_A_DQ<14>M_A_DQ<13>M_A_DQ<12>

M_A_DQ<8>M_A_DQ<7>

M_A_DQ<5>M_A_DQ<4>M_A_DQ<3>M_A_DQ<2>M_A_DQ<1>M_A_DQ<0>

M_A_A<15>M_A_A<14>M_A_A<13>M_A_A<12>M_A_A<11>M_A_A<10>M_A_A<9>M_A_A<8>M_A_A<7>M_A_A<6>M_A_A<5>M_A_A<4>M_A_A<3>M_A_A<2>M_A_A<1>M_A_A<0>

M_A_DQS7_DN

M_A_DQS7_DP

M_A_DQS6_DN

M_A_DQS6_DP

M_A_DQS5_DN

M_A_DQS5_DP

M_A_DQS4_DN

M_A_DQS4_DP

M_A_DQS3_DN

M_A_DQS3_DP

M_A_DQS2_DN

M_A_DQS2_DP

M_A_DQS1_DN

M_A_DQS1_DP

M_A_DQS0_DN

M_A_DQS0_DP

M_ODT1M_ODT0

M_CS#1M_CS#0

M_CKE1

M_CKE0

M_CLK_DDR1_DN

M_CLK_DDR0_DN

M_CLK_DDR1_DP

M_CLK_DDR0_DP

M_A_WE#M_A_RAS#M_A_CAS#

M_A_BS2M_A_BS1M_A_BS0

151413121110987654321

636261

45

43

41403938373635343332313029282726252423222120

1413

11

A3 CS

Block Diagram

109876

2

5

44

42

12

575859

56

52535455

51

47484950

46

60

18171615

43

1

0

M_A_A<15..0>

012345678

101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263

19

0

M_B_DQ<63..0>

M_B_A<15..0>

15

1314

12

1011

9

23

01

87654

LOTES_ACA_ZIF_069_P01_989P

M_B_BS0M_B_BS1M_B_BS2

M_B_CAS#M_B_RAS#M_B_WE#

M_B_DQ<0>M_B_DQ<1>M_B_DQ<2>M_B_DQ<3>M_B_DQ<4>M_B_DQ<5>M_B_DQ<6>M_B_DQ<7>M_B_DQ<8>M_B_DQ<9>M_B_DQ<10>M_B_DQ<11>M_B_DQ<12>M_B_DQ<13>M_B_DQ<14>M_B_DQ<15>M_B_DQ<16>M_B_DQ<17>M_B_DQ<18>M_B_DQ<19>M_B_DQ<20>M_B_DQ<21>M_B_DQ<22>M_B_DQ<23>M_B_DQ<24>M_B_DQ<25>

M_B_DQ<33>M_B_DQ<34>M_B_DQ<35>M_B_DQ<36>M_B_DQ<37>M_B_DQ<38>M_B_DQ<39>M_B_DQ<40>M_B_DQ<41>M_B_DQ<42>M_B_DQ<43>M_B_DQ<44>M_B_DQ<45>M_B_DQ<46>M_B_DQ<47>M_B_DQ<48>M_B_DQ<49>M_B_DQ<50>

M_B_DQ<52>

M_B_DQ<57>M_B_DQ<58>M_B_DQ<59>M_B_DQ<60>M_B_DQ<61>M_B_DQ<62>M_B_DQ<63>

M_CLK_DDR2_DP

M_CLK_DDR3_DP

M_CLK_DDR2_DN

M_CLK_DDR3_DN

M_CKE2

M_CKE3

M_ODT2M_ODT3

M_B_DQS4_DPM_B_DQS5_DPM_B_DQS6_DPM_B_DQS7_DP

M_B_DQS0_DN

M_B_DQS1_DPM_B_DQS2_DPM_B_DQS3_DP

M_B_A<0>

M_B_A<2>M_B_A<3>M_B_A<4>M_B_A<5>M_B_A<6>M_B_A<7>M_B_A<8>M_B_A<9>M_B_A<10>M_B_A<11>M_B_A<12>M_B_A<13>M_B_A<14>M_B_A<15>

M_CS#2M_CS#3

M_A_DQ<63..0>

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BIBI

DD

R S

YS

TE

M M

EM

OR

Y A RSVD_TP[10]

RSVD_TP[9]

RSVD_TP[8]

RSVD_TP[7]

RSVD_TP[6]

RSVD_TP[3]

RSVD_TP[5]

RSVD_TP[4]

RSVD_TP[2]

RSVD_TP[1]

SA_DQ[63]

SA_DQ[62]

SA_DQ[61]

SA_DQ[60]

SA_DQ[59]

SA_DQ[58]

SA_DQ[57]

SA_DQ[56]

SA_DQ[55]

SA_DQ[54]

SA_DQ[53]

SA_DQ[52]

SA_DQ[51]

SA_DQ[50]

SA_DQ[49]

SA_DQ[48]

SA_DQ[47]

SA_DQ[46]

SA_DQ[45]

SA_DQ[44]

SA_DQ[43]

SA_DQ[42]

SA_DQ[41]

SA_DQ[40]

SA_DQ[39]

SA_DQ[38]

SA_DQ[37]

SA_DQ[36]

SA_DQ[35]

SA_DQ[34]

SA_DQ[33]

SA_DQ[32]

SA_DQ[31]

SA_DQ[30]

SA_DQ[29]

SA_DQ[28]

SA_DQ[27]

SA_DQ[26]

SA_DQ[25]

SA_DQ[24]

SA_DQ[23]

SA_DQ[22]

SA_DQ[21]

SA_DQ[20]

SA_DQ[19]

SA_DQ[18]

SA_DQ[17]

SA_DQ[16]

SA_DQ[15]

SA_DQ[14]

SA_DQ[13]

SA_DQ[12]

SA_DQ[11]

SA_DQ[10]

SA_DQ[9]

SA_DQ[8]

SA_DQ[7]

SA_DQ[6]

SA_DQ[5]

SA_DQ[4]

SA_DQ[3]

SA_DQ[2]

SA_DQ[1]

SA_DQ[0]

SA_MA[15]

SA_MA[14]

SA_MA[13]

SA_MA[12]

SA_MA[11]

SA_MA[10]

SA_MA[9]

SA_MA[8]

SA_MA[7]

SA_MA[6]

SA_MA[5]

SA_MA[4]

SA_MA[3]

SA_MA[2]

SA_MA[1]

SA_MA[0]

SA_DQS#[7]

SA_DQS[7]

SA_DQS#[6]

SA_DQS[6]

SA_DQS#[5]

SA_DQS[5]

SA_DQS#[4]

SA_DQS[4]

SA_DQS#[3]

SA_DQS[3]

SA_DQS#[2]

SA_DQS[2]

SA_DQS#[1]

SA_DQS[1]

SA_DQS#[0]

SA_DQS[0]

SA_ODT[1]

SA_ODT[0]

SA_CS#[1]

SA_CS#[0]

SA_CKE[1]

SA_CKE[0]

SA_CLK#[1]

SA_CLK#[0]

SA_CLK[1]

SA_CLK[0]

SA_WE#

SA_RAS#

SA_CAS#

SA_BS[2]

SA_BS[1]

SA_BS[0]

DD

R S

YS

TE

M M

EM

OR

Y B

RSVD_TP[20]

RSVD_TP[19]

RSVD_TP[18]

RSVD_TP[17]

SB_CS#[1]

SB_CS#[0]

RSVD_TP[16]

RSVD_TP[15]

RSVD_TP[14]

RSVD_TP[13]

RSVD_TP[12]

RSVD_TP[11]

SB_DQ[63]

SB_DQ[62]

SB_DQ[61]

SB_DQ[60]

SB_DQ[59]

SB_DQ[58]

SB_DQ[57]

SB_DQ[56]

SB_DQ[55]

SB_DQ[54]

SB_DQ[53]

SB_DQ[52]

SB_DQ[51]

SB_DQ[50]

SB_DQ[49]

SB_DQ[48]

SB_DQ[47]

SB_DQ[46]

SB_DQ[45]

SB_DQ[44]

SB_DQ[43]

SB_DQ[42]

SB_DQ[41]

SB_DQ[40]

SB_DQ[39]

SB_DQ[38]

SB_DQ[37]

SB_DQ[36]

SB_DQ[35]

SB_DQ[34]

SB_DQ[33]

SB_DQ[32]

SB_DQ[31]

SB_DQ[30]

SB_DQ[29]

SB_DQ[28]

SB_DQ[27]

SB_DQ[26]

SB_DQ[25]

SB_DQ[24]

SB_DQ[23]

SB_DQ[22]

SB_DQ[21]

SB_DQ[20]

SB_DQ[19]

SB_DQ[18]

SB_DQ[17]

SB_DQ[16]

SB_DQ[15]

SB_DQ[14]

SB_DQ[13]

SB_DQ[12]

SB_DQ[11]

SB_DQ[10]

SB_DQ[9]

SB_DQ[8]

SB_DQ[7]

SB_DQ[6]

SB_DQ[5]

SB_DQ[4]

SB_DQ[3]

SB_DQ[2]

SB_DQ[1]

SB_DQ[0]

SB_MA[15]

SB_MA[14]

SB_MA[13]

SB_MA[12]

SB_MA[11]

SB_MA[10]

SB_MA[9]

SB_MA[8]

SB_MA[7]

SB_MA[6]

SB_MA[5]

SB_MA[4]

SB_MA[3]

SB_MA[2]

SB_MA[1]

SB_MA[0]

SB_DQS#[3]

SB_DQS[3]

SB_DQS#[2]

SB_DQS[2]

SB_DQS#[1]

SB_DQS[1]

SB_DQS#[0]

SB_DQS[0]

SB_DQS#[7]

SB_DQS[7]

SB_DQS#[6]

SB_DQS[6]

SB_DQS#[5]

SB_DQS[5]

SB_DQS#[4]

SB_DQS[4]

SB_ODT[1]

SB_ODT[0]

SB_CKE[1]

SB_CKE[0]

SB_CLK#[1]

SB_CLK#[0]

SB_CLK[1]

SB_CLK[0]

SB_WE#

SB_RAS#

SB_CAS#

SB_BS[2]

SB_BS[1]

SB_BS[0]

OUT

OUTOUT

OUTOUT

OUTOUTOUTOUT

OUTOUT

OUT

OUTOUT

OUTOUTOUT

OUTOUT

OUTOUT

OUTOUTOUT

OUTOUTOUT

OUTOUT

OUTOUT

OUTOUTOUT

OUTOUTOUT

OUTOUTOUT

OUTOUTOUT

OUTOUT

OUTOUT

OUTOUT

OUT

OUTOUTOUT

OUTOUTOUT

OUTOUTOUT

OUT

OUTOUTOUT

OUTOUTOUT

SVID SIGNAL TO VR

PLACE CLOSE TO CPU

REFERENCE 4500~4699(CPU)

44

MODEL,PROJECT,FUNCTION

X0170XXX 21-OCT-2002

1310xxxxx-0-0

21R4531

21R4530

A10

AJ34

AJ28AJ30AJ29

B10

J14L10P10U10Y10

J23

AC10

A11A12A13A14B12B14C11C12C13C14

AG10

D11D12D13D14E11

E12E14F11F12F13

AH10

F14G12G13G14H11H12H14J11J12J13

AH13

AJ35

P27P28P29P30P31P32P33P34P35R26

AG27

R27R28R29R30R31R32R33R34R35U26

AG28

U27U28U29U30U31U32U33U34U35V26

AG29

V27V28V29V30V31V32V33V34V35Y26

AG30

Y27Y28Y29Y30Y31Y32Y33Y34Y35

AA26

AG31

AA27AA28AA29AA30AA31AA32AA33AA34AA35AC26

AG32

AC27AC28AC29AC30AC31AC32AC33AC34AC35AD26

AG33

AD27AD28AD29AD30AD31AD32AD33AD34AD35AF26

AG34

AF27AF28AF29AF30AF31AF32AF33AF34AF35

P26

AG26

AG35

CN4500

21

R4535

21

R4534

21

R4533

21

R4532

21

R4527

21

R4528

21R4529

21

C45

42

21

C45

41

21

C45

40

21

C45

35

21

C45

36

21

C45

37

21

C45

33

21

C45

34

21

C45

31

21

C45

32

21

C4522

21

C4523

21

C4524

21

C4525

21

C4518

21

C4519

21

C4520

21

C4521

21

C4514

21

C4515

21

C4516

21

C4517

21

C4513

21

C4512

21

C4511

21

C4510

SHORT_0402SHORT_0402 VR_SVID_DATA

H_CPU_SVIDCLK VR_SVID_CLK43_5%_2

130_1%_2

11D6

11A3 11C711A3 11C711C7

9B79B7

11D6

VCCSENSE

H_CPU_SVIDDAT

H_CPU_SVIDALRT#

LOTES_ACA_ZIF_069_P01_989P

100_1%_2

VR_SVID_ALERT#

VCC_SENSE_VCCIOVSS_SENSE_VCCIO

VSSSENSE

P1V05S

75_5%_2

PVCORE

P1V05S

10_1%_2

10_1%_2

100_1%_2

22U

F_6

.3V

_5

22U

F_6

.3V

_5

22U

F_6

.3V

_5

22U

F_6

.3V

_5

22U

F_6

.3V

_5

22U

F_6

.3V

_5

P1V05S

22U

F_6

.3V

_5

22U

F_6

.3V

_5

22U

F_6

.3V

_5

22U

F_6

.3V

_522UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

CSC

Block Diagram

22UF_6.3V_5 22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5 22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5

22UF_6.3V_5 22UF_6.3V_5

PVCORE

22UF_6.3V_5 22UF_6.3V_5

DOC.NUMBER

of

INVENTECTITLE

DATE

CODE

E

D

C

B

A

7 6 5 4 3 2 1

7 6 5 4 3

E

D

C

B

A

FF

8

CHANGE by

8

REV

2 1

SHEET

SIZE

SV

IDS

EN

SE

LIN

ES

PE

G A

ND

DD

R

CO

RE

SU

PP

LY

POWER

VCCIO40

VCCIO_SENSE

VCCIO31

VCCIO30

VCCIO29

VCCIO28

VCCIO27

VCCIO26

VCCIO39

VCCIO38

VCCIO37

VCCIO36

VCCIO35

VCCIO34

VCCIO33

VCCIO32

VCCIO25

VCCIO17

VCCIO16

VCCIO15

VCCIO14

VCCIO13

VCCIO11

VCCIO10

VCCIO9

VCCIO8

VCCIO7

VCCIO6

VCCIO5

VCCIO4

VCCIO3

VCCIO2

VCCIO24

VCCIO23

VCCIO22

VCCIO21

VCCIO20

VCCIO19

VCCIO18

VCCIO12

VCCIO1

VCC100

VCC99

VCC98

VCC97

VCC96

VCC95

VCC94

VCC93

VCC92

VCC91

VCC90

VCC89

VCC88

VCC87

VCC86

VCC85

VCC84

VCC83

VCC82

VCC81

VCC80

VCC79

VCC78

VCC77

VCC76

VCC75

VCC74

VCC73

VCC72

VCC71

VCC70

VCC69

VCC68

VCC67

VCC66

VCC65

VCC64

VCC63

VCC62

VCC61

VCC60

VCC59

VCC58

VCC57

VCC56

VCC55

VCC54

VCC53

VCC52

VCC51

VCC50

VCC49

VCC48

VCC47

VCC46

VCC45

VCC44

VCC43

VCC42

VCC41

VCC40

VCC39

VCC38

VCC37

VCC36

VCC35

VCC34

VCC33

VCC32

VCC31

VCC30

VCC29

VCC28

VCC27

VCC26

VCC25

VCC24

VCC23

VCC22

VCC21

VCC20

VCC19

VCC18

VCC17

VCC16

VCC15

VCC14

VCC13

VCC12

VCC11

VCC10

VCC9

VCC8

VCC7

VCC6

VCC5

VCC4

VCC3

VCC2

VCC1

VSSIO_SENSE

VIDSOUT

VIDSCLK

VIDALERT#

VSS_SENSE

VCC_SENSE

OUTOUT

OUTOUT

OUTOUTOUT

ROUTE WITH MIN. TRACE WIDTH OF 10 MILS

PROCESSOR DRIVEN VREF PATH WAS STUFFED BY DEFAULT:

1.2A

5A

NOTE : DDR_WR_VREF SHOULD HAVE 20/20 MIL WHEREVER POSSIBLE

7045

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R4538

21R4570 21

R4572

AK34

Y1Y4Y7AC1AC4AC7AF1AF4

P1P4P7U1U4U7

AF7

C24

H23

H25H26J24J25J26L26M26M27

A2A6B6

AK35

AR21AR23AR24AT17

AH17AH18AH20AH21AH23

AT18

AH24AJ17AJ18AJ20AJ21AJ23AJ24AK17AK18AK20

AT20

AK21AK23AK24AL17AL18AL20AL21AL23AL24

AM17

AT21

AM18AM20AM21AM23AM24AN17AN18AN20AN21AN23

AT23

AN24AP17AP18AP20AP21AP23AP24AR17AR18AR20

AT24

AL1

C22

CN4500

21

R4547

21

R45562

1

R4540

21

R4539

21

C4577

21

R4544

21

C4578

21

R4541

2

1

3

Q4500

2

1

3

Q4502

2

1

3

Q4501

21L4500

21

C4573

21

C4576

21

C4575

21

C4574

21

C4572

21

C4571

21

C4570

21

C4569

21

C4568

21

C4567

21

C4562

21

C4563

21

C4564

21

C4565

21

C4651

21

C4545

21

C4550

21

C4546

21

C4547

21

C4548

21

C4549

SLP_S3#_3R

SHORT_0402

11B8

P0V75M_VREF_H

10B410B4

10C4

13A213D2

14A614B814D221D649A1

11B8

41A845D8

46C4

41A845D6

46C4

DIMM1_VREF_DQDIMM0_VREF_DQ

P1V8S_VCCPLL

VCCSA_VID0VCCSA_VID1

VCCSA_SENSE

LOTES_ACA_ZIF_069_P01_989P

22UF_6.3V_5

1K_5%_2

100_5%_2

10UF_6.3V_3

10_1%_2

10UF_6.3V_3 10UF_6.3V_3

10UF_6.3V_3

22UF_6.3V_522UF_6.3V_5

P1V8S

MPZ1608S221AT

22UF_6.3V_522UF_6.3V_522UF_6.3V_522UF_6.3V_5

PVAXG

100K_5%_2

P1V5S

P0V75M_VREF_HP0V75M_VREF

AM2302N

PVAXG

AM2302N

220UF_2.5V10UF_6.3V_310UF_6.3V_310UF_6.3V_3

PVSA

22UF_6.3V_5

1UF_6.3V_210UF_6.3V_3 1UF_6.3V_2

PVSA

100UF_6.3V

10UF_6.3V_3

10UF_6.3V_3

Block Diagram

CSA3

1K_5%_2

GFX_VCC_SENSEGFX_VSS_SENSE

470PF_50V_2

10_1%_2

DRAMRST_CNTRL

CPUDDR_WR_VREF2

0_5%_2_DY

DRAMRST_CNTRL

AM2302N

0_5%_2_DY

CPUDDR_WR_VREF1

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OUTOUT

OUT

OUTOUT

IN

IN

ININ

IN

G

D S

G

DS

G

DS

+

MIS

CV

RE

FS

A R

AIL

1.8V

RA

IL

LIN

ES

SE

NS

ED

DR

3 -1

.5V

RA

ILS

GR

AP

HIC

S

POWER

FC_C22

VCCPLL3

VCCSA_VID1

VCCSA_SENSE

VCCSA8

VCCSA7

VCCSA6

VCCSA5

VCCSA4

VCCSA3

VCCSA2

VCCSA1

VCCPLL2

VCCPLL1

VDDQ10

VDDQ9

VDDQ8

VDDQ7

VDDQ6

VDDQ5

VDDQ4

VDDQ3

VDDQ2

VDDQ1

VDDQ15

VDDQ14

VDDQ13

VDDQ12

VDDQ11

VAXG54

VAXG53

VAXG52

VAXG51

VAXG50

VAXG49

VAXG48

VAXG47

VAXG46

VAXG45

VAXG44

VAXG43

VAXG42

VAXG41

VAXG40

VAXG39

VAXG38

VAXG37

VAXG36

VAXG35

VAXG34

VAXG33

VAXG32

VAXG31

VAXG30

VAXG29

VAXG28

VAXG27

VAXG26

VAXG25

VAXG24

VAXG23

VAXG22

VAXG21

VAXG20

VAXG19

VAXG18

VAXG17

VAXG16

VAXG15

VAXG14

VAXG13

VAXG12

VAXG11

VAXG10

VAXG9

VAXG8

VAXG7

VAXG6

VAXG5

VAXG4

VAXG3

VAXG2

VAXG1 VAXG_SENSE

VSSAXG_SENSE

SM_VREF

+

REMOVE

1 : (DEFAULT) NORMAL OPERATION

1 : (DEFAULT) EDP DISABLED

1 : (DEFAULT) PEG TRAIN IMMEDIATELY FOLLOWING XXRESETB DE ASSERTION0 : PEG WAIT FOR BIOS FOR TRAINING

PCIE PORT BIFURCATION STRAPS

11 : (DEFAULT) X16 - DEVICE 1 FUNCTION AND 2 DISABLED10 : X8, X8 - DEVICE 1 FUNCTION 1 ENABLE ; FUNCTION 2 DISABLED01 : RESERVED - (DEVICE 1 FUNCTION 1 DISABLED ; FUNCTION 2 ENABLED)00 : X8,X4,X4 - DEVICE 1 FUNCTION 1 AND 2 ENABLED

CLK_XDP_CLKGEN_DNCLK_XDP_CLKGEN_DP

PEG STATIC LANE REVERSAL

CFG[6:5]PEG DEFER TRAINING

PCIE PORT BIFURCATION

LOW EDP ENABLE

PEG STATIC LAN REVERSAL

STRAP PIN

PEG DEFER TRAINING

CFG(4)

LOW EDP ENABLE

CFG(7)

CFG(2)0 : LANE REVERSED

0 : EDP ENABLED

7046

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

R45

55

AH31

AH33

A19

AJ33

AH27

AJ31

F24F25

D1B4

AR1AT1AT2

AM35AN35

AK32AJ32

C35

AJ26

B35A34A33B34

AR34AP35AT33AT34AR35

G16H16J16T8

AJ27AM33AT26

W8AK2AE7AG7L7

J15

B18J20

C29A30B31D30B29B30A31C30D23E23G24G25D24F23

B1

AN29AK31AM27AN26AN31AN28AM26AM28AM30AM32AM31AL30AL29AK26AL27AL26AK29AK28

CN4500

A3A20A23A26A29A32A35B2B3B5B7B8B9B11B13B15B17B19B22C1C10C23C25C27C28C31C34D17D20D26D29D32D35E1E2E3E4E5E6E7E8E9E10E13E15E18E21E24E27E30F19F22

F29F31F34G11G17G20G23G26G29G32G35H1H2H3H4H5H6H7H8H9

H10H13H15H18H21H24H27H30H33J31J34K26K29K32K35

L1L2L3L4L5L6L8L9

L27L30L33

M34N26N27N28N29N30N31N32N33N34N35

P2P3P5P6P8P9

T26T27T28T29T30T31T32T33T34T35

CN4500

AH22AH25AH26AH28AH29AH30AH32AH34AH35AJ1

AT13 AJ2AJ3AJ4AJ7AJ10AJ13AJ16AJ19AJ22

AJ25

AT16

AK4AK7

AK10AK13AK16AK19AK22AK25AK27AK30

AT19

AK33AL2AL4AL7

AL10AL13AL16AL19AL22AL25

AT22

AL28AL31AL34AM1AM2AM3AM4AM7

AM10AM13

AT25

AM16AM19AM22AM25AM29

AN4AN7

AN10AN13AN16

AT27

AN19AN22AN25AN27AN30AP1AP4AP7

AP10AP13

AT29

AP16AP19AP22AP25AP28AP31AP34AR2AR4AR7

AT32

AR10AR13AR16

U2

AR19

U3U5U6U8U9W26W27W28W29W30

AR22

W31W32W33W34W35Y2Y3Y5Y6Y8

AR25

Y9AB26AB27AB28AB29AB30AB31AB32AB33AB34

AT3

AB35AC2AC3AC5AC6AC8AC9AD7AE9AE26

AT4

AE27AE28AE29AE30AE31AE32AE33AE34AE35AF2

AT7

AF3AF5AF6AG4AG8AG9AH4AH7AH16AH19

AT10

AT35

CN4500

21 R4553

21 R4554

21 R4552

21 R4551

21 R4550

45D845D6

46D4

46D4

46D4

46A6

46A646A646A646A6

9C7

CPUDDR_WR_VREF1CPUDDR_WR_VREF2

CFG<16>

CFG<14>

CFG<12>

LOTES_ACA_ZIF_069_P01_989P

LOTES_ACA_ZIF_069_P01_989P

CFG<7>

CFG<2>

CFG<5>

CFG<4>

CFG<6>

1K_1%_2_DY

1K_1%_2_DY

1K_1%_2_DY

1K_1%_2

1K_1%_2_DY

A3 CS

Block Diagram

CFG<0>CFG<1>CFG<2>CFG<3>CFG<4>CFG<5>CFG<6>CFG<7>CFG<8>CFG<9>CFG<10>

CFG<13>

CFG<15>

CFG<17>

LOTES_ACA_ZIF_069_P01_989P

CFG<11>

10K

_5%

_2_D

Y

VCCIO_SEL

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OUTOUT

OUT

RE

SE

RV

ED

RSVD55

RSVD54

VCCIO_SEL

VCC_DIE_SENSE

KEY

VSS_VAL_SENSE

VCC_VAL_SENSE

VSSAXG_VAL_SENSE

VAXG_VAL_SENSE

RSVD5

RSVD10

RSVD44

RSVD25

RSVD33

RSVD32

RSVD14

RSVD13

RSVD12

RSVD11

RSVD9

RSVD8

RSVD7

RSVD6

RSVD37

RSVD24

RSVD23

RSVD21

RSVD22

RSVD19

RSVD20

RSVD18

RSVD17

RSVD15

RSVD16

RSVD27

RSVD29

RSVD28

RSVD31

RSVD30

RSVD52

RSVD51

RSVD50

RSVD49

RSVD48

RSVD47

RSVD46

RSVD58

RSVD57

RSVD56

RSVD45

RSVD43

RSVD41

RSVD40

RSVD39

RSVD42

RSVD38

RSVD35

RSVD34

CFG[17]

CFG[16]

CFG[15]

CFG[14]

CFG[13]

CFG[12]

CFG[11]

CFG[10]

CFG[9]

CFG[8]

CFG[7]

CFG[6]

CFG[5]

CFG[4]

CFG[3]

CFG[2]

CFG[1]

CFG[0]

VSS_1

VSS285

VSS284

VSS283

VSS282

VSS281

VSS280

VSS279

VSS278

VSS277

VSS276

VSS275

VSS274

VSS273

VSS272

VSS271

VSS270

VSS269

VSS268

VSS267

VSS266

VSS265

VSS264

VSS263

VSS262

VSS261

VSS260

VSS259

VSS258

VSS257

VSS256

VSS255

VSS254

VSS253

VSS252

VSS251

VSS250

VSS249

VSS248

VSS247

VSS246

VSS245

VSS244

VSS243

VSS242

VSS241

VSS240

VSS239

VSS238

VSS237

VSS236

VSS235

VSS234

VSS233

VSS232

VSS231

VSS230

VSS229

VSS228

VSS227

VSS226

VSS225

VSS224

VSS223

VSS222

VSS221

VSS220

VSS219

VSS218

VSS217

VSS216

VSS215

VSS214

VSS213

VSS212

VSS211

VSS210

VSS209

VSS208

VSS207

VSS206

VSS205

VSS204

VSS203

VSS202

VSS201

VSS200

VSS199

VSS198

VSS197

VSS196

VSS195

VSS194

VSS193

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS175

VSS174

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS163

VSS162

VSS161

VSS

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

VSS141

VSS140

VSS139

VSS138

VSS137

VSS136

VSS135

VSS134

VSS133

VSS132

VSS131

VSS130

VSS129

VSS128

VSS127

VSS126

VSS125

VSS124

VSS123

VSS122

VSS121

VSS120

VSS119

VSS118

VSS117

VSS116

VSS115

VSS114

VSS113

VSS112

VSS111

VSS110

VSS109

VSS108

VSS107

VSS106

VSS105

VSS104

VSS103

VSS102

VSS101

VSS100

VSS99

VSS98

VSS97

VSS96

VSS95

VSS94

VSS93

VSS92

VSS91

VSS90

VSS89

VSS88

VSS87

VSS86

VSS85

VSS84

VSS83

VSS82

VSS81

VSS80

VSS79

VSS78

VSS77

VSS76

VSS75

VSS74

VSS73

VSS72

VSS71

VSS70

VSS69

VSS68

VSS67

VSS66

VSS65

VSS64

VSS63

VSS62

VSS61

VSS60

VSS59

VSS58

VSS57

VSS56

VSS55

VSS54

VSS53

VSS52

VSS51

VSS50

VSS49

VSS48

VSS47

VSS46

VSS45

VSS44

VSS43

VSS42

VSS41

VSS40

VSS39

VSS38

VSS37

VSS36

VSS35

VSS34

VSS33

VSS32

VSS31

VSS30

VSS29

VSS28

VSS27

VSS26

VSS25

VSS24

VSS23

VSS22

VSS21

VSS20

VSS19

VSS18

VSS17

VSS16

VSS15

VSS14

VSS13

VSS12

VSS11

VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

VSS4

VSS3

VSS2

VSS1

IN

IN

IN

IN

IN

OUTOUTOUT

OUTOUT

OUTOUTOUT

OUTOUTOUT

OUTOUT

OUTOUTOUTOUTOUT

0 : VCC VRM = 1.8V(DEFAULT)

HDA_3S_SYNC_R(PLL ODVR VOLTAGE)

1 : VCC VRM = 1.6V

FLASH DESCRIPTOR SECURITY OVERIDE

0:DISABLE : (DEFAULT INTERNAL PULL-DOWN)

PCSPKR_PCH_3(NO REBOOT)

STRAPPING

STRAPPING

REFERENCE 4700~4949(PCH)

FLASH OVERRIDE

1:ENABLE

1 : NO REBOOT ENABLED

STRAPPING

STRAP

STRAPPING

0 : (DEFAULT) NO REBOOT DISABLED

0:ENABLE EXTERNAL VRS1:ENABLE INTERNAL VRSINTVRMEN-INTEGRATE (SUS 1.05V VRM ENABLE

7047

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

CN4700

21R4713

G22

T10

V4

U3

T1

Y14

T3

V5

P3

Y11

Y10

AB1AB3Y1Y3

AD1AD3Y5Y7

AF1AF3AB10AB8

AB12

AH1

AB13

AH4AH5AD5AD7

AP10AP11AM8AM10

P1

AP5AP7AM1AM3

V14

C20

A20

D20

K36E36

H7

H1

K5

J3

C17

K22

L34

A36

A34

C34

G34

E34

K34

N32

C36

N34

D36

C37B37A38C38

U4700

21

R4700

432 1

X4700

1 TP4705

21

R4750

3

21

D4700

21R4718

21

R4743

21

R4741

21

R4739

1 TP4723

1 TP4722

1 TP4721

1 TP4720

21

C4701

21

C47

02

21

C47

00

21C4704

21C4703

21

R4708

21

R4707

21

R47

05

21

R4704

21

R4703

21 R4714

21 R4720

21

R4734

21

R4706

21 R4711

21 R4709

21 R4712

21 R4715

21 R4716

21 R4736

21 R4737

21

R4742

21

R4740

21

R4738

21 R4749

21 R4748

21R4747

21

R4744

21

R4752

21

R475147B6

29D529D529D529D5

28C7

21E3 27B7

28C7

47A7

21D347B7

47D3

47D3

47D3

21C621C8

21C621C7

21C821D6

21C721D6

29A729A7

29A729A7

28C728C7

21E3 27C3

21E3 27C321E3 27C321E3 27C321E3 27C3

24A2

24B2

24B2

21D347B8

24A2

24B1

21C8

47B647A6

47A6

1K_5%_2

LOTES_AAA_BAT_063_P02_A_2P

0_5%_2_DY

PCH_GPIO13

10K_5%_2_DY

10K_5%_2_DY

HDA_3S_SYNC_R

SATA_HDD_TX_DPSATA_HDD_TX_DNSATA_HDD_RX_DPSATA_HDD_RX_DN

SATA_MINICARD_RX_DN

PCI_3S_SERIRQ

SATA_MINICARD_RX_DP

1K_5%_2

P3V3A

P3V3A

PCH_GPIO13

TP30

FLASH_OVERRIDE

RTCX1

1UF

_6.3

V_2

P3V3_RTC

ITL_BD82PPSM_QPJ4_FCBGA_989P

PCH_TDO

PCH_TDI

PCH_TMS

PCH_TCK

EC_SPI_SO

EC_SPI_SI

EC_SPI_CS0#

EC_SPI_CLK

SATA_ODD_TX_DPSATA_ODD_TX_DNSATA_ODD_RX_DPSATA_ODD_RX_DN

SATA_MINICARD_TX_DPSATA_MINICARD_TX_DN

LPC_3S_FRAME#

LPC_3S_AD<3>LPC_3S_AD<2>LPC_3S_AD<1>LPC_3S_AD<0>

HDA_3S_SDIN0

HDA_3S_RST#_R

HDA_3S_SYNC_R

HDA_3S_BITCLK_R

TP30

1K_5%_2

33_5%_2

HDA_3S_SDOUT

HDA_3S_RST#33_5%_2

HDA_3S_SYNC33_5%_2

FLASH_OVERRIDE

HDA_3S_BITCLK

PCSPKR_PCH_3

Block Diagram

CSA3

BAT54C_30V_0.2A

1UF_6.3V_2

20K_1%_2

P3V3_RTC

330K_5%_3

EC_SPI_CS1#

TP30

RTCX2

32.768KHZ10M_5%_2

18PF_50V_2

P3V3_RTC

1M_5

%_2

P1V05S

37.4_1%_2TP30

RSC_0402_DY

1UF

_6.3

V_2

18PF_50V_2

P1V05S

PCH_TMSPCH_TDI

P1V05S

P3V3AL

RSC_0402_DY

RSC_0402_DY

RSC_0402_DY

RSC_0402_DY

RSC_0402_DY

RSC_0402_DY

0_5%_2_DY

RSC_0402_DY

PCH_TDO

P3V3A

10K_5%_2

10K_5%_2

P3V3S

49.9_1%_2

20K_1%_2

TP30

10K_5%_210K_5%_2

P3V3S

P1V05S_SATARCOMPO

750_1%_2

P1V05S_SATA3RCOMPO

RSC_0402_DY

33_5%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BI

BI

OUT

OUT

IN

OUTOUTOUT

BI

BIBIBIBI

OUT

ININ

ININ

OUT

OUT

IN

IN

OUT

OUTOUTOUT

OUTOUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

-+

IN

SA

TA

6G

JTA

GS

PI

LPC

SA

TA

IHD

AR

TC

SATA3RBIAS

SATA3RCOMPO

SATA3COMPI

SATAICOMPO

SPKR

SERIRQ

JTAG_TDO

JTAG_TDI

JTAG_TMS

JTAG_TCK

SATA1GP/GPIO19

SATA0GP/GPIO21

SPI_MISO

SPI_MOSI

SPI_CS1#

SPI_CS0#

SPI_CLK

SATAICOMPI

SATA5TXP

SATA5TXN

SATA5RXP

SATA5RXN

SATA4TXP

SATA4TXN

SATA4RXP

SATA4RXN

SATA3TXP

SATA3TXN

SATA3RXP

SATA3RXN

SATA2TXP

SATA2TXN

SATA2RXP

SATA2RXN

SATA1TXP

SATA1TXN

SATA1RXP

SATA1RXN

SATA0TXP

SATA0TXN

SATA0RXP

SATA0RXN

SRTCRST#

HDA_DOCK_RST#/GPIO13

HDA_DOCK_EN#/GPIO33

HDA_SDIN3

RTCRST#

LDRQ0#

FWH4/LFRAME#

LDRQ1#/GPIO23

FWH3/LAD3

FWH2/LAD2

FWH1/LAD1

FWH0/LAD0

SATALED#

HDA_SDO

HDA_SDIN2

HDA_SDIN1

HDA_SDIN0

HDA_RST#

HDA_SYNC

HDA_BCLK

INTRUDER#

INTVRMEN

RTCX2

RTCX1

OUTOUTININ

C

A2

A1

CLOCK TERMINATION FOR FICM

CLOSE TO PCH

STUFF FOR INTEGRATED CLK

REFERENCE 4700~4949(PCH)

7048

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 B500

21R4803

1TP47071TP4706

21

C4729

21

C4728

V49V47

Y47

M16

E14

C13

G12

C8

A12

C9

H14

E12

K45

AY38

BB40

AV36

BB36

BB34

AU34

AY32

AU32

AW38

AY40

AU36

AY36

AY34

AV34

BB32

AV32

BC38

BJ40

BG38

BH37

BE36

BJ36

BF34

BJ34

BE38

BG40

BJ38

BG37

BF36

BG36

BE34

BG34

E6

M10

K12

T13

L14

L12

A8

V10

M1

J2

K49

H47

F47

K43

AB40AB42

AB38AB37

V37V38

V42V40

V46V45

Y45Y43

Y36Y37

AA47AA48

AB47AB49

Y39Y40

AK13AK14

AM13AM12

AU22AV22

AK5AK7

H45

BG30BJ30

E24G24

BE18BF18

P10

T11

M7

U4700

2

1

3

Q4700

2

1

3

Q4701 1TP4701

21R4753

1TP4702

1TP4700

21R4794

21R4793

21R4792

21R4791

21R4790

21R4789

1TP4703 1TP4704

21 R4800

21 R4799

21 R4798

21 R4797

21 R4796

2

1

3

Q4703

2

1

3

Q4702

21

R4801

21X4701

21R4802

21R4837

21

R4784

21

R4785

21

R4786

21

R4787

21R4783

21R4782

21R4781

21R4780

21R4779

21R4778

21R4777

21 R4772

21 R4773

21 R4776

21 R4775

21 R4795

21C472721

C4726

21C472521

C4724

CLKREQ_GPU#

SSM3K7002BFU

PCH_3S_SMCLK

ITL_BD82PPSM_QPJ4_FCBGA_989P

SML1_DATA

SML1_CLK

SML1ALERT#

PCH_3A_ALERT_DAT

PCH_3A_ALERT_CLK

DRAMRST_CNTRL_PCH

PCH_3A_SMDATA

PCH_3A_SMCLK

CLKIN_PCI_FB

CLKIN_PCH14

XTAL25_OUTXTAL25_IN

PCIE_LAN_TX_C_DP

PCIE_LAN_RX_DN

CLKREQ_LAN#

P1V05S

10K_5%_2

10K_5%_2

CLKIN_DMI_PCH_DN

0.1UF_16V_2

PCIE_LAN_TX_DPPCIE_LAN_TX_DN

0.1UF_16V_2

10K_5%_2

CLKIN_SATA1_DP

10K_5%_2

P3V3A

10K_5%_2

2.2K_5%_2

SML1ALERT#

PCH_3A_ALERT_CLK

PCH_3A_ALERT_DAT

XTAL25_OUT

1M_5%_2

25MHZ

Block Diagram

CSA3

PCIE_LAN_RX_DP

P5V0S

10K_5%_2

10K_5%_2

CLKIN_DMI_PCH_DP

CLKIN_BUF_DOT96_DP

CLKIN_PCH14

2.2K_5%_2

PCH_3A_SMDATA

CLKIN_SATA1_DN

10K_5%_2

0.1UF_16V_2

10K_5%_2_DYCLKREQ_WLAN#

P3V3A

2.2K_5%_2

2.2K_5%_2

P3V3S

XTAL25_IN

SML1_CLK

10K_5%_2_DY

2.2K_5%_2

2.2K_5%_2

P3V3A

SSM3K7002FU_DY

SSM3K7002FU_DY

SML1_DATA

90.9_1%_2

TP24

TP24

TP24

10K_5%_2_DY

SMB_ALERT#

P3V3A

10K_5%_2

PCIE_WLAN_TX_DPPCIE_WLAN_TX_DNPCIE_WLAN_RX_DPPCIE_WLAN_RX_DN

CLKREQ_LAN#

10K_5%_2

PCH_3A_SMCLK

PCH_3S_SMDATA

CLKREQ_WLAN#

10K_5%_2

EC_SMB3_DATA

2.2K_5%_2

EC_SMB3_CLK

P3V3A

10K_5%_2

SSM3K7002BFU

2.2K_5%_2

CLK_DMI_PCH_DP

CLKREQ_GPU#

CLK_PEG_REF_DN

CLKIN_SATA1_DNCLKIN_SATA1_DP

27PF_50V_2

CLKIN_BUF_DOT96_DN

CLKIN_DMI_PCH_DNCLKIN_DMI_PCH_DP

10K_5%_2

CLKIN_BUF_DOT96_DNCLKIN_BUF_DOT96_DP

PCIE_LAN_TX_C_DN

CLKREQ_LAN#

CLK_PCIE_LAN_DPCLK_PCIE_LAN_DN

CLK_PCIE_WLAN_DNCLK_PCIE_WLAN_DP

TP24

TP24TP24

TP24

10K_5%_2_DY

10K_5%_2_DY

10K_5%_2_DY

10K_5%_2_DY

10K_5%_2_DY

CLKREQ_WLAN#

10K_5%_2_DY

P3V3A

0.1UF_16V_2

PCIE_WLAN_TX_C_DNPCIE_WLAN_TX_C_DP

P3V3A

P3V3S

48C3

39C8

38C820A7

48C2

48D2

48D2

48D227B3

48D227B3

41A8

48A8

48A8

51A7

48B8

48C148B1

22B1

48D7

48C722C5

48B3

22C222C2

48B3

48D3

48D3 27B3

48D3 27B3

48A3

22B1

48B3

48B3

48A3

48D3

48B3

48D7

48B727C7

48A3

48D3

48D3

48B2

27B727B727B727B7

48D8

48C722C5

48D3

39C8

38C820A7

48D8

48B727C7

41D2

48C3

57B6

41D2

48B848B8

48D3

48B3

48C848C8

48C848C8

48D8

48D722C5

22C222C2

27C727C7

48D8

48D727C7

CLK_PEG_REF_DP

CLK_DMI_PCH_DN

57B6

33PF_50V_2

PASSWORD_0805SMB_ALERT#

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

OUTOUT

BI

BI

BI

OUTOUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

ININ

Link

Con

trol

ler

SM

BU

SF

LEX

CLO

CK

S

CLO

CK

S

PC

I-E

*

PCIECLKRQ6#/GPIO45

CL_RST1#

CL_DATA1

CL_CLK1

SML1DATA/GPIO75

SML1CLK/GPIO58

SML1ALERT#/PCHHOT#/GPIO74

SML0DATA

SML0CLK

SML0ALERT#/GPIO60

SMBDATA

SMBCLK

SMBALERT#/GPIO11

CLKOUT_ITPXDP_P

CLKOUT_ITPXDP_N

CLKOUT_PCIE7P

CLKOUT_PCIE7N

PCIECLKRQ7#/GPIO46

CLKOUT_PCIE6P

CLKOUT_PCIE6N

CLKOUT_DP_N

CLKOUT_DP_P

XCLK_RCOMP

CLKOUT_PEG_B_N

CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

CLKOUT_DMI_P

CLKOUT_DMI_N

CLKOUTFLEX3/GPIO67

CLKOUTFLEX2/GPIO66

CLKOUTFLEX1/GPIO65

CLKOUTFLEX0/GPIO64

PCIECLKRQ5#/GPIO44

PCIECLKRQ4#/GPIO26

PCIECLKRQ3#/GPIO25

PCIECLKRQ2#/GPIO20

PCIECLKRQ1#/GPIO18

PCIECLKRQ0#/GPIO73

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_P

CLKOUT_PEG_A_N

CLKIN_PCILOOPBACK

REFCLK14IN

XTAL25_OUT

XTAL25_IN

CLKIN_SATA_P

CLKIN_SATA_N

CLKIN_DOT_96P

CLKIN_DOT_96N

CLKIN_DMI_P

CLKIN_DMI_N

CLKIN_GND1_P

CLKIN_GND1_N

CLKOUT_PCIE5P

CLKOUT_PCIE5N

CLKOUT_PCIE4P

CLKOUT_PCIE4N

CLKOUT_PCIE3P

CLKOUT_PCIE3N

CLKOUT_PCIE2P

CLKOUT_PCIE2N

CLKOUT_PCIE1P

CLKOUT_PCIE1N

CLKOUT_PCIE0P

CLKOUT_PCIE0N

PETP8

PETN8

PETP7

PETN7

PETP6

PETN6

PETP5

PETN5

PETP4

PETN4

PETP3

PETN3

PETP2

PETN2

PETP1

PETN1

PERP8

PERN8

PERP7

PERN7

PERP6

PERN6

PERP5

PERN5

PERP4

PERN4

PERP3

PERN3

PERP2

PERN2

PERP1

PERN1

G

DS

G

DS

OUT

BI

OUT

OUT

OUTOUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUTIN

IN

OUT

OUTOUT

OUTOUT

BI

BI

BI

BI

IN

IN

IN

BI

G

DS

G

DS

OUT

OUT

BI

OUT

IN

IN

ININ

ININ

ININ

OUTOUT

OUT

STRAPPING

INT. PU 20K

INT. PD 20K

HIGH-ENABLED(DEFAULT)LOW-DISABLED

STRAPPING

DSWVRMEN - DEEP S4/S5 WELL ON-DIE VOLTAGE REGULATOR ENABLE

INT. PU 20K

7049

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R4831

21R4817

21R4821

B9K3

P12

K16

N14

C12

G8

G16

D10

H4

F4

K14

G10

C21

A10

L22

E20

AP14

BH9BJ10BG12BE12BG13BF14BB14BG14

BG9BG10BJ12BC12BH13BE14AY14BJ14

BB10

AV14

AW16

BC10

AV12

A18

B13

E22

BJ24

BG25

AU18

AV18

BJ20

BG20

AY18

BB18

BJ18

BG18

BH21

AY20

AW20

BC20

BE20

AY24

AW24

BE24

BC24

N3

E10

L10

H20

U4700

5

4

3

2

1U4704

21

R4710

2

1

3

Q4714

21

R4883

2

1

3

Q4713

21

R4832

21

R4830

21R4827

21R4826

21R4825

21R4824

21

R4823

21R4822

2

13

D4707

2

13

D4706 21

R4820

21

R4815

21R4816

21

R4812

21R4814

21R4828

21

R4834

21

R4829

SHORT_0402RSMRST#

21E3

21D3

PCIE_WAKE#

21D3

49A5

27C7

42B7

42B7

21B6

14D2

22B5 49A5

11A411C740B4

21B649A6

21D6

21D6

41C1

15A415B4

15B8

16A7

21B649B7

42D7

42D7

42C742C7

42D742D7

42D7

42D742D742D742D7

42D742D7

21D121D3

49C2

41C7

49A5

21D1 49B7

13A2 13D2 14A6 14B8 14D2 21D645D3

42D742D7

42C742C742C742C742C742C742C742C7

42C742C742C742C742C742C742C742B7

42B7

42B7

42B7

42D7

41C5

49A5

21D649A5

49A6

49A5

21E349B3

21D649A6

49B7

49A3

22B527C749B3

0_5%_2_DY

EC_32KHZ

SLP_S5#_3R

PCI_3S_CLKRUN#

SLP_S3#_IC_3R

CORE_PG

PCH_PWROK

10K_5%_2

0_5%_2_DY

EC_PWRSW#

BAT54_30V_0.2A

LOW_BAT#_3

SYS_RESET#

SSM3K7002FU_DY SLP_S3_3R

SSM3K7002BFU

TC7SZ08FU

10K_5%_2_DY

SLP_S5_3R

P3V3S

PCH_PWROK

DMI_TX3_DN

DMI_TX0_DN

DMI_RX3_DPDMI_RX2_DP

DMI_TX1_DNDMI_TX2_DN

DMI_TX1_DP

330K_5%_2

P3V3_RTC

P3V3_LDO

SUSACK#

P1V05S

49.9_1%_2

P3V3A

Block Diagram

CSA3

8.2K_5%_2

DMI_RX0_DNDMI_RX1_DNDMI_RX2_DNDMI_RX3_DN

DMI_RX1_DPDMI_RX0_DP

RSMRST#

10K_5%_2

PM_DRAM_PWRGD

SUS_PWR_ACK

P3V3A

10K_5%_2_DY

8.2K_5%_2

P3V3A

P3V3_LDO

10K_5%_2

P3V3A

P3V3S

750_1%_2

100K_5%_2

SLP_S3#_3R

1K_5%_2_DY

330K_5%_2_DY

DMI_TX2_DPDMI_TX3_DP

FDI_TX0_DNFDI_TX1_DNFDI_TX2_DNFDI_TX3_DNFDI_TX4_DNFDI_TX5_DNFDI_TX6_DNFDI_TX7_DN

FDI_TX0_DPFDI_TX1_DPFDI_TX2_DPFDI_TX3_DPFDI_TX4_DPFDI_TX5_DPFDI_TX6_DPFDI_TX7_DP

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

FDI_INT

SLP_SUS#

DMI_TX0_DP

BAT54_30V_0.2A

H_PM_SYNC

PM_RI#

ACPRESENT

10K_5%_2

10K_5%_2

P3V3A

PM_RI#

PCH_GPIO29

10K_5%_2

PCI_3S_CLKRUN#

10K_5%_2

ITL_BD82PPSM_QPJ4_FCBGA_989P

ACPRESENT

SUS_PWR_ACK

10K_5%_2PCH_GPIO29

PCIE_WAKE#

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

IN

NC

NC

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

BI

IN

IN

INININ

ININ

ININ

ININ

IN

IN

IN

ININ

ININININ

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUTOUT

OUT

IN

IN

OUT

Sys

tem

Pow

er M

anag

emen

t

FD

I

DM

I

SUSACK#

DSWVRMEN

SLP_A#

DMI2RBIAS

DPWROK

APWROK

SLP_LAN#/GPIO29

DRAMPWROK

RSMRST#

SUSWARN#/SUSPWRDNACK/GPIO30

CLKRUN#/GPIO32

PWROK

BATLOW#/GPIO72

ACPRESENT/GPIO31

SUSCLK/GPIO62

SUS_STAT#/GPIO61

WAKE#

RI#

PWRBTN#

SYS_PWROK

SYS_RESET#

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_SUS#

PMSYNCH

FDI_INT

FDI_LSYNC1

FDI_LSYNC0

FDI_FSYNC1

FDI_FSYNC0

FDI_RXP7

FDI_RXP6

FDI_RXP5

FDI_RXP4

FDI_RXP3

FDI_RXP2

FDI_RXP1

FDI_RXP0

FDI_RXN7

FDI_RXN6

FDI_RXN5

FDI_RXN4

FDI_RXN3

FDI_RXN2

FDI_RXN1

FDI_RXN0

DMI_IRCOMP

DMI_ZCOMP

DMI3TXP

DMI2TXP

DMI1TXP

DMI0TXP

DMI3TXN

DMI2TXN

DMI1TXN

DMI0TXN

DMI3RXP

DMI2RXP

DMI1RXP

DMI0RXP

DMI3RXN

DMI2RXN

DMI1RXN

DMI0RXN

OUT

+-

G

DS

OUT

G

DS

IN

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

PCH_LVDS_DDCDATA - LVDS DETECTWHEN ‘1’- LVDS IS DETECTED

CLOSE TO PCH

REFERENCE 4700~4949(PCH)

HIGH-LVDS ENABLED

LOW-LVDS DISABLED (DEFAULT)

7050

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

AP45AP43

AM40AM42

AP40AP39

M39P38

AF43AF47AH49AH43

AF45AF49AH47AH45

AF40AF39

AJ47AK49AM49AN47

AJ48AK47AM47AN48

AK39AK40

AE47AE48

AF36AF37

M45

K47T40

P39T45

J47

P45

BH41

M36M43

AT43AT45

BG42BJ42BE42BF42BE44BF44BB45BB43

AT38

P42P46

AP49AP47

BB49BB47BA48BA47AY45AY43AY49AY47

AT40AT47AT49

AV49AV47AU47AU48AV46AV45AV40AV42

T43

M49

T49

T42

M47

P49

M40T39

N48

U4700

21

R4857

21

R4856

21 R4858

21

R4855

21R4861

21R4860

21R4859

21

R4862

36A536A5

36B5

36A536A536A536A536A536A5

34C5

36D836D8

35B2

35D835D8

35A2

35D8

34B8

34B834B8

34C5

34B8

34B834B834B8

34D7

34B5

21E7

34B8

PCH_HDMI_TX2_DNPCH_HDMI_TX2_DP

PCH_HPDET

PCH_HDMI_TX1_DNPCH_HDMI_TX1_DPPCH_HDMI_TX0_DNPCH_HDMI_TX0_DPPCH_HDMI_TXC_DNPCH_HDMI_TXC_DP

100K_5%_2

PCH_LVDS_DDCCLK

2.2K_5%_2

ITL_BD82PPSM_QPJ4_FCBGA_989P

PCH_HDMI_DDCDATAPCH_HDMI_DDCCLK

PCH_CRT_VSYNC

PCH_CRTR

PCH_CRT_HSYNC

PCH_CRTG

PCH_CRT_DDCDATAPCH_CRT_DDCCLK

PCH_CRTB

PCH_LVDS_TXDL1_DN

PCH_LVDS_TXCL_DPPCH_LVDS_TXCL_DN

1K_1%_2

150_1%_2

PCH_LVDS_DDCDATA

2.37K_1%_2

PCH_LVDS_TXDL0_DN

Block Diagram

CSA3

P3V3S

2.2K_5%_2

PCH_LVDS_TXDL0_DPPCH_LVDS_TXDL1_DPPCH_LVDS_TXDL2_DP

PCH_LCM_VDDEN

PCH_INV_PWM_3

PCH_LCM_BKLTEN

PCH_LVDS_TXDL2_DN

150_1%_2

150_1%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

BOUTOUTOUT

CR

T

Dig

ital D

ispl

ay In

terf

ace

LVD

S

SDVO_INTN

SDVO_INTP

SDVO_STALLN

SDVO_STALLP

SDVO_TVCLKINN

SDVO_TVCLKINP

DDPD_HPD

DDPC_HPD

DDPB_HPD

DDPD_AUXP

DDPC_AUXP

DDPB_AUXP

DDPD_AUXN

DDPC_AUXN

DDPB_AUXN

DDPD_CTRLDATA

DDPD_CTRLCLK

DDPC_CTRLDATA

DDPC_CTRLCLK

SDVO_CTRLDATA

SDVO_CTRLCLK

DAC_IREF

CRT_VSYNC

CRT_RED

CRT_IRTN

CRT_HSYNC

CRT_GREEN

CRT_DDC_DATA

CRT_DDC_CLK

CRT_BLUE

DDPD_1P

DDPD_0P

DDPC_3P

DDPC_2P

DDPC_0P

DDPC_1P

LVD_VBG

LVD_IBG

LVDSB_DATA3

LVDSB_DATA2

LVDSB_DATA1

DDPB_3P

DDPB_2P

DDPD_3P

DDPD_2P

DDPB_1P

DDPB_0P

DDPD_1N

DDPD_0N

DDPC_3N

DDPC_2N

DDPC_1N

DDPC_0N

DDPB_3N

DDPB_2N

DDPD_3N

DDPD_2N

LVD_VREFL

LVD_VREFH

DDPB_1N

DDPB_0N

LVDSB_DATA0

LVDSB_DATA#3

LVDSB_DATA#2

LVDSB_DATA#1

LVDSB_DATA#0

LVDSB_CLK

LVDSB_CLK#

LVDSA_DATA3

LVDSA_DATA2

LVDSA_DATA1

LVDSA_DATA0

LVDSA_DATA#3

LVDSA_DATA#2

LVDSA_DATA#1

LVDSA_DATA#0

LVDSA_CLK

LVDSA_CLK#

L_VDD_EN

L_DDC_DATA

L_DDC_CLK

L_CTRL_DATA

L_CTRL_CLK

L_BKLTEN

L_BKLTCTL

IN

OUTOUT

OUT

OUTOUT

BI

OUT

OUTOUTOUT

OUT

BI

OUT

OUTOUT

OUTOUTOUT

OUTOUT

OUTOUT

OUTOUTOUT

OUTOUT

MACHINE ID 1: POWER EXPRESS (YES:1 NO:0)

MACHINE ID 2: UMA:1 / DIS.:0

MACHINE ID 3: MAINSTREAM:1 / ENTRY:0

MACHINE ID 4: HDMI:1 / NO HDMI:0

MACHINE ID 5: SLEEP&CHARGE&DOLBY:(YES1 / NO 0)

MACHINE ID 6: USB ID1

TOP-BLOCK SWAP OVERRIDE

HIGH=DEFAULT

BBS STRAPING

MACHINE ID 1_DB : 35W CPU ONLY :1 / 35W&45W CPU:0

USB3.0 X1 / 2.0 X2

USB ID0

USB ID11

1

USB3.0 X2 / 2.0 X1

0

USB2.0 X3

0

1

1 NOTE:10K_5%(60130B1030ZT)

MCAHINE ID 0: USB ID0

WLAN

CARD READER

TOTAL LENGTH NO LONGER THAN 11 INCHES

ROUTE WITH 90 OHMS IMPEDANCE

SPI (DEFAULT)11

REFERENCE 4700~4949(PCH)

GPIO51BBS_BIT1

0

GPIO19BBS_BIT0

0 0

01

1

LPC

DESTINATIONBOOT BIOS

------

DEBUG PORT

USB2.0/3.0 COMBO-USB2.0 PORT 0,1 MAPPEDUSB3.0 PORT 1,2

P0.P1 RESERVER FOR USB3.0

WEBCAM

TO BE USED AS GPIO

INT. PU 20K

LOW=A16 SWAP OVERRIDE

RESERVED(NAND)

CLOSE TO PCH

STP_A16OVR

USED AS GPIO ONLY.INT. PU 20K

3G

NOTE:

NOTE:10K_5%(60130B1030ZT)

7051

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21C4800

21R4899

21R4907

21R4957

21R4898

21R4897

21R4896

21R4895

21R4894

21R4893

21R4892

C33

B33

E30G30K30L30M28N28B29C29A28C28D28E28H28K28A26C26B25C25

A32C32E32G32K32L32A30C30

A24C24

AK45AK43AH37AH38BG16

AW30

BJ16

AV28AY26AU26AY30AU28BB26AV26BG32BF32BE30

BH25

BC28BJ32BE32BC30BE28

BG46AY16M20B21

AB45

BJ26

AB46L24K24Y13

AM5AM4

AH12H3

N30C18

BG26

AT3AT4AU2

BC8AT10

BG4AU3

BF3AT12

BA2AY5

AT8

AV10

AV5

BF6BD4BE8

AV7

BB7BB3BB5BA3BB1AV1AV3AT5AY3AT1

AY7

E40C44C46

K10

C6

D44C42G40G42

G38H38K38K40

C14D14A16L16C16B17K20A14

F46E42D47

H40K42J48H43H49

U4700

21R4838

21R4882

21R4881

21R4880

21R4879

21R4956

1TP4717

5

4

3

2

1U4705

21 R4887

21

R4888

21R4891

21R489021R4889

21

R4885

21

R4886

21R4878

21R4877

21R4876

21R4875

21R4874

21R4906

21R4905

21R4904

21R4903

21R4902

21R4901

21R4900

21R4835

22_5%_2

P3V3A_PME#

CLK_KBPCI_RCLK_PCI_FB_R

CLK_PCI_DEBUG_R

CSC0402_DY

22_5%_222_5%_2

TC7SZ08FU

P3V3A

MACHINE_ID410K_5%_210K_5%_2

MACHINE_ID1_DB 10K_5%_2_DY 10K_5%_2_DYMACHINE_ID6

MACHINE_ID3

MACHINE_ID1_DB 10K_5%_2

MACHINE_ID6

MACHINE_ID2

MACHINE_ID5 MACHINE_ID5

MACHINE_ID2MACHINE_ID1MACHINE_ID0

10K_5%_2

MACHINE_ID4

10K_5%_2_DY

10K_5%_2_DY

ITL_BD82PPSM_QPJ4_FCBGA_989P

10K_5%_210K_5%_2

10K_5%_210K_5%_2

10K_5%_2_DY

10K_5%_2_DY

10K_5%_2_DY

10K_5%_2_DY

MACHINE_ID0

MACHINE_ID3

MACHINE_ID1

DGPU_PWR_EN#

SATA_ODD_DA#

10K_5%_2

10K_5%_2

PCI_3S_INTC#PCI_3S_INTB#

USB3_PCH_TX1_DN

8.2K_5%_2

10K_5%_2

8.2K_5%_2

10K_5%_2

Block Diagram

CSA3

PCI_3S_INTA#

PCI_3S_INTC#

PCI_3S_INTD#

RUNSCI0#_3

8.2K_5%_2

8.2K_5%_2

USB3_PCH_TX2_DP

1K_5%_2_DY

10K_5%_2

P3V3S

22.6_1%_3

USB3_PCH_RX1_DN

USB3_PCH_RX1_DP

USB3_PCH_TX2_DN

USB3_PCH_TX1_DP

USB_P0_DNUSB_P0_DPUSB_P1_DNUSB_P1_DPUSB_P2_DNUSB_P2_DP

USB_CR_DPUSB_WLAN_DNUSB_WLAN_DPUSB_CAM_DNUSB_CAM_DP

USB3_PCH_RX2_DN

USB3_PCH_RX2_DP

MACHINE_ID0MACHINE_ID1MACHINE_ID2MACHINE_ID3MACHINE_ID4MACHINE_ID5MACHINE_ID6MACHINE_ID1_DB

PCI_3S_INTB#8.2K_5%_2

PCI_3S_INTA#

USB_CR_DN

USB_3G_DPUSB_3G_DN

SATA_ODD_DA#

PCI_3S_INTD#

DGPU_HOLD_RST#PCI_3S_REQ2#DGPU_PWR_EN#

1K_5%_2_DY

PCI_3S_PIRQE#

10K_5%_2

DGPU_HOLD_RST#

PCI_3S_REQ2#

PCI_3S_PIRQG#

PCI_3S_PIRQH#

10K_5%_2 PCI_3S_PIRQE#

TP24

100K_5%_2

CLK_KBPCI

PLT_RST#

BUF_PLT_RST#

51A551A2

51A3 51A251A551A2

51A551A2

51A5 51A2

51A3 51A2

51A3 51A2

51A551A2

51A551A251A551A251A551A2

51A3 51A2

51A3 51A2

48A3

51A3 51A2

51B616A3

51B6

51C751C7

32B7

51B6

51B6

51B6

52D621E3

33B5

32C6

32C6

33B5

32B7

32C832B8

32C832B8

33C533C530C530C5

26A827B327B334B334B3

33C4

33C4

51A551A351A551A351A551A351A551A351A551A351A551A351A551A351A551A3

51B6

51D7

26A8

28C328C3

29A5

51C7

57A651C7

51C716A3

51B7

57A651B6

51B6

21E3

41C7 36B2

57A628C3 27C7 27C3 21E3

51B6

29A5

STP_A16OVR

51B6

51B6

BBS_BIT1

P3V3A

CLKIN_PCI_FB

27C7

51C7

51C751C751B7

10K_5%_2_DY

CLK_PCI_DEBUG

PCI_3S_PIRQH#PCI_3S_PIRQG#

P3V3A

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

IN

IN

IN

BI

BI

BI

BI

BIBI

OUTOUTOUT

BI

BIBI

BIBIBIBI

BI

OUT

OUTOUT

OUTOUT

OUT

OUTOUT

BI

BI

BI

OUTOUTOUTOUT

BI

OUTOUT

OUTOUT

ININ

ININ

ININ

BI

ININ

IN

BI

US

BPC

I

NV

RA

M

RS

VD

TP24

TP10

TP11

TP12

TP13

TP14

TP15

TP5

TP4

USB3TP4

USB3TP3

USB3TP2

USB3TP1

USB3TN4

USB3TN3

USB3TN2

USB3TN1

USB3RP4

USB3RP3

USB3RP2

USB3RP1

USB3RN4

USB3RN3

USB3RN2

USB3RN1

TP23

TP22

TP21

TP20

TP19

TP18

TP17

TP16

TP9

TP8

TP7

TP6

TP3

TP2

TP1

PLTRST#

CLKOUT_PCI3

CLKOUT_PCI4 OC7#/GPIO14

OC6#/GPIO10

OC5#/GPIO9

OC4#/GPIO43

OC3#/GPIO42

OC2#/GPIO41

OC1#/GPIO40

OC0#/GPIO59

USBRBIAS

USBRBIAS#

CLKOUT_PCI2

CLKOUT_PCI1

CLKOUT_PCI0

PME#

USBP13P

USBP13N

USBP12P

USBP12N

USBP11P

USBP11N

USBP10P

USBP10N

USBP9P

USBP9N

USBP8P

USBP8N

USBP7P

USBP7N

USBP6P

USBP6N

USBP5P

USBP5N

USBP4P

USBP4N

USBP3P

USBP3N

USBP2P

USBP2N

USBP1P

USBP1N

USBP0P

USBP0N

PIRQH#/GPIO5

PIRQG#/GPIO4

PIRQF#/GPIO3

PIRQE#/GPIO2

GNT3#/GPIO55

GNT2#/GPIO53

GNT1#/GPIO51

REQ3#/GPIO54

REQ2#/GPIO52

REQ1#/GPIO50

PIRQD#

PIRQC#

PIRQB#

PIRQA#

RSVD29

RSVD28

RSVD27

RSVD26

RSVD24

RSVD25

RSVD16

RSVD15

RSVD14

RSVD13

RSVD12

RSVD11

RSVD10

RSVD9

RSVD22

RSVD21

RSVD20

RSVD19

RSVD18

RSVD17

RSVD8

RSVD7

RSVD6

RSVD5

RSVD4

RSVD3

RSVD2

RSVD1

RSVD23

BIBI

BI

BI

BI

BI

BI

IN

IN

BI

BI

BI

BIBI

+-

OUT

OUTOUT

BI

BI

BI

BI

STRAPPING

STRAP

(DC COUPLING MODE) DEFAULT

STRAPPING

BOTH THESE SHOULD BE CLOSE TO PCH

INT. PU 20K

INT. PU 20K

INT. PD 20K

STRAPPING

FOLLOW EDS1.0

STRAPPING

REFERENCE 4700~4949(PCH)

INT. PU 20K

STRAPPING

INT. PU 20K

INT. PD 20K

INT.PD 20K

FDI_OVRVLTG(GPIO37)LOW- TX,RXTERMINATED TO SAME VOLTAGE

LOW-DISABLEDHIGH-ENABLED (DEFAULT)

PLL_ODVR_EN(PLL ON DIE VR ENABLE)(GPIO28)

STRAPPING

7052

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R4724

21R4921

21R4920

21R4917

21R4934

21R4935

21R4932

21R4929

21R4928

21R4916

21R4915

21R4927

BD1

B47

B3

A6

A5

A46

F49

F1

E49

A45

E1

D49

D1

C48

C2

BJ6

BJ5

BJ46

BJ45

BJ44A44

BJ4

BH47

BH3

BG48

BG2

BF49

BF1

BE49

BE1

BD49

A4

AK10

AH10

AK11

AH8

AY10

A40

C41

B41

C40

E38

H36

A42

D40

K1

N2

V13

M3

T5

V3

U2

M5

V8

P5

AY11

AU16

AY1

P37

C4

T14

C10

D6

K4

P8

E16

E8

G2

T7

P4

U4700

21R4911

21R4909

21 R4721

21R4919

21R4727

21R4726

21R4725

21R4908

21 R4950

21R4936

21R4910

21

R4944

21R49432

1

R4942

21R4941

21 R4940

21R4930

52D7

52A7

29A552D7

29B828C6

52C7

29A5 52B6

52B6

52C6 52D7

52C6

52C6

52D6

21E351C7

52D7

28C252D6

52C6 52C7

52C6

40A441D5

21A6 41D5

41D6

52C6

41C5

21D2

21E2

13B213C8

52B7

52C752D7

52D7

52C6

52C6

52D7

52D7

52B6

52D7

52D7

27B727C7

52D7

52C7

52B6

52B6

PCH_GPIO27

PLL_ODVR_EN

10K_5%_2

10K_5%_2_DY

10K_5%_2

ITL_BD82PPSM_QPJ4_FCBGA_989P

SATA_ODD_PRSNT#

10K_5%_2

SATA_ODD_PWREN

10K_5%_2

10K_5%_2

10K_5%_2

10K_5%_2

10K_5%_2

MSATA_DET

PCH_GPIO39

10K_5%_2_DY

SATA_ODD_PRSNT#

PCH_GPIO38

PCH_GPIO22

P3V3S

PCH_GPIO27PCH_GPIO15PCH_GPIO8

10K_5%_2_DY

10K_5%_2

1K_5%_2_DY

10K_5%_2

10K_5%_2

RUNSCI0#_3

PCH_GPIO6

3G_ON#

10K_5%_2_DY

PCH_GPIO6PCH_GPIO22

PCH_GPIO16

P3V3S

P3V3A

A3 CS

Block Diagram

56_5%_2

PM_THRMTRIP#

P1V05S

P3V3S

P1V05S

10K_5%_2_DY

10K_5%_2_DY

0_5%_2_DYH_PECI

56_5%_2

NV_CLE

PLL_ODVR_EN

0_5%_2_DY390_5%_2

P3V3S

33K_5%_2_DY

H_CPUPWRGD

KBRST#

PCH_PECI

THRMTRIP#_R

EC_3S_A20GATE

DGPU_PWRGD

PCH_GPIO37

PCH_GPIO22

PCH_GPIO24

PCH_GPIO24PCH_GPIO12

P3V3A

PCH_GPIO15

PCH_GPIO12

P3V3S

10K_5%_2

10K_5%_2

100K_5%_2_DY

PCH_GPIO37

PCH_GPIO8

PCH_GPIO16

10K_5%_2_DY

BTIFON#

PCH_GPIO38

PCH_GPIO48

PCH_GPIO39

10K_5%_2 PCH_GPIO48

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

IN

OUT

INOUT

OUT

OUT

IN

OUT

OUT

GP

IO

NC

TF

CP

U/M

ISC

DF_TVS

VSS_NCTF_16

VSS_NCTF_15

VSS_NCTF_14

VSS_NCTF_13

NC_1

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

VSS_NCTF_31

VSS_NCTF_30

VSS_NCTF_29

VSS_NCTF_28

VSS_NCTF_27

VSS_NCTF_26

VSS_NCTF_25

VSS_NCTF_24

VSS_NCTF_23

VSS_NCTF_22

VSS_NCTF_21

VSS_NCTF_20

VSS_NCTF_19

VSS_NCTF_18

VSS_NCTF_17

TACH5/GPIO69

TACH7/GPIO71

TACH6/GPIO70

TACH4/GPIO68

A20GATE

VSS_NCTF_32

SATA4GP/GPIO16

GPIO35

STP_PCI#/GPIO34

INIT3_3V#

SATA2GP/GPIO36

TACH1/GPIO1

GPIO15

BMBUSY#/GPIO0

GPIO8

THRMTRIP#

PECI

RCIN#

PROCPWRGD

SDATAOUT1/GPIO48

SDATAOUT0/GPIO39

SLOAD/GPIO38

SCLOCK/GPIO22

SATA5GP/GPIO49/TEMP_ALERT#

SATA3GP/GPIO37

TACH3/GPIO7

TACH0/GPIO17

TACH2/GPIO6

VSS_NCTF_12

VSS_NCTF_11

VSS_NCTF_10

VSS_NCTF_9

VSS_NCTF_8

VSS_NCTF_7

VSS_NCTF_6

VSS_NCTF_5

VSS_NCTF_4

VSS_NCTF_3

VSS_NCTF_2

VSS_NCTF_1

LAN_PHY_PWR_CTRL/GPIO12

GPIO57

GPIO24

GPIO28

GPIO27

OUT

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

15MIL

15MIL

REFERENCE 4700~4949(PCH)

15MIL

15MIL

20MIL

15MIL

40MIL

15MIL

15MIL

15MIL

15MIL

20MIL

3A

1.3A

15MIL

15MIL

15MIL

7053

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21

C4782

21

R49

37

21

R49

31

21R4933

AK37

U47

AT16

AP16

AP37

AP36

AM38

AM37

V1

AN19

AP17

AN34

AN33

AT24

AP26

AP24

AP23

AP21

AN27

AN26

AN21

AN17

AN16

AU20

AT20

AJ17

AJ16

AG17

AG16

AG24AG23AG21AF23AF21AD23AD21AC23

AJ31AJ29AJ27AJ26AJ23AG29AG27AG26

AA23

AB36

BJ22

AK36

BG6

U48

V34

V33

BH29

U4700

21R4949

21

C4792

21

R4948

21

R4947

21

C4791

21C4790

21C4789

21C4788

21

C4785

21

C4786

21

C4787

21L4701

21

C4783

21

C4784

21L4700

21R4946

21

C4781

21

C4780

21

C4776

21

C4777

21

C4778

21

C4779

21R4945

21

C4775

21

C4774

21

C4773

21

C4772

FBM_11_160808_121T

22UF_6.3V_50.01UF_50V_2

0_5%

_2_D

Y

0_5%

_2 22UF_6.3V_5

0_5%_2_DY

P1V05S

10UF_6.3V_3 1UF_6.3V_2

P1V05S

P3V3S_VCCADAC

10UF_6.3V_3

0.1UF_16V_2

1UF_6.3V_2 1UF_6.3V_2 1UF_6.3V_2

0_5%_2_DY

1UF_6.3V_2 1UF_6.3V_2

0_5%_3

0_5%_2_DY

1UF_6.3V_2_DY

1UF_6.3V_2

0.1UF_16V_2

A3

0_5%_2

0.1UF_16V_2

CS

Block Diagram

1UF_6.3V_2

0.1UF_16V_2

FBM_11_160808_121T

P1V05S

P1V05S

P3V3S

P1V05S

P1V5S_VCCAFDI_VRM P1V5S

P3V3AL P3V3A

P1V05S

P1V5S_VCCAFDI_VRM

P1V8S

P3V3S

P1V8S

P3V3S

P1V05S_VCCAPLLEXP

P1V05S_VCCAFDIPLL

ITL_BD82PPSM_QPJ4_FCBGA_989P

P1V05S

P1V05S

P1V5S_VCCAFDI_VRM

P1V05S

1UF_6.3V_2

0_5%_2_DY

0.01UF_50V_2

P1V8S_VCCTX_LVDS

P3V3S

0.01UF_50V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

LVD

S

FD

I

POWER

VC

C C

OR

E

CR

TD

MI

HV

CM

OS

VC

CIO

NA

ND

/ S

PI

VCCCORE[12]

VCCCORE[13]

VCCCORE[14]

VCCCORE[15]

VCCIO[28]

VCCIO[15]

VCCCORE[17]

VCCCORE[16]

VCCCORE[11]

VCCCORE[10]

VCCCORE[9]

VCCCORE[8]

VCCCORE[7]

VCCCORE[6]

VCCCORE[5]

VCCCORE[4]

VCCCORE[2]

VCCCORE[1]

VCCCORE[3]

VCCSPI

VCCVRM[2]

VccAFDIPLL

VCCDFTERM[4]

VCCDFTERM[3]

VCCADAC

VCCTX_LVDS[1]

VCCTX_LVDS[2]

VCCALVDS

VCCVRM[3]

VCCAPLLEXP

VCCTX_LVDS[4]

VCCTX_LVDS[3]

VSSADAC

VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCC3_3[3] VCCDFTERM[2]

VCCDFTERM[1]

VCCDMI[1]

VCCCLKDMI

VCCDMI[2]

VCCIO[16]

VCCIO[17]

VCCIO[18]

VCCIO[19]

VCCIO[20]

VCCIO[21]

VCCIO[22]

VCCIO[23]

VCCIO[24]

VCCIO[25]

VCCIO[26]

VCCIO[27]

10MIL

20MIL

10MIL

15MIL

15MIL

10MIL

10MIL

20MIL

10MIL

3A REFERENCE 4700~4949(PCH)

20MIL

20MIL

15MIL

20MIL

15MIL

1.1A

15MIL

15MIL

10MIL

10MIL

20MIL

10MIL

20MIL

20MIL

10MIL

20MIL

7054

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R4866

21

C4843

21

C4842

Y49

AF11

P32

V23

T24

T23

P24

P22

P20

N22

N20

V24

AN24

AG33

A22

AF17

AF14

AF13

AD17

T26

T29

T27

P28

P26

AC17

N26

AC16

AL29

AH14

AH13

T16

AG34AF34AF33

AC27

AC26

AA31

AA29

AA27

AA26

AA24

V21

T21

T19

W33

AA21

W31

W29

W26

W24

W23

W21

AD31

AD29

AC31

AC29

AA19

AK1

BH23

BF47

BD47

AD49

W16

T38

T34

AJ2

AA16

BJ8

M26

P34

V12

AN23

AL24

V19T17

V16

N16

U4700

21C4835

21C4834

21

C4829

21

C4841

21C4840

21L4708

21C4839

21C4838

21C4837

21C4836

21R4870

2

13D4709

2 1C4832

21C4833

21R4869

2

13

D4708

21C4831

21C4830

21

C4827

21

C4826

21

C4828

21

C4825

21

C4824

21

C4823

21C4822

2 1C4821

2 1C4820

2 1C4819

2 1C4818

21

C4812

21

C4815

21L4707

21

C4816

21

C4817

21

C4814

21

C4813

21L4706

21

C4811

21

C4810

21

C4809

21

C4808

21

C4807

21

C4806

21C4805

21 R4867

21

C4802

21

C4801

2 1C4803

2 1C4804

21 R4865

P1V05S

P1V05S_VCCACLK

SHORT_0402

FBM_11_160808_121T

0.1UF_16V_2

P1V05S_VCCADPLLB

0.1UF_16V_2

22UF_6.3V_5_DY

0.1UF_16V_2

1UF_6.3V_2_DY

22UF_6.3V_5_DY

P1V05S_VCCADPLLA

ITL_BD82PPSM_QPJ4_FCBGA_989P

V5REF_SUS

P1V05S_VCCAPLLDMI2

V5REF

P1V05S_VCCAPLLSATA

1UF_6.3V_2

P1V05S

0.1UF_16V_2

0.1UF_16V_2

0.1UF_16V_2

10_5%_5

P3V3A

1UF_6.3V_21UF_6.3V_2

P1V05S

1UF_6.3V_2_DY

0_5%_2_DY

22UF_6.3V_5

1UF_6.3V_2

BAT54_30V_0.2A

BAT54_30V_0.2A

1UF_6.3V_2P3V3S

P3V3S

P3V3S

1UF_6.3V_2

P1V05S

P3V3A

1UF_6.3V_2

P3V3A

P1V05S

1UF_6.3V_2

0.1UF_16V_2

0.1UF_16V_2

P1V05S

4.7UF_6.3V_3 0.1UF_16V_2

P1V05S

10UF_6.3V_31UF_6.3V_2

P1V05S

FBM_11_160808_121T

1UF_6.3V_2 10UF_6.3V_3

0.1UF_16V_2

P3V3_RTC

22UF_6.3V_5

0.1UF_16V_2

0.1UF_16V_2

1UF_6.3V_2

1UF_6.3V_2

1UF_6.3V_2

P1V5S_VCCAFDI_VRM

0.1UF_16V_2

0.1UF_16V_2

P3V3S

10UF_6.3V_3

P1V05S

P1V05S

0.1UF_16V_2

0.1UF_16V_2_DY

0_5%_2_DY

P3V3A

0.1UF_16V_2

P1V05S

1UF_6.3V_2

0603_DY

1UF_6.3V_2_DY

P3V3A

A3

P1V05S

P1V05S

P1V5S_VCCAFDI_VRM

CS

Block Diagram

P1V05S

P5V0S

P3V3S

0.1UF_16V_2

10_5%_5

P3V3A

P5V0A

P3V3A

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

NC

NC

HD

AC

PU

RT

C

PC

I/GP

IO/L

PC

MIS

C

POWER

US

B

Clo

ck a

nd M

isce

llane

ous

SA

TAVCCVRM[4]

DCPRTC

VCCASW[20]

VCC3_3[2]

VCCASW[18]

VCCASW[15]

VCCASW[19]

VCCIO[5]

VCCASW[17]

VCCASW[16]

VCCASW[1]

VCCIO[34]

V5REF_SUS

DCPSUS[4]

VCCSUS3_3[1]

VCCASW[2]

VCCIO[29]

VCCAPLLDMI2

VCCASW[4]

DCPSUSBYP

VCCASW[3]

VCCASW[5]

VCCASW[6]

VCCSUSHDA

VCCSUS3_3[6]

VCCASW[7]

VCCASW[8]

VCCASW[9]

VCCASW[10]

VCCASW[11]

VCCASW[12]

V5REF

VCC3_3[4]

VCCRTC

VCCSUS3_3[10]

VCCSUS3_3[9]

VCCSUS3_3[8]

VCCSUS3_3[7]

VCCADPLLB

VCCDIFFCLKN[1]

DCPSUS[1]

VCCSSC

VCCADPLLA

VCCACLK

VCCDIFFCLKN[2]

DCPSST

VCCASW[22]

VCCASW[23]

VCCASW[21]

VCC3_3[1]

VCC3_3[8]

VCCSUS3_3[2]

VCCSUS3_3[3]

VCCSUS3_3[4]

VCCSUS3_3[5]

V_PROC_IO

VCCDIFFCLKN[3]

VCCASW[13]

VCCASW[14]

VCCVRM[1]

VCCAPLLSATA

DCPSUS[3]

DCPSUS[2]

VCCDSW3_3

VCC3_3[5]

VCCIO[14]

VCCIO[30]

VCCIO[31]

VCCIO[32]

VCCIO[33]

VCCIO[12]

VCCIO[13]

VCCIO[6]

VCCIO[2]

VCCIO[3]

VCCIO[4]

VCCIO[7]

REFERENCE 4700~4949(PCH)

7055

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

BJ28BG28BC16BE16AP1AP3M14AP13C22BG24BG22T36H16G14BG41BE10B43AD47AJ3N24BG29Y8Y46Y42Y4Y38Y12W48W27W2W19W17V7V43V39V36V31V29V27V26V17V11T8T47T46W34T4T37T31T12R48R2P7P47P43P40T33P18P11N47P30N18M8M46M42M4M38M34M32M30M24M22M18P16M12L48L36L28L26L20L2L18K7K46K39K26K18H46

F3H34H32H30H26H24H22H18H12G48G36G28G26G20G18E26E18D8

D42D38D34D32D30D26D24D22D18D16D12D3

BH7BH43BH39BH35BH33BH31BH27

H10BH19BH17BH15BH11

BG8BG44BG33BG21BG17

BF8BF40BF38BF30BD3

BF28BF26BF24BF22BF20BF16BF12BF10BE40BE26BE22BD5

BD46BC48BC42BC40BC36BC34BC32BC26BC22BC2

BC18BC14BB46BB4

BB38BB30BB28BB24BB22BB20BB16BB12

F45B7

B39B35B31B27B23B19B15B11AY8

AY46AY42AY4

U4700

AM36AM14AM11AL48AL34AL33AL31AL27AL26AL23

AB4AL21AL2AL19AL17AL16AK8AK46AK42AK4AK38

AB39

AK3AK12AJ34AJ33AJ24AJ21AJ19AH7

AH46AH42

AB14

AH40AH39AH36AH3

AH11AG48AG31

AG2AG19

AF8

AB11

AF7AF5

AF46AF42AF4

AF38AF31AF29AF27AF26

AA34

AF24AF19AF16AD16AD14AF12AF10AE3AE2AD8

AA33

AD46AD45AD43AD42AD40AD4

AD39AD38AD37AD36

AA3

AD34AD33AD27AD26AD24AD19AD13AD12AD11AD10

AA2

AC48AC34AC33AC24

AY28AY22AY12AV11AW48AW40AW36AW34AW32

AC21

AW28AW26AW22AW2AW18AW14AV8AV43AV4AV38

AC2

AV30AV24AV20AV16AU30AU24AT7AT46AT42AT39

AC19

AT34AT32AT30AT28AT26AT22AT18AT13AT11AR48

AB7

AR2AP8AP46AP42AP4AP38AP32AP30AP28AP19

AB5

AP12AN31AN3AN29AN2AM7AM46AM45AM43AM39

AB43

AA17

H5U4700

ITL_BD82PPSM_QPJ4_FCBGA_989P

ITL_BD82PPSM_QPJ4_FCBGA_989P

Block Diagram

CSA3

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

VSS[352]

VSS[351]

VSS[350]

VSS[349]

VSS[348]

VSS[347]

VSS[346]

VSS[345]

VSS[344]

VSS[343]

VSS[342]

VSS[340]

VSS[338]

VSS[337]

VSS[335]

VSS[334]

VSS[333]

VSS[331]

VSS[330]

VSS[329]

VSS[328]

VSS[325]

VSS[324]

VSS[323]

VSS[322]

VSS[321]

VSS[320]

VSS[319]

VSS[318]

VSS[317]

VSS[316]

VSS[315]

VSS[314]

VSS[313]

VSS[312]

VSS[311]

VSS[310]

VSS[309]

VSS[308]

VSS[307]

VSS[306]

VSS[305]

VSS[304]

VSS[303]

VSS[302]

VSS[301]

VSS[300]

VSS[299]

VSS[298]

VSS[297]

VSS[296]

VSS[295]

VSS[294]

VSS[293]

VSS[292]

VSS[291]

VSS[290]

VSS[289]

VSS[288]

VSS[287]

VSS[286]

VSS[285]

VSS[284]

VSS[283]

VSS[282]

VSS[281]

VSS[280]

VSS[279]

VSS[278]

VSS[277]

VSS[276]

VSS[275]

VSS[274]

VSS[273]

VSS[272]

VSS[271]

VSS[270]

VSS[269]

VSS[268]

VSS[267]

VSS[266]

VSS[265]

VSS[264]

VSS[263]

VSS[262]

VSS[261]

VSS[260]

VSS[259]

VSS[258]

VSS[257]

VSS[256]

VSS[255]

VSS[254]

VSS[253]

VSS[252]

VSS[251]

VSS[250]

VSS[249]

VSS[248]

VSS[247]

VSS[246]

VSS[245]

VSS[244]

VSS[243]

VSS[242]

VSS[241]

VSS[240]

VSS[239]

VSS[238]

VSS[237]

VSS[236]

VSS[235]

VSS[234]

VSS[233]

VSS[232]

VSS[231]

VSS[230]

VSS[229]

VSS[228]

VSS[227]

VSS[226]

VSS[225]

VSS[224]

VSS[223]

VSS[222]

VSS[221]

VSS[220]

VSS[219]

VSS[218]

VSS[217]

VSS[216]

VSS[215]

VSS[214]

VSS[213]

VSS[212]

VSS[211]

VSS[210]

VSS[209]

VSS[208]

VSS[207]

VSS[206]

VSS[205]

VSS[204]

VSS[203]

VSS[202]

VSS[201]

VSS[200]

VSS[199]

VSS[198]

VSS[197]

VSS[196]

VSS[195]

VSS[194]

VSS[193]

VSS[192]

VSS[191]

VSS[190]

VSS[189]

VSS[188]

VSS[187]

VSS[186]

VSS[185]

VSS[184]

VSS[183]

VSS[182]

VSS[181]

VSS[180]

VSS[179]

VSS[178]

VSS[177]

VSS[176]

VSS[175]

VSS[174]

VSS[173]

VSS[172]

VSS[171]

VSS[170]

VSS[169]

VSS[168]

VSS[167]

VSS[166]

VSS[165]

VSS[164]

VSS[163]

VSS[162]

VSS[161]

VSS[160]

VSS[159]

VSS[158]

VSS[157]

VSS[156]

VSS[155]

VSS[154]

VSS[153]

VSS[152]

VSS[151]

VSS[150]

VSS[149]

VSS[148]

VSS[147]

VSS[146]

VSS[145]

VSS[144]

VSS[143]

VSS[142]

VSS[141]

VSS[140]

VSS[139]

VSS[138]

VSS[137]

VSS[136]

VSS[135]

VSS[134]

VSS[133]

VSS[132]

VSS[131]

VSS[130]

VSS[129]

VSS[128]

VSS[127]

VSS[126]

VSS[125]

VSS[124]

VSS[123]

VSS[122]

VSS[121]

VSS[120]

VSS[119]

VSS[118]

VSS[117]

VSS[116]

VSS[115]

VSS[114]

VSS[113]

VSS[112]

VSS[111]

VSS[110]

VSS[109]

VSS[108]

VSS[107]

VSS[106]

VSS[105]

VSS[104]

VSS[103]

VSS[102]

VSS[101]

VSS[100]

VSS[99]

VSS[98]

VSS[97]

VSS[96]

VSS[95]

VSS[94]

VSS[93]

VSS[92]

VSS[91]

VSS[90]

VSS[89]

VSS[88]

VSS[87]

VSS[86]

VSS[85]

VSS[84]

VSS[83]

VSS[82]

VSS[81]

VSS[80]

VSS[79]

VSS[78]

VSS[77]

VSS[76]

VSS[75]

VSS[74]

VSS[73]

VSS[72]

VSS[71]

VSS[70]

VSS[69]

VSS[68]

VSS[67]

VSS[66]

VSS[65]

VSS[64]

VSS[63]

VSS[62]

VSS[61]

VSS[60]

VSS[59]

VSS[58]

VSS[57]

VSS[56]

VSS[55]

VSS[54]

VSS[53]

VSS[52]

VSS[51]

VSS[50]

VSS[49]

VSS[48]

VSS[47]

VSS[46]

VSS[45]

VSS[44]

VSS[43]

VSS[42]

VSS[41]

VSS[40]

VSS[39]

VSS[38]

VSS[37]

VSS[36]

VSS[35]

VSS[34]

VSS[33]

VSS[32]

VSS[31]

VSS[30]

VSS[29]

VSS[28]

VSS[27]

VSS[26]

VSS[25]

VSS[24]

VSS[23]

VSS[22]

VSS[21]

VSS[20]

VSS[19]

VSS[18]

VSS[17]

VSS[16]

VSS[15]

VSS[14]

VSS[13]

VSS[12]

VSS[11]

VSS[10]

VSS[9]

VSS[8]

VSS[7]

VSS[6]

VSS[5]

VSS[4]

VSS[3]

VSS[2]

VSS[1]

VSS[0]

I=20MA TRACE WIDTH>=15MIL

VSYNC[0]HSYNC[1]

11 : AUDIO FOR BOTH DP AND HDMI

0 : 50% TX OUTPUT SWING (DEFAULT)

GPIO_8

I=125MA TRACE WIDTH>=15MIL

I=70MA TRACE WIDTH>=15MIL

PIN BASE STRAPS

TRANSMITTER POWER SAVING ENABLEGPIO_0

10 : AUDIO FOR DP AND HDMI IF DONGLE IS DETECTED

0

1 : FULL TX OUTPUT SWING

0 : DISABLE (DEFAULT)1 : ENABLE

00 : NO AUDIO FUNCTION01 : AUDIO FOR DP ONLY

1

00

0

MEMORY APERTURE SIZE

GPIO_21

VGA DISABLE

1

GPIO_12GPIO_13

0

1

1 32M

128M

256M64M

I=75MA TRACE WIDTH>=15MIL

GPIO_1 PCIE TRANSMITTER DE-EMPHASIS 0 : DE-EMPHASIS DISABLED (DEFAULT)1 : DE-EMPHASIS ENABLED

0

00

GEN1/GEN2 ENABLE

LEFT UNCONNECTED

0 : ENABLE (DEFAULT)

AUDIO[1:0]

GPIO_22

0 : GEN1 (DEFAULT)1 : GEN2

PLACE CLOSE TO ASIC

I=100MA TRACE WIDTH>=15MIL

GPIO_9

ENABLE EXTERNAL BIOS ROM DEVICE

MEMORY APERTURE SIZEGPIO_11

1 : DISABLE

MUST BE LOW DURING RESET

GPIO_2

MEM_ID0MEM_ID1MEM_ID2

GPIO11:MEMORY APERTURE SIZE 256M

1

0

0

1

1

1

0

0

0

0

1

1 0

1

0

0

0

0

1

0

0

1

0

0

1

1

1

0

0

0

0

1

0

1

1

HYNIX1GDFR*4 512MB

THAMES (6019B0917601) 0

0

00

1

1

1

1

1

MEM_ID3

0

0

0

1

HYNIX2GBFR*4 1GB

HYNIX2GDFR*41GB

RESERVE

HYNIX2GBFR*8 2GB

HYNIX2GDFR*82GB

0

1

HYNIX1GDFR*8 1GB

1

1

0

0

1

0

0

1

RESERVE

AMDC11*4 512MB

AMDA11*4 1GB

AMDB11*4 1GB

11

RESERVE

1

1 11 RESERVE

AMDA11*8 2GB

AMDB11*8 2GB

AMDC11*8 1HB

GPIO_[11:13]

56 70

MODEL,PROJECT,FUNCTION

X01

XXX 21-OCT-2002

1310xxxxx-0-0

21

C52

12

21

C52

11

2

1

3

Q5000

21R5011

21R5010

21R5016

21R5031

21R5030

21R5074

21R5073

21R5072

AD32

AU34AV33

AW35

AW34

AC38

AG32

AC34

AH13

AG31

AC33

AC29

AU20AT19

AU14AV13

AR30AT29

AU24AV23

AT23

AT33

AR22

AU32

AU22

AR32

AV21

AT31

AT21

AV31

AR20

AU30

AT17

AT27

AR16

AR26

AU16

AU26

AV15

AV25

AT15

AT25

AR14

AR24

AJ33AJ32

AK32

AL31

AK21AJ21

AJ26AK26

AB34

AD37

AA29

AC31AC30

AD39

AM23

AL24AM24

AN23AK23

AC36

AK24

AD29

AH15AJ13AK17AJ17AH17AJ23AH23

AN13AK13AJ14AL13

AN16

AM17AN14AG30AK14AM13AM14AM16AL16AK16AJ16

AH18AH20

AH24AH26AJ24AK20AJ20AK19AJ19

AD35

AD31AD30

AE36

AT7AU6

AW6AR6AU5

AW5AP6

AP12AU12

AW12AR12

AW3

AT11AV11AP10AU10

AW10AR10

AT9AV9AN7AV7

AU3AU1

AU8AR8

AR3AW8AP8

AR1

AF29

AN31

AN32AM32

AG29

AK29

AM21

AM29

AM30

AK30

AN21

AL29

AL30

AJ31AJ30

AL19AM19

AN26AM26

AF32

AC32

AE38

AF31AF30

AF37

AE34AD34

AN20AM20

AM27AL27

AF33

AD33

AG33

U5001

21R5017

21R5056

2 1L5000

21R5000

21

C5005

21

C5000

21

C5001

2 1L5001

21

C5004

21

C5002

21

C50032

1R

5009

21

R50

08

21

R50

07

21

R50

06

1 TP12

1 TP14

1 TP111 TP15

1 TP16

21

R5060

21

R50

15

21

R50

63

21

R5005

21

C50

10

21

R5004

21

R5003

21

R50

612

1C

5012

21

C50

11

21 R4

21X5000

1TP5000

21

C5018

21

C5015

21

C5017

21

C5019

21R5028

21R5037

21R5014

2 1R5027

21

R50

94

2

1

3

Q5001

21

R50

95

2

1

3

Q5002

21L5004

21

C5013

21L5005

21

C5014

21

C5016

21L5006

35D856D3

35D856D3

35D856D3

13C6 56C5

13C6 56D5

5A721D221D337C3

5A721D221D337C6

56C5

56D5

56D5

15D840A840B1

56D5

35B2 56D3

35B2 56D3

56D5

56D5

56D5

35B2 56F7

36A536A5

36A5

36A5

36A5

36A5

36A536A5

34C534C5

35B235A2

36D836D8

35D8 56E2

35B2 56F7

36B5

56C7

56F7

21E7

56F756D7

56F7

13C656F7

56F7

56F7

35D8 56E2

35D8 56E2

56D5

P1V8S_DGPU

150_1%_2

150_1%_2

150_1%_2VGA_CRTR

VGA_CRTG

VGA_CRTB

10UF_6.3V_3

10K

_5%

_2

P3V3S_DGPU

249_1%_2

PWRCNTL_1

PWRCNTL_0

EC_SMB2_DATA

EC_SMB2_CLK

SSM3K7002BFU

GPIO11

GPIO22

GPIO9

GPIO5

499_1%_2

10K_5%_2

FBM_11_160808_121T

10UF_6.3V_3

P1V8S_DGPU

P1V8S_DGPU

10UF_6.3V_3

FBM_11_160808_121T

1UF_6.3V_2

0.1UF_16V_2

499_1%_2

FBM_11_160808_121T

1UF_6.3V_2

0.1U

F_1

6V_2

TP30

TP30

10UF_6.3V_3

PVPCIE

10UF_6.3V_3

TP30

27MHZ

TP30

1UF

_6.3

V_2

1UF_6.3V_2

0.1UF_16V_2

0.1UF_16V_2

THRM_SHUTDWN#

1M_5%_2

10K

_5%

_2

TP30

0.1U

F_1

6V_2

10K_5%_2

10K_5%_2

10K_5%_2

10K_5%_2

RSC_0402_DY

10K_5%_2

GPU_SID

10K

_5%

_2

P1V8S_DGPU

FBM_11_160808_121T

P1V8S_DGPU

VGA_CRT_VSYNC

VGA_CRT_HSYNC

10K_5%_2_DY

RSC_0402_DY

GPIO0

P3V3S_DGPU

GPIO110K_5%_2_DY GPIO2

10K_5%_2_DY

10K_5%_2_DY

P1V8S_VDD1DI

P1V8S_TSVDD

P1V8S_AVDD

PVPCIE_DPLL_VDDC

P1V8S_DPLL_PVDD

VGA_CRT_VSYNC

VGA_HDMI_TXC_DPVGA_HDMI_TXC_DN

VGA_HDMI_TX0_DP

VGA_HDMI_TX2_DP

VGA_HDMI_TX0_DN

VGA_HDMI_TX2_DN

VGA_HDMI_TX1_DPVGA_HDMI_TX1_DN

VGA_LVDS_DDCDATAVGA_LVDS_DDCCLK

VGA_CRT_DDCDATAVGA_CRT_DDCCLK

VGA_HDMI_DDCDATAVGA_HDMI_DDCCLK

VGA_CRTB

VGA_CRT_HSYNC

VGA_HPDET

GPU_SID

GPIO9

VGA_LCM_BKLTEN

GPIO5GPU_SIC

GPIO22

PWRCNTL_1

GPIO2

GPIO11

GPIO1

MEM_ID0MEM_ID1MEM_ID2MEM_ID3

P0V6S_VREFG

VGA_CRTG

VGA_CRTR

GPIO0

PWRCNTL_0

10K

_5%

_2_D

Y

10K

_5%

_2_D

Y

C CS

Block Diagram

P1V8S_DGPU

10K

_5%

_2_D

Y

10K

_5%

_2_D

Y

SSM3K7002BFU

GPU_SIC

P3V3S_DGPU

10K_5%_2_DY

10K

_5%

_2

10K

_5%

_2

P3V3S_DGPUSSM3K7002BFU_DY

FBM_11_160808_121T

TP30

AMD_216_0833002_FCBGA_962P

1UF_6.3V_2 0.1UF_16V_2

27P

F_5

0V_2

27P

F_5

0V_2

DOC.NUMBER

of

INVENTECTITLE

DATE

CODE

E

D

C

B

A

7 6 5 4 3 2 1

7 6 5 4 3

E

D

C

B

A

FF

8

CHANGE by

8

REV

2 1

SHEET

SIZE

BI

BI

OUT

OUT

IN

G

DS

BIBI

BIBI

IN

IN

IN

OUT

OUT

OUT

IN

OUT

BIBI

OUTOUT

OUTOUT

OUTOUT

OUTOUT

PLL/CLOCK

THERMAL

DDC/AUX

DAC2

DAC1

GENERAL PURPOSE I/O

I2C

MUTI GFX

DPD

DPC

DPB

DPA

SWAPLOCKB

SWAPLOCKA

XO_IN2

XO_IN

TS_A/NC

Y/NC

VSYNC

VDD2DI/NC

VDD1DI

V2SYNC/GENLK_VSYNC

TXCDP_DPD3P

TXCDM_DPD3N

TXCCP_DPC3P

TXCCM_DPC3N

TXCBP_DPB3P

TXCBM_DPB3N

TXCAP_DPA3P

TXCAM_DPA3N

TX5P_DPD0P

TX5P_DPB0P

TX5M_DPD0N

TX5M_DPB0N

TX4P_DPD1P

TX4P_DPB1P

TX4M_DPD1N

TX4M_DPB1N

TX3P_DPD2P

TX3P_DPB2P

TX3M_DPD2N

TX3M_DPB2N

TX2P_DPC0P

TX2P_DPA0P

TX2M_DPC0N

TX2M_DPA0N

TX1P_DPC1P

TX1P_DPA1P

TX1M_DPC1N

TX1M_DPA1N

TX0P_DPC2P

TX0P_DPA2P

TX0M_DPC2N

TX0M_DPA2N

SDA

SCL

RSET

RB

R2SET/NC

R2B/NC

R2/NC

R

GB

G2B/NC

G2/NC

G

DDCCLK_AUX5P

DDCDATA_AUX5N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX3P

DDCDATA_AUX3N

DDC6DATA

DDC6CLK

DDC2DATA

DDC2CLK

DDC1DATA

DDC1CLK

COMP/NC

C/NC

BB

B2B/NC

B2/NC

B

AVSSQ

AVDD

AUX2P

AUX2N

AUX1P

AUX1N

A2VSSQ/TSVSSQ

A2VDDQ/NC

A2VDD/NC

XTALOUT

XTALIN

VSS2DI/NC

VSS1DI

VREFG

TSVSS

TSVDD

TS_FDO

DDCCLK_AUX7P

DDCDATA_AUX7N

JTAG_TRSTB

JTAG_TMS

JTAG_TDO

JTAG_TDI

JTAG_TCK

HSYNC

HPD1

H2SYNC/GENLK_CLK

GPIO_9_ROMSI

GPIO_8_ROMSO

GPIO_7_BLON

GPIO_6

GPIO_5_AC_BATT

GPIO_4_SMBCLK

GPIO_3_SMBDATA

GPIO_23_CLKREQB

GPIO_22_ROMCSB

GPIO_21_BB_EN

GPIO_20_PWRCNTL_1

GPIO_2

GPIO_19_CTF

GPIO_18_HPD3

GPIO_17_THERMAL_INT

GPIO_16

GPIO_15_PWRCNTL_0

GPIO_14_HPD2

GPIO_13

GPIO_12

GPIO_11

GPIO_10_ROMSCK

GPIO_1

GPIO_0

GENERICG_HPD6

GENERICF_HPD5

GENERICE_HPD4

GENERICD

GENERICC

GENERICB

GENERICA

DVPDATA_9

DVPDATA_8

DVPDATA_7

DVPDATA_6

DVPDATA_5

DVPDATA_4

DVPDATA_3

DVPDATA_23

DVPDATA_22

DVPDATA_21

DVPDATA_20

DVPDATA_2

DVPDATA_19

DVPDATA_18

DVPDATA_17

DVPDATA_16

DVPDATA_15

DVPDATA_14

DVPDATA_13

DVPDATA_12

DVPDATA_11

DVPDATA_10

DVPDATA_1

DVPDATA_0

DVPCNTL_MVP_1

DVPCNTL_MVP_0

DVPCNTL_2

DVPCNTL_1

DVPCNTL_0

DVPCLK

DPLUS

DPLL_VDDC

DPLL_PVSS

DPLL_PVDD

DMINUS

OUTOUT

BI

BI

G

D S

IN

G

D SININBIBIIN

IN

IN

OUTOUTOUTOUTOUTOUT

OUT

OUTOUTOUTOUTOUT

7057

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21C505321C5052

21C505121C5050

21C504921C5048

21C504721C5046

21C503821C5039

21C504021C5041

21C504221C5043

21C504421C5045

21C503721C5036

21C503521C5034

21C503321C5032

21C503121C5030

21C502621C5027

21C502821C5029

21C502421C5025

21C502321C5022

21R5013

5

4

3

2

1U5005

21

R5071

AK27

AF35AG36

AG38AH37

AH35AJ36

AJ38AK37

AN36AP37

AP35AR35

AR37AU39

AW37AU35

AK35AL36

AP34AR34

AJ27

U5001

AH16

AA30

N30N29

N33N32

P30P29

P33P32

T30T29

T33T32

U30U29

U33U32

W33W32

H33H32

K30K29

J33J32

K33K32

L30L29

L33L32

Y33Y32

M35L36

N38M37

P35N36

R38P37

T35R36

U38T37

V35U36

W38V37

Y35W36

F35E37

G38F37

H35G36

J38H37

K35J36

L38K37

AA38Y37

AB35AA36

Y30

Y29

U5001

21R5034

21R5035

21 R5039

GPU_PCIE_CALRP

PEG_RX4_DPPEG_RX4_DN

0.22UF_6.3V_2

PEG_C_TX14_DN

PEG_C_TX13_DP

PEG_RX7_DN

PEG_RX8_DP

PEG_C_TX11_DPPEG_C_TX11_DN

42C1

34B5

1K_5%_2

CLK_PEG_REF_DP

VGA_LVDS_TXDL2_DNVGA_LVDS_TXDL2_DP

VGA_LVDS_TXCL_DN

VGA_LVDS_TXDL1_DN

VGA_LCM_VDDEN

AMD_216_0833002_FCBGA_962P

PEG_C_TX14_DP

PEG_C_TX12_DPPEG_C_TX12_DN

CLK_PEG_REF_DN

PEG_C_TX15_DPPEG_C_TX15_DN

PEG_C_TX13_DN

PEG_C_TX10_DN

PEG_C_TX9_DNPEG_C_TX9_DP

PEG_C_TX8_DNPEG_C_TX8_DP

PEG_C_TX7_DPPEG_C_TX7_DN

PEG_C_TX6_DNPEG_C_TX6_DP

PEG_C_TX5_DNPEG_C_TX5_DP

PEG_C_TX4_DNPEG_C_TX4_DP

PEG_C_TX3_DNPEG_C_TX3_DP

PEG_C_TX2_DPPEG_C_TX2_DN

PEG_C_TX1_DPPEG_C_TX1_DN

PEG_C_TX0_DNPEG_C_TX0_DP

GPU_PCIE_CALRN

PEG_C_TX10_DP

2K_1%_2

1.27K_1%_2

PVPCIE

Block Diagram

CSA3

AMD_216_0833002_FCBGA_962P

DGPU_PERST

TC7SZ08FU

DGPU_HOLD_RST#

BUF_PLT_RST#

0_5%_2_DY

P3V3S_DGPU

VGA_LVDS_TXDL1_DP

VGA_LVDS_TXDL0_DNVGA_LVDS_TXDL0_DP

VGA_LVDS_TXCL_DP

10K_5%_2

VGA_INV_PWM_3

48C3

34A834A8

34A8

34A8

34D7

42A1

42A1

42C442D4

42C442D4

48C3

42A142B1

42B1

42C142A1

42C142A1

42C1

42C142B1

42C142B1

42B142C1

42C142B1

42C142B1

42C142B1

42C142B1

42B142D1

42B142D1

42D142B1

42D442C4

42D442C4

42D442C4

42D442C4

42D442C4

42C442D4

42D442C4

42D442C4

42D442C4

42D442C4

42D442C4

42D442C4

42C442C4

42C442C4

42A1

51C7 51B6

51A8 28C3 27C727C3 21E3

34A8

34A834A8

34A8

PEG_C_RX0_DPPEG_RX0_DPPEG_C_RX0_DNPEG_RX0_DN

PEG_C_RX1_DPPEG_C_RX1_DN0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_C_RX2_DPPEG_RX2_DPPEG_C_RX2_DNPEG_RX2_DN

PEG_C_RX3_DPPEG_C_RX3_DN

PEG_RX5_DNPEG_RX5_DP

PEG_C_RX4_DP

PEG_C_RX7_DNPEG_C_RX7_DPPEG_RX7_DP

PEG_C_RX6_DNPEG_RX6_DNPEG_RX6_DP

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_C_RX8_DPPEG_C_RX8_DNPEG_RX8_DN

PEG_C_RX9_DPPEG_RX9_DPPEG_C_RX9_DNPEG_RX9_DN

PEG_C_RX10_DPPEG_RX10_DPPEG_C_RX10_DNPEG_RX10_DN

PEG_C_RX11_DPPEG_RX11_DPPEG_C_RX11_DNPEG_RX11_DN

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_C_RX15_DNPEG_RX15_DNPEG_C_RX15_DPPEG_RX15_DP

PEG_C_RX14_DNPEG_RX14_DNPEG_C_RX14_DPPEG_RX14_DP

PEG_C_RX13_DNPEG_RX13_DNPEG_C_RX13_DPPEG_RX13_DP

PEG_C_RX12_DNPEG_RX12_DNPEG_C_RX12_DPPEG_RX12_DP

PEG_C_RX4_DN

PEG_C_RX5_DPPEG_C_RX5_DN

PEG_C_RX6_DP

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

PEG_RX1_DNPEG_RX1_DP

PEG_RX3_DPPEG_RX3_DN

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

0.22UF_6.3V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

IN

IN +-

OUTOUT

BIBI

BIBI

BIBI

BIBI

LVDS CONTROL

LVTMDP

VARY_BL

TXOUT_U3P

TXOUT_U3N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_L3P

TXOUT_L3N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

DIGON

CALIBRATION

CLOCK

PC

I EX

PR

ES

S IN

TE

RF

AC

E

PCIE_TX9P

PCIE_TX9N

PCIE_TX8P

PCIE_TX8N

PCIE_TX7P

PCIE_TX7N

PCIE_TX6P

PCIE_TX6N

PCIE_TX5P

PCIE_TX5N

PCIE_TX4P

PCIE_TX4N

PCIE_TX3P

PCIE_TX3N

PCIE_TX2P

PCIE_TX2N

PCIE_TX1P

PCIE_TX1N

PCIE_TX15P

PCIE_TX15N

PCIE_TX14P

PCIE_TX14N

PCIE_TX13P

PCIE_TX13N

PCIE_TX12P

PCIE_TX12N

PCIE_TX11P

PCIE_TX11N

PCIE_TX10P

PCIE_TX10N

PCIE_TX0P

PCIE_TX0N

PERSTB

PCIE_RX9P

PCIE_RX9N

PCIE_RX8P

PCIE_RX8N

PCIE_RX7P

PCIE_RX7N

PCIE_RX6P

PCIE_RX6N

PCIE_RX5P

PCIE_RX5N

PCIE_RX4P

PCIE_RX4N

PCIE_RX3P

PCIE_RX3N

PCIE_RX2P

PCIE_RX2N

PCIE_RX1P

PCIE_RX1N

PCIE_RX15P

PCIE_RX15N

PCIE_RX14P

PCIE_RX14N

PCIE_RX13P

PCIE_RX13N

PCIE_RX12P

PCIE_RX12N

PCIE_RX11P

PCIE_RX11N

PCIE_RX10P

PCIE_RX10N

PCIE_RX0P

PCIE_RX0N

PCIE_REFCLKP

PCIE_REFCLKN

PCIE_CALRP

PCIE_CALRNPWRGOOD

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BIBI

BI

BIBI

BI

BI

R5048 STUFFR5022 STUFF

THAMES

SEYMOURR5048 OPENR5022 OPEN

7058

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R5050

21R5047

21R5058

21R5033AB11N10

AK5

AF5AK6

AE4T5

H1T3

H3

AD28

Y10T10

AA12Y12

W8

AA9Y8AA8AA7AC9AC8W9Y9

T8

U8U9N9N8N7P9T9P8

AM5AJ9AH1AB5V5P3K3F6

AH11

AF3AF1AD5AD3AD1AD6

AP5AP1

AB3

AP3AN4AM1AM6AL4AK1AM7AM8AL7AK9

AB1

AG7AG8AF9AF8AK3AJ4AH6AH5AG4AF6

AB6AA4

H6H5G4F5F3F1

Y5Y3

E1

Y1Y6V3V1V6U4T1T6R4P5

E3

P6N4M5M3M1M6L4K5K6J4

C3C5

AM3AJ8AH3AC4W4P1K1G7

AC10AD10

L10P10

AL10AK10

AD7AD8

L8L9

AA11U10

AA10W10

W7T7

U5001

L15K26

D9

A14E10

C14E22

C32D23

A32

K19K23

L20L18

AH12

M12M27

AG12N12L27

J19

H17J17H16J16G16L13H20H19

H23

G21H21J26H26J24H24J23G24

D7J10E12E16E20D25D29C34

D13F14E14D15F16A16

A5E6

D17

C6A6E8C8A8G9

K10K9G8

G10

F18

H11J13H13G13C10A10F10D11A12F12

A18C18

F30D31E32F32D33G32

E18D19

E34

F20A20D21F22A22C22E24A24C24F24

A35

A26C26F26D27E28A28C28F28A30C30

C35C37

F8J11C12C16C20E26E30A34

K16M13

K27K24

H14J14

G27H27

J20K21

K17K20

G19J21

U5001

21R5012

21R5029

21

C52

00

21R5032

21

R50

25

21

R50

01

21

C52

01

1 TP13

21

R50

02

21

R50

20

21

C52

02

21

R50

21

21

R50

24

21

R50

52

21R5022

21R5048

21

C52

04

21

R50

45

21

C52

05

21

R50

532

1R

5023

63C4 63C862C4 62C7

63C8

64D4 64D7 65D4 65D8

65C4 65C864C4 64C7

65C865C865C465C464C764C464C464C7

65C865C865C465C464C764C464C464C7

65C4 65C864C4 64C7

65C4 65C864C4 64C7

64D464D7 65D4 65D8

64D4 64D765D4 65D8

64D4 64D7 65D465D8

65C865C865C465C464C764C464C464C7

65C4 65C8

64C4 64C7

65B5 65C8 65D465B4 65D4 65D8

64B5 64C4 64C764B3 64D4 64D7

65C4 65C864C4 64C7

65C4 65C864C4 64C7

63C4 63C862C4 62C7

63C863C863C463C462C462C462C762C7

62D4 62D863D4 63D8

63C863C863C463C462C462C462C762C7

63C4 63C862C4 62C7

63C4 63C862C4 62C7

62D4 62D7 63D4 63D862D4 62D7 63D4 63D862D4 62D7 63D4 63D8

63C8

63C463C462C462C462C762C7

63C4 63C8

62C4 62C7

63B5 63C8 63D463B4 63D4 63D8

62B5 62C462C7

62B3 62D4 62D7

63C4 63C862C4 62C7

64D464D7

65D4

65D8

62D162D563D163D5

DQA<49>

40.2

_1%

_2

P1V05_REFDB_GPU

VM_RESET

100_

1%_2

0.1U

F_1

6V_2

RSC_0402_DY

243_1%_2243_1%_2RSC_0402_DY

243_1%_2

40.2

_1%

_2

P1V5S_DGPU243_1%_2

59

0.1U

F_1

6V_2

CASA1#CASA0#P1V5S_DGPU

DQA<45>DQA<44>

P1V05_REFSA_GPUP1V05_REFDA_GPU

DQA<63>DQA<62>DQA<61>

6263

DQA<47>

DQA<36>

DQA<24>DQA<25>DQA<26>

1K_5

%_2

5.11K_1%_2_DY

P3V3S_DGPU

AMD_216_0833002_FCBGA_962PAMD_216_0833002_FCBGA_962P

DQMA<6>

26DQB<27>

DQB<18>DQB<17>

MAA<1> 1

DQB<5>

MAB<13>

WEB1#WEB0#

DQSB7_DNDQSB6_DNDQSB5_DNDQSB4_DNDQSB3_DNDQSB2_DNDQSB1_DNDQSB0_DN

DQSB7_DPDQSB6_DPDQSB5_DPDQSB4_DPDQSB3_DPDQSB2_DPDQSB1_DPDQSB0_DP

RASB1#RASB0#

ODTB1ODTB0

MAB<9>MAB<8>MAB<7>MAB<6>MAB<5>MAB<4>MAB<3>MAB<2>

MAB_BA<1>MAB_BA<0>MAB_BA<2>MAB<12>MAB<11>MAB<10>

MAB<1>MAB<0>

DQMB<7>DQMB<6>DQMB<5>DQMB<4>DQMB<3>DQMB<2>DQMB<1>DQMB<0>

CSB1#_0

CSB0#_0

CLKB1_DNCLKB1_DP

CLKB0_DNCLKB0_DP

CKEB1CKEB0

CASB1#CASB0#

P1V05_REFSB_GPU

DQB<9>DQB<8>DQB<7>

DQB<63>DQB<62>DQB<61>DQB<60>

DQB<6>

DQB<59>DQB<58>DQB<57>DQB<56>DQB<55>DQB<54>DQB<53>DQB<52>DQB<51>DQB<50>DQB<49>DQB<48>DQB<47>DQB<46>DQB<45>DQB<44>DQB<43>DQB<42>DQB<41>DQB<40>

DQB<4>

DQB<39>DQB<38>DQB<37>DQB<36>DQB<35>DQB<34>DQB<33>DQB<32>DQB<31>DQB<30>

DQB<3>

DQB<29>DQB<28>

DQB<26>DQB<25>DQB<24>DQB<23>DQB<22>DQB<21>DQB<20>

DQB<2>

DQB<19>

DQB<16>DQB<15>DQB<14>DQB<13>DQB<12>DQB<11>DQB<10>

DQB<1>DQB<0>

DQA<52>

WEA1#WEA0#

DQSA7_DNDQSA6_DNDQSA5_DNDQSA4_DNDQSA3_DNDQSA2_DNDQSA1_DNDQSA0_DN

MAA<13>

DQSA7_DPDQSA6_DPDQSA5_DPDQSA4_DPDQSA3_DPDQSA2_DPDQSA1_DPDQSA0_DP

RASA1#RASA0#

ODTA1ODTA0

MAA<9>MAA<8>MAA<7>MAA<6>MAA<5>MAA<4>MAA<3>MAA<2>

MAA_BA<1>MAA_BA<0>MAA_BA<2>MAA<12>MAA<11>MAA<10>

MAA<0>

DQMA<7>

DQMA<5>DQMA<4>DQMA<3>DQMA<2>DQMA<1>DQMA<0>

CSA1#_0

CSA0#_0

CLKA1_DNCLKA1_DP

CLKA0_DNCLKA0_DP

CKEA1CKEA0

DQA<9>DQA<8>DQA<7>

DQA<60>

DQA<6>

DQA<59>DQA<58>DQA<57>DQA<56>DQA<55>DQA<54>DQA<53>

DQA<51>DQA<50>

DQA<5>

DQA<48>

DQA<46>

DQA<43>DQA<42>DQA<41>DQA<40>

DQA<4>

DQA<39>DQA<38>DQA<37>

DQA<35>DQA<34>DQA<33>DQA<32>DQA<31>DQA<30>

DQA<3>

DQA<29>DQA<28>DQA<27>

DQA<23>DQA<22>DQA<21>DQA<20>

DQA<2>

DQA<19>DQA<18>DQA<17>DQA<16>DQA<15>DQA<14>DQA<13>DQA<12>DQA<11>DQA<10>

DQA<1>DQA<0>

12

0.1U

F_1

6V_2

100_

1%_2

TP30

100_

1%_2

0.1U

F_1

6V_2

61P1V5S_DGPU

5554 54

P1V5S_DGPU

P1V5S_DGPU

120P

F_5

0V_2

MAB<12..0>012345678

109

1112

10

2

43

5

76

8

109

11

13

1514

1716

DQB<63..0>

18

51_5%_2

Block Diagram

CS

10_5%_2

5.1K

_1%

_2

A3

2019

2221

23

2524

2728

3029

31

3332

3534

36

3837

4039

41

4342

4544

46

4847

49

5150

5352

5655

5857

40.2

_1%

_2

5960

6362

MAA<12..0>0

2345678

109

1211

01234567891011121314151617

DQA<63..0>

181920212223242526272829303132333435363738394041424344454647484950515253

565758

40.2

_1%

_210

0_1%

_2

6061

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BIBIBI

BIBIBIBI

BI

BI

BIBI

BIBI

BIBI

BIBI

OUTOUT

OUTOUT

OUTOUT

OUTOUT

OUT

OUT

OUTOUT

OUTOUT

OUT

GDDR5/DDR2/GDDR3

GD

DR

5

DDR3GDDR3/GDDR5DDR2

DDR3GDDR5/GDDR3DDR2

ME

MO

RY

INT

ER

FA

CE

B

MAB1_8

MAB0_8

WEB1B

WEB0B

DDBIB1_3/QSB_7B/WDQSB_7

DDBIB1_2/QSB_6B/WDQSB_6

DDBIB1_1/QSB_5B/WDQSB_5

DDBIB1_0/QSB_4B/WDQSB_4

DDBIB0_3/QSB_3B/WDQSB_3

DDBIB0_2/QSB_2B/WDQSB_2

DDBIB0_1/QSB_1B/WDQSB_1

DDBIB0_0/QSB_0B/WDQSB_0

EDCB1_3/QSB_7/RDQSB_7

EDCB1_2/QSB_6/RDQSB_6

EDCB1_1/QSB_5/RDQSB_5

EDCB1_0/QSB_4/RDQSB_4

EDCB0_3/QSB_3/RDQSB_3

EDCB0_2/QSB_2/RDQSB_2

EDCB0_1/QSB_1/RDQSB_1

EDCB0_0/QSB_0/RDQSB_0

RASB1B

RASB0B

ADBIB1/ODTB1

ADBIB0/ODTB0

MAB1_1/MAB_9

MAB1_0/MAB_8

MAB0_7/MAB_7

MAB0_6/MAB_6

MAB0_5/MAB_5

MAB0_4/MAB_4

MAB0_3/MAB_3

MAB0_2/MAB_2

MAB1_7/BA1

MAB1_6/BA0

MAB1_5/BA2

MAB1_4/MAB_12

MAB1_3/MAB_11

MAB1_2/MAB_10

MAB0_1/MAB_1

MAB0_0/MAB_0

DRAM_RST

WCKB1B_1/DQMB_7

WCKB1_1/DQMB_6

WCKB1B_0/DQMB_5

WCKB1_0/DQMB_4

WCKB0B_1/DQMB_3

WCKB0_1/DQMB_2

WCKB0B_0/DQMB_1

WCKB0_0/DQMB_0

CSB1B_1

CSB1B_0

CSB0B_1

CSB0B_0

CLKTESTB

CLKTESTA

CLKB1B

CLKB1

CLKB0B

CLKB0

CKEB1

CKEB0

CASB1B

CASB0B

TESTEN

MVREFSB

MVREFDB

DQB0_9/DQB_9

DQB0_8/DQB_8

DQB0_7/DQB_7

DQB1_31/DQB_63

DQB1_30/DQB_62

DQB1_29/DQB_61

DQB1_28/DQB_60

DQB0_6/DQB_6

DQB1_27/DQB_59

DQB1_26/DQB_58

DQB1_25/DQB_57

DQB1_24/DQB_56

DQB1_23/DQB_55

DQB1_22/DQB_54

DQB1_21/DQB_53

DQB1_20/DQB_52

DQB1_19/DQB_51

DQB1_18/DQB_50

DQB0_5/DQB_5

DQB1_17/DQB_49

DQB1_16/DQB_48

DQB1_15/DQB_47

DQB1_14/DQB_46

DQB1_13/DQB_45

DQB1_12/DQB_44

DQB1_11/DQB_43

DQB1_10/DQB_42

DQB1_9/DQB_41

DQB1_8/DQB_40

DQB0_4/DQB_4

DQB1_7/DQB_39

DQB1_6/DQB_38

DQB1_5/DQB_37

DQB1_4/DQB_36

DQB1_3/DQB_35

DQB1_2/DQB_34

DQB1_1/DQB_33

DQB1_0/DQB_32

DQB0_31/DQB_31

DQB0_30/DQB_30

DQB0_3/DQB_3

DQB0_29/DQB_29

DQB0_28/DQB_28

DQB0_27/DQB_27

DQB0_26/DQB_26

DQB0_25/DQB_25

DQB0_24/DQB_24

DQB0_23/DQB_23

DQB0_22/DQB_22

DQB0_21/DQB_21

DQB0_20/DQB_20

DQB0_2/DQB_2

DQB0_19/DQB_19

DQB0_18/DQB_18

DQB0_17/DQB_17

DQB0_16/DQB_16

DQB0_15/DQB_15

DQB0_14/DQB_14

DQB0_13/DQB_13

DQB0_12/DQB_12

DQB0_11/DQB_11

DQB0_10/DQB_10

DQB0_1/DQB_1

DQB0_0/DQB_0

GD

DR

5

DDR3GDDR5/GDDR3DDR2

GDDR5/DDR2/GDDR3

DDR3GDDR3/GDDR5DDR2

ME

MO

RY

INT

ER

FA

CE

A

WEA1B

WEA0B

DDBIA1_3/QSA_7B/WDQSA_7

DDBIA1_2/QSA_6B/WDQSA_6

DDBIA1_1/QSA_5B/WDQSA_5

DDBIA1_0/QSA_4B/WDQSA_4

DDBIA0_3/QSA_3B/WDQSA_3

DDBIA0_2/QSA_2B/WDQSA_2

DDBIA0_1/QSA_1B/WDQSA_1

DDBIA0_0/QSA_0B/WDQSA_0

MAA1_8

MAA0_8

EDCA1_3/QSA_7/RDQSA_7

EDCA1_2/QSA_6/RDQSA_6

EDCA1_1/QSA_5/RDQSA_5

EDCA1_0/QSA_4/RDQSA_4

EDCA0_3/QSA_3/RDQSA_3

EDCA0_2/QSA_2/RDQSA_2

EDCA0_1/QSA_1/RDQSA_1

EDCA0_0/QSA_0/RDQSA_0

RASA1B

RASA0B

ADBIA1/ODTA1

ADBIA0/ODTA0

MAA1_1/MAA_9

MAA1_0/MAA_8

MAA0_7/MAA_7

MAA0_6/MAA_6

MAA0_5/MAA_5

MAA0_4/MAA_4

MAA0_3/MAA_3

MAA0_2/MAA_2

MAA1_7/MAA_A15_BA1

MAA1_6/MAA_14_BA0

MAA1_5/MAA_13_BA2

MAA1_4/MAA_12

MAA1_3/MAA_11

MAA1_2/MAA_10

MAA0_1/MAA_1

MAA0_0/MAA_0

WCKA1B_1/DQMA_7

WCKA1_1/DQMA_6

WCKA1B_0/DQMA_5

WCKA1_0/DQMA_4

WCKA0B_1/DQMA_3

WCKA0_1/DQMA_2

WCKA0B_0/DQMA_1

WCKA0_0/DQMA_0

CSA1B_1

CSA1B_0

CSA0B_1

CSA0B_0

CLKA1B

CLKA1

CLKA0B

CLKA0

CKEA1

CKEA0

CASA1B

CASA0B

MEM_CALRP2

MEM_CALRP0

MEM_CALRN2

MEM_CALRN1

MEM_CALRN0

MVREFSA

MVREFDA

MEM_CALRP1

DQA0_9/DQA_9

DQA0_8/DQA_8

DQA0_7/DQA_7

DQA1_31/DQA_63

DQA1_30/DQA_62

DQA1_29/DQA_61

DQA1_28/DQA_60

DQA0_6/DQA_6

DQA1_27/DQA_59

DQA1_26/DQA_58

DQA1_25/DQA_57

DQA1_24/DQA_56

DQA1_23/DQA_55

DQA1_22/DQA_54

DQA1_21/DQA_53

DQA1_20/DQA_52

DQA1_19/DQA_51

DQA1_18/DQA_50

DQA0_5/DQA_5

DQA1_17/DQA_49

DQA1_16/DQA_48

DQA1_15/DQA_47

DQA1_14/DQA_46

DQA1_13/DQA_45

DQA1_12/DQA_44

DQA1_11/DQA_43

DQA1_10/DQA_42

DQA1_9/DQA_41

DQA1_8/DQA_40

DQA0_4/DQA_4

DQA1_7/DQA_39

DQA1_6/DQA_38

DQA1_5/DQA_37

DQA1_4/DQA_36

DQA1_3/DQA_35

DQA1_2/DQA_34

DQA1_1/DQA_33

DQA1_0/DQA_32

DQA0_31/DQA_31

DQA0_30/DQA_30

DQA0_3/DQA_3

DQA0_29/DQA_29

DQA0_28/DQA_28

DQA0_27/DQA_27

DQA0_26/DQA_26

DQA0_25/DQA_25

DQA0_24/DQA_24

DQA0_23/DQA_23

DQA0_22/DQA_22

DQA0_21/DQA_21

DQA0_20/DQA_20

DQA0_2/DQA_2

DQA0_19/DQA_19

DQA0_18/DQA_18

DQA0_17/DQA_17

DQA0_16/DQA_16

DQA0_15/DQA_15

DQA0_14/DQA_14

DQA0_13/DQA_13

DQA0_12/DQA_12

DQA0_11/DQA_11

DQA0_10/DQA_10

DQA0_1/DQA_1

DQA0_0/DQA_0

BI

OUT

OUTOUT

BI

OUT

BIBI

BIBI

BI

BIBIBI

BI

BIBIBI

BI

BI

BIBI

BI

BI

BIBI

BIBIBIBI

BIBI

OUTOUT

OUTOUT

OUTOUT

OUT

OUTOUT

OUT

OUT

OUTOUT

OUTOUT

OUT

OUT

OUTOUT

BI

OUT

BIBIBI

BI

BIBIBI

BI

1.8V_110MA

1.8V_504MA

59 70

MODEL,PROJECT,FUNCTION

X01

XXX 21-OCT-2002

1310xxxxx-0-0

21L5013

AG15AG13

AG11

AF15AF13

AF12AF11AD12

AG24AG23AF24AF23

G14G11AL9AK8AJ7

AG10

Y7Y11

U7U11R11

AF7

P7N11M11

L7L26L23L21L16L12K8

AD11

K13K11

J9J7

H10G29G26G23G20G17

AC7

M18M16M15AD16AD13AC15AC12

Y13V15T15

AB13

T12R16R13R12N22N20N17N15N13M23

AA13

T27

N27

AB21AB18AB16AA27

Y28Y26Y23Y21Y18Y16V27V24V22

AA24

V20V17U26U23U21U18U16

T24T22

AA22

T20T17R26R23R21R18

N24M26AH28

AA20

AH27AH22AG21AG18AG16AF22AF20AF17AD26AD23

AA17

AD21AD18AC27AC24AC22AC20AC17AB28AB26AB23

AA15

AG27AG26AF27AF26

AN10

AM10

AN9

AB37Y31W30W29V28AA34AA33AA32AA31

N28M28L28J30J29H30H29G31

U28T28R28

G30

U12

M21

V12

M20

H8H7

AG28

AF28

AH29

U5001

21

C51

15

21

C51

14

21

C51

13

21

C51

12

21

C51

11

21

C51

10

21

C51

26

21

C51

36

21

C51

35

21

C51

25

21

C51

24

21

C51

34

21

C51

462

1C

5133

21

C51

23

21

C51

22

21

C51

32

21

C51

30

21

C51

21

21

C51

20

21

C51

29

21

C51

45

21

C51

44

21

C51

43

21

C51

54

21

C51

53

21

C51

52

21

C51

65

21

C51

64

21

C51

97

21

C51

95

21

C51

93

21

C51

922

1C

5151

21

C51

50

21

C51

48

21

C51

63

21

C51

61

21

C51

60

21

C51

472

1C

5159

21

C51

91

21

C51

90

21

C51

66

21

C51

89

21

C51

88

21

C51

69

21

C51

68

21

C51

67

21

C51

19

21

C50

86

21

C50

85

21

C50

84

21

C50

83

21

C50

82

21

C50

81

21

C50

80

21

C50

92

21

C50

91

21

C50

90

21

C50

89

21

C50

97

21

C50

96

21

C51

01

21

C51

00

21

C50

95

21

C50

94

21

C50

99

21

C50

98

21

C52

66

21

C52

65

21

C51

08

21

C52

082

1C

5103

21

C51

02

21

C51

06

21L5010

21L5015

21

C52

07

21

C52

06

21

C52

13

21

C52

10

21

C52

09

21

C50

79

21

C50

78

21

C50

77

21

C50

88

21

C50

87

21L5009

21

C50

93

21

C51

07

21

C51

05

21

C51

04

21L5016

21L5014

FBM_11_160808_121T

1UF

_6.3

V_2

1UF

_6.3

V_2

10U

F_6

.3V

_3 BLM18PG600SN1D

PVCORE_DGPU

P1V8S_PCIE_VDDR

0.1U

F_1

6V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

10U

F_6

.3V

_3

1UF

_6.3

V_2

FBM_11_160808_121T

10U

F_6

.3V

_3

PVCORE_DGPU

1UF

_6.3

V_2

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

P1V8S_VDDR4

P1V8S_DGPU

AMD_216_0833002_FCBGA_962P

1UF

_6.3

V_2

FBM_11_160808_121T

0.1U

F_1

6V_2

P1V8S_DGPU

P1V8S_DGPU

P1V8S_DGPU

FBM_11_160808_121T

1UF

_6.3

V_2

P1V8S_DGPU

0.01

UF

_50V

_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

10U

F_6

.3V

_3

1UF

_6.3

V_2

0.1U

F_1

6V_2

10U

F_6

.3V

_3

1UF

_6.3

V_2

PVPCIE_SPV10

PVPCIE

PVCORE_DGPU

P3V3S_DGPU

P1V5S_DGPU

PVPCIE

0.1U

F_1

6V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

0.1U

F_1

6V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

Block Diagram

CSC

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

P1V8S_VDDCT

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

P1V8S_SPV18

P1V8S_MPV

10U

F_6

.3V

_3

FBM_11_160808_121T

10U

F_6

.3V

_3

DOC.NUMBER

of

INVENTECTITLE

DATE

CODE

E

D

C

B

A

7 6 5 4 3 2 1

7 6 5 4 3

E

D

C

B

A

FF

8

CHANGE by

8

REV

2 1

SHEET

SIZE

SENESEVOLTAGE

CORE I/OISOLATED

TRANSLATIONLEVEL

I/O

MEM I/O

CORE

PCIE

PLL

PO

WE

R

FB_GND

FB_VDDCI

FB_VDDC

VDDC#30

VDDC#29

VDDCI#22

VDDCI#1

VDDCI#19

VDDCI#16

VDDCI#11

VDDCI#7

VDDC#8

VDDC#7

VDDC#58

VDDC#57

VDDC#56

VDDCI#2

VDDC#55

VDDC#54

VDDC#53

VDDC#52

VDDC#51

VDDC#50

VDDC#49

VDDC#48

VDDCI#21

VDDC#47

VDDC#6

VDDC#46

VDDC#45

VDDC#44

VDDC#43

VDDC/BIF_VDDC#42

VDDC#41

VDDC#40

VDDC#39

VDDC#38

VDDCI#20

VDDC#5

VDDC#37

VDDC#36

VDDC#35

VDDC#34

VDDCI#18

VDDCI#17

VDDC/BIF_VDDC#33

VDDC#32

VDDCI#15

VDDCI#14

VDDC#4

VDDCI#13

VDDCI#12

VDDC#31

VDDCI#10

VDDCI#9

VDDCI#8

VDDC#28

VDDC#27

VDDC#26

VDDC#25

VDDC#3

VDDC#24

VDDC#23

VDDC#22

VDDC#21

VDDC#20

VDDC#19

VDDC#18

VDDCI#6

VDDCI#5

VDDC#17

VDDC#2

VDDC#16

VDDC#15

VDDC#14

VDDC#13

VDDCI#4

VDDCI#3

VDDC#12

VDDC#11

VDDC#10

VDDC#9

VDDC#1

VDD_CT#4

VDD_CT#3

VDD_CT#2

VDD_CT#1

NC_VSSRHB

NC_VSSRHA

NC_VDDRHB

NC_VDDRHA

VDDR4#6

VDDR4#3

VDDR4#2

VDDR4#1

VDDR4#8

VDDR4#7

VDDR4#5

VDDR4#4

VDDR3#4

VDDR3#3

VDDR3#2

VDDR3#1

VDDR1#9

VDDR1#8

VDDR1#7

VDDR1#6

VDDR1#5

VDDR1#4

VDDR1#34

VDDR1#33

VDDR1#32

VDDR1#31

VDDR1#30

VDDR1#3

VDDR1#29

VDDR1#28

VDDR1#27

VDDR1#26

VDDR1#25

VDDR1#24

VDDR1#23

VDDR1#22

VDDR1#21

VDDR1#20

VDDR1#2

VDDR1#19

VDDR1#18

VDDR1#17

VDDR1#16

VDDR1#15

VDDR1#14

VDDR1#13

VDDR1#12

VDDR1#11

VDDR1#10

VDDR1#1

SPVSS

SPV10

PCIE_VDDR#8

PCIE_VDDR#7

PCIE_VDDR#6

PCIE_VDDR#5

PCIE_VDDR#4

PCIE_VDDR#3

PCIE_VDDR#2

PCIE_VDDR#1

PCIE_VDDC#9

PCIE_VDDC#8

PCIE_VDDC#7

PCIE_VDDC#6

PCIE_VDDC#5

PCIE_VDDC#4

PCIE_VDDC#3

PCIE_VDDC#2

PCIE_VDDC#12

PCIE_VDDC#11

PCIE_VDDC#10

PCIE_VDDC#1

SPV18

MPV18#2

MPV18#1

PCIE_VDDR/PCIE_PVDD

7060

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21L5022

21L5021

21L5020

21L5019

21L5018

21L5017

21

C52

35

21

C52

36

21

C52

37

21

C52

32

21

C52

33

21

C52

34

21

C52

29

21

C52

30

21

C52

31

21

C52

27

21

C52

26

21

C52

28

21

C52

23

21

C52

25

21

C52

24

21

C52

20

21

C52

21

21

C52

22

AL38

AM37

AM39

AG34AF34

AK34AK33

AJ34AH34

AM33AL33

AV19

AU18

AW18

AP23AP22

AP15AP14

AP21AP20

AT13AP13

AV29

AU28

AW28

AP26AP25

AP33AN33

AP24AN24

AP32AP31

AM35

AN38

AR18

AV17

AR28

AV27

AM34AL34AK39AH39AF39

AU37AR39AP39AN34

AW22AW20AP19AP18AN19

AW16AW14AP17AP16AN17

AW32AW30AP30AP29AN29

AW26AW24AP28AP27AN27

U5001

21R5040

21R5041

21R5042

10U

F_6

.3V

_3

60C3

60B360B6

60C6

60B6

60B360C6 60B3 60C3

BLM18PG600SN1D

PVPCIE

BLM18PG600SN1D

P1V8S_DGPU

BLM18PG600SN1D

BLM18PG600SN1D

PVPCIE

DPCD_VDD18

10U

F_6

.3V

_3

10U

F_6

.3V

_3

10U

F_6

.3V

_3

1UF

_6.3

V_2

0.1U

F_1

6V_2

A3 CS

Block Diagram

1UF

_6.3

V_2

1UF

_6.3

V_2

DPAB_VDD18

DPEF_VDD18

DPEF_VDD10

P1V8S_DGPU P1V8S_DGPU

10U

F_6

.3V

_31U

F_6

.3V

_2

0.1U

F_1

6V_2

1UF

_6.3

V_2

0.1U

F_1

6V_2

DPCD_VDD10

150_1%_2

0.1U

F_1

6V_2

DPEF_VDD18

0.1U

F_1

6V_2

1UF

_6.3

V_2

150_1%_2

DPCD_VDD18

DPEF_VDD18

AMD_216_0833002_FCBGA_962P

DPAB_VDD18

150_1%_2

DPCD_VDD18

DPAB_VDD10

10U

F_6

.3V

_3 BLM18PG600SN1D

PVPCIEDPAB_VDD18

BLM18PG600SN1D

0.1U

F_1

6V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

IN

IN

IN

IN

IN

DP E/F POWER

DP C/D POWER DP A/B POWER

DP PLL POWER

DP/DPF_VSSR#5

DP/DPF_VSSR#4

DP/DPF_VSSR#3

DP/DPF_VSSR#2

DP/DPF_VSSR#1

DPEF/DPF_VDD18#2

DPEF/DPF_VDD18#1

DPEF/DPF_VDD10#2

DPEF/DPF_VDD10#1

DP_VSSR/DPF_PVSS

DPEF_VDD18/DPF_PVDD

DPEF_CALR

DP/DPE_VSSR#4

DP/DPE_VSSR#3

DP/DPE_VSSR#2

DP/DPE_VSSR#1

DPEF/DPE_VDD18#2

DPEF/DPE_VDD18#1

DPEF/DPE_VDD10#2

DPEF/DPE_VDD10#1

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPE_PVDD

DP/DPD_VSSR#5

DP/DPD_VSSR#4

DP/DPD_VSSR#3

DP/DPD_VSSR#2

DP/DPD_VSSR#1

DPCD/DPD_VDD18#2

DPCD/DPD_VDD18#1

DPCD/DPD_VDD10#2

DPCD/DPD_VDD10#1

DP_VSSR/DPD_PVSS

DPCD_VDD18/DPD_PVDD

DPCD_CALR

DP/DPC_VSSR#5

DP/DPC_VSSR#4

DP/DPC_VSSR#3

DP/DPC_VSSR#2

DP/DPC_VSSR#1

DPCD/DPC_VDD18#2

DPCD/DPC_VDD18#1

DPCD/DPC_VDD10#2

DPCD/DPC_VDD10#1

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPC_PVDD

DP/DPB_VSSR#5

DP/DPB_VSSR#4

DP/DPB_VSSR#3

DP/DPB_VSSR#2

DP/DPB_VSSR#1

DPAB/DPB_VDD18#2

DPAB/DPB_VDD18#1

DPAB/DPB_VDD10#2

DPAB/DPB_VDD10#1

DP_VSSR/DPB_PVSS

DPAB_VDD18/DPB_PVDD

DPAB_CALR

DP/DPA_VSSR#5

DP/DPA_VSSR#4

DP/DPA_VSSR#3

DP/DPA_VSSR#2

DP/DPA_VSSR#1

DPAB/DPA_VDD18#2

DPAB/DPA_VDD18#1

DPAB/DPA_VDD10#2

DPAB/DPA_VDD10#1

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPA_PVDD

61 70

MODEL,PROJECT,FUNCTION

X01

XXX 21-OCT-2002

1310xxxxx-0-0

AW39AW1A39

H39H34H31G34G33F39

Y39Y34

W34W31V39V34

F34

U34U31T39T34T31R34P39P34P31N34

E39

N31M39M34L34L31K39K34K31J34J31

AB39

AL21

F13F11E5E35C39C1B9B7B33

AA28

B31B29B27B25B23B21B19B17B15B13

AA26

B11AR5AP9AP7AP11AN8AN6AN30AN2AN11

AA23

AM9AM31AM11AL8AL6AL32AL26AL23

AL20

AA21

AL2AL17AL14AL11AK7AK31AK11AJ6AJ28AJ2

AA2

AJ11AJ10AH21AG9AG6AG22AG20AG2AG17AF21

AA18

AF18AF16AF10AE6AE2AD9AD27AD24AD22AD20

AA16

AD17AD15AC6AC28AC26AC23AC21AC2AC18AC16

A37

AC13AC11

Y27Y24Y22Y20Y17Y15

AB27

W6W2V26V23V21V18V16

V13

V11U6

AB24

U27U24U22U20

U2U17U15

U13

T26T23

AB22

T21T18T16T13T11R6

R27R24R22R20

AB20

R2R17R15

N6N26N23N21

N2N18N16

AB17

M24M22M17

L6L24L22

L2L17L11

K7

AB15

K14J8J6

J27J2H9G6G2F9F7

AB12

F33F31F29F27F25F23F21F19F17F15

AA6

A3

U5001

AMD_216_0833002_FCBGA_962P

C CS

Block Diagram

PX_EN

DOC.NUMBER

of

INVENTECTITLE

DATE

CODE

E

D

C

B

A

7 6 5 4 3 2 1

7 6 5 4 3

E

D

C

B

A

FF

8

CHANGE by

8

REV

2 1

SHEET

SIZE

GND

GND#162

GND#152

GND#97

GND#96

GND#95

GND#94

GND#93

GND#92

GND#91

GND#90

GND#89

GND#88

GND#9

GND#87

GND#86

GND#85

GND#84

GND#83

GND#82

GND#81

GND#80

GND#79

GND#8

GND#78

GND#77

GND#76

GND#75

GND#74

GND#73

GND#72

GND#71

GND#70

GND#69

GND#7

GND#68

GND#67

GND#66

GND#65

GND#64

GND#63

GND#62

GND/PX_EN#61

GND#60

GND#59

GND#6

GND#58

GND#57

GND#56

GND#55

GND#54

GND#53

GND#52

GND#51

GND#50

GND#49

GND#5

GND#48

GND#47

GND#46

GND#45

GND#44

GND#43

GND#42

GND#41

GND#40

GND#4

GND#39

GND#38

GND#37

GND#36

GND#35

GND#34

GND#33

GND#32

GND#31

GND#30

GND#3

GND#29

GND#28

GND#27

GND#26

GND#25

GND#24

GND#23

GND#22

GND#21

GND#20

GND#2

GND#19

GND#18

GND#175

GND#174

GND#173

GND#172

GND#171

GND#17

GND#170

GND#169

GND#168

GND#167

GND#166

GND#165

GND#164

GND#163

GND#161

GND#160

GND#16

GND#159

GND#158

GND#157

GND#156

GND#155

GND#154

GND#153

GND#151

GND#150

GND#149

GND#15

GND#148

GND#147

GND#146

GND#145

GND#144

GND#143

GND#142

GND#141

GND#140

GND#139

GND#14

GND#138

GND#137

GND#136

GND#135

GND#134

GND#133

GND#132

GND#131

GND#130

GND#129

GND#13

GND#128

GND#127

GND#126

GND#125

GND#124

GND#123

GND#122

GND#121

GND#120

GND#119

GND#12

GND#118

GND#117

GND#116

GND#115

GND#114

GND#113

GND#112

GND#111

GND#110

GND#109

GND#11

GND#108

GND#107

GND#106

GND#105

GND#104

GND#103

GND#102

GND#101

GND#100

GND#98

GND#10

GND#1

VSS_MECH#3

VSS_MECH#2

VSS_MECH#1

PCIE_VSS#9

PCIE_VSS#8

PCIE_VSS#7

PCIE_VSS#6

PCIE_VSS#5

PCIE_VSS#4

PCIE_VSS#35

PCIE_VSS#34

PCIE_VSS#33

PCIE_VSS#32

PCIE_VSS#31

PCIE_VSS#30

PCIE_VSS#3

PCIE_VSS#29

PCIE_VSS#28

PCIE_VSS#27

PCIE_VSS#26

PCIE_VSS#25

PCIE_VSS#24

PCIE_VSS#23

PCIE_VSS#22

PCIE_VSS#21

PCIE_VSS#20

PCIE_VSS#2

PCIE_VSS#19

PCIE_VSS#18

PCIE_VSS#17

PCIE_VSS#16

PCIE_VSS#15

PCIE_VSS#14

PCIE_VSS#13

PCIE_VSS#12

PCIE_VSS#11

PCIE_VSS#10

PCIE_VSS#1

IN

(60130B5600ZT)SEYMOUR: 56OHMTHAMES: 40OHM

7062

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21R5541

21R5540

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5501

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5500

21

R55

062

1R

5507

21

C55

03

21

C5534

21

C5533

21R5508

21

C55

16

21

R55

042

1R

5505

21

C55

02

21

C55

32

21

C55

31

21

C55

30

21

C55

29

21

C55

28

21R5509

21

R55

022

1R

5503

21

C5527

21

C55

01

21

C5526

21

C55

25

21

C55

24

21

R55

002

1R

5501

21

C55

00

21

C55

23

21

C55

22

21

C55

21

21

C55

20

62A862A7 62B2

62B4

58A162C763C463C864C464C765C465C8

58D5

58C5

58B562C7

58C562C758B562C7

58B562B362D758B562B562C7

58D8

58B562C7

58D562D763D463D858D562D763D463D858D562D763D463D8

58B562C758A562C7

58C558C5

58D5

58C5

58D858D858D858D858D858D858D858D8

58D858D858D858D8

58D858D8

58D8

58A162C463C463C864C464C765C465C8

58D5

58C5

58B562C4

58C562C458B562C4

58B562B362D458B562B562C4

58D8

58B562C4

58D562D463D463D858D562D463D463D858D562D463D463D8

58B562C458A562C4

58C558C5

58D5

58C5

58D858D858D858D858D858D858D858D8

58D858D858D858D8

58D858D8

58D8

58B562C462C7

58B5 62D462D7

62D7

58A558D462D863D463D8

62D7

62D462D4

58A558D462D463D463D8

VRAM_VREFC_A<0>VRAM_VREFD_A<3>

MAA<12>

SAM_K4B1G1646D_HCF7_FBGA_100P

MAA<0>

VRAM_VREFD_A<1>VRAM_VREFC_A<2>

VM_RESET

DQMA<2>

DQSA3_DN

CKEA0

ODTA0CSA0#_0

CLKA0_DPCLKA0_DN

DQA<23>

RASA0#

MAA<1>MAA<2>MAA<3>MAA<4>MAA<5>MAA<6>MAA<7>MAA<8>MAA<9>MAA<10>MAA<11>MAA<12>MAA<13>

MAA_BA<0>MAA_BA<1>MAA_BA<2>

CASA0#WEA0#

DQSA3_DPDQSA2_DP

DQMA<3>

DQSA2_DN

DQA<26>DQA<31>DQA<29>DQA<25>DQA<24>DQA<28>DQA<27>DQA<30>

DQA<19>DQA<18>DQA<21>DQA<16>

DQA<17>DQA<22>DQA<20>

SAM_K4B1G1646D_HCF7_FBGA_100P

MAA<0>

VM_RESET

DQMA<1>

DQSA0_DN

CKEA0

ODTA0CSA0#_0

CLKA0_DPCLKA0_DN

DQA<10>

RASA0#

MAA<1>MAA<2>MAA<3>MAA<4>MAA<5>MAA<6>MAA<7>MAA<8>MAA<9>MAA<10>MAA<11>

MAA<13>

MAA_BA<0>MAA_BA<1>MAA_BA<2>

CASA0#WEA0#

DQSA0_DPDQSA1_DP

DQMA<0>

DQSA1_DN

DQA<3>DQA<0>DQA<4>DQA<2>DQA<6>DQA<1>DQA<5>DQA<7>

DQA<12>DQA<13>DQA<9>DQA<15>

DQA<14>DQA<8>DQA<11>

65

243_1%_2

P1V5S_DGPU

40.2_1%_2

CLKA0_DN

0.01

UF

_50V

_2

CLKA0_DP40.2_1%_2

1UF

_6.3

V_2

P1V5S_DGPU

4.99

K_1

%_2

0.1u

F_1

6V_2

P1V5S_DGPU

VRAM_VREFD_A<3>

13

P1V5S_DGPU

P1V5S_DGPU

1

A3 CS

Block Diagram

P1V5S_DGPU

0MAA<13..0>

1UF

_6.3

V_2

1UF

_6.3

V_2

4.99

K_1

%_2

VRAM_VREFC_A<0>

13

8

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

P1V5S_DGPUP1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

0.1u

F_1

6V_2

0.1u

F_1

6V_2

2.2U

F_6

.3V

_2

0.1u

F_1

6V_2

234

789101112

4.99

K_1

%_2

4.99

K_1

%_2

VRAM_VREFD_A<1>

10UF_6.3V_310UF_6.3V_3

243_1%_2

4.99

K_1

%_2

4.99

K_1

%_2

VRAM_VREFC_A<2>

0MAA<13..0>12345

76

9101112

4.99

K_1

%_2

10UF_6.3V_310UF_6.3V_3

4.99

K_1

%_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

BI

BI

BI

BI

BI

BI

BI BIBI

BI

BIBIBIBIBI

BI

IN

BIBI

IN

BI

IN

IN IN

BI

BIBI

BIBI

IN

ININ

ININ

IN

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

ININ

IN

BIBI

BI

BIBI

BI

BI

BI

IN

BI

BI

BIBIBIBIBIBI

IN

IN

IN

BI

BIBI

BI

IN

BI

BI

INININ

IN

ININ

BI BI

BI BI

BI BI

IN

IN

(60130B5600ZT)SEYMOUR: 56 OHMTHAMES: 40 OHM

7063

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 R554321 R5542

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5503

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5502

21

R55

17

21

C5549

21

R55

16

21

C5548

21

C55

07

21

C55

47

21

C55

46

21R5518

21

C55

17

21

R55

142

1R

5515

21

C55

06

21

C55

45

21

C55

44

21

C55

43

21

C5542

21R5519

21

R55

122

1R

5513

21

C55

05

21

C5541

21

C55

40

21

C55

39

21

C55

38

21

R55

102

1R

5511

21

C55

04

21

C55

37

21

C55

36

21

C55

35

63A363A4

58A162C462C763C864C464C765C465C8

58C5

58C5

58B563C8

58B563C858B563C8

58B563B463D858B563B563C8

58D8

58B563C8

58D562D462D763D858D562D462D763D858D562D462D763D8

58B563C858A563C8

58C558C5

58D5

58C5

58D858D858D858D858D858D858D858D8

58D858D858D858D8

58D858D8

58D8

63A663A8

58A162C462C763C464C464C765C465C8

58C5

58C5

58B563C4

58B563C458B563C4

58B563B463D458B563B563D4

58D8

58B563C4

58D562D462D763D458D562D462D763D458D562D462D763D4

58B563C458A563C4

58C558C5

58C5

58C5

58D858D858D858D858D858D858D858D8

58D858D858D858D8

58D858D8

58D8

58B5 63D463D8

58B563C863D4

63D8 63D8

58A558D462D462D863D4

63D4 63D4

58A558D462D462D863D8

SAM_K4B1G1646D_HCF7_FBGA_100P

MAA<0>

VRAM_VREFD_A<5>VRAM_VREFC_A<6>

VM_RESET

DQMA<5>

DQSA4_DN

CKEA1

ODTA1CSA1#_0

CLKA1_DPCLKA1_DN

DQA<46>

RASA1#

MAA<1>MAA<2>MAA<3>MAA<4>MAA<5>MAA<6>MAA<7>MAA<8>MAA<9>MAA<10>MAA<11>MAA<12>MAA<13>

MAA_BA<0>MAA_BA<1>MAA_BA<2>

CASA1#WEA1#

DQSA4_DPDQSA5_DP

DQMA<4>

DQSA5_DN

DQA<35>DQA<38>DQA<33>DQA<39>DQA<32>DQA<37>DQA<34>DQA<36>

DQA<44>DQA<43>DQA<47>DQA<42>

DQA<40>DQA<45>DQA<41>

SAM_K4B1G1646D_HCF7_FBGA_100P

MAA<0>

VRAM_VREFD_A<7>VRAM_VREFC_A<4>

VM_RESET

DQMA<7>

DQSA6_DN

CKEA1

ODTA1CSA1#_0

CLKA1_DPCLKA1_DN

DQA<59>

RASA1#

MAA<1>MAA<2>MAA<3>MAA<4>MAA<5>MAA<6>MAA<7>MAA<8>MAA<9>MAA<10>MAA<11>MAA<12>MAA<13>

MAA_BA<0>MAA_BA<1>MAA_BA<2>

CASA1#WEA1#

DQSA6_DPDQSA7_DP

DQMA<6>

DQSA7_DN

DQA<54>DQA<51>DQA<53>DQA<49>DQA<52>DQA<50>DQA<55>DQA<48>

DQA<62>DQA<60>DQA<58>DQA<61>

DQA<57>DQA<56>DQA<63>

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU P1V5S_DGPU

40.2_1%_240.2_1%_2

0.01

UF

_50V

_2

CLKA1_DPCLKA1_DN

4.99

K_1

%_2

VRAM_VREFC_A<4>

1UF

_6.3

V_2

12

243_1%_2

67

4.99

K_1

%_2

VRAM_VREFD_A<7>

10UF_6.3V_3 10UF_6.3V_3

4.99

K_1

%_2

4.99

K_1

%_2

1312111098

67

5

34

12

MAA<13..0> 0

VRAM_VREFC_A<6>

4.99

K_1

%_2

4.99

K_1

%_2

243_1%_2

10UF_6.3V_3

A3

VRAM_VREFD_A<5>

4.99

K_1

%_2

4.99

K_1

%_2

10UF_6.3V_3

CS

Block Diagram

MAA<13..0>

13

11

98

10

543210

0.1u

F_1

6V_2

2.2U

F_6

.3V

_2

0.1u

F_1

6V_2

0.1u

F_1

6V_2

0.1u

F_1

6V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

BIBIBI

BIBI

BI

BI

BI

BI

BI

BI

BI

BIBIBIBI

ININ

BI

BIBI

BI

IN

IN

ININ

IN

ININ

ININ

IN

BI

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

BI

BI

BIBI

BIBI

BI

BI

BIBIBI

BIBIBIBI

BIBI

BI

BIBI

ININ

BI

BI

BIBIBI

IN

IN

ININ

IN

ININ

ININ

IN

BI

BIBI

BI

BIBI

IN

IN

IN

THAMES: 40 OHMSEYMOUR: 56 OHM(60130B5600ZT)

7064

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 R554521 R5544

21

C55

58

21

C55

59

21

C55

60

21

C55

61

21

C55

62

21

C55

54

21

C55

52

21

C55

53

21

C55

51

21

C55

50

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5504

21

R55

262

1R

5527

21

C55

11

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5505

21

C5564

21

C5563

21R5528

21

C55

18

21

R55

242

1R

5525

21

C55

10

21R5529

21

R55

222

1R

5523

21

C5557

21

C55

09

21

C5556

21

C55

55

21

R55

202

1R

5521

21

C55

08

64B264B4

58A162C462C763C463C864C765C465C8

58D1

58C1

58B164C7

58C164C758B164C7

58B164B364D758B164B564C7

58D4

58B164C7

58D164D765D465D858D164D765D465D858D164D765D465D8

58B164C758A164C7

58C158C1

58D1

58C1

58D458D458D458D458D458D458D458D4

58D458D458D458D4

58D458D4

64A764A8

58A162C462C763C463C864C465C465C8

58D1

58C1

58B164C4

58C164C458B164C4

58B164B364D458B164B564C4

58D4

58B164C4

58D164D465D465D858D164D465D465D858D164D465D465D8

58B164C458A164C4

58C158C1

58D1

58C1

58D458D458D458D458D458D458D458D4

58D458D458D458D4

58D458D4

58D4

58A158D164D765D465D8

58B1 64D464D7

58B164C464C7

64D7

58A158D164D465D465D8

64D4 64D4

64D7

SAM_K4B1G1646D_HCF7_FBGA_100P

MAB<0>

VRAM_VREFD_B<1>VRAM_VREFC_B<2>

VM_RESET

DQMB<2>

DQSB1_DN

CKEB0

ODTB0CSB0#_0

CLKB0_DPCLKB0_DN

DQB<21>

RASB0#

MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>MAB<6>MAB<7>MAB<8>MAB<9>MAB<10>MAB<11>MAB<12>MAB<13>

MAB_BA<0>MAB_BA<1>MAB_BA<2>

CASB0#WEB0#

DQSB1_DPDQSB2_DP

DQMB<1>

DQSB2_DN

DQB<10>DQB<12>DQB<9>DQB<14>DQB<13>DQB<11>DQB<8>DQB<15>

DQB<20>DQB<19>DQB<23>DQB<16>

DQB<17>DQB<22>DQB<18>

SAM_K4B1G1646D_HCF7_FBGA_100P

MAB<0>

VRAM_VREFD_B<3>VRAM_VREFC_B<0>

VM_RESET

DQMB<0>

DQSB3_DN

CKEB0

ODTB0CSB0#_0

CLKB0_DPCLKB0_DN

DQB<1>

RASB0#

MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>MAB<6>MAB<7>MAB<8>MAB<9>MAB<10>MAB<11>MAB<12>MAB<13>

MAB_BA<0>MAB_BA<1>MAB_BA<2>

CASB0#WEB0#

DQSB3_DPDQSB0_DP

DQMB<3>

DQSB0_DN

DQB<26>DQB<24>DQB<29>DQB<31>DQB<28>DQB<25>DQB<30>DQB<27>

DQB<6>DQB<3>DQB<2>DQB<7>

DQB<4>DQB<0>DQB<5>

P1V5S_DGPU

MAB<13..0>

4

P1V5S_DGPU

40.2_1%_2

CLKB0_DPCLKB0_DN

12

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

109

243_1%_2

VRAM_VREFD_B<3>

4.99

K_1

%_2

4.99

K_1

%_2

1312111098

67

5

34

12

MAB<13..0> 0

VRAM_VREFC_B<2>

4.99

K_1

%_2

4.99

K_1

%_2

243_1%_2

10UF_6.3V_3

A3

VRAM_VREFD_B<1>

CS

Block Diagram

4.99

K_1

%_2

4.99

K_1

%_2

13

11

8765

210

0.1u

F_1

6V_2 0.

1uF

_16V

_2

0.1u

F_1

6V_2

0.1u

F_1

6V_2

VRAM_VREFC_B<0>

10UF_6.3V_3 10UF_6.3V_3 10UF_6.3V_3

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

2.2U

F_6

.3V

_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

3

4.99

K_1

%_2

4.99

K_1

%_2

40.2_1%_2

0.01

UF

_50V

_2

1UF

_6.3

V_2

P1V5S_DGPU

P1V5S_DGPU

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

BI

BI

BIBI

BIBI

BI

BI

BI

BI

BIBI

BI

BI

BI

BI

ININ

BI

BI

BIBI

IN

IN

IN

ININ

IN

IN

ININ

ININ

BIBI

BI

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BIBI

BI

BI

BI

BI

BI

IN

BIBIBI

ININ

BI

BI

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

IN

ININ

IN

INININININ

BIBI

BI

IN

BI

IN

SEYMOUR: 56 OHM(60130B5600ZT)

THAMES: 40 OHM

7065

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21 R554721 R5546

21

C55

73

21

C55

74

21

C55

75

21

C55

76

21

C55

77

21

C55

69

21

C55

68

21

C55

67

21

C55

66

21

C55

65

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5506

21

R55

362

1R

5537

21

C5579

21

C55

15

L9

L4

G2G10

F10E9E3D9D2

B2B10

T2T10

P2P10

M2M10

J9J3G9E2B4A10

H2M9

H3H10

F2E10D3

C2C10

A9A2

R2R10

N2N10

K9K3G8D10B3

T3

J4

K2

L10

J2L2

J10

T11T1

A11A1

A4B9A3A8C3C9C4D8

B8

C8

G4

F4

H8G3H9H4F9F3F8E4

D4E8

L3

K10K8J8

K4

M4N9M3

R4T9R3R9P3P9N3P4

M8T8T4N8R8L8

P8N4

U5507

21

C5578

21R5538

21

C55

19

21

R55

342

1R

5535

21

C55

14

21

R55

322

1R

5533

21

C55

13

21

C5572

21

C5571

21

C55

70

21R5539

21

R55

302

1R

5531

21

C55

12

65A365A4

58A162C462C763C463C864C464C765C8

58C1

58C1

58B165C8

58B165C858B165C8

58B165B465D858B165B565C8

58D4

58B165C8

58D164D464D765D858D164D464D765D858D164D464D765D8

58B165C858A165C8

58C158C1

58D1

58C1

58D458D458D458D458D458D458D458D4

58D458D458D458D4

58D458D4

58D4

65A665A8

58A162C462C763C463C864C464C765C4

58C1

58C1

58B165C4

58B165C458B165C4

58B165B465D458B165B565D4

58D4

58B165C4

58D164D464D765D458D164D464D765D458D164D464D765D4

58B165C458A165C4

58C158C1

58C1

58C1

58D458D458D458D458D458D458D458D4

58D458D458D458D4

58D458D4

58D4

58A158D164D464D765D8

58B165C865D4

58B1 65D465D8

65D465D4

58A158D164D464D765D4

65D865D8

SAM_K4B1G1646D_HCF7_FBGA_100P

MAB<0>

VRAM_VREFD_B<5>VRAM_VREFC_B<6>

VM_RESET

DQMB<5>

DQSB4_DN

CKEB1

ODTB1CSB1#_0

CLKB1_DPCLKB1_DN

DQB<40>

RASB1#

MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>MAB<6>MAB<7>MAB<8>MAB<9>MAB<10>MAB<11>MAB<12>MAB<13>

MAB_BA<0>MAB_BA<1>MAB_BA<2>

CASB1#WEB1#

DQSB4_DPDQSB5_DP

DQMB<4>

DQSB5_DN

DQB<39>DQB<37>DQB<36>DQB<38>DQB<35>DQB<32>DQB<33>DQB<34>

DQB<41>DQB<44>DQB<42>DQB<45>

DQB<47>DQB<43>DQB<46>

SAM_K4B1G1646D_HCF7_FBGA_100P

MAB<0>

VRAM_VREFD_B<7>VRAM_VREFC_B<4>

VM_RESET

DQMB<7>

DQSB6_DN

CKEB1

ODTB1CSB1#_0

CLKB1_DPCLKB1_DN

DQB<60>

RASB1#

MAB<1>MAB<2>MAB<3>MAB<4>MAB<5>MAB<6>MAB<7>MAB<8>MAB<9>MAB<10>MAB<11>MAB<12>MAB<13>

MAB_BA<0>MAB_BA<1>MAB_BA<2>

CASB1#WEB1#

DQSB6_DPDQSB7_DP

DQMB<6>

DQSB7_DN

DQB<55>DQB<54>DQB<51>DQB<52>DQB<48>DQB<53>DQB<49>DQB<50>

DQB<59>DQB<63>DQB<62>DQB<58>

DQB<56>DQB<61>DQB<57>

MAB<13..0>

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU P1V5S_DGPU

P1V5S_DGPU

P1V5S_DGPU

CLKB1_DN CLKB1_DP

0.01

UF

_50V

_2

40.2_1%_240.2_1%_2

1UF

_6.3

V_2

1UF

_6.3

V_2

6

A3 CS

Block Diagram

2.2U

F_6

.3V

_2

10UF_6.3V_3

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

1UF

_6.3

V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

0.1U

F_1

6V_2

0

21

345

7

10

89

111213

10UF_6.3V_3

4.99

K_1

%_2

4.99

K_1

%_2

VRAM_VREFD_B<5>

10UF_6.3V_3

243_1%_2

4.99

K_1

%_2

4.99

K_1

%_2

VRAM_VREFC_B<6>

0MAB<13..0>

21

43

5

76

8910111213

4.99

K_1

%_2

4.99

K_1

%_2

10UF_6.3V_3

VRAM_VREFD_B<7>

243_1%_2

4.99

K_1

%_2

4.99

K_1

%_2

VRAM_VREFC_B<4>

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

IN

BI

BIBI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BIBI

BI

ININ

BI

BI

BIBI

IN

ININ

INININ

ININ

INININ

BIBI

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

BI

BI

BI

BI

BI

BIBIBI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BIBIBI

ININ

BI

BI

NC

NC

NC

NC

NC_CE1

NC_ZQ1

A0

VREFDQ

VREFCA

VSSQ#G10

VSSQ#E3

VSSQ#G2

VSSQ#F10

VSSQ#E9

NC_ODT

NC_CSI

RESET

DMU

DQSL

CKE_CKE0

ODT

CS

CK

CK

DQU4

VDD#K9

VDD#R10

VDD#R2

VDD#N10

VDD#N2

RAS

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10_AP

A11

A12

A13

A14

A15_BA3

BA0

BA1

BA2

CAS

WE

DQSL

DQSU

DML

DQSU

ZQ_ZQ0

DQL0

DQL1

DQL2

DQL3

DQL4

DQL5

DQL6

DQL7

DQU0

DQU1

DQU2

DQU3

DQU5

DQU6

DQU7

VDD#B3

VDD#D10

VDD#G8

VDD#K3

VDDQ#A2

VDDQ#A9

VDDQ#C2

VDDQ#C10

VDDQ#D3

VDDQ#E10

VDDQ#F2

VDDQ#H3

VDDQ#H10

VSS#A10

VSS#B4

VSS#E2

VSS#G9

VSS#J3

VSS#J9

VSS#M2

VSS#M10

VSS#P2

VSS#P10

VSS#T2

VSS#T10

VSSQ#B2

VSSQ#B10

VSSQ#D2

VSSQ#D9

IN

IN

INININ

ININ

INININ

BI

BI

BI

BIBI

BIBI

IN

IN

USB BOARD

70XXX 21-OCT-2002 66

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

1 S9100

1 S9101

1

4 G4G3G2G1

23

CN9100

1 PAD9103

1 PAD9102

1 PAD9101

1 PAD9100

1

FIX91012

1

C9100

1FIX9100

2134

L9100

66B566B5

66C6

66C6

SCREW240_800_1P

FIX_MASK

SMDPAD_1P_40X120

P5V0A_USB3_DB

WCM_2012_900T

USB_L_P2_DN_DBUSB_P2_DP_DB USB_L_P2_DP_DBUSB_P2_DN_DB

DGND_USB3_DB

22UF_6.3V_5

P5V0A_USB3_DB

DGND_USB3_DB

DGND_USB3_DB

SCREW300_1000_1P

DGND_USB3_DB

DGND_USB3_DB

SMDPAD_1P_40X120

SMDPAD_1P_40X120

USB_P2_DP_DB

A3 CS

Block Diagram

SUYIN_020173GR004M555ZL_4P

SMDPAD_1P_40X120

USB_P2_DN_DB

FIX_MASK

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

VCC

GND G4

G3

G2

G1

DATA-

DATA+BI

BI

BI

BI

R9203 V

4PIN IMR/METAL TEXTURE

R9204

V

V V

V

V

R9213

R9214

R9208

R9207

V

V

V

V

V

V

R9202

R9206

R9205

R9201

TOUCHPAD TO MODULE CONN

TOUCH PAD BOARD 4 PINTOUCHPAD TO MB CONN

7067

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

G2G16

54321

CN9201

654

321

SW9202

654

321

SW9201

1PAD9204

1PAD9203

1PAD9202

1PAD9201

1 S9202

2 1

R9214

2 1R9213

21 R9208

21 R9206

21 R9204

21 R9202

21 R9207

21 R9205

21 R9203

21 R9201

1F

IX92

01

1F

IX92

06

1F

IX92

05

1F

IX92

04

1F

IX92

03

1F

IX92

02

1 S9203

1 S9201

32 1

D9201

67B767D467D7

67C7

67C7

67D467D767D467D7

67A267C7

67B767D767B767D7

67B767D467D7

67B767D467D7

67B767D467D7

67A2

67A267C7

TP_IM_CLK_5

DGND_TP

P5V0S_TPB

0_5%_2

0_5%_2_DY

DGND_TP

PHP_PESD5V2S2UT_SOT23_3P_DY

DGND_TP

RIGHT_TP

LEFT_TP

Block Diagram

CSA3

MISAKI_NTC017_DA1G_E160T_6P

MISAKI_NTC017_DA1G_E160T_6P

DGND_TP

FIX_MASKFIX_MASKFIX_MASK

SCREW230_800_1P

SCREW230_500_1P

SCREW230_800_1P

FIX_MASKFIX_MASKFIX_MASK

DGND_TP

TP_IM_CLK_5TP_IM_DAT_5

47K_5%_2

LEFT_TP

47K_5%_2

SMDPAD1_28X118SMDPAD1_28X118

SMDPAD1_28X118SMDPAD1_28X118

DGND_TP

TP_IM_CLK_5TP_IM_DAT_5

P5V0S_TPB

TP_IM_DAT_5

0_5%_2

0_5%_2_DY

0_5%_2

0_5%_2_DY

TP_IM_CLK_5

TP_IM_DAT_5

0_5%_2

0_5%_2_DY

RIGHT_TP

LEFT_TPACES_50592_0060N_001_6P

P5V0S_TPB

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BIBI

OUT

IN

BIBI

BIBI

BIBI

IN

IN

G2

G16

5

4

3

2

1

A B

DC

A B

DC

OUT

REFERENCE 9000~9999(SMALL BOARD)

POWER BUTTON

7068

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

32 1

D9000

654

321

SW9000

1 S9001

1 S9000

1 PAD9001

1 PAD9000

21

C9000

1

FIX9005

1

FIX90041

FIX9003

MISAKI_NTC017_DA1G_E160T_6P

PHP_PESD5V2S2UT_SOT23_3P

SCREW220_800_1P

SMDPAD_1P_40X120

SMDPAD_1P_40X1201000PF_50V_2_DY

FIX_MASK

A3 CS

Block Diagram

FIX_MASKFIX_MASK

DGND_PWRSW_DB

SCREW220_800_1P

DGND_PWRSW_DB

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

A B

DC

7069

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

21C7518

21C7517

21C7516

21C7515

21C7506

21C7512

21C7511 21

C7509

21C7508

21C7507

21C7504

21C7505

21C7503

21C7502

21C7501

P3V3S

0.1UF_16V_2_DY

0.1UF_16V_2

P5V0A

P1V5S_DGPU

PVCORE_DGPU

0.1UF_16V_2

0.1UF_16V_2_DY

P5V0S_AUDIO_AVDDP1V5

0.1UF_16V_2_DY

A3 CS

Block Diagram

PVBAT P5V0S

0.1UF_16V_2_DY

0.1UF_16V_2_DY

PVCORE

P3V3S

0.1UF_16V_2_DY

0.1UF_16V_2_DY

0.1UF_16V_2

0.1UF_16V_2_DY

0.1UF_16V_2

P3V3S

P1V5S_DGPU

0.1UF_16V_2

P5V0A

P1V5S_DGPU

P5V0A

0.1UF_16V_2_DY

0.1UF_16V_2_DY

P5V0S_AUDIO_AVDD

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

TOUCHPAD TO MODULE CONN

TOUCH PAD BOARD 8 PINTOUCHPAD TO MB CONN

7070

X011310xxxxx-0-0

MODEL,PROJECT,FUNCTION

21-OCT-2002XXX

654

321

SW9301

654

321

SW9302

32 1

D9301

2 1

R9314

1F

IX93

06

2 1R9313

1F

IX93

05

1F

IX93

04

1 S9301

1 S9302

1 S9303

1F

IX93

03

1F

IX93

02

1F

IX93

01

1PAD9303

1PAD9302

1PAD9301

1PAD93041PAD93051PAD9306

1PAD9308

1PAD9307

G2

G1

87654321

CN9303

70B2

70C470C4

70D470D770D470D7

70C770C7

70C7

70B770D770B770D7

70C7

70B2

70B770D470B770D4

RIGHT_TP_8

TP_PCH_3S_SMCLK_8TP_PCH_3S_SMDATA_8

TP_IM_DAT_8TP_IM_CLK_8

FIX_MASK

DGND_DB

SCREW230_800_1P

FIX_MASK FIX_MASK

SCREW230_500_1P

SCREW230_800_1P

FIX_MASK FIX_MASK

47K_5%_247K_5%_2

P3V3S_TPM

FIX_MASK

TP_PCH_3S_SMDATA_8TP_PCH_3S_SMCLK_8

P3V3S_TPMP5V0S_DB

SMDPAD1_28X118

SMDPAD1_28X118SMDPAD1_28X118

SMDPAD1_28X118SMDPAD1_28X118SMDPAD1_28X118

SMDPAD1_28X118SMDPAD1_28X118

DGND_DB

PHP_PESD5V2S2UT_SOT23_3P_DY

DGND_DB

DGND_DB

RIGHT_TP_8

TP_IM_CLK_8TP_IM_DAT_8

LEFT_TP_8

Block Diagram

CSA3

MISAKI_NTC017_DA1G_E160T_6P

MISAKI_NTC017_DA1G_E160T_6P

P3V3S_TPM

LEFT_TP_8

TP_IM_CLK_8TP_IM_DAT_8

DGND_DB

ACES_50503_0084N_001_8P

DGND_DB

DOC.NUMBER

DATE

SIZE CODE

8

8 7

7 6

6 5

5 4

3 2 1

DD

CC

B

AA

4

1

ofSHEET

TITLE

CHANGE by

23

INVENTEC

REV

B

BI BI

BI

BI

BIBI

A B

DC

BI

A B

DC

OUT

OUT

IN

BI

IN

BI

G2

G1

87654321BI