1dc2100afc

DEMO MANUAL DC2100A

Description

Bi-Directional Cell Balancer Using the LTC3300-1 and the LTC6804-2

Demonstration Circuit DC2100A is a Bi-Directional Cell Balancer using two LTC®3300-1 ICs to achieve active balancing of up to 12 Li-Ion cells. The board uses a single LTC6804-2 Multi-Cell Addressable Battery Stack Monitor IC to measure cell voltages and two LTC3300-1 ICs to provide active cell balancing. The DC2100A-C contains a PIC18F47J53 microcontroller to communicate with the LTC3300-1 and LTC6804-2 ICs, as well as an LTC6820 isoSPI Interface IC for communication with DC2100A-D boards. Up to 7 DC2100A-D boards can be connected to a DC2100A-C to build a stacked system of 8 total boards.** Note: The voltage rating of T15 limits the system to a total of 8 total boards.

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and QuikEval is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

performance summary

Demo BoarD Description

A graphical user interface (GUI) uses a USB interface to communicate with the DC2100A-C. The GUI controls the LTC3300-1 ICs allowing manual control of the charging/discharging of cells and reporting the voltage of each cell. Cell balancing is achieved through the LTC3300-1 ICs by transferring charge from one or more cells per LTC3300-1 to the stack or from the stack to one or more cells per LTC3300-1.

Design files for this circuit board are available at http://www.linear.com/demo/DC2100A

Source code and documentation for PIC18 and GUI are available at http://www.linear.com/docs/45563

Specifications are at TA = 25°C

Cell Voltage Range 3.2V to 4.5V (2.5V to 4.5V)*

Stack Voltage 60V Max

Average Battery Balancing Charge Current (12 Cell) 4.0A (Typ)

Average Battery Balancing Discharge Current (12 Cell) 4.3A (Typ)

Average Battery Balancing Charge Current (6 Cell) 3.4A (Typ)

Average Battery Balancing Discharge Current (6 Cell) 4.0A (Typ)

Balancing Efficiency 90% (Typ)

DC2100A-C 12 Cell 4A Active Cell Balancer Controller Board

DC2100A-D 12 Cell 4A Active Cell Balancer Stacked Board

The Cell Voltage Range may be expanded to 2.5V to 4.5V by changing the resistors RTONS to 30.9kΩ and resistors RTONP to 47.5kΩ

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DEMO MANUAL DC2100A

Quick start proceDure

CELL VOLTAGE2.6

75.0

EFFI

CIEN

CY (%

)

95.0

90.0

85.0

80.0

100.0

3.2 3.4 3.6 3.8 4.02.8 3.0

12 CELLS6 CELLS

CELL VOLTAGE2.6

75.0

EFFI

CIEN

CY (%

)

95.0

90.0

85.0

80.0

100.0

3.2 3.4 3.6 3.8 4.02.8 3.0

12 CELLS6 CELLS

Discharge Efficiency Charge Efficiency

Cell Balancer Efficiency vs Cell Voltage

Thermal Image all Cells Active Balancing

The conditions for the Thermal Plot are:Cell Voltages at 3.6V, Odd Numbered Cells Discharging, Even Numbered Cells Charging

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DEMO MANUAL DC2100A

Quick start proceDure

DC2100A-C Demo Board Photo

Figure 1. DC2100A-C Demo Board Size Equals 5.5" x 12.8"

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DEMO MANUAL DC2100A

operating principle

Quick start proceDure

The DC2100A has a five window GUI, pictured in Figure 28. The Control Panel is the primary window, which displays information about the ICs in the stacked system, the state of the cells on each DC2100A board, and allows manual control of the balancing mode of the LTC3300-1. The Con-trol Panel can spawn three more windows: a Calibration Data window to calibrate cell and balancer characteristics, an Error Log window to display logged errors, and a Graph View window to graphically display characteristics of the stacked system over time. The Graph View window also spawn a Graph View Option window that controls the set-tings of the Graph View window. The LTC3300-1 Active Balancer is a power stage control IC. The LTC3300-1 does not have a balancer algorithm built into it. The determination of the balancing times and directions are performed at a system level and conveyed to the LTC3300-1 through its SPI interface. The LTC3300-1 only accepts cell charge or discharge commands. Charge is transferred to/from a cell

from/to the stack, a series connection of adjacent cells, through a flyback converter that is operating in boundary mode. During discharge of a cell the current in the primary of a coupled inductor transformer with a turns ratio of 1:2, ramps up to 10A at which point the primary switch turns off. The charge in the primary inductor is transferred to the secondary inductor which is connected across the 12 cell sub-stack. This sub-stack current then passes through the series connected cells thus distributing the charge equally across each cell. When charging a cell, the current in the secondary of the coupled inductor transformer ramps up to 5.0A at which point the secondary switch turns off. The charge in the secondary inductor is transferred to the primary inductor which is connected across the cell. The secondary current is drawn from the series connected cells thus removing charge equally across each cell. The efficiency through the fly-back converter is 90%.

The demonstration circuit is set up per Figure 34 to evalu-ate the performance of the DC2100A-C Bi-Directional Cell Balancer using the LTC3300-1.

Using short twisted pair leads for any power connections, refer to Figure 34 for the proper measurement and equip-ment setup. The DC2100A will support a system of 4 to 12 cells (See Figures 34 and 37 to 44).

Recommended Cell Connection Sequence

The recommended cell connection sequence is to connect the V– connection first followed by connecting cells 1 through cell 12. Disconnection of the cells should follow this sequence in the reverse order with the V– connection being removed last. Connecting the V– connection first and removing last is recommended because the V– connection is the ground reference for the circuitry within the demo board. After connecting the V–, all other cell connection sequence is less critical as long as the cell circuit capacitances are matched as they are in the demo board. Following the recommended cell connection removes the possibility of excessive voltage on any of the lower cells due to an imbalance in cell circuit capacitance.

A 4 bit board ID code is set by the A0 through A3 jump-ers on the DC2100A-C must be set to 0000. The jumpers on the DC2100A-D boards must be set to unique values between 0001 and 1111.

To use the DC2100A, the PC must first have the proper driver and software installed. To do this, download the QuikEval™ software from Linear Technology, at www.linear.com:

http://www.linear.com/designtools/software/quik_eval.jsp

1) Install the QuikEval software by running the execut-able ltcqev.exe. Follow the instructions to connect the DC2100A.

If you fail to unplug the DC2100A, the DC2100A driver will not install!

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DEMO MANUAL DC2100A

Quick start proceDure2) When installation of QuikEval is complete, close the

QuikEval program.

3) Reopen QuikEval. If properly installed, QuikEval will show the following message until the DC2100A is connected:

If not properly installed, QuikEval will be unable to connect to the DC2100A. Please retry the software installation, with the DC2100A disconnected.

When the GUI connects to the DC2100A system, it will display the boards attached in the Control Panel System Tree View. The DC2100A GUI Control Panel is able to display the data and controls for one board at a time. When a board is selected in the System Tree View, all of the Windows will begin to display the data and controls for that board. The Selected Board Indicator in each window will indicate which board is selected. The Board Status LEDs indicate the state of the boards similarly to the LEDs on the DC2100A-C.

The green LED flashes quickly when a board is connected but its cells are not powered, and slowly when a board is connected with powered cells. The amber LED turns on when the GUI is communicating with a board via USB.

When the DC2100A is used with fewer than 12 cells, the board must be configured in the GUI so that the unpopulated

Figure 2. Board Selection in System Tree View

4) Now connect the DC2100A. The QuikEval software will recognize when the DC2100A demo board has been found, and will offer to download and install the module from the LTC website:

At this point, select OK.

5) The QuikEval software will now download and open the software for the DC2100A.

6) Close QuikEval Software, as it is no longer needed for the DC2100A.

When the DC2100A-C is connected to the PC, the PIC18 will become powered. The powered status will be indicated through Green LED D15 flashing with a 1 second period. When the GUI’s launched, it will begin communicating with the PIC18 via USB. Proper USB communication will be indicated through Orange LED D16 lighting during each USB transaction.

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 3. Turning off Cell 1 on Board 3

Figure 4. VOV and VUV Text Boxes

Figure 5. Voltage Display Controls

cells are not interpreted as an undervoltage condition. When a cell is red in the System Tree View, it has been specified as unpopulated. To configure a DC2100A for fewer than 12 cells, right click the board in the System Tree View and select the number of populated cells.

An alternative method of viewing the data is available by pressing the Graph Data button, to open the Graph View Window. The Graph View Window is detailed in Figure 33, and allows data for each board and the stacked system to be graphed over time. The graph data can be saved and are reloaded later, and the View Options control allows configuration of the Graph Display. The Stack Summary provides graphed data for the entire system, where the Board Summary, Cell Voltages, and Temperatures allow data to be graphed for boards selected in the Tree View. Up to 15 values may be graphed at one time, and the graph is limited to 500 seconds of data.

The Global Channel Monitor tab switches the Control Panel to a grid view in which all of the cell voltages can be viewed at the same time. Disabled cells will be color coded as grey, and cells selected in the System Tree View will be highlighted in blue. Details of the Global Channel Monitor View are provided in Figure 30.

Several controls are available on the Control Panel Cell Tab for issuing balancing commands to the selected board. In the Balance Mode Select Boxes, you can manually select which cells are to be discharged by clicking the cell’s DISCHARGE button, which cells are to be charged by clicking the cell’s CHARGE button.

Note that if a cell is disabled, the balance mode select box will not be selected and the cell pictured will be grey. Balancing and overvoltage conditions are also indicated by color, according to the Cell State Color Key.

Figure 6. Balance Mode Select Boxes

The DC2100A GUI periodically checks for OV and UV measured on the cells when balancing. To avoid the program from suspending balancing from a OV and UV measurement during normal operation, the Max Cell Volt-age and UV values must be entered in the VOV and Min Cell Voltages text boxes tab shown in Figure 4.

The cell voltages in the Control Panel can be configured to stop updating automatically, and only be updated when the Read Voltages button is clicked (as shown in Figure 5). This provides the ability to freeze the data for a board at any instant in time.

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 7. Manual Balance Control

Figure 8. LTC3300-1 Register Display

Once the balance modes are selected, they are not im-mediately written to the LTC3300-1 ICs. Two methods are available for writing the balance modes: Manual and Timed Balance Control. When the Manual Balance method is selected, the Write Command button will cause the GUI to write the balance modes to the selected board.

Once the balance mode commands are written to the LTC3300-1 ICs, balancing will not begin until the Execute button has been pressed to command the balancing to begin. The Execute button will cause all of the attached boards to begin balancing. This allows each board to have its balancing commands set up when selected in the Sys-tem Tree View, and to then have all of the balancers turned on together. To disable any cell from balancing, the cell’s NONE button must be clicked in the Balance Mode Select Box followed by clicking the Write Command button and finally the Execute button. Each time the Execute button

is pressed, the Read Command and Read Status registers will be updated for the selected board (see Figure 8).

When the Timed Balance method of balance control is selected, the GUI allows the user to program the balancer to charge or discharge each cell for a specific amount of time. The LTC3300-1 is a power stage control IC. The determination of the balancing times and directions are done at the System level and conveyed to the LTC3300-1 through its SPI communications port. In order to perform a timed balance, the TIMED BALANCE check shown in Figure 9 must be selected to have access to the timed bal-ance controls as shown in the Balance Mode Select Boxes.

Figure 9. Timed Balance Control

To use the Timed Balance method of balance control, select the DISCHARGE, CHARGE, or NONE button for each cell and then enter the time in seconds into the cells “BALANCE TIME” text box. Press the Write button to write the bal-ance commands and times into the selected board. Select another board from the System Tree View and repeat until the balance settings have been loaded into each DC2100A board. Press the Start button to begin the timed balance

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 10. Timed Balancing

for all of the boards in the stacked system. The balance times will then begin to count down as the balancing is performed, and the LTC3300-1 Register Display will be continuously updated. The NEXT STOP TIME field will display the earliest time that one of the cells will complete balancing, and the board on which that cell resides. When the NEXT STOP TIME arrives, the balance mode for that cell will change to NONE and a new cell will display for the NEXT STOP TIME. The TIME REMAINING will display the total time remaining in the timed balancing, after which all of the cells will have NONE for their balancing mode.

While balancing is active, the Start button (see Figure 10)will change to Stop, in case the user wishes to pause the balancing operation. Selecting the Reset button will reset all of the balance timers to 0 and all of the cell balance modes to NONE.

The user can load and store several timed balance profiles in the Board Configuration control (see Figure 11). The Imbalance Cells button in this control will load a pattern of charging and discharging cells. The user can then manu-ally configure the Timed Balance controls to correct for the imbalance created by this button. The user can save their Timed Balance configuration and reload it later. The configuration will also save the over and undervoltage settings, as well as the disabled cell configuration.

In addition to the Graph View of the data, the DC2100A system can be monitored over a long period of time with the results written to a CSV file. The logging interval and length can be configured, but note that the size of the data files can grow quite large for stacked systems with many boards. The projected memory size will be displayed before the user begins logging by pressing the Start Data Log button. Once the button is pressed, the user will be prompted to enter a data file name and location, and the logging will begin.

Figure 11. Board Configuration Control

Although each DC2100A will balance with currents similar to those listed in Table 1, each board was tested upon manufacture and its actual balancing currents are stored within the DC2100A. These currents can be accessed by pressing the Calibration Data button on the Control Panel, which will then launch the Calibration Data window (see Figure 31). In this window the user has the ability to enter new calibration current values, or reset the currents to the

Figure 12. Data Log Control

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DEMO MANUAL DC2100A

Quick start proceDurevalues from Table 1. It is not recommended to change these, however, from the factory measured settings. The capacity of each cell can also be stored in the DC2100A. The capacity and balance currents will be used in a later release of firmware for the DC2100A-C, which will employ an autonomous balancing algorithm.

The DC2100A GUI installed with the QuikEval software, will always contain the most up to date version of Firmware for the DC2100A. In order to update the firmware, press the Update Firmware button in the Control Panel.

Cell Balancer Efficiency Measurements

Figure 35 shows the proper connections for measuring the efficiency of a cell balancer. The secondary of the cell balancer connects to the top of stack. This connection needs to be to an isolated power source through a cur-rent sensing resistor (0.10Ω). Cells 1 through 6 are

Figure 13. Update Firmware Button

Figure 14. Firmware Update Window

After confirming that the Firmware should be updated, a command line window will be launched in which the PIC18 on the DC2100A is first erased, and then reprogrammed.Do not remove power from the DC2100A while the Firmware is being updated.

connected to the BOT6_TS turret with its return path the V- turret while Cells 7 through 12 are connected to the TOP6_TS turret with its return path the C6 turret. These isolated power sources simulate a stack of cells from 3 to 12 cells. The primary side connection of the cell bal-ancers are connected to a string of power sources that simulate the battery stack. Cell 1 power source is a two wire connection that connects the positive node, through a current sensing resistor (0.01Ω), to the C1 turret, and the negative node to the V- turret. Remote sense connec-tions for power sources with remote sensing capabilities should be connected to the C1 and V- respectively. All other connections of the simulated string of cells connect their positive node, through a current sensing resistor (0.01Ω), to respective turrets. Cell voltage measurements should be made across the C(x) and C(x-1) turrets of the respective cells. Stack voltage measurements should be made at the BOT6_TS and TOP6_TS turrets and their return path turret.

To calculate cell balancer efficiency use the expressions below:

Cells 1-6

Charge Mode

Efficiency1=

Vm1• Vm2 •10Vm3 • Vm4

•100%

Discharge Mode

Efficiency1=

Vm3 • Vm4Vm1• Vm2 •10

•100%

Cells 7-12

Charge Mode

Efficiency11=

Vm5 • Vm6 •10Vm7 • Vm8

•100%

Discharge Mode

Efficiency11=

Vm7 • Vm8Vm5 • Vm6 •10

•100%

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 15. 12 Cell Discharge Waveforms

Figure 16. 12 Cell Charge Waveforms

Figure 17. 6 Cell Discharge Waveforms

Cell Balancer Performance Measurements

Table 2 through Table 5 present the typical operational data for a 12 cell and 6 cell balancer in both Discharge and Charge modes. The cell voltages were 3.6V and measure-ments of Cell Current, Stack Current, Operating Frequency were taken and transfer Efficiency was calculated from the data. Figure 15 through Figure 18 are actual in-circuit waveforms taken on Cell 1 and Cell 7 while operating in both modes. The waveforms present voltage on the pri-mary side and secondary side MOSFET’s drain to source voltage and the primary side and secondary side current sense inputs to the LTC3300-1.

Figure 14 through Figure 22 are cell and stack currents taken over a range of cell voltages from 2.6V to 4.0V. The RTONP and RTONS resistors were set for 2.6V cell voltage operation. All cells were set to the cell voltage under test. The slight negative slope in current at higher voltages is due to the increased operating frequency and the circuit delays and dead time becoming a higher percentage of the operating period.

Table 2. Typical 12 Cell Discharge DataCell I (A) Stack I

(A)Frequency

(KHz)Efficiency

4.250 0.311 95.7 87.9%

Table 3. Typical 12 Cell Charge DataCell I (A) Stack I

(A)Frequency

(KHz)Efficiency

3.960 0.367 106.6 89.7%

Table 4. Typical 6 Cell Discharge DataCell I (A) Stack I

(A)Frequency

(KHz)Efficiency

4.000 0.577 88.6 88.4%

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DEMO MANUAL DC2100A

Quick start proceDureTable 5. Typical 6 Cell Charge Data Cell I (A) Stack I

(A)Frequency

(KHz)Efficiency

3.430 0.619 91.2 91.8%

Figure 18. 6 Cell Charge Waveforms

Figure 19. Cell Discharge Current

Figure 20. Stack Discharge Current

Figure 21. Cell Charge Current

Figure 22. Stack Charge Current

CELL VOLTAGE2.6

2.000

CELL

CUR

RENT

4.500

4.500

3.500

3.000

2.500

5.000

3.2 3.4 3.6 3.8 4.02.8

dc2100a F17

3.0

6 CELLS12 CELLS

CELL VOLTAGE2.6

0.100

STAC

K CU

RREN

T

0.900

0.800

0.700

0.600

0.500

0.400

0.300

0.200

1.000

3.2 3.4 3.6 3.8 4.02.8

dc2100a F18

3.0

6 CELLS12 CELLS

CELL VOLTAGE2.6

2.000

CELL

CUR

RENT

4.500

4.000

3.500

3.000

2.500

5.000

3.2 3.4 3.6 3.8 4.02.8

dc2100a F19

3.0

6 CELLS12 CELLS

CELL VOLTAGE2.6

0.100

STAC

K CU

RREN

T

0.900

0.800

0.700

0.600

0.500

0.400

0.300

0.200

1.000

3.2 3.4 3.6 3.8 4.02.8

dc2100a F20

3.0

6 CELLS12 CELLS

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DEMO MANUAL DC2100A

Quick start proceDure

Figure 23. Two DC2100A SPI Connection

Figure 24. 24 Cell Interconnecting Stacks

Two or More Board Setup and Operation

When connecting two or more DC2100A boards together, the interface cables must be connected in sequence as shown in Figure 23 to avoid large inrush currents. When connecting more than one DC2100A’s into a system containing more than 12 batteries, DC2100A-D are used in locations 2 through 8. The PC USB port is connected to the bottom DC2100A-C (J19) board first and then the next DC2100A-D (J18) may be connected to the bottom DC2100A-C (J1) with a CAT-5 cable. CAT-5 cables are used for communication connects between all DC2100A demo boards in the system. J1 is the output port while J18 is the input port. The Top DC2100A-D must have the JP6 in position 1. All other DC2100A will have JP6 in position 0.

The 24 cell should be interconnected as shown in Figure 24 to allow balancing between the two 12 cell stacks.

Additional Circuitry

Additional circuitry has been added to increase the robust-ness of the design for fault insertions.

Cell 6 Wire Disconnection

A 10A 200V Schottky diode has been added for a high current path when the connection between battery cells is broken when a battery stack load is present. The 200V reverse voltage rating of the diode was selected to mini-mize the reverse leakage current with cell voltage of 4V. The 10A current rating was selected for its low forward voltage drop which will minimize the current in the parallel diode within the LTC3300-1 as well as surviving the fusing current of the 12A cell fuses on the DC2100A.

Two overvoltage detection circuits have been added to the design that will sense an overvoltage condition on Cell 6 and Cell 7 when a disconnection of the Cell 6 wire connection between Cell 6 + and Cell 7- of the battery stack occurs. When Cell 6 is being discharged and other

TOP BOARDDC2100A-D

BOTTOM BOARDDC2100A-C PCCAT-5 CABLE USB

J1 J18 J19

TOP6_T

BOT6_T

C12 CELL 24

CELL 18

CELL 13

CELL 12

CELL 6

CELL 1

CAT 5

C1

V–

DC2100A-D

J1 J18 J19

TOP6_T

BOT6_T

C12

C1

V–

DC2100A-C

CAT 5

INSTALL R23 0Ω

USB

PC

cells controlled by the U1, the lower LTC3300-1, and U2, the upper LTC3300-1 are operational, an overvoltage can occur on Cell 7. The overvoltage on Cell 7 will shut down the operation of Cell 7 – Cell 12 but Cell 1 – Cell 6 will continue to operate. The overvoltage sensing circuit Q4, D8, D10 and R56 will turn off Cell 1 – Cell 6 through the internal overvoltage protection circuit within the LTC3300-1 of U1.

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DEMO MANUAL DC2100A

Quick start proceDureA similar event occurs when Cell 6 is operating in the Charge Mode and other cells controlled by the U1, the lower LTC3300-1, and U2, the upper LTC3300-1 are operational, an overvoltage can occur on Cell 6. The overvoltage on Cell 6 will shut down the operation of Cell 1 – Cell 6 but Cell 7– Cell 12 will continue to operate. The overvoltage sensing circuit Q5, Q6, D12, D13 and R58 will turn off the operations of Cell 7 – Cell 12 through the internal overvoltage protection circuit within the LTC3300-1 of U2.

Cell Bypass Capacitors

The DC2100A contains bypass capacitors from the cell connections and the stack connections. These capacitors have a dual function of smoothing the high triangular current wave before the current travels down the inter-connecting wires to the cells and they also help balance the voltage between cells when hot-plugging cells in a random order. The RMS current rating of these capaci-tors is a critical parameter for these bypass capacitors as well as their physical size. These high triangular current waveforms produce an RMS current that passes through the capacitors which result in an internal heat rise. Larger physical size MLCC capacitors have higher RMS current rating due to their greater surface area to dissipate the heat rise. The capacitance of MLCC capacitors decreases with applied voltage and this must be taken into account when selecting the capacitance value. If a connection is lost during balancing, the differential voltage seen by the LTC3300-1 power circuit on each side of the break may increase or decrease depending on whether the power stage is charging or discharging and where the break occurred. The worst-case scenario is when the balanc-ers on each side of the break are active and balancing in opposite directions. Here the differential voltage will increase rapidly on one side and decrease rapidly on the other. The LTC3300-1 contains an overvoltage protection comparator which monitors the cell voltage and will shut down all balancers before the differential voltage on any cell input reaches the maximum absolute voltage rating.

Each cell node must have an equivalent capacitance across it to prevent an overvoltage condition when randomly connecting cells to the LTC3300-1 battery balancer cir-cuit. In addition to the smoothing capacitors across each balancer power circuit, there are capacitor across the Cx pins of the LTC3300-1 to reduce high frequency noise on these pins and capacitors across adjacent cells to act as a reservoir of charge for the cell’s MOSFET gate circuit. These reservoir capacitors must also be of equal value to maintain the balancing of voltage and a capacitor of 2x the value of the reservoir capacitors must be connected between C1 and V– of the lowest LTC3300-1 and from the top cell to the cell below it to insure an equal voltage across all cells when the battery stack is initially connected. Figures 25 and 26 detail these capacitor connections and their values. The reservoir capacitors must be large compared to the capacitors across the Cx pins to force the MOSFET gate driver charging current to flow through the reservoir capacitors. An effective 10:1 ratio between these cell capacitors was selected when considering that a capacitor across two cells would result in a 5:1 ratio.

Temperature Monitor

The DC2100A has the ability to monitor 12 temperature locations within the battery pack. The GUI Control Panel Window, Figure 29, displays these temperatures in two temperature displays, item 16 of Figure 29, for 6 tem-perature locations. The DC2100A contains a daughter card that can be used to connect twisted pair wires to twelve 10K NTC thermistors, Vishay NTHS0603N01N1002JE or equivalent, within the battery pack. The daughter card is shipped with fixed resistors to simulate temperature readings within a battery pack. These resistor values are selected to display the range of possible temperatures that may be measured. When connecting the daughter card to the actual thermistor, these resistors should be removed and the twisted pair wires connected to the turrets provided.

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DEMO MANUAL DC2100A

Figure 25. Bypass Capacitors on Lowest LTC3300-1

Figure 26. Bypass Capacitors on the Top LTC3300-1

Quick start proceDure

DC2100a F25

C5

G5P

I5P

C4

G4P

I4P

C3

G3P

I3P

C2

G2P

I2P

G4P

I4P

G3P

I3P

G2P

I2P

C1

C2

C3

C4

C5

C6

G5P

I5P

G6P

I6P

36

3738394041

35

3433

3231

30

29

2827

26

25

2019 21 22 23 24

C6K1µF16V0603

C5K1µF16V0603C4K1µF16V0603C3K1µF16V0603

C2K1µF16V0603

C6 G6P I6PBOOST+BOOST–BOOST

V– C1G1PI1PWDT

G1PI1PWDTA

SDO

C94.7µF16V0805

C114.7µF16V0805

C124.7µF16V0805

C104.7µF16V0805

C1K1µF16V0603

C2310µF10V0805

C144.7µF16V0805

42

C30.1µF16V0402

C40.22µF16V0603

CMMSH2-40R5 R6

6.81

D1D2CMMSH2-40

1

1

2

2

0 OPT

DC2100a F26

C5

G5P

I5P

C4

G4P

I4P

C3

G3P

I3P

C2

G2P

I2P

G10P

I10P

G9P

I9P

G8P

I8P

C7

C5

C8

C9

C10

C11

C12

G11P

I11P

G12P

I12P

36

3738394041

35

3433

3231

30

29

2827

26

25

2019 21 22 23 24

C12K1µF16V0603

C11K1µF16V0603C10K1µF16V0603C9K1µF16V0603

C8K1µF16V0603

C6 G6P I6PBOOST+BOOST–BOOST

V– C1G1PI1PWDT

G7PI7P

C6

WDTC

SDO

C154.7µF16V0805

C174.7µF16V0805

C184.7µF16V0805

C164.7µF16V0805

C2410µF10V0805

C7K1µF16V0603

C204.7µF16V0805

42

C70.1µF16V0402

C80.22µF16V0603

CMMSH2-40R9 R10

6.81

D3D4CMMSH2-40

1

1

2

2

0 OPT

C134.7µF16V0805

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DEMO MANUAL DC2100A

Figure 27. Thermistor Board Location

Quick start proceDure

16dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

1. CONTROL PANEL WINDOW – FIGURE 28 (CELLS TAB)

2. CONTROL PANEL WINDOW – FIGURE 29 (GLOBAL CHANNEL MONITOR TAB)

3. CALIBRATION DATA WINDOW - FIGURE 30

4. EVENT LOG WINDOW - FIGURE 31

5. GRAPH VIEW WINDOW - FIGURE 32

Figure 28. GUI Navigation

17dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

1. SYSTEM TREE VIEW

2. BOARD STATUS LED

3. SELECTED BOARD INDICATOR

4. BOARD IDENTIFICATION DISPLAY

5. DATA DISPLAY TABS

6. FIRMWARE UPGRADE BUTTON

7. CALIBRATION DATA WINDOW BUTTON

8. EVENT LOG WINDOW BUTTON

9. GRAPH VIEW WINDOW BUTTON

10. DATA LOGGING CONTROLS

11. NOMINAL BALANCE CURRENTS DISPLAY

12. OVER AND UNDER VOLTAGE SETTING CONTROLS

13. VOLTAGE DISPLAY CONTROLS

14. CELL STATE COLOR KEY

15. BOARD CONFIGURATION

16. LTC3300-1 REGISTER DISPLAY (2 INSTANCES FOR 2 ICS ON DC2100A)

17. BALANCE MODE SELECT BOXES (2 GROUPS, WITH 6 CELLS IN EACH GROUP)

18. TEMPERATURE DISPLAY (2 GROUPS, WITH 6 TEMPERATURES IN EACH GROUP)

19. MANUAL AND TIMED BALANCE CONTROLS

Figure 29. Control Panel Window – Cells Tab View

18dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

1. SYSTEM TREE VIEW

2. BOARD STATUS LED

3. SELECTED BOARD INDICATOR

4. BOARD IDENTIFICATION DISPLAY

5. DATA DISPLAY TABS

6. FIRMWARE UPGRADE BUTTON

7. CALIBRATION DATA WINDOW BUTTON

8. EVENT LOG WINDOW BUTTON

9. GRAPH VIEW WINDOW BUTTON

10. DATA LOGGING CONTROLS

11. NOMINAL BALANCE CURRENTS DISPLAY

12. OVER AND UNDER VOLTAGE SETTING CONTROLS

13. CELL VOLTAGE DISPLAY GRID

Figure 30. Control Panel Window – Global Channel Monitor View

19dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

Figure 31. Calibration Data Window

Figure 32. Event Log Window

1. CELL CAPACITY DATA GRID

2. BALANCE CURRENT DATA GRID

3. SELECTED BOARD INDICATOR

4. CANCEL BUTTON

5. CELL CAPACITY CALIBRATION CONTROLS

6. BALANCE CURRENT CALIBRATION CONTROLS

1. EVENT LOG DATA

2. LOG CLEAR CONTROL

3. LOG FILE CONTROL

20dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

1. GRAPH DISPLAY

2. STACK SUMMARY DATA SELECTION BOXES

3. BOARD SUMMARY DATA SELECTION BOXES

4. BOARD CELL VOLTAGE SELECTION BOXES

5. BOARD TEMPERATURE SELECTION BOXES

6. GRAPH DATA CONTROLS

7. SELECTED BOARD INDICATOR

Figure 33. Graph View Window

21dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 1

CELL 2

CELL 3

CELL 4

CELL 5

CELL 6

CELL 7

CELL 8

CELL 9

CELL 10

CELL 11

CELL 12

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

NOTE: ALL CONNECTIONS FROM EQUIPMENT SHOULD BE KELVIN CONNECTED DIRECTLY TO THE BOARD PINS WHICH THEY ARE CONNECTED TO ON THIS DIAGRAM AND ANY INPUT, OR OUTPUT, LEADS SHOULD BE TWISTED PAIR, WHERE POSSIBLE.

Figure 34. Proper Measurement Equipment Setup for Bi-Directional Cell Balancer

22dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 1

CELL 2

CELL 3

CELL 4

CELL 5

CELL 6

CELL 7

CELL 8

CELL 9

CELL 10

CELL 11

CELL 12VM6

VM8

VM5

0.01Ω

VM2

VM10.01Ω

0.10Ω

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

+ –

+ –

+ –

+ –

+–

VM3+–

VM4

0.1Ω

+ –

VM7+–

150Ω20WPS1

Figure 35. Proper Equipment Setup for Cell Balancer Efficiency Measurements

23dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 1

CELL 2

CELL 3

CELL 4

VM2

VM10.01Ω

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

+ –

+ –

VM3+–

VM4

0.1Ω

+ –

150Ω20WPS1

Figure 36. Proper Equipment Setup for Minimum Number (4) of Cell Efficiency Measurements

24dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 1

CELL 2

CELL 3

CELL 4

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENT

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Figure 37. Configuring the Board for 4 Cells

25dc2100afc

DEMO MANUAL DC2100A

CELL 2

CELL 1

CELL 3

CELL 4

CELL 5

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENT

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Quick start proceDure

Figure 38. Configuring the Board for 5 Cells

26dc2100afc

DEMO MANUAL DC2100A

CELL 3

CELL 2

CELL 1

CELL 4

CELL 5

CELL 6

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENT

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Quick start proceDure

Figure 39. Configuring the Board for 6 Cells

27dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 1

CELL 2

CELL 3

CELL 4

CELL 5

CELL 6

CELL 7

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Figure 40. Configuring the Board for 7 Cells

28dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 2

CELL 1

CELL 3

CELL 4

CELL 5

CELL 6

CELL 7

CELL 8

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Figure 41. Configuring the Board for 8 Cells

29dc2100afc

DEMO MANUAL DC2100A

CELL 2

CELL 1

CELL 3

CELL 4

CELL 6

CELL 5

CELL 7

CELL 8

CELL 9

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Quick start proceDure

Figure 42. Configuring the Board for 9 Cells

30dc2100afc

DEMO MANUAL DC2100A

CELL 3

CELL 2

CELL 1

CELL 4

CELL 5

CELL 7

CELL 6

CELL 8

CELL 9

CELL 10

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Quick start proceDure

Figure 43. Configuring the Board for 10 Cells

31dc2100afc

DEMO MANUAL DC2100A

Quick start proceDure

CELL 3

CELL 2

CELL 1

CELL 4

CELL 5

CELL 8

CELL 7

CELL 6

CELL 9

CELL 10

CELL 11

CURRENT PROBE CONNECTIONSFOR MEASURING STACK CURRENTS

CURRENT PROBE CONNECTIONSFOR MEASURING CELL CURRENTS

TO PC’S USB PORT

SYSTEM SETUP REQUIREMENTS:LFP OR LI-ION BATTERY >= 20AHrINTERNAL RESISTANCE < 20mΩRECOMMENDED BATTERY SIMULATOR:POWER SUPPLY 2V TO 5.0 V ±10AINTERCONNECT RESISTANCE < 20mΩ

Figure 44. Configuring the Board for 11 Cells

32dc2100afc

DEMO MANUAL DC2100A

pcB layout

Top Silk ScreenBottom Silk Screen

33dc2100afc

DEMO MANUAL DC2100A

Layer 1

pcB layout

Layer 2

34dc2100afc

DEMO MANUAL DC2100A

pcB layout

Layer 3 Layer 4

35dc2100afc

DEMO MANUAL DC2100A

parts listITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Required Circuit Components

1 24 C1A-C12A, C1B-C12B CAP.,X5R, 100µF, 6.3V, 20%, 1210 MURATA, GRM32ER60J107ME20L

2 24 C1E-C12E, C1F-C12F CAP.,X7R, 470PF, 100V, 10%, 0603 AVX, 06031C471KAT2A

3 12 C1G-C12G CAP.,X7R, 2200PF, 50V, 10%, 0402 MURATA, GRM155R71H222KA01D

4 12 C1H-C12H CAP.,X7R, 470PF, 50V, 10%, 0402 MURATA, GRM155R71H471KA01D

5 13 C1M-C13M CAP.,X7R, 0.01µF, 25V,10%, 0603 MURATA, GRM188R71E103KA01D

6 12 C1R-C12R CAP.,X7R, 2.2µF, 100V,10%, 1210 MURATA, GRM32ER72A225KA35L

7 14 C1, C5, C1K-C12K CAP.,X7R, 1.0µF, 16V,10%, 0603 MURATA, GRM188R71C105KA12D

8 13 C2, C6, C9-C18, C20 CAP.,X5R, 4.7µF, 16V,10%, 1206 MURATA, GRM31CR71C475KA01L

9 2 C3, C7 CAP, X7R, 0.1µF, 16V, 10% 0402 MURATA, GRM155R71C104KA88D

10 2 C4, C8 CAP.,X7R, 0.22µF, 16V,10%, 0603 TDK, C1608X7R1C224K

11 2 C19, C22 CAP., X7R, 470PF, 250VAC, 10%, 1808 MURATA, GA342QR7GF471KW01L

12 2 C23, C24 CAP.,X7R, 10µF, 10V,10%, 0805 MURATA, GRM21BR71A106K51L

13 2 C25, C26 CAP., X7R, 0.1µF, 100V, 10%, 0805 AVX, 08051C104KAT2A

14 4 C27, C33, C50, C51 CAP.,X7R, 0.1µF, 25V,10%, 0603 MURATA, GRM188R71E103KA01D

15 3 C28, C29, C31 CAP.,X5R, 1µF, 25V,10%, 0603 TDK, C1608X5R1E105K

16 3 C30, C39, C46 CAP, X5R, 10µF, 6.3V, 20%, 0603 MURATA, GRM188R71C105KA12D

17 6 C34-C38, C45 CAP, X7R, 0.1µF, 16V, 20%, 0402 AVX, 0402YC104MAT2A

18 1 C42 CAP.X5R, 047µF, 16V, 10%, 0402 TDK, C1005X5R1A474K

19 2 C43, C44 CAP,C0G, 22PF, 50V, 0402 MURATA, GRM1555C1H220JZ01D

20 2 C47, C48 CAP, X5R, 1.0µF, 6.3V, 10%, 0603 TAIYO YUDEN, JMK105BJ105KV

21 12 D1E-D12E DIODE, SBR,200, 10A, POWERDI5 DIODES INC, SBR10U200P5-13

22 4 D1-D4 SMD, SCHOTTKY CENTRAL SEMI, CMMSH2-40

23 3 D5-D7 SMD, SILICON SWITCHING DIODE VISHAY, RS07J

24 2 D8, D12 SMD, SILICON ZENER, 5.1V CENTRAL SEMI, CMHZ4689

25 2 D10, D13 SMD, SCHOTTKY, 70V CENTRAL SEMI, CMOD6263 TR

26 2 D9, D11 DIODE, ZENER 5.6V, 400MW, SOD323 PHILIPS, PDZ5.6B

27 1 D14 DIODE, SWITCHING, 1.0mm × 0.6mm DFN2 DIODES INC, 1N4448HLP

28 25 D1D-D12D, D1F-D12F, D15 LED,GREEN, CLEAR 0603 SMD LITE-ON, LTST-C190KGKT

29 1 D16 LED, YELLOW ORANGE CLEAR 0603 SMD LITE-ON, LTST-C190KFKT

30 13 F1-F12, F15 SMD, FUSE, 12.0A, FAST ACTING, 1206 BUSSMANN, 3216FF12-R

31 2 F13, F14 SMD, FUSE, 7.0A, FAST ACTING, 1206 BUSSMANN, 3216FF7-R

32 1 J1 CONN MOD JACK R/A 8P8C SHIELDED RJ45 WÜRTH, 615008140121

33 1 J19 USB, B RECEPTACLE, RT, SMT WÜRTH, 651005136521

34 1 J20 HEADER, 2mm, 2 × 3 TH HEADER WÜRTH, 62000621121

35 1 J21 HEADER, 2mm, 2 × 8 TH HEADER WÜRTH, 62501621621

36 1 J22 HEADER, 2mm, 2 × 2, TH HEADER MOLEX, 87831-0420

37 1 PB1 SWITCH TACTILE SPST-NO 0.05A 12V WÜRTH,  434111025826

38 12 R1A-R12A RES, CHIP, 20Ω, 1/4W, 5%,1206 VISHAY, CRCW120620R0JNEA

39 12 R1B-R12B OPT RES, CHIP,18Ω, 1/4W, 5%, 1206 VISHAY, CRCW120618R0JNEA

40 24 R1C-R12C, R1F-R12F RES, CHIP, 5.1Ω, 1/16W, 5%, 0402 VISHAY, CRCW04025R10JNED

41 24 R1G-R12G, R1H-R12H RES, CHIP, 20Ω, 1/16W, 5%, 0402 VISHAY, CRCW040220R0JNED

36dc2100afc

DEMO MANUAL DC2100A

ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

42 14 R1J-R12J, R56, R58 RES, CHIP, 2.0k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED

43 16 R1K-R13K, R27, R28, R37 RES, CHIP, 100Ω, 1/16W, 5%, 0402 VISHAY, CRCW0402100RJNED

44 12 R1L-R12L RES, CHIP, 470Ω, 1/16W, 5%, 0402 VISHAY, CRCW0402470RJNED

45 12 R1M-R12M RES, CHIP, 33Ω, 1W, 5%, 2512 VISHAY, CRCW251233R0JNEG

46 12 R1N-R12N RES, CHIP, 3.3k, 1/16W, 5%, 0402 VISHAY, CRCW04023K30JNED

47 1 R2 RES, CHIP, 0Ω, JUMPER, 1/16W, 5%, 0402 VISHAY, CRCW04020000Z0ED

48 2 R4, R8 RES, CHIP, 1.27M, 1/8W, 1%, 0805 VISHAY, CRCW08051M27FKED

49 2 R6, R10 RES,CHIP, 6.81Ω, 1/16W, 1%, 0402 VISHAY, CRCW04026R81FKED

50 8 R11-R18 RES, CHIP, 0Ω, 2512 VISHAY, CRCW25120000Z0EG

51 3 R19, R21, R24 RES, CHIP, 23.7k, 1/16W, 1%, 0402 VISHAY, CRCW040223K7FKED

52 2 R20, R22 RES, CHIP, 33.2K, 1/16W, 1%, 0402 VISHAY, CRCW040233K2FKED

53 2 R25, R26 RES, CHIP, 60.4Ω, 1/10W, 1%, 0603 VISHAY, CRCW060360R4FKED

54 2 R29, R63 RES, CHIP, 60.4Ω, 1/16W, 1%, 0402 VISHAY, CRCW040260R4FKED

55 4 R30, R31, R40, R41 RES, CHIP, 1.00M, 1/16W, 5%, 0402 VISHAY, CRCW04021M00JNED

56 2 R32, R39 RES, CHIP, 1.40k, 1/16W, 1%, 0402 VISHAY, CRCW04021K40JKED

57 2 R33, R38 RES, CHIP, 604Ω, 1/16W, 1%, 0402 VISHAY, CRCW0402604RJKED

58 5 R34, R36, R47, R61, R62 RES, CHIP, 2.0k, 1/16W, 5%, 0402 VISHAY, CRCW04022K00JNED

59 1 R35 RES, CHIP, 10k, 1/16W, 1%, 0402 VISHAY, CRCW040210K0FKED

60 6 R42, R43, R50-R52, R60 RES, CHIP, 10.0k, 1/16W, 5%, 0402 VISHAY, CRCW040210K0JNED

61 1 R44 RES, CHIP, 1.0Ω, 1/16W, 5%, 0402 VISHAY, CRCW04021R00JNED

62 1 R49 RES, CHIP, 1.0k, 1/16W, 5%, 0402 VISHAY, CRCW04021K00JNED

63 1 R53 RES, CHIP, 100k, 1/16W, 1%, 0402 VISHAY, CRCW0402100KFKED

64 2 R54, R55 RES, CHIP, 20Ω, 1/10W, 5%, 0603 VISHAY, CRCW060320R0JNEA

65 1 R59 RES, CHIP, 5.1k, 1/16W, 5%, 0402 VISHAY, CRCW04025K10JNED

66 1 R64 RES, CHIP, 2.49k, 1/16W, 1%, 0402 VISHAY, CRCW04022K49FKED

67 1 R65 RES, CHIP, 1.00M, 1/16W, 1%, 0402 VISHAY, CRCW04021M00FKED

68 1 R66 RES, CHIP, 301, 1/10W, 1%, 0603 VISHAY, CRCW0603301RFKED

69 12 RS1A-RS12A RES, CHIP, 5mΩ, 1W, 1%, 1206 SUSUMU, PRL1632-R005-F

70 12 RS1B-RS12B RES, CHIP, 10mΩ, 1W, 1%, 1206 SUSUMU, PRL1632-R010-F

71 12 Q1A-Q12A MOSFET, 100V, 0.0087Ω, 60A, POWERPAK-SO8 VISHAY, SiR882ADP-GE3

72 12 Q1B-Q12B MOSFET, 100V, 0.058Ω, 25A, POWERPAK-1212-8 VISHAY, SiS892ADN-GE3

73 12 Q1C-Q12C MOSFET, P-CHANNEL 30V, 80MΩ, MPAK INFINEON, BSS308PEH6327XT

74 2 Q1, Q2 MOSFET, 100V, 10Ω, SOT-323 DIODES INC, BSS123W-7-F

75 1 Q3 TRANS. NPN, 180V, 0.6A, SOT-223 CENTRAL SEMI, CZT5551

76 1 Q4 TRANS, PNP, 60V, SOT-23 CENTRAL SEMI, CMPT3906E

77 1 Q5 MOSFET, P-CHANNEL 50V, 4Ω, SOT-23 CENTRAL SEMI, CMPDM8002A

78 2 Q6, Q7 TRANS, NPN, 60V, SOT-23 CENTRAL SEMI, CMPT3904E

79 1 Q8 MOSFET, 100V, 10Ω, SOT-323 DIODES INC, BSS123W

80 12 T1-T12 TRANSFORMER, 1:1, 3.0µH, 10.8A WÜRTH, 750312504

81 1 T13, T15 TRANSFORMER, ISOLATION PULSE ENG., PE-68386NLT

82 1 T14 IND., CHOKE COM MODE 22µH, 1.2kΩ SMD TDK, ACT458-220-2P-TL003

parts list

37dc2100afc

DEMO MANUAL DC2100A

parts listITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

83 2 U1, U2 IC,SMT, BI-DIRECTIONAL BATTERY BALANCER LINEAR, LTC3300ILXE-1#PBF

84 1 U3 IC,SMT, BATTERY MONITOR LINEAR, LTC6804IG-2#PBF

85 1 U4 IC,SMT, 24AA64 MICROCHIP TECH. 24AA64T-I/OT

86 1 U5 IC,SMT, isospi ISOLATED COMM. INTERFACE LINEAR, LTC6820IMS#PBF

87 2 U6, U7 IC,SMT, 8-CHANNEL MUX, SSOP-16 LINEAR, LTC1380CGN#PBF

88 1 U8 MODULE, USB ISOLATOR LINEAR, LTM2884CY#PBF

89 1 U9 IC,SMT, MICRO POWER VLDO, 3.3V, SOT23-5 LINEAR, LT1761ES5-3.3#PBF

90 1 U10 14-Bit uc w/usb, 8mm × 8mm QFN44 MICROCHIP, PIC18F47J53-I/ML

91 1 Y1 12MHz CRYSTAL ECS INC, ECS-120-20-3X

Components and Hardware for Demo Board Only

1 15 E1-E15 TURRET, 0.09" MIL-MAX, 2501-2-00-80-00-00-07-0

2 1 J17 HEADER, SMD, 1 × 15, TIN PLATED, RT ANGLE HIROSE, DF3DZ-15P-2(21)

3 6 JP1-JP6 HEADER, 3PINS, 2mm WÜRTH, 62000311121

4 6 JP1-JP6 SHUNT 2mm WÜRTH, 60800213421

5 1 JP7 HEADER, 2.54mm, 3 × 6 THT VERT 18POS SAMTEC, TSW-106-07-L-T

6 1 JP7(mate) JP7 JUMPER BOARD LINEAR, DC2100-ASSY-1

7 1 J17(mate) DC2100A THERMISTOR BOARD LINEAR, DC2100A - THERM-1

8 10 STAND-OFF HEX, NYL 8/32 THR 0.25" L KEYSTONE, 1904A

9 10 SCREW, PAN PHILLIPS 8-32 1/4 NYL B&F FASTENER, NY PMS 8320025PH

Optional Components

1 0 C1C-C12C CAP., X5R, 100µF, 6.3V, 10%, 1210 MURATA, GRM32ER60J107ME20L

2 0 C1S-C12S, C1T-C12T CAP., X7R, 2.2µF, 100V, 10%, 1210 MURATA, GRM32ER72A225KA35L

3 0 C1L-C12L OPT CAP, OPT, 100V, 0805

4 0 C21, C32 OPT CAP., X7R, 100PF, 100V, 10%, 0603 AVX, 06031C101KAT

5 0 C40 OPT CAP, X5R, 10µF, 6.3V, 20% 0603 MURATA, GRM188R60J106ME47D

6 0 C49 CAP, OPT, 16V, 0402

7 0 D1A-D12A OPT DIODE, SCHOTTKY 2.0A 60V HI EFFICIENCY DIODES INC, DFLS260-7

8 0 D1B-D12B OPT DIODE, SCHOTTKY 100V 1A BARRIER RECTIFIER POWERDI123

DIODES INC, DFLS1100-7

9 0 D1C-D12C OPT SMD, SCHOTTKY CENTRAL SEMI, CMOSH-4E

10 0 R1, R7 OPT RES, CHIP, 1.00M, 1/16W, 5%, 0402 VISHAY, CRCW04021M00JNED

11 0 R3, R5, R9, R23 OPT RES, CHIP, 0Ω, 0402 VISHAY, CRCW04020000Z0ED

12 0 R45, R46, R48, R57 OPT RES, CHIP, 0Ω, 2512 VISHAY, CRCW25120000Z0EF

13 0 J2, J3, J4, J16 OPT HEADER 1 × 2 WEIDMULLER, 179313000_SC

14 0 J2, J3, J4, J16 (mate) OPT SOCKET 1 × 2 WEIDMULLER, 1792770000

15 0 J5-J15 OPT HEADER, 1 × 3 WEIDMULLER, 179314000_SC

16 0 J5-J15 (mate) OPT SOCKET, 1 × 3 WEIDMULLER, 1792780000

38dc2100afc

DEMO MANUAL DC2100A

parts listITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER

Thermistor Board

1 1 J1 CONN RECEPT 15POS 2MM VERT TIN HIROSE, DF3-15S-2DSA(25)

2 1 R1 RES, CHIP, 340k, 1/16W, 1%, 0402 VISHAY, CRCW0402340KFKED

3 1 R2 RES, CHIP, 54.9k, 1/16W, 1%, 0402 VISHAY, CRCW040254K9FKED

4 1 R3 RES, CHIP, 20k, 1/16W, 1%, 0402 VISHAY, CRCW040220K0FKED

5 1 R4 RES, CHIP, 8.06k, 1/16W, 1%, 0402 VISHAY, CRCW04028K06FKED

6 1 R5 RES, CHIP, 5.36k, 1/16W, 1%, 0402 VISHAY, CRCW04025K36FKED

7 1 R6 RES, CHIP, 3.65k,1/16W,1%, 0402 VISHAY, CRCW04023K65FKED

8 1 R7 RES, CHIP, 2.49k,1/16W,1%, 0402 VISHAY, CRCW04022K49FKED

9 1 R8 RES, CHIP, 1.24k,1/16W,1%, 0402 VISHAY, CRCW04021K24FKED

10 1 R9 RES, CHIP, 909Ω,1/16W,1%, 0402 VISHAY, CRCW0402909RFKED

11 1 R10 RES, CHIP, 681Ω,1/16W,1%, 0402 VISHAY, CRCW0402681RFKED

12 1 R11 RES, CHIP, 301Ω,1/16W,1%, 0402 VISHAY, CRCW0402301RFKED

13 1 R12 RES, CHIP, 147Ω,1/16W,1%, 0402 VISHAY, CRCW0402147RFKED

14 14 E1-E14 TURRET, 0.061 DIA MILL MAX, 2308-2-00-80-00-00-07-0

39dc2100afc

DEMO MANUAL DC2100A

schematic Diagram5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

*

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

OPT

OPT

OPT

OPT

*

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

*

OPT

OPT

OPT

*OP

T

*

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

*

*PLAC

E RC

CLO

SE TO

LTC3

300

*

OPT

*

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

*

OPT

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

*

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

*

DC21

00A

- A /

BDC

2100

A - C

/ D

RS1A

-RS1

2ARS

1B-R

S12B

R1B-

R12B

C1F-

C12F

0.00

80.

005

0.01

60.

010

NPNP

1847

0pF

***

*

**

**

**

**

*

C5

C4

C5

V-

BOT6

_TS

V-

C3

BOT6

_TS

V-

C6

V-

V-

C4

V-

C2

C3

C1

C2

C1

BOT6

_TS

BOT6

_TS

BOT6

_TS

BOT6

_TS

C5

I3S

C2

I4P

C6

I5P

I3P I2P

C1

G5S

I5S

G3S

G6P

G1P

G6S

BOT6

_TS

G3P

I1P

C4

G5P

I2S

C3

G2S

G4P

G1S

V-

I4S

I6P

I1S

G2P

G4S

I6S

REVI

SION

HIS

TORY

DESC

RIPT

ION

DATE

APPR

OVED

ECO

REV

J.DR

EWPR

ODUC

TION

-4

3 - 1

1 - 1

4

REVI

SION

HIS

TORY

DESC

RIPT

ION

DATE

APPR

OVED

ECO

REV

J.DR

EWPR

ODUC

TION

-4

3 - 1

1 - 1

4

REVI

SION

HIS

TORY

DESC

RIPT

ION

DATE

APPR

OVED

ECO

REV

J.DR

EWPR

ODUC

TION

-4

3 - 1

1 - 1

4

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

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Use

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NOT

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DEM

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RCUI

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HIGH

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LTC3

300I

LXE-

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TC68

04IG

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NC

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3 - 1

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4

MUL

TICE

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SIZE

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Fax:

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itas,

CA 95

035

Phon

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08)4

32-1

900

1630

McC

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Conf

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tial-F

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Use

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CUST

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NOT

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OLOG

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SIZE

DATE

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)434

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Phon

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www.

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r.com 4

DEM

O CI

RCUI

T 21

00A

16

HIGH

EFF

ICIE

NCY

BIDI

RECT

IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

04IG

-2

NC

J. DR

EW

3 - 1

1 - 1

4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

R1G

20R1G

20

C5F

470p

F10

0V06

03C5F

470p

F10

0V06

03

C2A

100u

F

1210

6.3V

C2A

100u

F

1210

6.3V

D1E

SBR1

0U20

0P5

D1E

SBR1

0U20

0P5

213

R2G

20R2G

20

D2E

SBR1

0U20

0P5

D2E

SBR1

0U20

0P5

213

C6G

2.2nF

C6G

2.2nF

C5B

100u

F

1210

6.3V

C5B

100u

F

1210

6.3V

C4C

100u

F

1210

6.3V

C4C

100u

F

1210

6.3V

R4H 20

R4H 20

RS1A

0.005

RS1A

0.005

21

Q4A

SiR8

82DP

Q4A

SiR8

82DP

6

4

23

18

5

7

R5B

18 1206

R5B

18 1206

R3B

18 1206

R3B

18 1206

C4T

2.2uF

1210 100V

C4T

2.2uF

1210 100V

Q5A

SiR8

82DPQ5

ASi

R882

DP

6

4

23

18

5

7

RS3B

0.010

RS3B

0.010

21

Q6A

SiR8

82DP

Q6A

SiR8

82DP

6

4

23

18

5

7

C5C

100u

F

1210

6.3V

C5C

100u

F

1210

6.3V

C4G

2.2nF

C4G

2.2nF

C6T

2.2uF

1210

100V

C6T

2.2uF

1210

100V

RS5A

0.005

RS5A

0.005

21

C1T

2.2uF

1210

100VC1T

2.2uF

1210

100V

C5R

2.2uF

1210

100V

C5R

2.2uF

1210

100V

C2R

2.2uF

1210

100V

C2R

2.2uF

1210

100V

R2A

20 1206

R2A

20 1206

C3S

2.2uF

1210

100V

C3S

2.2uF

1210

100V

RS4A

0.005

RS4A

0.005

21R4A

20 1206

R4A

20 1206

C1H

470p

FC1

H47

0pF

C1B

100u

F

1210

6.3V

C1B

100u

F

1210

6.3V

R1H

20R1H

20

C5T

2.2uF

1210

100V

C5T

2.2uF

1210

100V

D3B

DFLS

1100

D3B

DFLS

1100

21

D5C

CMOS

H-4E

D5C

CMOS

H-4E

21

C3A

100u

F

1210

6.3V

C3A

100u

F

1210

6.3V

R2C 5.1R2C 5.1

D3A

DFLS

260

D3A

DFLS

260

21

E8

BOT6

_TS

E8

BOT6

_TS

Q3B

SiS8

92DN

Q3B

SiS8

92DN

6

4

23

18

5

7

T1

WUR

TH-75

0312

504

T1

WUR

TH-75

0312

504

101 2 9

6 7 4 5

C4H

470p

FC4

H47

0pF

RS5B

0.010

RS5B

0.010

21

C4E

470p

F10

0V06

03

C4E

470p

F10

0V06

03

R5H

20R5H

20

J2 1793

1300

0_SC

J2 1793

1300

0_SC

BOT6

_TS

1BO

T6_T

S2

C6A

100u

F12

106.3

V

C6A

100u

F12

106.3

V

C3F

470p

F10

0V06

03C3F

470p

F10

0V06

03

C4A

100u

F

1210

6.3V

C4A

100u

F

1210

6.3V

R6A 20 1206

R6A 20 1206

R3F

5.1R3F

5.1

D5A

DFLS

260

D5A

DFLS

260

21

C1S

2.2uF

1210

100VC1S

2.2uF

1210

100V

R5F 5.1R5F 5.1

Q1B

SiS8

92DN

Q1B

SiS8

92DN

6

4

23

18

5

7

D5E

SBR1

0U20

0P5

D5E

SBR1

0U20

0P5

213

R4C 5.1R4C 5.1

C4F

470p

F10

0V06

03C4F

470p

F10

0V06

03

D2A

DFLS

260

D2A

DFLS

260

21

C6S

2.2uF

1210

100V

C6S

2.2uF

1210

100V

C2C

100u

F

1210

6.3V

C2C

100u

F

1210

6.3V

D6B

DFLS

1100

D6B

DFLS

1100

21

C2S

2.2uF

1210

100V

C2S

2.2uF

1210

100V

C2F

470p

F10

0V06

03

C2F

470p

F10

0V06

03

C2B

100u

F

1210

6.3V

C2B

100u

F

1210

6.3V

C5S

2.2uF

1210

100V

C5S

2.2uF

1210

100V

D1C

CMOS

H-4E

D1C

CMOS

H-4E

21

R1A 20 12

06

R1A 20 12

06

C2G

2.2nF

C2G

2.2nF

D3E

SBR1

0U20

0P5

D3E

SBR1

0U20

0P5

213

D2C

CMOS

H-4E

D2C

CMOS

H-4E

21

Q3A

SiR8

82DP

Q3A

SiR8

82DP

64

23

18

5

7

R4F 5.1R4F 5.1

C4S

2.2uF

1210

100V

C4S

2.2uF

1210

100V

C5E

470p

F10

0V06

03

C5E

470p

F10

0V06

03

C6E

470p

F10

0V06

03

C6E

470p

F10

0V06

03

C1A

100u

F

1210

6.3V

C1A

100u

F

1210

6.3V

R2F 5.1R2F 5.1

T3

WUR

TH-75

0312

504

T3

WUR

TH-75

0312

504

101 2 9

6 7 4 5

R6B

18 1206R6

B

18 1206

R6C 5.1R6C 5.1

C2H

470p

FC2

H47

0pF

F13

7A 1206

F13

7A 1206

R6F

5.1R6F

5.1

C3R

2.2uF

1210

100V

C3R

2.2uF

1210

100V

T2

WUR

TH-75

0312

504

T2

WUR

TH-75

0312

504

101 2 9

6 7 4 5

R5G

20R5G

20

C3T

2.2uF

1210

100VC3

T2.2

uF12

1010

0V

RS6A

0.005

RS6A

0.005

21

R1B

18 1206

R1B

18 1206

RS6B

0.010

RS6B

0.010

21

D6C

CMOS

H-4E

D6C

CMOS

H-4E

21

C3E

470p

F

100V 0603

C3E

470p

F

100V 0603

RS3A

0.005

RS3A

0.005

21

C1F

470p

F10

0V06

03C1F

470p

F10

0V06

03

R3H

20R3H

20C3

H47

0pF

C3H

470p

F

R5A

20 1206

R5A

20 1206

D4B

DFLS

1100

D4B

DFLS

1100

21

R2B

18 1206

R2B

18 1206

C1E

470p

F10

0V06

03

C1E

470p

F10

0V06

03

R5C 5.1R5C 5.1

C4B

100u

F

1210

6.3V

C4B

100u

F

1210

6.3V

Q2A

SiR8

82DPQ2

ASi

R882

DP

6

4

23

18

5

7

Q1A

SiR8

82DP

Q1A

SiR8

82DP

6

4

23

18

5

7

Q6B

SiS8

92DN

Q6B

SiS8

92DN

6

4

23

18

5

7

D3C

CMOS

H-4E

D3C

CMOS

H-4E

21

D4C

CMOS

H-4E

D4C

CMOS

H-4E

21

D6E

SBR1

0U20

0P5

D6E

SBR1

0U20

0P5

213

Q4B

SiS8

92DN

Q4B

SiS8

92DN

6

4

23

18

5

7

D1A

DFLS

260

D1A

DFLS

260

21

C5A

100u

F

1210

6.3V

C5A

100u

F

1210

6.3V

C3B

100u

F

1210

6.3V

C3B

100u

F

1210

6.3V

T6

WUR

TH-75

0312

504

T6

WUR

TH-75

0312

504

101 2 9

6 7 4 5

C6F

470p

F10

0V06

03C6F

470p

F10

0V06

03

C6B

100u

F

1210

6.3V

C6B

100u

F

1210

6.3V

R1C 5.1R1C 5.1

R2H

20R2H

20

C6H

470p

FC6

H47

0pF

T4

WUR

TH-75

0312

504

T4

WUR

TH-75

0312

504

101 2 9

6 7 4 5

RS4B

0.010

RS4B

0.010

21

C2T

2.2uF

1210

100V

C2T

2.2uF

1210

100V

R6G

20R6

G20

C2E

470p

F

100V

0603

C2E

470p

F

100V

0603

C5G

2.2nF

C5G

2.2nF

C1G

2.2nF

C1G

2.2nF

RS1B

0.010

RS1B

0.010

21

R3G

20R3G

20

C4R

2.2uF

1210

100V

C4R

2.2uF

1210

100V

C6R

2.2uF

1210

100V

C6R

2.2uF

1210

100V

R3C 5.1R3C 5.1

D4A

DFLS

260

D4A

DFLS

260

21

D6A

DFLS

260

D6A

DFLS

260

21

Q5B

SiS8

92DN

Q5B

SiS8

92DN

6

4

23

18

5

7

R3A

20 1206

R3A

20 1206

C3G

2.2nF

C3G

2.2nF

R6H 20R6H 20

D5B

DFLS

1100

D5B

DFLS

1100

21

R4G 20R4G 20

RS2A

0.005

RS2A

0.005

21

D4E

SBR1

0U20

0P5

D4E

SBR1

0U20

0P5

213

D1B

DFLS

1100D1B

DFLS

1100

21

C5H

470p

FC5

H47

0pF

C3C

100u

F

1210

6.3V

C3C

100u

F

1210

6.3V

C1R

2.2uF

1210

100V

C1R

2.2uF

1210

100V

R4B

18 1206

R4B

18 1206

D2B

DFLS

1100

D2B

DFLS

1100

21

RS2B

0.010

RS2B

0.010

21

T5

WUR

TH-75

0312

504

T5

WUR

TH-75

0312

504

101 2 9

6 7 4 5

R1F

5.1R1F

5.1

C6C

100u

F

1210

6.3V

C6C

100u

F

1210

6.3V

C1C

100u

F

1210

6.3V

C1C

100u

F

1210

6.3V

Q2B

SiS8

92DN

Q2B

SiS8

92DN

6

4

23

18

5

7

40dc2100afc

DEMO MANUAL DC2100A

schematic Diagram5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

OPT

OPT

OPT

*

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

*

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

*PL

ACE

RC C

LOSE

TO LT

C330

0

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

*

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

PLAC

E RC

CLO

SE TO

LTC3

300

*

OPT

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

*

OPT

PLAC

E RC

CLO

SE TO

LTC3

300

OPT

OPT

OPT

OPT

*

OPT

OPT

OPT

*

OPT

OPT

*

OPT

OPT

OPT

*

OPT

OPT

OPT

*

OPT

OPT

OPT

*

**

**

**

**

**

**

RS1A

-RS1

2ARS

1B-R

S12B

0.00

8R1

B-R1

2B

0.00

5

C1F-

C12F

0.01

60.

010

NPNP

18DC

2100

A - A

/ B

DC21

00A

- C /

D47

0pF

*

TOP6

_TS

C11

TOP6

_TS

C6

C10

TOP6

_TS

C9

TOP6

_TS

C7

C11

C6

C9

C6

C8

C6

C6

C8

TOP6

_TS

C6

C10

C12

C7

TOP6

_TS

I7P

G10P

G8P

I7S

G11S

G9S

I10P

C9

I11S

C8

G10S

G11P

G9P

C10

I8P

I12P

I9P

C12

I11P

G12P

I9S

C7

C11

I12S

G7P

TOP6

_TS

I10S

G7S

C6

G12S

G8S

I8S

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

y

CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

DE A

BES

T EF

FORT

TO

DESI

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CIRC

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THAT

MEE

TS C

USTO

MER-

SUPP

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SPE

CIFI

CATI

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HOW

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, IT R

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NS T

HE C

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MER'

S RE

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SIBI

LITY

TO

VERI

FY P

ROPE

R AN

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LIAB

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TION

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LAP

PLIC

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N. C

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SUB

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N AN

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INTE

DCI

RCUI

T BO

ARD

LAYO

UT M

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FICA

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AFF

ECT

CIRC

UIT

PERF

ORMA

NCE

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ELIA

BILI

TY. C

ONTA

CT L

INEA

RTE

CHNO

LOGY

APP

LICA

TION

S EN

GINE

ERIN

G FO

R AS

SIST

ANCE

.

THIS

CIR

CUIT

IS P

ROPR

IETA

RY T

O LI

NEAR

TEC

HNOL

OGY

AND

SCHE

MAT

IC

SUPP

LIED

FOR

USE

WIT

H LI

NEAR

TEC

HNOL

OGY

PART

S.SC

ALE

= NO

NE

www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

26

HIGH

EFF

ICIE

NCY

BIDI

RECT

IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

04IG

-2

NC

J. DR

EW

3 - 1

1 - 1

4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

y

CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

DE A

BES

T EF

FORT

TO

DESI

GN A

CIRC

UIT

THAT

MEE

TS C

USTO

MER-

SUPP

LIED

SPE

CIFI

CATI

ONS;

HOW

EVER

, IT R

EMAI

NS T

HE C

USTO

MER'

S RE

SPON

SIBI

LITY

TO

VERI

FY P

ROPE

R AN

D RE

LIAB

LE O

PERA

TION

IN T

HE A

CTUA

LAP

PLIC

ATIO

N. C

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INTE

DCI

RCUI

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LAYO

UT M

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FICA

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AFF

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CIRC

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PERF

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BILI

TY. C

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RTE

CHNO

LOGY

APP

LICA

TION

S EN

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ERIN

G FO

R AS

SIST

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THIS

CIR

CUIT

IS P

ROPR

IETA

RY T

O LI

NEAR

TEC

HNOL

OGY

AND

SCHE

MAT

IC

SUPP

LIED

FOR

USE

WIT

H LI

NEAR

TEC

HNOL

OGY

PART

S.SC

ALE

= NO

NE

www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

26

HIGH

EFF

ICIE

NCY

BIDI

RECT

IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

04IG

-2

NC

J. DR

EW

3 - 1

1 - 1

4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

y

CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

DE A

BES

T EF

FORT

TO

DESI

GN A

CIRC

UIT

THAT

MEE

TS C

USTO

MER-

SUPP

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SPE

CIFI

CATI

ONS;

HOW

EVER

, IT R

EMAI

NS T

HE C

USTO

MER'

S RE

SPON

SIBI

LITY

TO

VERI

FY P

ROPE

R AN

D RE

LIAB

LE O

PERA

TION

IN T

HE A

CTUA

LAP

PLIC

ATIO

N. C

OMPO

NENT

SUB

STIT

UTIO

N AN

D PR

INTE

DCI

RCUI

T BO

ARD

LAYO

UT M

AY S

IGNI

FICA

NTLY

AFF

ECT

CIRC

UIT

PERF

ORMA

NCE

OR R

ELIA

BILI

TY. C

ONTA

CT L

INEA

RTE

CHNO

LOGY

APP

LICA

TION

S EN

GINE

ERIN

G FO

R AS

SIST

ANCE

.

THIS

CIR

CUIT

IS P

ROPR

IETA

RY T

O LI

NEAR

TEC

HNOL

OGY

AND

SCHE

MAT

IC

SUPP

LIED

FOR

USE

WIT

H LI

NEAR

TEC

HNOL

OGY

PART

S.SC

ALE

= NO

NE

www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

26

HIGH

EFF

ICIE

NCY

BIDI

RECT

IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

04IG

-2

NC

J. DR

EW

3 - 1

1 - 1

4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

RS10

A0.0

05RS

10A

0.005

21

C7E

470p

F10

0V06

03

C7E

470p

F10

0V06

03

T8

WUR

TH-75

0312

504

T8

WUR

TH-75

0312

504

101 2 9

6 7 4 5

C10E

470p

F10

0V06

03

C10E

470p

F10

0V06

03

D9C

CMOS

H-4E

D9C

CMOS

H-4E

21

T11

WUR

TH-75

0312

504

T11

WUR

TH-75

0312

504

101 2 9

6 7 4 5

RS9A

0.005

RS9A

0.005

21

C9R

2.2uF

1210

100V

C9R

2.2uF

1210

100V

R9A

20 1206

R9A

20 1206

J3 1793

1300

0_SC

J3 1793

1300

0_SC

TOP6

_TS

1TO

P6_T

S2

Q9A

SiR8

82DP

Q9A

SiR8

82DP

6

4

23

18

5

7

F14

7A 1206

F14

7A 1206

C9H

470p

FC9

H47

0pF

R9C 5.1R9C 5.1

R10C 5.1R10C 5.1

R7C 5.1R7C 5.1

C7F

470p

F10

0V06

03C7F

470p

F10

0V06

03

D12B

DFLS

1100

D12B

DFLS

1100

21

D10E

SBR1

0U20

0P5

D10E

SBR1

0U20

0P5

213

R12C 5.1R12C 5.1

R7F 5.1

R7F 5.1

R8B

18 1206

R8B

18 1206

R11B 18 1206

R11B 18 1206

R9G

20R9G

20

C9F

470p

F10

0V06

03C9F

470p

F10

0V06

03

C8C

100u

F

1210

6.3V

C8C

100u

F

1210

6.3V

R10H 20R10H 20

C7G

2.2nF

C7G

2.2nF

D11C

CMOS

H-4E

D11C

CMOS

H-4E

21

R12A 20 1206

R12A 20 1206

R10F 5.1R10F 5.1

D11B

DFLS

1100

D11B

DFLS

1100

21

C9S

2.2uF

1210

100V

C9S

2.2uF

1210

100V

D7B

DFLS

1100

D7B

DFLS

1100

21

R11G 20R11G 20

D12A

DFLS

260

D12A

DFLS

260

21

C9T

2.2uF

1210

100VC9

T2.2

uF12

1010

0V

R11A

20 1206

R11A

20 1206

C10B

100u

F

1210

6.3V

C10B

100u

F

1210

6.3V

C11E

470p

F10

0V06

03

C11E

470p

F10

0V06

03

R11H

20R11H

20

C8G

2.2nF

C8G

2.2nF

Q11A

SiR8

82DPQ1

1ASi

R882

DP

6

4

23

18

5

7

T12

WUR

TH-75

0312

504

T12

WUR

TH-75

0312

504

101 2 9

6 7 4 5

C7A

100u

F

1210

6.3V

C7A

100u

F

1210

6.3V

D11E

SBR1

0U20

0P5

D11E

SBR1

0U20

0P5

213

R10G 20R10G 20

C10C

100u

F

1210

6.3V

C10C

100u

F

1210

6.3V

C11H

470p

FC1

1H47

0pF

C12H

470p

FC1

2H47

0pF

T10

WUR

TH-75

0312

504

T10

WUR

TH-75

0312

504

101 2 9

6 7 4 5

R8A

20 1206

R8A

20 1206

D9A

DFLS

260

D9A

DFLS

260

21

C12B

100u

F

1210

6.3V

C12B

100u

F

1210

6.3V

Q12A

SiR8

82DP

Q12A

SiR8

82DP

6

4

23

18

5

7

C12R

2.2uF

1210

100V

C12R

2.2uF

1210

100V

R10B

18 1206

R10B

18 1206

D12C

CMOS

H-4E

D12C

CMOS

H-4E

21

Q8A

SiR8

82DPQ8

ASi

R882

DP

6

4

23

18

5

7

C10T

2.2uF

1210 100V

C10T

2.2uF

1210 100V

R7G

20R7G

20R8G 20R8G 20

R8H

20R8H

20

C9E

470p

F

100V 0603

C9E

470p

F

100V 0603

C10S

2.2uF

1210

100V

C10S

2.2uF

1210

100V

C10H

470p

FC1

0H47

0pF

R12F 5.1R12F 5.1

C8R

2.2uF

1210

100V

C8R

2.2uF

1210

100V

C10A

100u

F

1210

6.3V

C10A

100u

F

1210

6.3V

D11A

DFLS

260

D11A

DFLS

260

21

D8E

SBR1

0U20

0P5

D8E

SBR1

0U20

0P5

213

R9F 5.1R9F 5.1

C12T

2.2uF

1210

100V

C12T

2.2uF

1210

100V

C8E

470p

F

100V

0603

C8E

470p

F

100V

0603

RS10

B0.0

10RS

10B

0.010

21

C9C

100u

F

1210

6.3V

C9C

100u

F

1210

6.3V

Q10B

SiS8

92DN

Q10B

SiS8

92DN

6

4

23

18

5

7

D7C

CMOS

H-4E

D7C

CMOS

H-4E

21

D7E

SBR1

0U20

0P5

D7E

SBR1

0U20

0P5

213

Q7A

SiR8

82DP

Q7A

SiR8

82DP

6

4

23

18

5

7

C11B

100u

F

1210

6.3V

C11B

100u

F

1210

6.3V

Q9B

SiS8

92DN

Q9B

SiS8

92DN

6

4

23

18

5

7

D9B

DFLS

1100

D9B

DFLS

1100

21

C7T

2.2uF

1210

100VC7T

2.2uF

1210

100V

RS7A

0.005

RS7A

0.005

21

R12G 20R12G 20

E15

TOP6

_TS

E15

TOP6

_TS

C11F

470p

F10

0V06

03

C11F

470p

F10

0V06

03

C11R

2.2uF

1210

100V

C11R

2.2uF

1210

100V

C8B

100u

F

1210

6.3V

C8B

100u

F

1210

6.3V

R7A

20 1206

R7A

20 1206

RS7B

0.010

RS7B

0.010

21

RS11

B0.0

10RS

11B

0.010

21

C8T

2.2uF

1210

100V

C8T

2.2uF

1210

100V

C12A

100u

F12

106.3

V

C12A

100u

F12

106.3

V

C11C

100u

F

1210

6.3V

C11C

100u

F

1210

6.3V

D8C

CMOS

H-4E

D8C

CMOS

H-4E

21

C8A

100u

F

1210

6.3V

C8A

100u

F

1210

6.3V

D8B

DFLS

1100

D8B

DFLS

1100

21C8

F

470p

F10

0V06

03C8F

470p

F10

0V06

03

C8S

2.2uF

1210

100V

C8S

2.2uF

1210

100V

C7R

2.2uF

1210

100V

C7R

2.2uF

1210

100V

C10R

2.2uF

1210

100V

C10R

2.2uF

1210

100V

D7A

DFLS

260

D7A

DFLS

260

21

C12G

2.2nF

C12G

2.2nF

C11G

2.2nF

C11G

2.2nF

Q7B

SiS8

92DN

Q7B

SiS8

92DN

6

4

23

18

5

7

C7B

100u

F

1210

6.3V

C7B

100u

F

1210

6.3V

R8F 5.1R8F 5.1

C12C

100u

F

1210

6.3V

C12C

100u

F

1210

6.3V

R8C 5.1R8C 5.1

C8H

470p

FC8

H47

0pF

RS8A

0.005

RS8A

0.005

21

RS9B

0.010

RS9B

0.010

21

Q12B

SiS8

92DN

Q12B

SiS8

92DN

6

4

23

18

5

7

RS8B

0.010

RS8B

0.010

21

C12S

2.2uF

1210

100V

C12S

2.2uF

1210

100V

C12E 47

0pF

100V

0603

C12E 47

0pF

100V

0603

C11T

2.2uF

1210

100V

C11T

2.2uF

1210

100V

R11F 5.1R11F 5.1

C10F

470p

F10

0V06

03

C10F

470p

F10

0V06

03

Q10A

SiR8

82DP

Q10A

SiR8

82DP

6

4

23

18

5

7

R12B

18 1206

R12B

18 1206

T7

WUR

TH-75

0312

504

T7

WUR

TH-75

0312

504

101 2 9

6 7 4 5

R7H

20R7H

20

D9E

SBR1

0U20

0P5

D9E

SBR1

0U20

0P5

213

Q8B

SiS8

92DN

Q8B

SiS8

92DN

6

4

23

18

5

7

R10A 20 1206

R10A 20 1206

C10G

2.2nF

C10G

2.2nF

C7C

100u

F

1210

6.3V

C7C

100u

F

1210

6.3V

R9H 20R9H 20

R11C 5.1R11C 5.1

C12F

470p

F10

0V06

03C12F

470p

F10

0V06

03

C7H

470p

FC7

H47

0pF

D12E

SBR1

0U20

0P5

D12E

SBR1

0U20

0P5

213

D10B

DFLS

1100

D10B

DFLS

1100

21

C9A

100u

F

1210

6.3V

C9A

100u

F

1210

6.3V

RS12

B0.0

10RS

12B

0.010

21

T9

WUR

TH-75

0312

504

T9

WUR

TH-75

0312

504

101 2 9

6 7 4 5

C9B

100u

F

1210

6.3V

C9B

100u

F

1210

6.3V

RS11

A0.0

05RS

11A

0.005

21

C11S

2.2uF

1210

100V

C11S

2.2uF

1210

100V

Q11B

SiS8

92DN

Q11B

SiS8

92DN

6

4

23

18

5

7

C9G

2.2nF

C9G

2.2nF

D8A

DFLS

260

D8A

DFLS

260

21

R9B

18 1206

R9B

18 1206

R7B

18 1206

R7B

18 1206

C11A

100u

F

1210

6.3V

C11A

100u

F

1210

6.3V

R12H 20R12H 20

RS12

A0.0

05RS

12A

0.005

21

D10C

CMOS

H-4E

D10C

CMOS

H-4E

21

C7S

2.2uF

1210

100VC7S

2.2uF

1210

100V

D10A

DFLS

260

D10A

DFLS

260

21

41dc2100afc

DEMO MANUAL DC2100A

schematic Diagram5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

2512

2512

2010

2512

2512

2512 25

12

OPT

From

U3

Pin

32

0402

0402

From

U3

Pin

33

From

U3 P

in 29

OPT

OPT

OPT

2512

OPT

OPT

R19

R20

15.4

kR2

1

23.7

k

R24

20.5

k33

.2k

15.4

k15

.4k

23.7

KDC

2100

A - A

/ B

DC21

00A

- C /

D

R22

20.5

kR4

R884

5k84

5k1.

27M

33.2

k23

.7K

1.27

M

*

*

**

*

*

*

*

V-

VREG

2

WDTA

WDTC

C6

V-

C6

C6

C5

VREG

1

C7 C6

C5

WDT

A

WDT

C

C6

C6

V-

C12

C6

I2SI3P

C10

SDIO

C5

I9SI11S

G7S

G4S

C9

C3

I1S

G10S

G3S

I5P

C6

G2S

G11P

G8S I7S

I10S

I5S

C2G1

SI6S

G1P

C11

I3S

I1P

I11P

G4P

I8P

G9S

I4S

I10P

G6S

I7P

G12P

C4

BOT6

_TS

C7

I2P

G8P

G12S

G2P

I12P

G5S

CSB

C1

SCKB

V-

G10P

G11S

G5P

G9P

TOP6

_TS

I8S

G3P

I9P

G6P

I6P

C8

G7P

I4P

I12S

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

y

CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

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BES

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FORT

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CATI

ONS;

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, IT R

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MER'

S RE

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G FO

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IS P

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RY T

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NEAR

TEC

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AND

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SUPP

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FOR

USE

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DEM

O CI

RCUI

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00A

36

HIGH

EFF

ICIE

NCY

BIDI

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IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

04IG

-2

NC

J. DR

EW

3 - 1

1 - 1

4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

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CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

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S RE

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TO

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R AN

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www.

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DEM

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RCUI

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HIGH

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L

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4

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TICE

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ATTE

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ALAN

CER

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

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32-1

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Conf

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Use

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www.

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r.com 4

DEM

O CI

RCUI

T 21

00A

36

HIGH

EFF

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NCY

BIDI

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IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

04IG

-2

NC

J. DR

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3 - 1

1 - 1

4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

C23

10uF

10V

0805

C23

10uF

10V

0805

D1

CMMS

H2-40

D1

CMMS

H2-40

21

R8 1.27M

0805R8 1.27M

0805

C11K

1.0uF

16V

0603

C11K

1.0uF

16V

0603

R54

20 0603

R54

20 0603

C15

4.7uF

16V

1210C1

54.7

uF16

V12

10

D5 RS07

JD5 RS

07J

1 2

R1 1MR1 1M

C20

4.7uF

16V

1210C20

4.7uF

16V

1210

C17

4.7uF 16V

1210C17

4.7uF 16V

1210

Q2BS

S123

WQ2BS

S123

W

3

1

2

TP1

WDT

A

TP1

WDT

A

D3

CMMS

H2-40

D3

CMMS

H2-40

21

R7 1MR7 1M

R11

0R11

0

Q5 CMPD

M800

2AQ5 CM

PDM8

002A

2

1

3

R15

0R15

0

U1LT

C330

0-1U1

LTC3

300-1

G6S

1

I6S2

G5S

3

I5S4

G4S

5

I4S6

G3S

7

I3S8

G2S

9

I2S10

G1S

11

I1S12

RTONS 13

RTONP 14

CTRL 15

CSBI 16

SCKI 17

SDI 18

SDO 19

WDT 20

V- 21

I1P 22

G1P 23

C1 24

I2P25

G2P

26C2

27I3P

28G3

P29

C330

I4P31

G4P

32C4

33I5P

34G5

P35

C536

I6P37G6P38

C639BOOST+40BOOST-41BOOST42

SDOI43SCKO44CSBO45

VMODE46TOS47

VREG48

GND

49

R18 0R18 0

D9 PDZ5

.6BD9 PD

Z5.6B

21

R16

0R16

0

C18

4.7uF 16V

1210

C18

4.7uF 16V

1210

R20

33.2kR2

033

.2k

C6K

1.0uF 16V

0603C6K

1.0uF 16V

0603

C4K

1.0uF

16V

0603

C4K

1.0uF

16V

0603

Q4CM

PT39

06E

Q4CM

PT39

06E

1

32

D7 RS07

JD7 RS

07J

1 2

C7K

1.0uF

16V

0603

C7K

1.0uF

16V

0603

D12

CMHZ

4689

D12

CMHZ

4689

21

R9 0R9 0

D6 RS07

JD6 RS

07J

1 2

C11

4.7uF

16V

1210

C11

4.7uF

16V

1210

R56

2.0k

R56

2.0k

C4 0.22u

F16

V06

03C4 0.22u

F16

V06

03

C7 0.1uF

16VC7 0.1uF

16V

C10

4.7uF

16V

1210

C10

4.7uF

16V

1210

C10K

1.0uF

16V

0603

C10K

1.0uF

16V

0603

C14

4.7uF

16V

1210

C14

4.7uF

16V

1210

R2 0R2 0

R22

33.2kR2

233

.2k

C9K

1.0uF

16V

0603C9K

1.0uF

16V

0603

R58

2.0k

R58

2.0k

R5 0R5 0

R21

23.7kR2

123

.7k

R19

23.7kR1

923

.7k

C2 4.7uF

16V

1210

C2 4.7uF

16V

1210

D10

CMOD

6263

D10

CMOD

6263

2 1

R55

20 0603R5

520 0603

R6 6.81

R6 6.81

C6 4.7uF

16V

1210

C6 4.7uF

16V

1210

R17

0R17

0

C12K

1.0uF

16V

0603

C12K

1.0uF

16V

0603

C3 0.1uF

16VC3 0.1uF

16V

C3K

1.0uF

16V

0603C3K

1.0uF

16V

0603

C16

4.7uF

16V

1210

C16

4.7uF

16V

1210

D4 CMMS

H2-40

D4 CMMS

H2-40

21

R12

0R12

0

C12

4.7uF

16V

1210

C12

4.7uF

16V

1210

Q1BS

S123

WQ1BS

S123

W

3

1

2

R24

23.7k

R24

23.7k

R14

0R14

0C2

K1.0

uF 16V

0603C2

K1.0

uF 16V

0603

C9 4.7uF

16V

1210C9 4.7uF

16V

1210

R3 0R3 0C1 1.0

uF16

V06

03

C1 1.0uF

16V

0603

R4 1.27M

0805R4 1.27M

0805

C8K

1.0uF

16V

0603

C8K

1.0uF

16V

0603

R23

0R23

0

D11

PDZ5

.6BD1

1PD

Z5.6B

21

C13

4.7uF

16V

1210C1

34.7

uF16

V12

10

C5 1.0uF

16V

0603

C5 1.0uF

16V

0603

D8 CMHZ

4689

D8 CMHZ

4689

21

R10

6.81

R10

6.81

R13

0R13

0

D13

CMOD

6263

D13

CMOD

6263

21

C5K

1.0uF 16V

0603

C5K

1.0uF 16V

0603

D2 CMMS

H2-40

D2 CMMS

H2-40

21

Q6 CMPT

3904

EQ6 CM

PT39

04E

1

23

C1K

1.0uF

16V

0603C1

K1.0

uF16

V06

03

U2LT

C330

0-1U2

LTC3

300-1

G6S

1

I6S2

G5S

3

I5S4

G4S

5

I4S6

G3S

7

I3S8

G2S

9

I2S10

G1S

11

I1S12

RTONS 13

RTONP 14

CTRL 15

CSBI 16

SCKI 17

SDI 18

SDO 19

WDT 20

V- 21

I1P 22

G1P 23

C1 24

I2P25

G2P

26C2

27I3P

28G3

P29

C330

I4P31

G4P

32C4

33I5P

34G5

P35

C536

I6P37G6P38

C639BOOST+40BOOST-41BOOST42

SDOI43SCKO44CSBO45

VMODE46TOS47

VREG48

GND

49

C8 0.22u

F16

V06

03C8 0.22u

F16

V06

03

TP2

WDT

CTP

2W

DTC

R53

100kR5

3

100k

C24

10uF

10V

0805

C24

10uF

10V

0805

42dc2100afc

DEMO MANUAL DC2100A

schematic Diagram5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

OPTI

ONAL

PAS

SIVE

BAL

ANCI

NG C

IRCU

ITS

C12 K

ELVI

N

F1 -

F12

, F15

7ADC

2100

A - C

/ D

DC21

00A

- A /

B12

A

*

*

**

*

**

*

* *

**

*

*

C11_

FILT

ER

C5_F

ILTE

R

C2

C10_

FILT

ER

C5C1

C8

C4_F

ILTE

R

C1

C9C4

C7

C9_F

ILTE

R

C9

C10

C6

C3

C7_F

ILTE

R

C3_F

ILTE

R

C12

C4

V-

C12

C8

C11

C6

C8_F

ILTE

R

C2

C7

C10

C6_F

ILTE

R

C5C11

C3

C2_F

ILTE

R

C12_

FILT

ER

C1

V-C1

C2

C2

C3

C3

C4

C4

C5

C5

C6

C6

C7

C7

C8

C8

C9

C9

C10C1

0

C11C1

1

C12

C0_F

ILTE

R

C1_F

ILTE

R

V- V-V-V- V-V- V- V-V-V-

V-

V-

V-

C3

C2

C5_F

ILTER

C9_F

ILTER

C5

C11_

FILTE

R

C6_F

ILTER

C2_F

ILTER

C10

C11

V-C3

C4

C1_F

ILTER

C10_

FILTE

R

C9

C8_F

ILTER

C2 C1C7 C6C11

C7

C4_F

ilter

C4

C7_F

ILTER

C12

C3_F

ILTER

C1

C10

C5

C8

V-

C8

C12_

FILTE

R

C6

C9

G1P

G2P

G3P

G4P

G5P

G6P

G7P

G8P

G9P

G10P

G11P

G12P

S1S2

S3S4S5S6S7S8S9S10

S11

S12

C0_F

ILTER

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

y

CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

DE A

BES

T EF

FORT

TO

DESI

GN A

CIRC

UIT

THAT

MEE

TS C

USTO

MER-

SUPP

LIED

SPE

CIFI

CATI

ONS;

HOW

EVER

, IT R

EMAI

NS T

HE C

USTO

MER'

S RE

SPON

SIBI

LITY

TO

VERI

FY P

ROPE

R AN

D RE

LIAB

LE O

PERA

TION

IN T

HE A

CTUA

LAP

PLIC

ATIO

N. C

OMPO

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www.

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DEM

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SIZE

DATE

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S

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APP

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Fax:

(408

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Conf

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Use

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IC

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www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

46

HIGH

EFF

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NCY

BIDI

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IONA

L

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SIZE

DATE

:

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TOF

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APPR

OVAL

S

PCB

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APP

ENG.

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HN

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)434

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7

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itas,

CA 95

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e: (4

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900

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y Blvd

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Conf

iden

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Use

Onl

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IC

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www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

46

HIGH

EFF

ICIE

NCY

BIDI

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IONA

L

N/A

LTC3

300I

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TC68

04IG

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NC

J. DR

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3 - 1

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4

MUL

TICE

LL B

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ALAN

CER

C8L

OPT

0805

C8L

OPT

0805

R8J

2.00k

R8J

2.00k

D6F

GRN

LED-

LND6

FGR

NLE

D-LN

R8M

33 2512

R8M

33 2512

E13

C11

E13

C11

C11M

10nF

25V

0603

C11M

10nF

25V

0603

F2

12A

1206

F2

12A

1206

J11

1793

1400

0_SC

J11

1793

1400

0_SC

C7S+

1C7

+2

C8S-

3

C4M

10nF

25V

0603

C4M

10nF

25V

0603

R1M

33 2512

R1M

33 2512

R12K 100

R12K 100

D8D

GRN

LED-

LND8

DGR

NLE

D-LN

R8L

470R8

L

470

Q2C

RQJ0

303P

GDQA

LTQ2

CRQ

J030

3PGD

QALT

2

1

3

R9N

3.3KR9

N

3.3K

F6

12A

1206

F6

12A

1206

R5J

2.00k

R5J

2.00k

R11N

3.3KR1

1N

3.3K

R8K

100

R8K

100

R6J

2.00kR6

J

2.00k

Q4C

RQJ0

303P

GDQA

LTQ4

CRQ

J030

3PGD

QALT

2

1

3

J8 1793

1400

0_SC

J8 1793

1400

0_SC

C4S+

1C4

+2

C5S-

3

J5 1793

1400

0_SC

J5 1793

1400

0_SC

C1S+

1C1

+2

C2S-

3

E9C7

E9C7

R4M

33 2512

R4M

33 2512

R11K 100

R11K 100

R1K

100

R1K

100

R2M

33 2512

R2M

33 2512

D9F

GRN

LED-

LND9

FGR

NLE

D-LN

F10 12

A

1206

F10 12

A

1206

D11F

GRN

LED-

LND1

1FGR

NLE

D-LN

R4L

470R4

L

470

E12

C10

E12

C10

C1L

OPT

0805

C1L

OPT

0805

R1N

3.3KR1

N

3.3K

C10M

10nF

25V

0603

C10M

10nF

25V

0603

R2L

470

R2L

470

Q1C

RQJ0

303P

GDQA

LTQ1

CRQ

J030

3PGD

QALT

2

1

3

C9L

OPT

0805

C9L

OPT

0805

R12N

3.3KR1

2N

3.3K

Q7C

RQJ0

303P

GDQA

LTQ7

CRQ

J030

3PGD

QALT

2

1

3

F1

12A12

06F1

12A12

06

D5D

GRN

LED-

LND5

DGR

NLE

D-LN

D12F

GRN

LED-

LND1

2FGR

NLE

D-LN

R3J

2.00kR3J

2.00k

R5K

100

R5K

100

R3N

3.3KR3

N

3.3K

D11D

GRN

LED-

LND1

1DGR

NLE

D-LN

C13M

10nF

25V

0603

C13M

10nF

25V

0603

R4J

2.00k

R4J

2.00k

R1L

470

R1L

470

C1M

10nF

25V

0603

C1M

10nF

25V

0603

E1V-

E1V-

E11

C9E1

1C9

R7M

33 2512

R7M

33 2512

Q5C

RQJ0

303P

GDQA

LTQ5

CRQ

J030

3PGD

QALT

2

1

3

F5

12A12

06F5

12A12

06

J13

1793

1400

0_SC

J13

1793

1400

0_SC

C9S+

1C9

+2

C10S

-3

C10L

OPT

0805

C10L

OPT

0805

D3F

GRN

LED-

LND3

FGR

NLE

D-LN

D12D

GRN

LED-

LND1

2DGR

NLE

D-LN

R3K

100

R3K

100

R12J

2.00k

R12J

2.00k

C5L

OPT

0805

C5L

OPT

0805

E14

C12

E14

C12

C7M

10nF

25V

0603

C7M

10nF

25V

0603

F9

12A12

06F9

12A12

06

E4C3

E4C3

R7L

470R7

L

470

J10

1793

1400

0_SC

J10

1793

1400

0_SC

C6S+

1C6

+2

C7S-

3

R5M

33 2512

R5M

33 2512

Q6C

RQJ0

303P

GDQA

LTQ6

CRQ

J030

3PGD

QALT

2

1

3

C3L

OPT

0805

C3L

OPT

0805

R6M

33 2512

R6M

33 2512

R10N

3.3KR1

0N

3.3K

C9M

10nF

25V

0603

C9M

10nF

25V

0603

E3C2

E3C2

R5L

470R5

L

470

J7 1793

1400

0_SC

J7 1793

1400

0_SC

C3S+

1C3

+2

C4S-

3

Q9C

RQJ0

303P

GDQA

LTQ9

CRQ

J030

3PGD

QALT

2

1

3

D3D

GRN

LED-

LND3

DGR

NLE

D-LN

R13K

100

R13K

100

E7C6

E7C6

C5M

10nF

25V

0603

C5M

10nF

25V

0603

Q11C

RQJ0

303P

GDQA

LTQ1

1CRQ

J030

3PGD

QALT

2

1

3

C2M

10nF

25V

0603

C2M

10nF

25V

0603

D10F

GRN

LED-

LND1

0FGR

NLE

D-LN

D1F

GRN

LED-

LND1

FGR

NLE

D-LN

R6L

470R6

L

470

R2K

100

R2K

100

E2C1

E2C1

R4K

100

R4K

100

D10D

GRN

LED-

LND1

0DGR

NLE

D-LN

R8N

3.3KR8

N

3.3K

R9M

33 2512

R9M

33 2512

D1D

GRN

LED-

LND1

DGR

NLE

D-LN

F4

12A12

06F4

12A12

06

C2L

OPT

0805

C2L

OPT

0805

R11M

33 2512

R11M

33 2512

F8

12A12

06F8

12A12

06

J15

1793

1400

0_SC

J15

1793

1400

0_SC

C11S

+1

C11+

2C1

2S-

3

R9L

470R9

L

470

R1J

2.00k

R1J

2.00k

R11L

470R1

1L

470

C12L

OPT

0805

C12L

OPT

0805

Q12C

RQJ0

303P

GDQA

LTQ1

2CRQ

J030

3PGD

QALT

2

1

3

D8F

GRN

LED-

LND8

FGR

NLE

D-LN

C11L

OPT

0805

C11L

OPT

0805

E6C5

E6C5

R4N

3.3KR4

N

3.3K

C8M

10nF

25V

0603

C8M

10nF

25V

0603

Q3C

RQJ0

303P

GDQA

LTQ3

CRQ

J030

3PGD

QALT

2

1

3

J12

1793

1400

0_SC

J12

1793

1400

0_SC

C8S+

1C8

+2

C9S-

3

J4 1793

1300

0_SC

J4 1793

1300

0_SC

C1S-

1C1

-2

R2N

3.3KR2

N

3.3K

F12 12

A1206

F12 12

A1206

F15

12A1206

F15

12A1206

R12M

33 2512

R12M

33 2512

J9 1793

1400

0_SC

J9 1793

1400

0_SC

C5S+

1C5

+2

C6S-

3

D4F

GRN

LED-

LND4

FGR

NLE

D-LN

R3M

33 2512

R3M

33 2512

R9J

2.00k

R9J

2.00k

R12L

470R1

2L

470

D2F

GRN

LED-

LND2

FGR

NLE

D-LN

R2J

2.00k

R2J

2.00k

C12M

10nF

25V

0603

C12M

10nF

25V

0603

R3L

470R3

L

470

R7J

2.00k

R7J

2.00k

J6 1793

1400

0_SC

J6 1793

1400

0_SC

C2S+

1C2

+2

C3S-

3

TP9

V-TP

9V-

D6D

GRN

LED-

LND6

DGR

NLE

D-LN

D9D

GRN

LED-

LND9

DGR

NLE

D-LN

C3M

10nF

25V

0603

C3M

10nF

25V

0603

F3

12A

1206

F3

12A

1206

D2D

GRN

LED-

LND2

DGR

NLE

D-LN

D7D

GRN

LED-

LND7

DGR

NLE

D-LN

R7N

3.3KR7

N

3.3K

F7

12A

1206

F7

12A

1206

C4L

OPT

0805

C4L

OPT

0805

R7K

100

R7K

100

D4D

GRN

LED-

LND4

DGR

NLE

D-LN

R10J

2.00k

R10J

2.00k

R6K

100

R6K

100

R9K

100

R9K

100

E5

C4

E5

C4

Q10C

RQJ0

303P

GDQA

LTQ1

0CRQ

J030

3PGD

QALT

2

1

3

C7L

OPT

0805

C7L

OPT

0805

R10M

33 2512

R10M

33 2512

C6M

10nF

25V

0603

C6M

10nF

25V

0603

D7F

GRN

LED-

LND7

FGR

NLE

D-LN

R10K

100

R10K

100

R5N

3.3KR5

N

3.3K

F11 12

A1206

F11 12

A1206

R6N

3.3KR6

N

3.3K

C6L

OPT

0805

C6L

OPT

0805

R10L

470R1

0L

470

Q8C

RQJ0

303P

GDQA

LTQ8

CRQ

J030

3PGD

QALT

2

1

3

J16

1793

1300

0_SC

J16

1793

1300

0_SC

C12S

+1

C12+

2

E10

C8E1

0C8

J14

1793

1400

0_SC

J14

1793

1400

0_SC

C10S

+1

C10+

2C1

1S-

3

D5F

GRN

LED-

LND5

FGR

NLE

D-LN

R11J

2.00k

R11J

2.00k

43dc2100afc

DEMO MANUAL DC2100A

schematic Diagram5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

THER

MIST

ORS

To U

1 Pin

18

isoSP

IB O

UT

To U

1 Pin

17

isoSP

IA I

N

To U

1 Pin

16

A0

1 0A1

A2SW

TEN

A3

OPTI

ON A

AND

C O

NLY

DO N

OT IN

STAL

L J18

IN O

PTIO

NS A

AND

C

RECO

MMEN

DED

THER

MIST

ORVI

SHAY

NTH

S01N

1002

JE

OPTIO

N A

AND

C O

NLY

OPT

TERM

10

INST

ALL

ASSY

1 O

NTO

JP7

SUCH

THAT

ASS

Y 1-

1B C

ONNE

CTS

TOJP

7-1C

AND

ASS

Y 1-

1A C

ONNE

CTS

TO J

P7-1

B

C12 P

OWER

CON

NECT

ION

NOTE

: DC2

100A

-ASS

Y 1 I

S US

EDON

LY FO

R BU

ILD O

PTIO

N -A

AND

-C.

BA

OPT

RT10

RT6

RT8

RT3

SDIO

RT7

RT3

VREG

RT1

SDIO

RT9

RT11

RT4

SDIO

RT8

RT12

RT4

CSB

RT10

RT5

SCKB

RT5

RT9

DRV

RT2

GPIO

1

RT2

RT11

SCKB

DRV

RT6

SCKB

RT1

RT12

VREG

RT7

VREG

VREG

VREG

VREG

VREG

CSB

SDIO

SCKB

V-

V-

V-

V-

V-V-

V-

V-

V-

V-

V-

V-

V-

V-

V-

V-V-

V-

V-

ISO

SPI_

GND

ISO

SPI_

GND

ISO

SPI_

GND

CS

C3_F

ILTER

C12

SCKB

C10_

FILTE

R

C9_F

ILTER

SDI

SCK

C6_F

ILTER

C5_F

ILTER

CSB

C8_F

ILTER

SDO

C2_F

ILTER

V- C12_

FILTE

R

SDIO

C7_F

ILTER

C4_F

ILTER

C1_F

ILTER

C11_

FILTE

R

V-

VCC_

3V3

S1S2S3S4S5S6S7S8S9S1

0

S11

S12

C0_F

ILTER

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

-050

7

Milp

itas,

CA 95

035

Phon

e: (4

08)4

32-1

900

1630

McC

arth

y Blvd

.

LTC

Conf

iden

tial-F

or C

usto

mer

Use

Onl

y

CUST

OMER

NOT

ICE

LINE

AR T

ECHN

OLOG

Y HA

S MA

DE A

BES

T EF

FORT

TO

DESI

GN A

CIRC

UIT

THAT

MEE

TS C

USTO

MER-

SUPP

LIED

SPE

CIFI

CATI

ONS;

HOW

EVER

, IT R

EMAI

NS T

HE C

USTO

MER'

S RE

SPON

SIBI

LITY

TO

VERI

FY P

ROPE

R AN

D RE

LIAB

LE O

PERA

TION

IN T

HE A

CTUA

LAP

PLIC

ATIO

N. C

OMPO

NENT

SUB

STIT

UTIO

N AN

D PR

INTE

DCI

RCUI

T BO

ARD

LAYO

UT M

AY S

IGNI

FICA

NTLY

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ECT

CIRC

UIT

PERF

ORMA

NCE

OR R

ELIA

BILI

TY. C

ONTA

CT L

INEA

RTE

CHNO

LOGY

APP

LICA

TION

S EN

GINE

ERIN

G FO

R AS

SIST

ANCE

.

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r.com 4

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O CI

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U5

LTC6

820I

MSU5

LTC6

820I

MSEN

1

MOSI

2

MISO

3

SCK

4

CSB

5

VCCS

6

POL

7

PHA

8VC

C9

IP11

GND

14VC

MP15

MSTR

12SL

OW13

IBIA

S16

IM10

JP2

JP2 1

2

3

TP3

WDT

B

TP3

WDT

B

TP7 VR

EGTP

7 VREG

T14

ACT4

5B-22

0-2P

T14

ACT4

5B-22

0-2P 3

214

C26

0.1uF

100V 0805

C26

0.1uF

100V 0805

TP5

SCKB

TP5

SCKB

Q3CZ

T555

1Q3

CZT5

551

1

2 34

R59

5.1k

R59

5.1k

R36 2.0

K

R36 2.0

K

R41 1MR41 1M

C28

1uF

25V

0603

C28

1uF

25V

0603

R37

100

R37

100

C25

0.1uF

100V

0805

C25

0.1uF

100V

0805

C50

0.1uF

25V

0603

C50

0.1uF

25V

0603

R25

60.4

0603

R25

60.4

0603

U424

AA64

U424

AA64

SCL 1

VSS 2

VCC4

WP5

SDA 3

C21

100p

F06

03

C21

100p

F06

03

R63

60.4

R63

60.4

R29

60.4

R29

60.4

R30

1MR30

1M

R32 1.4

0k

R32 1.4

0k

R35

10K

R35

10K

C29

0603

1uF

25V

C29

0603

1uF

25V

C31

1uF

25V

0603

C31

1uF

25V

0603

JP4

JP4 1

2

3

TP4

GPIO

1

TP4

GPIO

1

12

34 8

7

109

12115

6

DC21

00A-

ASSY

1

TSW

-106

-07-

L-T

12

34 8

7

109

12115

6

DC21

00A-

ASSY

1

TSW

-106

-07-

L-T

TP6 CS

BTP

6 CSB

JP7

TSW

-106

-07-

L-T

JP7

TSW

-106

-07-

L-T

1C1A

2C 3C 4C 5C 6C

1B 2B2A

3B3A

4B4A

5B5A

6B6A

U7 LTC1

380IG

NU7 LT

C138

0IGN

S01

S12

S23

S34

S45

S56

S67

S78

DO9

GND

11

SDA

14

SCL

15A1

12A0

13

VCC

16VE

E10

J17

CON-

DF3D

Z-15

P-2H

51

J17

CON-

DF3D

Z-15

P-2H

51

TEMP

115

TEMP

214

TEMP

313

TEMP

412

TEMP

511

TEMP

610

TEMP

79

TEMP

88

TEMP

97

TEMP

106

TEMP

115

TEMP

124

GND

3

GND

2

GND

1

R31

1MR31

1M

T13

PE-68

386

T13

PE-68

386

46 1

3

R43

10k

R43

10k

R47

2.0K

R47

2.0K

R28

100

R28

100

C51

0.1uF

25V

0603

C51

0.1uF

25V

0603

JP5

JP5 1

2

3

R39

1.40k

R39

1.40k

C30

1uF

25V

0603

C30

1uF

25V

0603

C27

0.1uF

25V

0603C27

0.1uF

25V

0603

R42

10k

R42

10k

R34

2.0K

R34

2.0K

J18

RJ45

J18

RJ45

12

34

56

78

1112

U6 LTC1

380IG

NU6 LT

C138

0IGN

S01

S12

S23

S34

S45

S56

S67

S78

DO9

GND

11

SDA

14

SCL

15A1

12A0

13

VCC

16VE

E10

TP8 SD

IOTP

8 SDIO

T15

PE-68

386

T15

PE-68

386

46 1

3

R40

1MR40

1M

J1

RJ45

J1

RJ451

23

45

67

8

1112

U3 LTC6

804-

2

U3 LTC6

804-

2

VP1

C12

2

S12

3

C11

4

S11

5

C10

6

S10

7

C98

S99

C810

S811

C712

S713

C614

S615

C516

S517

C418

S419

C320

S321

C222

S223

C124

S125

CO26

GPIO

127

GPIO

228

GPIO

329

VM2

30VM

31GP

IO4

32GP

IO5

33VR

EF2

34VR

EF35

SWTE

N36

VREG

37DR

IVE

38W

DT39

ISOM

D40

CSB(

IMA)

41SC

K(IP

A)42

SDI(IC

MP)

43SD

O(IB

IAS)

44A0

45A1

46A2

47A3

48

E16

SHIE

LD

E16

SHIE

LD

R26

60.4

0603R26

60.4

0603

C33

0.1uF

25V

0603C33

0.1uF

25V

0603

R27

100

R27

100

JP1

JP1 1

2

3

C32

100p

F06

03C3

210

0pF

0603

JP3

JP3 1

2

3

R38

604

R38

604

JP6

JP6

1

2

3

R33 604

R33 604

44dc2100afc

DEMO MANUAL DC2100A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

schematic Diagram5 5

4 4

3 3

2 2

1 1

DD

CC

BB

AA

Clos

e to

J19

Isolat

ion

Bypa

ssCo

mpo

nent

s: 25

12 fo

r5m

m cl

eara

nce

ICD

INTE

RFAC

E

OPT

OPT

OPT

OPT

C40

only

use

d in

non-

isol

ated

case

ALL C

OMPO

NENT

S ON

PAG

E 6 A

REFO

R "B

UILD

OPT

ION

A A

ND C

ONL

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GPIO

WUR

TH: 6

5100

5136

521

STAN

D AL

ONE

LDO

ASSE

MBLY

NOT

E:

OPT

OPT

OPT

OPT

OPT

AN3 AN

2AN

1AN

0

AN5

AN6

AN7

AN1

AN3

AN5

AN7

SDO2

AN0 AN

2AN

6SS

2

VCC_

3V3

VCC_

5V

VCC_

3V3

AN0

SS2

SDI2

SDO2

SCL2

SDI2

SCL2

VCC_

5V

VCC_

3V3

VCC_

3V3

VCC_

3V3

VCC_

3V3

VCC_

3V3

VCC_

3V3

CS

SCK

SDI

SDO

C12

V-

VCC_

3V3

SIZE

DATE

:

.VER.ON CI

SHEE

TOF

TITL

E:

APPR

OVAL

S

PCB

DES.

APP

ENG.

TEC

HN

OLO

GY

Fax:

(408

)434

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7

Milp

itas,

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035

Phon

e: (4

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32-1

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Use

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MAT

IC

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PART

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www.

linea

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DEM

O CI

RCUI

T 21

00A

66

HIGH

EFF

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BIDI

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IONA

L

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LTC3

300I

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1 / L

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SIZE

DATE

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TITL

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OVAL

S

PCB

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APP

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TEC

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Fax:

(408

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7

Milp

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CA 95

035

Phon

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32-1

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Use

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THIS

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O LI

NEAR

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AND

SCHE

MAT

IC

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H LI

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PART

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www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

66

HIGH

EFF

ICIE

NCY

BIDI

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IONA

L

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300I

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DATE

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S

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Phon

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Use

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SCHE

MAT

IC

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H LI

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www.

linea

r.com 4

DEM

O CI

RCUI

T 21

00A

66

HIGH

EFF

ICIE

NCY

BIDI

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IONA

L

N/A

LTC3

300I

LXE-

1 / L

TC68

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NC J. DR

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3 - 1

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4

MUL

TICE

LL B

ATTE

RY B

ALAN

CER

U8LT

M28

84CY

U8LT

M28

84CY

D1+

A2D1

-A1

SPND

-PW

RA3

ONA4

VLO

A5

GND

B1GN

DB2

GND

B3GN

DB4

GND

B5GN

DB6

GND

B7GN

DB8

GND

B9GN

DB1

0GN

DB1

1

GND2

K1GN

D2K2

GND2

K3GN

D2K4

GND2

K5GN

D2K6

GND2

K7GN

D2K8

GND2

K9GN

D2K1

0GN

D2K1

1

GND2

L3GN

D2L4

GND2

L6GN

D2L7

GND

A6

VBUS

A7VC

CA8

VCC

A9VC

CA1

0VC

CA1

1

D2-

L1D2

+L2

VLO2

L5VC

C2L8

VCC2

L9VC

C2L1

0VC

C2L1

1

D15

GRN

LED-

LND1

5

GRN

LED-

LN

U10

PIC1

8F47

J53-

I/ML

U10

PIC1

8F47

J53-

I/ML

MCLR

18

RA0/A

N0/C

1INA/

ULPW

U/RP

019

RA1/A

N1/C

2INA/

Vbg/R

P120

RA2/A

N2/C

2INB/

C1IN

D/C3

INB/

Vref-

/CVr

ef21

RA3/A

N3/C

1INB/

Vref+

22

VDDC

ore/V

CAP

23

RA5/A

N4/C

1INC/

SS1/H

LVDI

N/RC

V/RP

224

RB7/C

CP7/K

BI3/P

GD/R

P10

17RB

6/CCP

6/KBI

2/PGC

/RP9

16RB

5/CCP

5/KBI

1/SDI

1/SDA

1/RP8

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45dc2100afc

DEMO MANUAL DC2100A

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

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TEM

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TEM

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TEM

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TEM

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TEM

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TEM

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46dc2100afc

DEMO MANUAL DC2100A

Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com LINEAR TECHNOLOGY CORPORATION 2015

LT 0315 REV C • PRINTED IN USA

DEMONSTRATION BOARD IMPORTANT NOTICE

Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions:

This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations.

If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.

The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.).

No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind.

LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive.

Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged.

This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC applica-tion engineer.

Mailing Address:

Linear Technology

1630 McCarthy Blvd.

Milpitas, CA 95035

Copyright © 2004, Linear Technology Corporation