design and construction of a k-dimensional led array

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Design and Construction of a K -dimensional LED Array Nikhil J. Dixit Chirag D. Sakhuja Minesh H. Patel Professor Ramesh Yerraballi Spring 2012 Electrical and Computer Engineering, University of Texas, Austin, Texas May 30, 2012

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Design, construction, and application of an LED cube in an arbitrary dimension. Feel free to contact us at [email protected] with any questions or concerns.

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Page 1: Design and Construction of a k-Dimensional LED Array

Design and Construction of aK-dimensional LED Array

Nikhil J. DixitChirag D. SakhujaMinesh H. Patel

Professor Ramesh Yerraballi

Spring 2012Electrical and Computer Engineering,

University of Texas,Austin,Texas

May 30, 2012

Page 2: Design and Construction of a k-Dimensional LED Array

Abstract

Our team has designed a high side driver which, in its greatest generality, can be usedto simultaneously power any possible array of numerous, high power devices whileproviding individual addressability within each dimension. The basic premise of ourdesign lies on the division of any given k-dimensional array into j cross sections eachcontaining i devices. Each element per cross section is then controlled individually bya low-side circuit while a high-side circuit delivers power to each cross section in turnat a specified rate. Our physical implementation consists of applying our driver designto a three dimensional array of 103 RGB LEDs. Our project boasts full individual36-bit color addressability all at a refresh rate with a lower bound of 60 Hz. It candisplay both static images and animations, and is entirely controllable with a simplesoftware interface.

A Note Concerning Convention

In order to be as thorough as possible in our analysis, we will adopt the followingconvention for the rest of the paper:

• k will be reserved to represent the number of dimensions of the array in consid-eration

• j will be reserved to represent the number of elements within the dimension ofiteration (i.e. the number of frames required for one full refresh)

• i will be reserved to represent the number of elements within one cross sectionof iteration (i.e. the number of devices actively controlled within each of theabove frames)

Note: The product i ∗ j always represents the total number of elements in the array

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Contents

1 Introduction 61.1 The Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

RGB LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7TLC5940 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Shift Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Enhancement Mode P-channel MOSFET . . . . . . . . . . . . . . . . 9NOT Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Level Shifter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Electret Condenser Microphone . . . . . . . . . . . . . . . . . . . . . 10Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Stellaris EKK-LM3S1968 . . . . . . . . . . . . . . . . . . . . . . . . . 11Decoder/Demultiplexer and AND Gate . . . . . . . . . . . . . . . . . 12

2 Designs 142.1 Final Design [j = 10, i = 100] . . . . . . . . . . . . . . . . . . . . . . 14

The High Side of our LED Array Driver . . . . . . . . . . . . . . . . 15Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

The Low Side of our LED Array Driver . . . . . . . . . . . . . . . . . 19Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Operation of the TLC5940 . . . . . . . . . . . . . . . . . . . . 19Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20The General Form of the Solution . . . . . . . . . . . . . . . . 21

The General High Side . . . . . . . . . . . . . . . . . . . . . . . . . . 21The General Low Side . . . . . . . . . . . . . . . . . . . . . . . . . . 21Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.2 Preliminary Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . 23The Global Bus: Reduction of Dimensions [j = 1000, i = 1] . . . . . . 24The Divergence of Paths: Trifurcation of the Bus [j = 1000, i = 1] . . 26TLC5940 Design 1 [j = 100, i = 10] . . . . . . . . . . . . . . . . . . . 27TLC5940 Design 2 [j = 100, i = 10] . . . . . . . . . . . . . . . . . . . 28TLC5940 Design 3 [j = 100, i = 10] . . . . . . . . . . . . . . . . . . . 28Premise of the Final Design . . . . . . . . . . . . . . . . . . . . . . . 29

2.3 Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30The Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

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300x 1 mm Diameter Acrylic Rod . . . . . . . . . . . . . . . . 316x Breadboard . . . . . . . . . . . . . . . . . . . . . . . . . . 316x Pre-Punched Blank Protoboards . . . . . . . . . . . . . . . 321x 28 Gauge Wire . . . . . . . . . . . . . . . . . . . . . . . . . 321x 28 Gauge Magnet Wire . . . . . . . . . . . . . . . . . . . . 321x Plexiglas Sheet . . . . . . . . . . . . . . . . . . . . . . . . . 331x Permanent Marker . . . . . . . . . . . . . . . . . . . . . . 331x Hot Glue Gun + Refills . . . . . . . . . . . . . . . . . . . . 331x Soldering Iron + Solder . . . . . . . . . . . . . . . . . . . . 341x Drill + Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

The Construction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34The Prototype . . . . . . . . . . . . . . . . . . . . . . . . . . 34The Final Array . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Casting of the Die . . . . . . . . . . . . . . . . . . . . . 35Anode Consolidation . . . . . . . . . . . . . . . . . . . 36Array Linkage . . . . . . . . . . . . . . . . . . . . . . . 37Power System Implementation . . . . . . . . . . . . . . 38Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . 39

2.4 Software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39Interfacing the TLC5940 . . . . . . . . . . . . . . . . . . . . . . . . . 39

Logic Design of the TLC5940 . . . . . . . . . . . . . . . . . . 40General Algorithm Overview . . . . . . . . . . . . . . . . . . . 41Final Algorithm Overview . . . . . . . . . . . . . . . . . . . . 44Driver Implementation . . . . . . . . . . . . . . . . . . . . . . 48

Environment . . . . . . . . . . . . . . . . . . . . . . . . 48Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48A Word on Generality . . . . . . . . . . . . . . . . . . 49Connections . . . . . . . . . . . . . . . . . . . . . . . . 49Writing the TLC5940 Driver . . . . . . . . . . . . . . . 49

TLCSetup . . . . . . . . . . . . . . . . . . . . . . . 52User Driver Interface . . . . . . . . . . . . . . . . . 57TLCSetLED . . . . . . . . . . . . . . . . . . . . . 57TLCInterrupt . . . . . . . . . . . . . . . . . . . . . 58

The Final Code . . . . . . . . . . . . . . . . . . . . . . . . . . 62The Refresh Rate . . . . . . . . . . . . . . . . . . . . . . . . . 68

Benchmarking with the FFT . . . . . . . . . . . . . . . . . . . . . . . 69Introduction to the Cooley-Tukey Algorithm . . . . . . . . . . 70Breakdown of Code . . . . . . . . . . . . . . . . . . . . . . . . 71

FFT . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72FFT Calculate . . . . . . . . . . . . . . . . . . . . . . . 73

The Final Code . . . . . . . . . . . . . . . . . . . . . . . . . . 73

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3 Extensions 763.1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Applications of the RGB LED Array . . . . . . . . . . . . . . . . . . 76Applications of the Driver . . . . . . . . . . . . . . . . . . . . . . . . 77The Choice of a Dimension Independent Array . . . . . . . . . . . . . 78

3.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

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List of Figures

1.1 The truth table for the NOT function. . . . . . . . . . . . . . . . . . 101.2 The amplification circuit of the Electret Condenser Microphone. . . . 111.3 The truth table for the AND function. . . . . . . . . . . . . . . . . . 13

2.1 The schematic of our solution to the array driver problem. . . . . . . 142.2 The current going through one LED during a single full refresh. The

LED is on for a tenth of the cycle. . . . . . . . . . . . . . . . . . . . . 172.3 The progression of our designs. . . . . . . . . . . . . . . . . . . . . . 242.4 A summary of the entire design process. . . . . . . . . . . . . . . . . 302.5 Programming flow chart provided by TI to interface the TLC5940. [4] 422.6 Note that the middle wave perfectly resembles a clock signal. . . . . . 442.7 An SPI timing diagram (MOSI stands for master out slave in, which

is equivalent to the SIN line). Note how the SCLK pulses are perfectlyaligned with the data pulses. [3] . . . . . . . . . . . . . . . . . . . . . 45

2.8 An input edge count mode progression diagram specific to the StellarisLM3S1968. Note that on each rising and falling edge the count isdecremented until it matches the target of 0x0006. [6] . . . . . . . . . 46

2.9 Process chart of the improved algorithm. Note the dramatic shift fromsoftware to hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

2.10 Internal layout of colorArray. All numbers in the top right box areindexes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

2.11 Data flows between multiple interrupts. The order of variable and pinchanges is crucial. Also note that the first layer is given undefineddata during the very first refresh cycle, an acceptable side effect of thisiteration scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

2.12 The interrupt essentially stalls the CPU for the user and thus takestime away from the main thread. . . . . . . . . . . . . . . . . . . . . 68

2.13 The Sfree vs fupdate line for our 10x10x10 LED array. . . . . . . . . . 692.14 The symmetry that the Cooley-Tukey algorithm takes advantage of. [1] 71

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Chapter 1

Introduction

An RGB LED array is an evenly spaced matrix of tri-color LEDs, each of whosecolor channels can be independently controlled using a simple interface. It serves as avisualizer and so can be used to display both static images and real time animationswith a resolution inversely proportional to the density of the array.

Our goal throughout this project is to design and construct a three dimensionalarray of 103 RGB LEDs. Our ideas are motivated by the simple fact that this systemis nothing less than a fully three dimensional visualizer; our objective is to havesufficient resolution so as to be able to display any arbitrary, full-color animation asrequired.

In order to formulate our design, we begin by abstracting our project goals intoa more general problem. In this way, we can state that our essential aim is to designa power system capable of driving a k-dimensional array of objects that each requireconsiderable power to operate (such as LEDs or motors as opposed to, for example,an LCD screen, which has a large number of very low power elements). We can thenproceed to divide our overall goal into a number of unique criteria.

1. It will be necessary to have an overall refresh rate of greater than 60Hz. Thisis essential in order for the final product to display animations smoothly to thehuman eye. Note that this implies that each iteration must be done at at least60 ∗ j Hz.

2. There must be sufficient free microprocessor clock time between refreshes todetermine the nature of the next frame. We predict that it will be necessary forgreater than 75% of the total clock cycles to be available for computation, aseach update requires computation of the states of each i ∗ j elements, 1000 inour situation. This will be especially important if the data for the next frameis not simply being fetched from memory but rather being computed on the fly.As the latter is our eventual goal, this goal is of great importance.

3. Each LED must be individually color-addressable within each frame of anima-tion. Furthermore, the color addressability must have a small enough resolutionto mask the discrete nature of transitions between adjacent RGB values. Thiswill allow for any animations involving hue sweeps to seem continuous.

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4. The apparent brightness of any single LED through only one frame of anima-tion must be comparable to its true continuous maximum brightness. As anextension to this, our power system must be robust enough to be able to si-multaneously drive the entire array’s worth of LEDs continuously at the samebrightness that it would power a single LED. This will ensure that the apparentbrightness of any given LED at any given time is uniform, entirely independentof the number of active LEDs at that point in time.

5. Our driving system must be upscalable, ideally to any scale and dimension.Consider, for example, a system consisting of a 3D array of three-tier compo-nents (i.e. RGB LEDs), each of which must be controlled independently. Thissystem is effectively a five dimensional arrangement which must be as easilyaccommodated by our design as would a simple array of one-tier components.

Thus, our objectives have been broadened and clearly specified in the aforemen-tioned requirements. Our task, then, is to create a design which satisfies each of thegoals in as neat and elegant a manner as possible. We now proceed to describe theprocess by which we solved this problem.

1.1 The Parts

RGB LED

The project uses 1000 four pin, common anode RGB LEDs. Each LED has a singlepin for its anode and three pins as the cathodes for the corresponding color channels(R, G, and B), which are actually smaller individual LEDs within the larger unit.Since current flows from anode to cathode, the LED can only be effectively controlledby a current sink. This layout suits our design because selectively sinking current isa much easier task than selectively sourcing current. Furthermore, this type of LEDallows the design to effortlessly increase the potential across the diode if necessary,which is not so simple with a common cathode LED.

As stated, to control the color of the LED the current through each cathode mustbe changed independently of all others. To accomplish both independence and precisecontrol, the design calls for a PWM sink. Feeding each LED cathode into one sink(so three sinks per RGB LED are necessary) and controlling the PWM duty cycle onthe sinking IC using a microcontroller gives maximum precision and reliability sincethe actual microcontroller is protected by the current sink from high voltages on itsGPIO pins.

The specific LEDs used for this project were manufactured by Shen Zhen HanhuaOpto [2], and are 5 mm in diameter with diffused lense. We chose 5 mm LEDs becausethey are a suitable blend between size and brightness (3 mm LEDs are too dim and10 mm LEDs are so large they obstruct the LEDs behind them). Diffused lenses werechosen because they allow the individual LEDs within the larger package to blendtogether and give a much better illusion of being a single color. This is especiallyimportant when trying to represent non-primary colors such as purple, yellow, orange

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and white. As for power, the LEDs are rated at a maximum continuous current of 60mA, meaning 20 mA per cathode, which is the output goal for the design.

TLC5940

The TLC5940 is a multi-channel low side LED driver designed by Texas Instruments.It is a current sinking IC capable of controlling 16 different currents per chip usingpulse width modulation and is our choice for the PWM sink called for by the designfor a few reasons. The TLC5940 is relatively simple to drive, requiring at its coreonly two clock lines and two data lines. It is highly expandable, allowing for thechaining of multiple ICs to increase the number of sinks. Most importantly it is alsovery precise, due to its 12 bit grayscale controller which has 4096 steps. As a bonus,the TLC5940 limits the maximum current through each pin via an external resistor,which can be chosen depending on the necessary maximum throughput allowing fornear-perfect brightness scaling. All these facets combined with its low price make itan attractive option for our needs. However there are a few limits to the TLC5940that need to be overcome if a very large scale project is undertaken (well beyond thescope of our array).

The most pressing issue is the upper bound on clocks. The TLC5940 places ahardware limit of 30 MHz on the two clocks it needs, the grayscale clock and the dataclock. The problem is that as the number of elements grows by n, the data to besent increases by 12 ∗ n, which creates a steep slope for the data clock to overcomefor large amounts of elements. At scales of ten thousand elements or more, a mere 30MHz data clock cannot keep up and the refresh rate suffers dramatically.

Another issue is the TLC5940’s voltage and current limits. Designed to be a lowpower chip, the TLC5940 cannot handle more than a 17 V potential on any of its pinswithout faulting, meaning any devices that require more than the specified amountof voltage to operate will need an alternative sink. Furthermore, for the same reasonsthe TLC5940 cannot sink more than 120 mA continuous per pin, which can becomeprohibitive for a very large number of even small powered devices sunk into a singlepin. There are no official specifications on the maximum pulsed current or voltageper pin but we reasonably expect those to reflect their continuous counterparts.

Shift Register

The project requires a serial-in parallel-out shift register to serve as a layer selectionmechanism. In essence, a SIPO shift register is made up of any number of masterslave flip flops connected together with each flip flop also having an output pin thatis available on the register. The register thus takes serial input and makes the first nbits of it available through parallel outs. How exactly this is useful will be explainedin Section 2.1.

The specific shift registers used in this project are Texas Instruments CD74HC164E,which have eight parallel outs per IC. These registers were chosen because they have avery simple interface, requiring only three GPIO pins to drive, and like the TLC5940sallow for expansion by chaining together multiple chips (note that is a property of

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all SIPO shift registers). The CD74HC164E works by taking in a data line, a clockline, and a master reset line. When the clock line is transitioned from low to high,the bit present on the data line is moved into the first output Q0, and simultaneouslyeach bit present on Q0 - Qn is shifted over into Q1 - Qn (the previous Qn bit is lost).When the master reset line is driven low all outputs are cleared to 0 simultaneously,which is much faster than serially pushing a low signal n times.

Enhancement Mode P-channel MOSFET

As a project that deals with pulsed currents on the order of tens of amps, a high volt-age external power source is a necessity. However, a microcontroller cannot interfacewith any voltage higher than its base voltage (usually 5 V) without taking permanentdamage, and so a transistor is required to interface between the two voltages. Ourarray utilizes transistors as both switches and power sources to drive the LEDs ineach layer.

There are multiple distinctions within the transistor family, the foremost beingthe divide between bipolar junction transistors and metal oxide field effect transistors.At a very basic level, both devices control the current at their outputs (namingconventions differ between types of transistor), but the fundamental difference (atleast for our purposes) lies in their control mechanisms. BJT’s are current-controlled,meaning that the output current Iout is proportional to the current flowing out of thebase Ibase by some factor α. MOSFET’s on the other hand are voltage-controlled,translating a voltage on their gate to a resistance between their input and outputterminals. MOSFET’s are better suited for our purposes for a few reasons. One,being voltage controlled, it is much easier to interface them than BJT’s since all theother logic in the project is also voltage based. Also, MOSFET’s are better suited tobe pure switches than BJT’s which are better used for amplification. It is much easierto saturate a MOSFET and get it to act like a wire than it is to fully activate a BJTbecause there are no considerations to make on things such as resistor size and pullup/down necessities, which leads us to our final advantage: unlike BJTs, MOSFETgates are by function isolated from the source and drain, meaning no current can everbackflow from the gate into the microcontroller and damage it, a valuable propertyto have when dealing with high voltage power sources.

Within both classes of transistor there are two further division dealing with pri-mary charge carriers and method of operation. For MOSFETs the first segmentationoccurs between enhancement type FETs versus depletion type FETs. Enhancementtype FETs require a gate-source voltage to turn the device on, whereas depletion typeFETs require the gate-source voltage to turn the device off. Though both can be usedfor our purposes, enhancement type FETs are used because they are far more readilyavailable. The second and more important division is between N-channel (primarycarriers are electrons) and P-channel (primary carriers are holes). Though there isnothing both transistors cannot do on their own, P-channel transistors are used inthe array because by nature they facilitate high side switching, meaning they can beconnected directly to the power source and be used as switches. This is possible butnot so trivial with N-channel MOSFETs.

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The transistors used in the LED array are International Rectifier IRF9540Ns,which are enhancement mode P-channel power MOSFETs. These were chosen be-cause they are a match for our design purposes, are fairly inexpensive, and becausethey have a very high carrying capacity, with a continuous drain current limit of 23 Aand a pulsed current limit of 76 A, which guarantees that the LED array will receiveample power.

NOT Gate

NOT gates simply invert their input signals and make the inverted signals available asoutputs. These logic components are required in the final design for proper interfacingof the MOSFETS. The specific ICs used in the project are the NXP 74F04 hexinverters.

a NOT a

0 11 0

Figure 1.1: The truth table for the NOT function.

Level Shifter

There are two main binary logic levels the LED array must contend with. All ICspreviously mentioned use TTL voltage, which ranges from 0 V to 5 V (anythingabove 2 V is considered high). However, the MOSFETs used to gate the layers mayrequire voltages much higher than 5 V. As stated in the transistor subsection, forP-channel MOSFETs to shut off, the gate-source voltage must be close to 0 V. Thisposes a problem because if the transistor’s source is connected to a power supply witha voltage even marginally higher than 5 V, the gate-source voltage will never be 0 V.This will result in the transistors being permanently on. To remedy this, the TTLlogic voltage coming from the selection ICs must be upscaled to the voltage of thepower supply, which is accomplished by a level shifter.

The level shifters used for the array are Texas Instruments CD4504Bs, each ofwhich is capable of shifting six input signals. The ICs take two supply lines, VCC andVDD, with VCC being its supply voltage and VDD the voltage of the power source. Thechip then scales each input from TTL voltage to the level defined by VDD. Note thatthough the same effect can be achieved using pull up resistors and buffers, we preferto use a dedicated level shifter to do this conversion because it is far more robust andefficient.

Electret Condenser Microphone

A standard electret condenser microphone will be used as an analog sound-to-voltagetransducer. The microphone will have its own standard amplification circuit in or-

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der to scale up the microvoltages it produces to the 5 V necessary for input to themicrocontroller. The circuit diagram for the input amplifier is as shown in Figure 1.2.

Figure 1.2: The amplification circuit of the Electret Condenser Microphone.

Power Supply

The LED array, due to its large size and high power components, requires a massivecurrent source to achieve full brightness. Though more detailed calculations will bemade in Section 2.1, the required current is on the order of 60 A. To provide suchpower (on the order of 600 W), we utilize a relatively high end computer power supplyunit.

The specific power supply used is the OCZ ZT Series 750W Fully-Modular 80PLUSBronze High Performance Power Supply. At 12 V this power supply is capable ofdelivering a continuous current of 63 A, which suffices for the array. The PSU is alsorelatively inexpensive.

Stellaris EKK-LM3S1968

The microcontroller used to command the circuit is the Stellaris LM3S1968. TheLM3S1968 is a high performance microcontroller which has a multitude of GPIOpins as well as many important features and qualities that make it an ideal choice forour LED array.

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One of the primary considerations made by our team when choosing a micro-controller was the core clock speed. Though a higher clock generally gives greaterperformance in terms of raw MIPS, the main impact for our project of a higher clockspeed is a higher data clock rate. As analyzed in Section 1.1, the refresh rate ofthe LED array is directly proportional to the speed of the data clock, which itself isrelated to the core clock speed with:

fmax =E

2(1.1)

where fmax is the maximum data clock speed and E is the maximum core clock speed.The LM3S1968 has a maximum core clock speed of 50 MHz, which means it can

transmit data at 25 MHz, approaching the physical limit imposed by the TLC5940,and thus can extract most of the performance that is offered by the chip.

Another capability required by the TLC5940 is a PWM generator. Recall thatthe TLC5940, alongside its data clock, requires a grayscale clock to operate. Ontop of that, the design mandates that the clock be variable across a wide range offrequencies to allow for refresh rate scaling. The Stellaris meets this criteria with easewith its ability to generate precise PWM waveforms with arbitrary lengths which canbe made to exactly model the waveform of a normal clock signal.

A more application specific but still vital feature of the LM3S1968 is the hardwareedge counter. As will be explained in Section 2.1, the ability of the LM3S1968 toaccurately count the pulses of a waveform, as well as throw interrupts on when aspecified number of pulses are counted is essential for proper interfacing with theTLC5940.

On the software side, an important component of the LM3S1968 is the existenceof a floating point coprocessor as well as compatibility with the C standard library.Having a floating point datatype greatly increases the accuracy of any dynamic an-imations we may simulate. Algorithms such as the fast fourier transform and theRunge-Kutta time integration scheme benefit greatly both in accuracy and speed byutilizing a floating point datatype. Access to the C standard library further simplifiesand accelerates the code allowing for greater performance.

Decoder/Demultiplexer and AND Gate

A 4 to 16 active high decoder/demultiplexer and multiple AND Gates are used insome of the preliminary designs, though they are discarded in the final construction.

A decoder is a device which, as its name suggests, decodes information presenton its input lines. Thus, a 4 to 16 decoder takes 4 inputs, generates a number ncorresponding to the binary value indicated by the inputs, and then activates its nthoutput. The decoders used in the preliminary designs are active low, meaning thatthe selected output will be forced to ground while all others will be set to high.

An AND gate simply performs a logical AND on two inputs, and correspondinglysets the outputs.

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a b a AND b

0 0 00 1 01 0 01 1 1

Figure 1.3: The truth table for the AND function.

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Chapter 2

Designs

2.1 Final Design [j = 10, i = 100]

Figure 2.1: The schematic of our solution to the array driver problem.

In its most generality, the solution entails successively activating every cross sectionof any single dimension of the given array. Every corresponding element in each crosssection is connected together on the low side. This provides for i connections on thelow side of the driver, each of which is simultaneously current-controlled via its ownPWM sink. This arrangement effectively allows for fully individual addressability ofevery single element of the array.

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Said another way, whereas our preliminary designs had been focused on attemptingto minimize i, so as to economize on the required quantity of PWM sinks, the keyto the entire problem lies in minimizing j. Realizing that this is the basis of ourproblem with the LED array, we have designed the high side to iterate only througha single dimension, reducing j to its bare minimum. Note that zeroing of the quantityof dimensions of iteration would defeat the purpose of the project entirely; the ideais to power an array of elements too large to control as an entire whole. Not havingto iterate at all represents a trivial solution and thus will not be considered for thepurposes of our project.

The final design for our LED array, then, conceptually represents the array as tenslices of 100 LEDs each arranged in vertical layers. Each layer’s LEDs are connectedtogether by their common anodes, which are in turn connected to ten individualtransistor switches, one per layer. The refresh process iteratively activates a singlelayer at a time, while at the same time independently modulating the current througheach cathode in the layer (three per LED) to control its color. The control logic isessentially divided into two sections, high side and low side referring to the location ofparts relative to LED anodes.The following in depth description of our LED array’sdriver seeks to explain by specific example (that of our LED array) the general natureof our solution to this problem.

The High Side of our LED Array Driver

Description

The high side of our design consists of a microcontroller controlling a single 10-bitserial-in parallel-out shift register. This shift register has, at any one time, only asingle output high; all others are low. Iteration proceeds during a single frame byfeeding into the shift register further low inputs, thus advancing the high outputthrough the entire register. After the high output is lost to the other end of theregister, another is seeded into the entry point signifying a new frame, and iterationbegins anew.

Each output of the register is connected to its own input on a level shifter via aNOT gate. The level shifter effectively takes the inverted TTL voltage of the shiftregister and raises it to the high voltage we will be using for the transistor. The levelshifter is fed with the power input of an external source, which it then sets on anoutput pin if the corresponding input pin is high at the TTL level. The output of thelevel shifter is then connected to its own P-channel enhancement mode MOSFET.Each transistor has its source connected to the same common high voltage referenceas the level shifter and its drain connected to its own layer of the LED array. By thiswe mean that, for any given horizontal layer of the array, every member of that layerhas its common anode connected to the drain of the MOSFET.

It should be noted that the inverter at the terminal of each shift register outputis very necessary. This is due to the fact that while the shift register selects a singleone of its outputs to be high, the transistor interprets a high signal at its gate as aclosed switch. This is a nuance of having to use a P-Channel MOSFET, and is, as

15

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seen above, easily overcome by inverting the input signals. In this way, the selectedoutput of the shift register will in turn select a layer to be on while maintainingall other layers off rather than performing the inverse function, which would causecatastrophic levels of power draw from our external supply and present grave dangerto our power system circuit overall. This completes the description of the high sideof the LED array driver.

Analysis

The entire purpose of the high side of the design is to isolate a single cross sectionof the dimension of iteration at any time and cycle through them all to produce oneframe of animation. In this instance, the dimension of iteration can be thought of asthe vertical axis and thus contains exactly 10 elements. Then, each cross section ofthis dimension is a flat, horizontal layer of the array containing exactly 100 elements.The high side of the driver ensures that at any point in time, only one layer (100LEDs) have their anodes high at a time. That is, only one layer of the array can beactive at once.

It must be stressed that this method then requires that only one pin on the shiftregister is active at any time, else multiple layers would be active simultaneously.From an overview standpoint, the effect of using shift registers as opposed to a decodersystem to select each layer is no better. In fact, it could be argued that this is adegradation in addressability, as one can no longer arbitrarily select a layer out of thearray; instead, iteration must proceed sequentially as the shift registers are advancedone by one. However, this train of thought is misleading, as the benefits gained fromusing shift registers far outweigh their limitations.

Consider a single refresh of the array. In a worst case situation, every singleelement of the array must be updated, requiring one to iterate through each and everylayer. Since refreshes proceed at 60 Hz, the order of updates makes no difference tothe human eye, and one may as well apply Occam’s Razor and proceed in an intuitivelinear pattern. Considering also that out-of-order updating requires the extra effort ofkeeping track of which layers have already been updated and which require updatingwithin the current frame, it makes the most sense to proceed in a very linear waythat does not require such logging.

On a hardware level, implementation of the shift registers also saves many clockcycles due to their simple operation. The entire control of the iteration is done witha total of three pins, and the only action necessary to advance iteration is the pulsingof a GPIO pin. Furthermore, shift registers significantly cut down on the signalpropagation delay from the microcontroller to the switching transistor. In a decodersystem, the signal must propagate through many transistors on its way through thetwo integrated circuits, but with a shift register, the signal simply propagates fromone flip flop to the next. In fact, according to the the CD74HC164E data sheet [5],signal delay using shift registers instead of decoders drops a full order of magnitude.

This entire high side system is advantageous for a number of reasons. First andforemost, it puts little pressure on the microcontroller itself. Necessitating a massiveclock speed (> 20 MHz) greatly limits the pool of suitable microcontrollers one can

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use to run the driver with, and it is for this reason that minimization of j is essential.As we will be using the Stellaris EKK-LM3S1968 microcontroller, we have an upperlimit of 50 MHz on our microcontroller.

Second, the entire iteration scheme is done very efficiently, with very few unpro-ductive delays during the process. Every LED is activated practically instantaneouslyas soon as current is allowed to flow through it. This is done using the shift regis-ter acting through an inverter and a level shifter. Since these are simple transistordevices, their total propagation delays do not amount to anything considerable. Theselection process as a whole is about as efficient as it can be, and so we are confidentin judging it to be optimised to its full extent.

Third, this scheme puts as little pressure on the power source as could be hopedfor. Specifically, its maximum instantaneous current sourcing requirements are com-parable to what iteration through the entire array as a whole would require. Thefollowing calculations serve to demonstrate the exact theoretical current that wouldbe needed from the power source. Note that the calculations are done in the worstpossible situation, assuming that every element of the entire cross section currentlychosen is active simultaneously at maximum brightness on all three color channels(bright white).

In our case, we are interested in determining the maximum current draw for asingle entire layer because only a layer can be active at any given time. The timespent on one layer during one refresh, tactive, is found by:

tactive =1

j ∗ frefresh=

1

10 ∗ 60= 0.001667 s (2.1)

This means that the I vs t curve for a single layer through one full refresh of thearray looks like the following. Note that both axes are in arbitrary units with a t of1.0 representing one full refresh cycle.

Figure 2.2: The current going through one LED during a single full refresh. The LEDis on for a tenth of the cycle.

We must ensure that for the amount of time that the layer is active, each LEDis fed its maximum current of 60 mA. This means that the above curve must have a

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time average of 60 mA over the arbitrary interval shown. The required amplitude ofthe spike, then, can be calculated as follows:

Average Value =1

tmax − tmin

∫ tmax

tmin

f(t) dt (2.2)

=1

160

− 0

∫ 160

0

Iinst ∗(H(t) −H

(t− 1

600

))dt (2.3)

=Iinst10

(2.4)

Where H(t) is the Heaviside Theta function, more commonly known in the field ofelectrical engineering as the unit step function.

Thus, the time-averaged current passing through the LED throughout the frameof iteration has been shown to be exactly one-tenth of the instantaneous currentthrough the LED during its time active. From this, we can set the constraint thatthe total time-average current should be the Imax = 60 mA of the LED and calculatethe total current draw required for a fully active layer.

Imax = 60 mA =Iinst10

(2.5)

Iinst = 600 mA (2.6)

Itotal = Iinst ∗ 100 = 60 A (2.7)

(2.8)

Thus, we have arrived at the conclusion that the power source needs to be able tosource at most 60 Amperes instantaneously to power the array as a whole to maximumbrightness. It must be said that this horrifying quantity is absolutely unavoidable.It is an effect of constructing such a large array; no matter how power is distributed.The required amount of continuous power needed is calculated below.

1000 ∗ 60 mA = 60 A (2.9)

In fact, this is a way of ensuring that the calculations have been done correctly, astheir sole purpose is to determine the time relative distribution of the total currentrequired to power each LED to maximum brightness. There is no way to decreasethis quantity other than lowering the number of LEDs in the array. Needless to say,this would be contradictory to the original design objectives, and as such, will not beconsidered in the solution process.

It should be noted here that at maximum power, the array is nothing short ofblinding, and thus will never truly be operated continuously at this power. Rather,it will be operated with a lower total current demand than is shown here. This isnot to say, however, our selected power source cannot cope with these demands; it ispossible for our source to provide up to 62 Amperes of continuous power. The damage,then, will come in the form of overheating components and the total electricity bill.

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The former can be remedied with such techniques as fanning, heatsinking, and liquidcooling. The latter, however, is a necessary expense of the array.

Secondly, though this system requires for such massive currents to be sourced,each LED itself only experiences a total of 600 mA. This is exceedingly good, as theLEDs themselves can only sustain a certain maximum instantaneous current, wellabove this value. In comparison, consider the scheme of iterating singly through eachelement in the array. This would require for the full instantaneous current of 60 Ampsto go through each LED, an unreasonable number entirely, sure to blow out each andevery component and its wires.

The Low Side of our LED Array Driver

Description

The low side of the design consists of collectively feeding every corresponding cathodewithin each cross section of iteration (here, every cathode in each column) into itsown PWM sink. Note that in total, this calls for 300 independent PWM sinks, 3per column for each color channel times 100 columns. It is here that the TexasInstruments TLC5940 IC comes into play due solely to its convenience in situationsrequiring a large quantity of PWM sinks: every IC contains 16 PWM sinks, each ofwhich can be used independently of the others. See Section 1.1 for details. Thus, ourLED array requires a total of 19 TLC5940 chips, an easily manageable quantity dueto their simplistic chainability.

Operation of the TLC5940

As stated in Section 1.1, the TLC5940 allows each of its output pins to act as a PWMsink with a resolution of 12-bits. The other relevant aspects of the IC that have beenoverlooked up until this point will now be discussed; for a full analysis of its innerworkings and for the specifics as to how we control its functionality, see Section 1.1.

The implementation of the TLC5940 as a PWM sink also has a slightly moresubtle advantage: that of the IREF. This single pin input requires a resistor bridgingit to ground voltage. The choice of resistor used is crucial as its value is used as areference for the maximum I to be sunk on each output pin of the IC. The resistanceis translated linearly into a current value, allowing an extremely simple plug-and-playoverall brightness control. This is an ideal way to control the overall brightness, as asimple turn of a potentiometer could control the entire array.

A second, less obvious, bonus of an IREF pin is an indirect method of debuggingthe effectiveness of our external power source. If IREF is lowered, for example, thenthe expected outcome is that the overall brightness of the active LED array will beincreased in proportion to the decrease in resistance. However, if this does not occur,or occurs less than proportionally, we can be sure that the power source has reachedits sourcing capabilities and cannot provide any greater instantaneous current. Onthe other hand, if the brightness is easily controlled by varying the value of IREF, weknow that the power source has not yet reached its ceiling.

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Another important point about implementation of this IC is the use of serial dataas input for the PWM. Each PWM pin requires a total of 12 bits of input data,amounting to 192 bits per TLC5940. Thus, every PWM cycle, 192 bits of data mustbe sent in serially per TLC5940. This results in an unfortunate limiting behaviour,as the TLC5940 has a hardware maximum of 30 MHz for its serial clock frequency.The free time available as a function of the number of TLC5940s that we employis shown in the following calculations. Note that the original formula used to beginwith is derived later in the document. For its derivation, see Equation 2.22 in TheRefresh Rate subsection of the paper .

Assuming a target refresh rate of 60 Hz, a SCLK frequency of 25 MHz, and 10layers:

Sfree = 1 − 0.004608 ∗ j ∗ ξ (2.10)

Where

• Sfree = Proportion of free time available for computation

• ξ = The number of TLC5940 ICs in operation

• j = The number of elements in the dimension of iteration

We can see that as the number of TLCs grows, the free time available decays andrapidly approaches zero.

0 = 1 − 0.0004608 ∗ ξ ∗ j (2.11)

1 = 0.0004608 ∗ ξ ∗ j (2.12)

ξ =2170.14

j≈ 217 (assuming j = 10) (2.13)

Thus, if the number of TLC5940 ICs grows past the boxed quantity, there isessentially no free time left for computation, and no frames can be displayed on thearray at all. This provides an upper limit to the number of PWM sinks we canhave, so while using the TLC5940 ICs ,i is limited to a total of 16 ∗ 217 = 3472individual, single-cathode elements. Note that this number is astronomical and atbest, an idealisation. It will not even be approached in our project.

A disadvantage of the implementation of the TLC5940, then, is an upper boundto the number of elements allowed in one cross section of iteration. It must be noted,however, that this number is enormous, and can be circumvented in a number ofways. For example, j can be increased to cover two dimensions worth of elements,allowing for use of the TLC5940 at the expense of iteration frequency. Or, if desired,the TLC5940 can be discarded in favour of a more appropriate PWM sink.

Analysis

The purpose of the low side of our driver is to provide a method by which to allowindividual addressability and color control of the array’s elements. A simple on/off

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scheme is insufficient for elements such as our RGB LEDs or devices such as motors,which require finer current control in order to operate to their full capabilities. Thus,the intent of the low side is to allow each element to have its own current controlledsink which can be controlled in a relatively simple manner, so that through each fullframe of animation, each and every element can be updated individually.

This current control is implemented through pulse-width modulation, a widelyused method to limit the current passing through a device. PWM is the most ro-bust method of current control and our choice here due to the ease with which itallows precise control. The brightness of each LED color channel can thus be sim-ply represented by a straightforward 12-bit value. Not only does this abstract thehardware-level implementation of RGB LEDs, but it also makes it far easier to writeanimation data on a software level. Each frame then essentially consists of a thousand12-bit values.

The General Form of the Solution

Before discussing why this design is a complete solution to the original problem, wewould do well to consider the array driver in its greatest generality. This allows usto describe its full potential rather than limiting its applicability to simply an LEDarray. Therefore, in its broadest terms, the array driver can once again be describedin terms of its high and low sides, referring to the location of parts relative to thearray’s elements.Note: we will be extensively referencing the i, j, k convention developed in the intro-duction throughout the rest of this section.

The General High Side

The high side of the design essentially controls iteration through any single dimen-sion of the given array. This means that it cycles through the j cross sections of thatdimension repeatedly, activating all i elements of each cross section at a time. Thisis accomplished by using a shift register of minimum length j, which is easily accom-plished even if j >> 10 by chaining multiple shift registers of basis length. The shiftregister functions exactly as described in the above explanations, repeatedly pushinga single high value through while maintaining all other outputs low.

Each shift register output is gated via a NOT gate and a level shifter I/O pair to itsown P-channel enhancement mode MOSFET which acts as a switch between the highvoltage external power supply and the anodes of every element that is a member of theiteration cross section to which that transistor belongs. In this way, each transistoris responsible for the other k − 1 dimensions of the array at once. Furthermore, thehigh voltage supply will be responsible for powering up to i elements simultaneously.

The General Low Side

While the high side mediates power delivery, the low side of the design implementspower control. Conceptually, this involves providing each of the i elements with

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its own current control mechanism. As we have seen, this is best implemented usingpulse width modulation, and so the low side requires i, independent PWM sinks. Thiscan be accomplished in any way; our specific example enlisted use of the TLC5940simply due to its convenience for our purposes. Indeed, any low-side current-controlmechanism would work equally well.

Conclusion

In summary, it can be said that our solution to the array driver problem tackles it byreducing the k-dimensional problem to one of only two dimensions. These consist ofthe high side dimension and the low side dimension, which can be thought of as thedimension of iteration and the dimension of power control, respectively. In analogy,the high side dimension is controlled serially while the low side dimension is takencare of in parallel.

Referring back to the design parameters, this design is a full and thorough solutionto the problem because it satisfies each of our five original criteria in a neat andcomplete manner:

1. It will be necessary to have an overall refresh rate of greater than 60Hz.

This is accomplished easily by iterating through only a single dimension of thearray. At most, the iteration proceeds through 60 ∗ j elements, and as theearlier calculations showed, a refresh rate of 60 Hz is easy. Even in reasonableupscaling, this particular criterion is in little danger, as one would choose thesmallest dimension of the array to iterate through. In theory, dimension sizesof orders of magnitude greater than our 10 could be supported.

2. There must be sufficient free microprocessor clock time between refreshes to de-termine the nature of the next frame.

This has been verified already by our calculations in Equation 2.22.

3. Each LED must be individually color-addressable within each frame of anima-tion. Furthermore, the color addressability must have a small enough resolutionto mask the discrete nature of transitions between adjacent RGB values.

This is readily apparent in our design. As iteration proceeds, each single LEDhas its own dedicated PWM-controlled sink, and so each LED is therefore indi-vidually color-addressable whenever it is iterated through. To address the latterconcern, the PWM has a resolution of 12 bits, providing for 4096 distinct colorstates. Since the standard RGB color space of 8 bits per channel is consideredto be sufficiently continuous, ours will more than suffice to the judgement ofthe human eye.

4. The apparent brightness of any single LED through only one frame of animationmust be comparable to its true continuous maximum brightness. As an extensionto this, our power system must be robust enough to be able to simultaneouslydrive the entire array’s worth of LEDs continuously at the same brightness that

22

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it would power a single LED. This will ensure that the apparent brightness ofany given LED at any given time is uniform, entirely independent of the numberof active LEDs at that point in time.

This is all achieved due to our use of the TLC5940. Though not a directreason to choose this IC over other methods of mass-PWM, it neverthelessaccomplishes brightness control in an almost ideal way. The IREF channelon the IC ensures that each output pin, independent of all others, sinks anexact amount of current. This means that regardless of the situation of therest of the array at the time, each element which is being powered will becurrent-controlled to a precisely determined value, and thus its brightness willbe similarly determined. Here we introduce a qualm, namely that of the powersource being able to supply the required current. This is ensured by employingtransistor gates switching power from an external supply rather than attemptingto source the current from a microcontroller. The external supply can easily beupscaled if required, and thus this design criterion is entirely satisfied by ourdesign.

5. The driving system must be upscalable, ideally to any scale and dimension.

The design is fully upscalable on both the high and low sides. The simplestway to prove this is to consider the array driver solution as a reduction ofdimensions from k to 2. Since k is an arbitrary value, this driver is dimensionallyindependent. No matter how many dimensions the given array consists of, oursolution treats it as a single one on the high side and as k − 1 dimensions onthe low side.

Furthermore, the driver is, for all intents and purposes, fully independent ofthe size of each dimension, within reason. As we have already touched onabove, the high side dimension is already orders of magnitude underpoweredto begin with and can be increased significantly before presenting problems.The low side dimensions can also be similarly upscaled, as that simply requiresmore PWM sinks. Eventually the TLC5940’s hardware limitations would begincausing issues, but since they were simply used for their convenience, anothermethod of low side current control could be used to easily replace them.

2.2 Preliminary Designs

Here, we seek to explain the thought processes which led us to our final design. Manyof the intricacies presented in the final design may not seem to be directly obvious,and so this section attempts to explain why we ended up with the design we did. Wedo so in a chronological manner, starting with the very first considerations we hadand then proceeding to the designs we considered, in the order in which we consideredthem.

Our discussion begins with a decision: the choice of topological space to work in.There are many different geometries in which the array could have been considered,

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each with its own pros and cons. As it turns out, discretization of the standarddimensions in toroidal spaces, spherical spaces, and other such curvilinear geometriesbecome unfeasible to implement due to the large inaccuracies in representing curves.For example, consider the central angular dimension in a bipolar toroidal coordinatesystem. In order display the standard reference circle, you would have a maximumof 10 LEDs along its perimeter, and thus you would have divisions of π

5radians

between each; a decagon, which is a poor representation of the reference circle. Anypicture represented in such a space would be a distortion of what the idealised angularcoordinates require.

Thus, we have decided to do away entirely with any sort of space which depends onan angular dimension(s) and rather deal with the simple Euclidean spaces. Our LEDarray lends itself to this kind of coordinate representation as it is composed of elementseach equally spaced apart in three linear dimensions. This has the additional benefitthat any picture that is to be represented in our array can be represented intuitivelywith linear dimensions, leading to both simpler and more efficient software. Withthis system in mind, let us proceed to analyze the process by which we arrived at ourfinal design. This section is preceded by a chart comparing each of the systems weconsidered throughout our design process.Note: The rest of this section may be skipped without major loss of continuity in theoverall paper.

Design I J PowerSource

PowerSink

PWMControlMethod

High Side Low Side Multi-plexingMethod

The GlobalBus

1 1000 Micro-controller

Micro-controller

Micro-controller

CurrentControlled

IterationControlled

3D De-coder/AND

Trifurcationof the Bus

1 1000 Micro-controller

Micro-controller

Micro-controller

IterationControlled

CurrentControlled

3D De-coder/AND

TLC5940Design 1

10 100 Micro-controller

Micro-controller

TLC5940IC

IterationControlled

CurrentControlled

2D De-coder/AND

TLC5940Design 2

10 100 External External TLC5940IC

IterationControlled

CurrentControlled

2D De-coder/AND

TLC5940Design 3

10 100 External External TLC5940IC

IterationControlled

CurrentControlled

2D ShiftRegis-ter/AND

Final De-sign

100 10 External External TLC5940IC

IterationControlled

CurrentControlled

1D ShiftRegister

Figure 2.3: The progression of our designs.

The Global Bus: Reduction of Dimensions [j = 1000, i = 1]

Taken at face value, the problem of choosing individual LEDs out of a 103 array canbe tackled simply by implementing a coordinate-wise choosing system. Thus, our firstand foremost idea consists of a three dimensional low-side multiplexing of the entirecube. The multiplexing is implemented with AND gates and three decoders, oneper dimension. Each decoder can, at any point in time, assert only a single outputline. Each element within the array is chosen via a triple input AND gate, with its

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inputs being the corresponding decoder coordinates. For example, the element whichis located at coordinate point (1, 2, 3) in the array would have its input to its ANDgate be output 1 of the x decoder, output 2 of the y decoder, and output 3 of the zdecoder. Thus, only if all three of its coordinates are asserted will it turn on.

For all intents and purposes, the intention of this system is to effectively reducethe three dimensional problem of the array to a single virtual dimension of length1000. (One could also think of this situation as introduced, as an implementation ofan x, y, z coordinate system, but this interpretation does not lend itself to our i, j, kconvention as the dimension of iteration here is the only dimension. This also preventsany sort of in-depth analysis of the design as compared with other implementations,and so we would do well to avoid thinking of it in this way.)

As we shall soon see, by its very nature, this sort of design attempt requiresnot common anode LEDs but rather common cathode LEDs. On the high side forthis design, three PWM sources (one per color channel) are implemented using themicrocontroller as a PWM power source itself. Three microcontroller PWM pin outsare each globally connected to corresponding transistors at each LED’s three cathodes.Thus, each color channel on each LED is continuously receiving pulses, but the signalonly propagates through to the actual LED if the transistor gates are open. Also,each LED’s AND gate is connected to all three of its transistors, so that in the eventthe LED is asserted, the PWM signal can pass through and control the LED.

The advantages of this design lie in the fact that the addressability is extremelyintuitive; each LED has its own direct address and can be singled out at any stage inthe iteration process. Thus, a 0 through 999 sweep is unnecessary, and optimizationscan be made as to which LEDs actually need to be asserted in a certain frame.

The disadvantages of this design are numerous and inhibitive. Firstly, the methodby which power is delivered to the system is highly undesirable. Indeed, the micro-controller itself is expected to source the entire current demanded by the LEDs, whichis unreasonable for even the best of microcontrollers. Equation 2.9 shows that therequired current is on the order of 60 Amperes. It should be noted that this ridiculousnumber was not known to be of such magnitude at the time this or the following fewdesigns were conceived, and our determining its scale prompted the transition fromthe TLC5940 Design 1 to the TLC5940 Design 2. This number is damaging to theLEDs themselves because this iteration scheme require that for any single LED tobe activated, the full current goes through it. Our LEDs, and most others in exis-tence, cannot handle instantaneous currents of this magnitude, thus adding anotherdimension of challenge to this design.

Secondly, a refresh rate of at least 60 Hz requires an immensely fast iteration rateif it is to proceed one by one through each element in the array. Though this isnot impossible with modern technology, it remains difficult and expensive to employtop of the line embedded systems, which in turn would take a lot of (at this point,unnecessary) stress. Furthermore, this system allows for each LED to be on for only1

1000of a refresh, requiring the current going through it during its activity to be 1000

times greater than its maximum rated current, namely 60 Amperes. This is absolutelyunfeasible for the LED, and as such, will need to be reconsidered.

Thirdly, and perhaps most significantly, this design presents very little scalability.

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It essentially requires for iteration through every single element of the array, so anexpansion of array size in either three of the dimensions leads to a decrease in thetime allowed per LED, which in turn results in an increase in both the power supplyrequirements and in the required iteration frequency. Both of those are upscalableonly to a certain point, after which it is simply not possible to drive an array withthis design.

Fourthly, simply put, this represents far too much a brute force solution, andtherefore is unappealing as a whole. Thus, we seek to improve our design.

The Divergence of Paths: Trifurcation of the Bus [j = 1000,i = 1]

Our next design is motivated primarily from the power system problems faced whenemploying the Global Bus. The system still reduces the entire array into a onedimensional problem, but attempts to correct the issue of having to use a PWMpower source by seeking to replace it with a PWM sink. Of course, this will requirea switch to the common anode LEDs present in our final design.

The high side of the circuit remains unmolested for this design. Its function is nodifferent; each of the 1000 anodes is effectively assigned its own twelve bit address andcan be singled out in turn to be active. Iteration proceeds identically to the previousdesign, along the effectively linearised single dimension containing every LED as anelement. However, the microcontroller PWM pin out/ triple transistor regime isremoved entirely. The output of the AND gates are simply connected directly to theLEDs common anodes now.

The low side now consists of three individual global buses, one for each color chan-nel. A transistor interrupts the paths of each bus to ground. Each of the transistors iscontrolled by a microcontroller PWM pinout, and thus implements three independentPWM sinks. These low side transistors are a great advantage due to their loweringthe overall demand for transistors by no less than three orders of magnitude. Threetotal transistors on the low side replace 3000 on the previous high side.

This design allows for a PWM sink rather than a PWM source. Not only isthis function easier for the microcontroller to perform, but also allows for greateraccuracy in controlling current flow. The microcontroller’s high output can be used asa constant power supply rather than a pin itself, avoiding instantaneous overdrawingof current. Furthermore, the PWM control is now implemented through a transistorrather than directly into the load, which is a great relief to the PWM pin outs.

However, this design offers little more advantage than this. The same unreasonablepower draw requirements are present as in the previous design. Also, the same issuesof upscalability, iteration speed, and I vs. I are present, and so modifications to thedriver are still required before it can be said that each and every project goal hasbeen comprehensively satisfied.

26

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TLC5940 Design 1 [j = 100, i = 10]

This update to the design seeks to ease the required iteration frequency. The methodin which it accomplishes this involves consolidating each layer into its own threePWM sinks, one per color channel. In this way, iteration can proceed columnwise;the sinks ensure simultaneous control of an entire column as each column is activatedin turn. This reduces the three dimensional problem into one of two dimensions, withthe dimension of iteration containing 100 elements (j = 100) and each of its crosssections containing 10 elements (i = 10).

The high side is thus reduced. It now multiplexes each of the 100 columns, effec-tively assigning each individual column an 8-bit address. In this way, each columncan be singled out and iterated through in a simple, intuitive way. This change re-quires a shift from three-input AND gates to simple two-input ANDs. Furthermore,each column now has its common anodes connected together and fed into an outputthe column’s corresponding AND gate. Note that this reduces the overall requirednumber of AND gates by a factor of 10.

The low side entirely eliminates the bus/transistor combination and instead sinkseach of the 10 iteration cross sections (each horizontal layer) into its own set of threePWM sinks courtesy of the Texas Instruments TLC5940 PWM driver. Note thatsince each chip contains only 16 PWM sinking pins, a total of two TLC5940 chipswill need to be chained to achieve the desired quantity of pins.

This design is far more effective than the previous due simply to the fact that thedimension of iteration has been attenuated by a factor of 10. This allows 10 timesas much time spent per LED, and decreases the required iteration frequency by thesame amount. This puts significantly less stress on the power source, requiring amore modest current draw than previously needed. This is an essential improvementin the design because the slower iteration proceeds, the easier the demands on ourcomponents are, in general.

As we can see, these new power requirements are somewhat more feasible thanbefore. Each LED need suffer only approximately 6 Amperes of instantaneous currentrather than the full intimidating 60 Amperes. This is the main advantage of employingthe parallel PWM sinks. Similarly, the microcontroller hardware does not have tocope with the massive clock frequency requirements as was previously thought inorder to provide a refresh rate of > 60 Hz. This proves beneficial because the fiscalcost of a microcontroller tends to grow exponentially with the clock speed at whichit operates.

However, the design is far from perfect. It should be noted that implementationof the TLC5940 puts many additional constraints on our system. While it allows formany simultaneous PWM sinks, it also decreases our available free computation time.It limits our instantaneous voltage per pin to less than 17 V. Furthermore, it limitsour maximum iteration rate, as it places a 30 MHz ceiling on its own internal clocks.

The existing problems with the way in which iteration is implemented are stillpresent in this design. The microcontroller is expected to source this enormous quan-tity of charge, and this is simply not possible for most, if not all, of today’s micro-controllers. The Texas Instruments EKK-LM3S1968 is no exception to this rule, and

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as we found, it is impossible to power the array to anything above a dim glow usingthe microcontroller as a power source.

TLC5940 Design 2 [j = 100, i = 10]

This design focuses on amending the power sourcing issues. As mentioned in thediscussion above, a microcontroller is simply not a feasible power source for ourproject. Thus, we introduce an external power supply, being extremely careful toisolate it from our microcontroller so as to avoid damage.

The high side undergoes a major renovation; instead of the the multiplexing circuitdirectly powering the common anodes of each column, the AND gates are fed into thegates of 100 individual power MOSFETs via level shifters and inverters, effectivelyimplementing high side switches. Both the level shifter high voltage power channelsand the sources of each transistor are connected to a common high-voltage powersupply capable of supplying a greater than sufficient instantaneous current. Thedrains of each transistor are linked to each element within their corresponding columnswithin the LED array. In this way, two of the dimensions are consolidated into a singledimension of iteration, just as the previous design did. Thus, j = 100 and i = 10.The low side suffers absolutely no change from the previous design; the PWM sinksstill control the entire cross section of iteration as a whole.

This design is far removed from its predecessor simply due to the addition ofan external power source. The microcontroller, specifically the EKK-LM3S1968, isno longer expected to source any current to power the LEDs, and thus the dangerof current overdraw is entirely nullified. So long as the external source is robustenough to easily source current as per our requirements, the microcontroller is entirelyinsulated from any damaging backflow into any of its pins. This is essential in orderto protect the valuable microcontroller from taking damage due to overvolting orburning out circuitry.

The level shifter is necessary to raise the voltage at the gate to that of the sourceof the transistor so proper switching can be achieved. Additionally, the P-channelMOSFET acts as an open switch only when the potential at the source is much greaterthan that of the drain, so the input signal requires inverting. A NOT gate is usedfor this purpose, in the form of a hex inverter IC. This ensures that when an activesignal is asserted, the gate is sent low and the transistor is activated, and when theoff signal is asserted, the gate goes high and shuts off the power to the drain.

The refresh rate remains equally poor as in the previous design, as does thecurrent-draw time period per LED. While it may suffice, it suffers from very lim-ited upscaling ability, and thus the dimension of iteration will always be limited to arelatively small number. This is, of course, unacceptable by all accounts and thus weproceed to make further modifications to our design.

TLC5940 Design 3 [j = 100, i = 10]

This next design supplants the entire high side multiplexing regime with a muchsimpler and more elegant solution: shift registers, the same method seen in our final

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design.The high side implements serial-in parallel-out shift registers as opposed to the

decoders to select between the 100 columns. Two 8-bit shift registers are chainedtogether. Two of the resultant 16-bit shift registers each have 10 of their paralleloutputs connected to each element in two perpendicular dimensions of the arrayvia the same NOT/level shifter I/O and MOSFETs as before. Thus, the array iseffectively multiplexed by use of the shift registers, and one can once again selectexactly one of the 100 columns at any one time. This is achieved by, at all times,having only one master-slave flip-flop in each extended shift register active at anytime. The other parallel outs are all set to low, and thus only the single columnchosen by both of the shift registers together is activated.

Though this design is essentially the same as the previous one, the addition of shiftregisters is noteworthy for many reasons, most of which have already been discussedin Section 2.1. We will not repeat those here, but for the fact that it simplifiesthe microcontroller and software interface greatly. Shift registers save a significantamount of propagation delay as compared with decoders. Plus, only 3 total pins perregister are required, of which only one pulse is required to shift the register. Thedecoders, on the other hand, require 4 address lines each to be maintained at a specificvalue in order to assert an output line.

On the downside, every one of the issues inherent with the previous design arestill present in this one. Both the iteration frequency and power source demands holdlittle hope for upscaling and are not nearly as clean as we would like them to be. Theuse of the TLC still greatly limits our expandability also, and so this solution is notelegant enough to deem the final design.

Premise of the Final Design

The final design seeks to overcome the frequency obstacle which has been present andinhibitive throughout all of the preliminary designs. The way in which this is donerepresents a shift of mindset from that of individual control to that of broad scalecontrol. The final design corrects this issue by using only one shift register to iteratethrough only one of the three dimensions of our array. Cross sections are then layersof the array, each containing 100 elements. Each of these elements is given its ownset of 3 TLC5940 PWM sinks. The design calls for the chaining of 19 TLC5940 ICs,but this is equally simple as chaining 2.

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Figure 2.4: A summary of the entire design process.

2.3 Implementation

This section deals with our physical implementation of the solution to the array driverproblem, including both the hardware used and the method by which the materialsare put together to form a fully functional three dimensional 10x10x10 RGB LEDarray. The physical product is essentially a proof of concept, ensuring that our ideasdeveloped throughout this paper, specifically the proposed array driver design, isable to function as promised in the real world. Though every hardware specificationis theoretically met, it is always beneficial to have tangible proof, and thus we builtan initial scaled down prototype and the final full-fledged LED array.

This section is divided into two major subsections, the Materials and the Con-struction. The Materials subsection seeks to break down each of the materials weuse in order to construct our physical model. The Construction subsection is furthersubdivided into two parts, the Scale Model, and the Final Array. Note: the readermay skip this Implementation section entirely without significant loss of continuity.

The Materials

This section highlights all of the equipment and materials used in our project. Thelist is preceded with a list of components that actually make up the array whosedetailed information is not found here, but rather in Section 1.1.

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1000x RGB Common Anode LEDs19x TLC5940NT IC10x Power P-Channel Enhancement Mode MOSFET2x Level Shifter2x Shift Register1x External Power Supply1x Stellaris EKK-LM3S1968 Microcontroller

The following are defined within this section as they are necessary to build the arraybut do not contribute to it.

300x 1 mm Diameter Acrylic Rod

The rods we use in our array are each cut to 27 cm long to match the side length ofour project, and are 1 mm in diameter. These rods are of use only for support. Theywill provide the infrastructure around which our LEDs are arranged, both holdingthem in place permanently and allowing for a modicum of shock resistance. Theessential requirements for these rods are that they be absolutely transparent and asthin as possible while still maintaining their structural integrity. This allows themto be as invisible as possible in the overall design so that they do not interfere withvisibility of array elements. Acrylic is the material of choice for this because of itseconomic value and its ease of working with. It also forms a relatively steady, if notstrong, bond with hot glue, our choice of adhesive. This cannot be said about manyother materials involving metals.

6x Breadboard

The breadboards we will use for our model are of standard dimensions, 7.25 x 3.75inches. They each have 830 test points grouped together into nodes and buses. Theindividual points in each node are separated by a spacing of 0.1 inches and together,and a total of five points comprises a single node. There are two horizontal buslines, which are intended for use as a high and low voltage reference, but can easilybe adapted for use as obscenely large nodes. The breadboard points themselves areeach formed using springy clips beneath the surface perforations, and are rated atan absolute maximum of one amp at five volts. Thus, if any node is to be supplieda greater potential or current than these limits, multiple channels should be used inparallel to ensure that the limits are not superseded.

The breadboards also present a limit of approximately 10 MHz on the frequenciesof the components inserted into their test points. This is due to the internal contactswithin the board having a stray capacitance on the order of 10−12 Farads, which beginsto significantly interfere with signals oscillating faster than the given specifications.This could potentially present a problem because it cannot be simply circumventedby splitting a channel into multiple parallel ones. For example, the lines for ourGSCLK and SCLK need to run at at least 2.5 times the rated maximum of 10 MHzwhich could present issues if the breadboard is to be used to convey the signal. Thus,

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the breadboard is a necessary inconvenience, and will only be used for design of thePrototype and will not be used in the final array.

6x Pre-Punched Blank Protoboards

The protoboards used for the final design have dimensions of 3 x 4.25 inches, and eachcontain 1224 contact points spaced apart at 0.1 inches each. This allows for placementof standard ICs inside the board with ease. The protoboards are fully solderable andare lined with copper as their conductive layer. Protoboards are chosen for theirconvenience in making permanent circuits as opposed to using breadboards, whichare solderless and therefore impermanent. Another significant advantage of usingprotoboards is that they effectively remove the frequency limitations inherent withbreadboards. This is due chiefly to the lack of capacitance between adjacent points.Thus, protoboards offer little impedance to the frequencies at which our array will beoperating and are viable mediums upon which to construct our final circuitry.

1x 28 Gauge Wire

The wires used for our protoboard and breadboard connections are lengths of a spoolof 28 gauge monofilament copper cored wire. This wire is insulated and will needto be cut to required lengths as necessary. The reason for our choice of 28 gaugeis because it provides a suitable blend between stiffness and flexibility. Any thickerwire becomes too difficult to manipulate but any thinner is too weak to be of robustuse. A thick layer of insulation is also necessary because this wire will be used as aconduit of the high voltage to the LED array, requiring absolute isolation from allother circuitry least valuable parts burn out. Issues of ampacity will be discussed inthe following item.

1x 28 Gauge Magnet Wire

The wire of choice for internal connections within the array is a 28 gauge gold-coatedmagnet wire. It is chosen solely for its invisibility from a distance. At 28 gauge, itsthickness is negligible, and thus will be about as unobtrusive as possible to the overallarray. Gold was chosen as the color over red because it is closer to a neutral color.The only issue with such thin wire is its current carrying capabilities. The followingcalculations serve to prove that the ampacity of the wire is sufficient for our purposes.The Standard Handbook for Electrical Engineers lists the following formula:

33 ∗ S ∗(I

A

)2

= log

(Tm − Ta234 + Ta

+ 1

)(2.14)

• I = current in Amperes

• A = area of the wire in circular mils = 160 cm for 28 gauge wire

• S = time the current flows in seconds

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• Tm = melting point in Celsius = 1083 C for copper

• Ta = ambient temp in Celsius = 25 C for room temperature

See pp. 4-74 to 4-79 of the 13th edition of the Handbook for more information [8].Solving for S as a function of the other variables, we obtain the following:

S =

(AI

)2log(Tm−Ta234+Ta

+ 1)

33(2.15)

Plugging in the appropriate constants, we get S as a function of I:

S =541.079

I2(2.16)

Each LED requires a total of 60 mA going through for a total of 1/10 of the refreshcycle. In the worst case, this means that any single column of the array needs to carrya maximum of 600 mA continuously. The amount of time that 28 gauge copper wirecan sustain such a current is:

S =541.079

0.62= 1503 seconds = 25 minutes (2.17)

Thus, these calculations serve to show that such thin wire can easily sustain thecurrents required. The array can run at full power for up to 25 full minutes withoutfailure due to the wires, much longer with air cooling and other thermal modulationtechniques.

1x Plexiglas Sheet

Approximately 2 square feet of standard plexiglas sheet will be used in making ourarray. The sheet is approximately 0.25 inches thick. Plexiglas is the material of choicedue to its ease of machining and flexibility. It can take significant stress withoutfracturing and is relatively shock resistant. We will be using it only to make a globalpattern out of, but in this way we can ensure that the pattern is versatile and canlast throughout ten castings. It is also transparent, and so will help with debuggingas will be explained later.

1x Permanent Marker

The marker of choice for our purposes is a standard black Sharpie brand marker. Itwill be used for marking on the plexiglas sheet.

1x Hot Glue Gun + Refills

A standard hot glue gun and its hot glue refills will be used as the fixative of choicefor our project. Though not the most permanent of adhesives, hot glue’s conveniencefar outweighs any of its limitations. We reason that the final LED array is nevergoing to experience temperatures exceeding 400 Fahrenheit or or significant stress orshock. This renders the use of any industrial strength adhesives unnecessary.

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1x Soldering Iron + Solder

Solder will be used to bind our electrical components together. The solder of choiceis a standard 60/40 mix of tin and lead, respectively, and is cored with flux for easeof application.

1x Drill + Bit

The drill of choice for our purposes is a drill press with a 5 mm bit. A press is usedinstead of a standard hand drill due to its perfection in drilling holes parallel to thesurface normal. This property is key to our design as is explained below.

The Construction

The Prototype

The purpose of constructing a prototype is to have a small scale model to beginwith. Throughout our design process, we have been testing our ideas in various waysto ensure what we are considering is feasible. Indeed, the discovery of many of theissues we found and corrected can only be attributed to building small scale LEDarrays and checking them for full functionality. Needless to say, this section couldbe populated easily with tens of preliminary implementations, but in order to saveon unnecessary detail, we will describe in depth only the last scaled design we built,which is essentially a 3x3x3 RGB LED array which in every sense functions exactlyas a full 10x10x10 RGB LED array does.

There are a number of reasons to build such a model, chief among them the safetyof equipment. LEDs, ICs, and microcontrollers are all valuable commodities, and assuch, mass failure must be safeguarded. A 3x3x3 array requires a total of only 27LEDs and two TLC5940 ICs. If the design being tested contains a fatal flaw thatcould potentially damage our LEDs or ICs, it would be preferable to lose as few partsas possible. Thus, small scale models have been used extensively in debugging ourdesign concepts, the largest of which is the final model here deemed the Prototype.Like each of the models, the Prototype is built exclusively on a breadboard, and assuch, is impermanent and exists solely for testing purposes. Its construction processcan be summarised in a very straightforward manner as follows.

The first step involves placement of the LEDs. There are a total of 27 RGB LEDswhich must be arranged in a manner which is both simple to wire on a breadboardand also conducive to testing. The consensus for this involved separating the LEDsinto 3 disjoint squares separated on a field of breadboards. Each square consists of9 LEDs, equally spaced apart. Together, the three squares represent a 3x3x3 LEDarray with each square modeling a single horizontal layer of the array. This is anemulation of a small scale LED array, dilated from the full array by a factor of 0.3 ineach dimension.

The second step involves placement of the electrical components, including a singleshift register, two TLC5940 ICs, a single level shifter, three power MOSFETs, andthe microcontroller. The circuit diagram shown in Figure 2.1 demonstrates the layout

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of each component in the prototype. Note that this layout matches exactly that ofour final design. The microcontroller directly interfaces only with the shift registerand with the TLC5940 ICs. The entire power system circuit is only connected to themicrocontroller via the main ground reference, and thus the two circuits are essentiallydisjoint.

The testing of the Prototype is done by the method of interchangeable parts.With our setup, the external power source is easily replaceable, and it is a simplematter to remove components and place new ones. This allows for simple debuggingas necessary. For example, if one desires to quantify the current passing through anode, all that is necessary is to open up the node and bridge the gap and measure theintervening current. If it becomes necessary to determine whether certain parts areworking the way they should, they can easily be changed out or replaced with similarcomponents which may perform the same function in a different way. Such was thecase when we were deciding between BJT and MOSFET transistors.

The software side is also ideal for testing the limits of our circuit, as it is a simplematter to force the software to interface as though we are working with a full 10x10x10.This is a strong advantage of using a small scale model; it can be treated as thoughit were full scale while maintaining the debugging capabilities inherent with the useof breadboards, chiefly the interchangeability mentioned in the paragraph above.Some of the software-side tests which were performed on the Prototype include, forexample, a HSL color sweep, scrolling text output, and a few computationally-heavyalgorithms. The complete success of these tests signifies that we are ready to buildthe full scale array.

The Final Array

Construction of the full sized LED array is to be done differently from the constructionof the Prototype, chiefly due to its permanent nature as opposed to the Prototype’suse of breadboards and other solderless fixtures. Construction will begin by firstmaking each individual layer, which will be connected as a whole by its elements’common anodes and support rods laid out in a grid like pattern. The individual layerswill then be assembled into a whole using support rods for each column, intended tospace apart the layers precisely as well as perform their namesake’s function. Thisprocess is simple enough conceptually that it belies the enormous effort requiredto solder every joint. The driver itself is then assembled exactly as described inSection 2.1. The physical implementation of the driver is not so important as thecircuit paths created, as it will not suffer significant visibility in comparison with thenecessarily aesthetic LED array.

Casting of the Die The first step involves construction of a mold for arrangingsingle layers. The mold allows for impermanently maintaining exactly 100 LEDs inthe relative positions that they will hold in a single cross section of iteration. Thearrangement forms an equally spaced square matrix, with each element spaced apartfrom its neighbors by an exact quantity. The LEDs are held upside-down within themold so that their pinouts are accessible for working with. It is necessary that the

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mould be reusable as it will be used to cast each of the ten layers of the array insuccession.

The mold itself is fashioned out of a simple plexiglas sheet. Holes of exactly 5mm diameter (the bulb diameter of our LEDs) are drilled into the material at regularintervals. Various drill bits of 5 mm diameter were tested, and the method of trial-and-error was employed to choose the one which created the most snug hole for anLED to fit within. Each of the intervals between adjacent LEDs is predeterminedby delineating a grid pattern of spacing three centimeters. Each intersection of twoperpendicular gridlines represents the position of a single LED; in this way, a quasiperfect spacing of LEDs can be achieved.

Once the intersections are determined, they are marked with a permanent marker.This allows for ease of visibility of the marks and will withstand accidental erasure.Finally, each mark is drilled into in a manner perpendicular to the two dimensionsof the plexiglas sheet. This is of utmost importance because if the hole is at someangle θ with the surface normal, then the resultant LED position will also be atthe same angle, and even though the LED may be spatially located correctly, theangle it forms relative to the other LEDs will result in a nonuniform apparent overallbrightness when the final array is viewed from various angles. This is unacceptable,as it could misrepresent the display of say, a density distribution, even though on ahardware and software level everything is being done correctly.

The resultant plexiglass sheet with markings for each LED acts as a general mouldfor any single layer of the array. A standard baseline for the layer design is essential toassure that the corresponding components of each layer line up along the dimensionperpendicular to the layer. Every column must be perfectly linear, else any calcula-tion performed to display frames would require appropriate correction to offset thedisplaced LEDs. Not only would this provide difficulty on a software level, but itwould also decrease the visual appeal of any image displayed on the array. For ex-ample, if one wished to display the magnitude of a vector field, the resulting displaywould be misleading to the human eye due to points of comparison not lining up.

Anode Consolidation During this step, we cast and create each of the layers ofour array. This is done through judicious use of the mould constructed during theprevious step. Each layer is fabricated individually; the mold is filled with a hundredLEDs and all of the LEDs are connected together using the plexiglas rods, ten perdimension to ensure that the array remains fixed in place. The fastener of choice ishot glue due to its relatively solid bond between plastics and its sheer convenience inuse. Each rod is individually placed before being linked to its cross-members. Theattachment to LEDs occurs to the side of the LED head in as unobtrusive a manneras possible. Since each LED has a finite cone of projection, care is taken to ensurethat the blob of hot glue does not interfere with the light spread.

After all hundred of the plexiglas supports are set into place and the adhesive isallowed to fully cure, the connection of all of the anodes begins. Since each of the onehundred anodes must be linked together, an efficient algorithm must be employed toavoid excessive soldering of awkwardly held joints. Magnet wire is used to connect

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the anodes, as the intention is for the internal circuitry to be as invisible as possible,allowing for minimum disruption of LED visibility. The most effective way to do thisis to cut exactly eleven segments of magnet wire of approximately 30 cm in length,the full side length of our array plus an extra unit of 3 cm to allow for human error.Each wire length will connect one column of anodes in the layer, and the remainingwire will be used in the transverse direction to the others to link together all of thecolumns.

The attachment of magnet wire is no easy feat, and thus deserves more specificinstruction. The wire cannot be simply sanded to remove the insulative coating ascan thicker magnet wires because its sheer thinness will cause it to snap. Thus,an alternative method of insulation removal is necessary. The method we employedis that of an open flame. Holding the wire to the side of an open flame allowsthe insulation to burn off but the copper core to remain unmolested. This is a veryefficient method, as it requires very little time to obtain perfect, precise results. Usingthis technique, each wire is stripped down at intervals corresponding to solder joints.The bare wire is then soldered onto the fixture just like any normal wire.

Array Linkage The individual layers are linked together to form the final cube bya direct stacking method. We begin with the base, to which we fasten all 100 of theremaining column supports. It is critical that the base here refer to the top of theactual array so that assembly proceeds in an upside-down manner. In this way, thecathodes of the LEDs are accessible for soldering moreso than if assembly were toproceed normally. Just as when drilling the holes, all supports must be held at thesurface normal to the base layer. This will ensure that the resultant array will bein the shape of a right rectangular prism, not a parallelepiped of some angle. It isnecessary that the latter shape not be created because the resultant skew distortionwill be applied to every image displayed on the array. Another issue that could resultif the supports are not all mutually parallel is an uneven distribution of damagingtension forces throughout the array. Over time, this could potentially dislocate manyof the joints, and as the wire used for linking is relatively thin, it could easily snapand wreak havoc in an inaccessible location within the cube. However, the bond ofhot glue is fairly flexible, and therefore it is not necessary to be extremely cautiouswhen positioning the rods. As long as they are roughly parallel to the surface normal,the rest will take care of itself.

The next layer is positioned on top of the base layer by feeding it carefully intothe field of rods. It is very necessary that care be taken to ensure that the layer’swire bridges not be broken accidentally because that would require immediate repair.Once the requisite layer is at the right height on the vertical rods (the same widthbetween each LED, 3 cm), it should be fastened in place using the same hot glue asbefore. This will ensure that the structure is rigid and square. If any error is found inthe right nature of all of the angles on the structure, it must be repaired immediately,as once further layers are added, it will be that much harder to correct.

The R,G, and B channels of each corresponding LED in both layers are thenchained together using the magnet wire. This ensures that the columns are linked

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electrically and that each PWM sink can control an entire column using a singleoutput per channel. The magnet wire attachment is somewhat trickier at this stepthan it was in manufacturing the individual layers. The issue arises because once alayer is mounted by many others, it becomes difficult to access, and attempting toget to a joint accessible only within a deep cavity by shoving a soldering iron neckinto is more likely to damage the parts along the inner walls of the hole than tosuccessfully complete the job. Thus, we must develop a new technique to connect thecorresponding cathodes along each column.

The method we used involves the same insulation removal technique as earlier,namely burning it off. three hundred wires are prepared in the exact same way asbefore, stripped of insulation at all ten LED contact points. Then, the first exposedpoint of each is affixed to its designated location in the base array. It is carefully fedthrough the next array layer as it is added on. This must be done carefully enoughto ensure that none of the wires snaps at any point; if this were to occur, it wouldbe exceedingly difficult to remedy, for the same reasons developed in the precedingparagraph. This is certainly the most difficult task of constructing the entire cube,and as such, must be done with extreme care.

The process is then continued iteratively, with each new layer being added onuntil the final array is assembled. The final product will have a total of three hundredchannels coming out of its base corresponding to the three hundred color channelsthat will be sunk into the TLC5940s. Each layer will also have its own master commonanode channel, which will require for another length of magnet wire to be run downthe side of the array which will be closest in proximity to the power system setup foreach layer.

Power System Implementation This section will not explain the intricacies ofthe power system itself. It will simply highlight how the theory developed in Sec-tion 2.1 is implemented in the physical LED array. This implementation begins withthe master common anodes each being connected to external power source via theirown power transistors. The transistors are all placed in a single protoboard and con-nected directly to the leads running down the side of the array. The leads go intothe drains of each transistor and are soldered in place permanently. The transistorsthemselves are gated by the level shifter outputs which are in turn controlled by theshift register outputs, which are all placed on the same protoboard. The outputs ofthe level shifters are connected to gates of the transistors using the standard wirewhich was also used in the breadboard. This is not due to concerns of power draw,but rather due to concerns of thinner wire accidentally getting severed if mishandled.

The registers are in turn controlled by the microcontroller, which stands alone.The appropriate pins of the microcontroller are connected to the registers using thesame thicker wire for the same reasons just mentioned. It is here also that the lackof pins necessary to interface with a shift register as opposed to a decoder comes intogood light; the number of external wires necessary to run from the protoboard to themicrocontroller is a bare minimum of three. Not only does this avoid the running oflarge, stiff leads from part to part, but also decreases the amount and cost of material

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required to make this design work.The is as easy to do as it is to think about; the same cannot be said for the

low side. There are a total of three hundred channels which need to be fed intoas many TLC5940 output pins. This is accomplished via use of the the remainingprotoboards, on which the TLC5940 ICs are all soldered in and chained together.The thicker gauge wire would perform well here due to its thickness and insulatednature. However, when soldering the wires to their respective places on the actualbase of the array, they amount to a bundle of significant thickness, which detractsfrom the aesthetic appeal of the overall array. Thus, we have determined that it isbest to use the magnet wire for this purpose also. Though delicate, once bundled andheld in place, there is little danger of tearing. If some catastrophic external eventoccurs which is capable of ripping the bundle out of either end, there will reasonablybe other components to worry about taking damage than some thin wires, which areeasily replaceable at any rate.

The microcontroller must also be interfaced with the TLC5940 ICs, and will doso via the regular 28 gauge wire, for all of the normal reasons. The last step involvesinstallation of the external power source. This is wired directly to the transistor’ssources via the same wire. It is also fed into each of the two level-shifters high voltageinput. It is of critical importance that these connections be insulated and perfect, asany accidental cross-connections could easily destroy vital components which would bedifficult at best to replace once soldered in. Finally, all of the individual protoboardswill be connected together in a stacked formation, with the one containing the powersource on the top. They will not be permanently affixed, however, in the anticipationof wear and tear over time which would require replacing of whichever parts havedied.

Conclusion This completes our survey of the construction of the RGB LED ar-ray. Though not the simplest task to perform, the stepwise method of tackling theconstruction process allows for far fewer errors and misalignments than would say,randomly affixing in LEDs until the array was completed. Needless to say, debuggingthe hardware is at best a pain, and this is why it is easiest to debug as constructionis in progress. Each LED can be tested after the anodes are connected to ensure thatanode bindings are solid. Furthermore, as each new layer is affixed to the array, eachcolor channel can be tested individually to ensure that no side connections have beenaccidentally made as well as that every required joint has been applied properly. Thisis essential, as once the final array is produced, it is practically impossible to accessany elements deep within without causing damage to other members surrounding it.

2.4 Software

Interfacing the TLC5940

In this section we aim to go into some detail as to how the TLC5940 is interfaced ona hardware and software level using the Stellaris EKK-LM3S1968. The full system

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from pin connections to source code will be described, giving a thorough insight intosome of the issues faced and how we overcome them. However, before this it is ofvital importance that one understands how the TLC5940 functions.

Logic Design of the TLC5940

The TLC5940 is internally organized as a collection of registers and comparatorswhich ultimately serve to manipulate the 16 outputs of the chip known as its channels.At the first stage, there are two input shift registers, both 96 wide. However, the tworegisters are chained so they effectively act as one register of length 192. The registersare split to achieve extra functionality which we do not use in this project so it willbe more helpful to just think of the two as being a single unit. Each time the dataclock pin, SCLK (serial clock), is pulsed the input register takes in the bit at the datain line, SIN (serial in), as its first bit and shifts the existing in the register bits downchain by one. This stage is also where the chainability of the TLC5940 is achieved.The last bit of the input shift register is linked to an output pin, SOUT (serial out),which when connected to the SIN pin of another TLC5940 effectively joins the twoinput registers of both TLCs and allows for the control of both chips with only onedata line and one clock line. This chain can physically be extended indefinitely as thelimit is not hardware bound but rather software bound, as will be explained furtherdown.

The data in the input shift register is treated in packets of 12 bits, which makessense since 12 bits * 16 outputs per chip = 192 bits, the length of the register. Thesepackets are also sequentially organized, with bits 0-11 being the first packet, 12-23the second packet, etc. When the TLC5940 detects a pulse on its XLAT pin, itimmediately copies each packet into its own corresponding Grayscale Register, andkeeps it there until the next XLAT pulse. The values in the Grayscale Registersare then used to modulate the outputs of the chip. This latching is helpful for tworeasons: first, the actual grayscale number (represented by the 12 bit packet) does notfluctuate with the shifting of the input register. Second, it is not required to updatethe input register continuously as the previous values stored in the GS Register canbe continually used until the call to update (XLAT), is made.

What we have just described could be called the data input process of the TLC5940.However, there is another simultaneous process which handles the PWM control as-pect of the device. This process is driven by two pins, the grayscale clock pin (GSCLK)and the blank pin (BLANK). Internally, every TLC5940 chip contains 16 GrayscaleCounter Registers, one for each channel, which are 12 wide. Each rising edge on theGSCLK pin numerically increments all 16 of these counters at once, with an upperbound of 212 or 4096. It should be stressed that all 16 counters are controlled bythe one GSCLK pin, as otherwise the logic system becomes excessively complex andinefficient. The BLANK pin is simply the master clear for all 16 Grayscale Counters,as when pulsed all 16 counters, no matter their current value, are reset to 0.

Both of these processes come together in the final stage of the operation of theTLC5940. Recall that each TLC has 16 Grayscale Registers, containing the datainputted by the user, and 16 Grayscale Counters, which are regularly incremented

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by pulses on the GSCLK pin. The final stage is then a simple comparator. For all16 outputs, the internal circuitry compares the values in the corresponding GrayscaleRegister and Counter. If the value in the Register is higher, the chip activates thatparticular channel, and keeps it on until the Counter value exceeds the Register value.This creates a system in which the current sent to each channel is controlled linearlyby the input. An input of 0 means that the value of the corresponding GrayscaleRegister will never be greater than any Counter value, and so the channel sinks nocurrent. Conversely, a value of 4095 means that the Grayscale Register will always begreater than the Counter, causing its respective channel to sink maximum current.Thus, the current sunk by each channel can be controlled from always off all the wayto fully on simply by setting its input from 0 to 4095, which gives rise to the namePulse Width Modulation Control, as the width of the current pulse is modulated bythe input.

This is all that is necessary to understand for our project’s purposes. A lotof information concerning the more complex features of the TLC5940, such as dotcorrection, EEPROM usage and LED Open Detection, has been left out. If thereader is interested in understanding these we recommend reading over the TLC5940datasheet [6].

General Algorithm Overview

Now that the workings of the TLC5940 are clear we can discuss the process followedby the final device driver. Let us first examine the process flowchart seen in Figure 2.5to get an idea of the general algorithm.

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Figure 2.5: Programming flow chart provided by TI to interface the TLC5940. [4]

After initializing the interface lines, the first block of execution deals with settingup and editing the dot correction (DC) data. However, we do not use this feature andso skip this step entirely, which leads us to the block that deals with the actual logicof the chip. This block also goes through some initialization stages which mainly dealwith isolating it from the extra features like dot correction and error checking. Afterthe VPRG check, the block executes the following steps:

1. Initially, two counters, GSCLK Counter and Data Counter, and an array calledGSData are created. GSCLK Counter is used to keep track of the value of theGrayscale Counter Register inside the TLC5940. Data Counter is used as anindex to GSData, which itself contains the actual input values that the userwishes to send to the TLC5940. The size of GSData is 192 ∗ n, where n is thenumber of TLC5940s that are chained.

2. The BLANK pin is set low to allow incrementation of the Grayscale CounterRegister. This also automatically activates all outputs.

3. A nested loop is entered. At each loop increment, the GSCLK Counter iscompared with 4095, which is the maximum value for the Grayscale CounterRegister. If GSCLK Counter is less than 4096, two things happen: first, if theData Counter is less than the 192∗n−1 (the maximum index of the GSData ar-ray), SIN is set to the value at the current data element, GSData[Data Counter],Data Counter is incremented, and SCLK is pulsed to shift the value into the

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TLC5940. Next, the GSCLK pin is pulsed, incrementing the Grayscale CounterRegister, and to keep up GSCLK Counter is also accumulated.

4. When GSCLK Counter reaches 4096, BLANK is set high to reset the GrayscaleCounter Register to 0, XLAT is pulsed to latch in the previously sent GSData,and block is exited.

Notice that the entire algorithm is based on the GSCLK Counter thus by equalityalso the Grayscale Counter Register. This is a very important concept as no TLC5940driver implementation can function without it. The core idea is that one full cycleof the Grayscale Counter Register defines one PWM period. That is, the time ittakes for the GCR to span from 0 to 4095, its maximum value, is the period ofeach refresh cycle. This value is extremely important because it directly controlsthe maximum refresh rate attainable by the system. Suppose that the PWM periodin some implementation happens to be 50 ms. Then, each refresh cycle will need50ms simply to complete as the counter must reach 4095 before another cycle canbe started without corrupting the data inside the input register. Assuming the nextrefresh is started immediately after the first, a total of 1000 ms

50 msrefresh cycles will be

completed in a second, resulting in a maximum update rate of 20Hz. The faster thePWM period, the better the framerate. However, as will later be shown, decreasingthe period also has significant consequences which must be dealt with.

Though the original algorithm functions, it has few characteristics that make itunattractive for final implementation. First, the process is not automatic and runscompletely in the foreground, meaning that the CPU performs the refresh only whenthe user requests it. This is problematic because for the LED array a high refreshrate is vital, and having the update as a foreground process essentially hands controlof that rate to the user, making it highly volatile. Because the user has no direct wayof knowing when the current PWM period ends, he must either manually keep trackor simply guess as to when the period is over and the refresh routine is to be called.Both of these methods are unreliable, intrusive and inefficient. Another issue is thepulsing of the pins GSCLK and SCLK. In the initial algorithm, both of these linesmust be pulsed manually by wiring the GSCLK and SCLK lines to GPIO pins andon each iteration setting the respective pin first to high, then immediately to low.This method, known as bit-banging, is unfavorable because it offers no control overthe speed of the pulses and is relatively inefficient to do because it uses software fora task that hardware specializes in. By far the largest problem with this procedureis that the GSCLK and SCLK are tied, meaning that for every pulse on the GSCLK,there is a pulse at the same time on the SCLK (until of course GSData has beencompletely shifted). This linkage, though it makes implementation simple, also ridsthe driver of a significant amount of control over the TLC5940, because it meansthat to increase the rate of transfer to the chip, one must also decrease the lengthof the PWM period, a side effect which causes insurmountable complications whenimplemented in a more complex algorithm.

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Final Algorithm Overview

Our final interface builds on the original and utilizes the same methodology (though avastly different implementation) as used in Matthew T. Pandina’s article Demystifyingthe TLC5940 [9] which allow it to overcome all the issues that plague the initialalgorithm and make it highly efficient and robust for our purposes.

The final algorithm begins by solving the primary issue of tied clocks. Realizingthat the GSCLK and SCLK serve completely different purposes and have no realreason to be joined together, the process decouples GSCLK and SCLK, and uses twodifferent methods, both hardware, to address each clock and its functions.To guar-antee that GSCLK is given reliable time-steady pulses, the driver uses a PWM wavegenerated from the microcontroller to drive it. Though it may be slightly counterin-tuitive to use a modulating source as a regular clock, such an effect can be achievedby fixing the duty cycle of the wave to 50%. This is illustrated in Figure 2.6.

Figure 2.6: Note that the middle wave perfectly resembles a clock signal.

Furthermore, there are also some crucial benefits to using a PWM wave as a clocksignal. Due to the fact that in most microprocessors PWM waves are generated purelyby hardware, the CPU suffers no strain and computation capability is not affected.For similar reasons, it is very simple to alter the frequency and phase of PWM wavesthrough software, an ability whose usefulness will become clear further on.

Replacing the SCLK is slightly trickier. This clock exists solely to pulse in thegrayscale data to the input shift register, meaning that every time a rising edge isdetected on the SCLK pin the value at SIN at that time is shifted into the register.Though tempting, using a clocking system similar to the PWM control process will

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result in disaster for a few reasons. The most pressing issue is that PWM wavesare continuous once started, meaning that the SIN pin will have to be continuouslyupdated with values even if the chip cannot even react to them yet, which is obviouslyunacceptable. Another prohibitive difficulty is the timing. Each rising pulse of thePWM wave must be perfectly matched with the correct data value on the SIN pin toavoid sending inaccurate values, and though possible this is a nightmare to implementin software. Thus, to solve the original problem, the final driver uses the SerialPeripheral Interface or SPI to drive SCLK and SIN. SPI is a communications protocoldeveloped by Motorola that is very efficient in communicating with peripheral devicesat a high speed. Though SPI has a plethora of features we use it in its simplest 2-pinconfiguration, which will be detailed in the following section. The advantages of SPIover PWM clocks in this scenario are immense. Like PWM, SPI is hardware controlledso there is absolutely no chance of a mis-clock occurring during a transaction. Writingdata using SPI is also extremely simple, as it involves writing to a single outputregister and letting the hardware take care of timing and pulsing. Finally, SPI canachieve extremely high baud rates, capable of transferring data at half of the core’sclock speed.

Figure 2.7: An SPI timing diagram (MOSI stands for master out slave in, which isequivalent to the SIN line). Note how the SCLK pulses are perfectly aligned with thedata pulses. [3]

Though decoupling the clocks frees up a large amount of CPU resources, it alsocreates a flow problem. Recall that in the original design, the value of the GrayscaleCounter Register is actively counted by the software itself so that the program knowswhen a PWM cycle has ended. However, when utilizing a PWM wave there is nodirect way for the program to know how many pulses have occurred because thewave is generated by hardware in the background, making it impossible to controlalgorithm flow by use of software counters. Thus we require two things: a method tocount the pulses on the GSCLK waveform, and a way to alert the software when 4095clock pulses have occurred so that it may perform the post-PWM period routine.

We fulfill the first requirement by using a functionality known as input edge countmode. A feature of most modern embedded systems, input edge count mode allowsa microprocessor to detect rising and falling voltage edges on some of its GPIO pins.The setup process is simple yet powerful: the executing program sets the initial valueof the edge counter, and also provides a target pulse count for the mechanism to

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match. Then, during runtime, the edge counter is decremented by hardware everytime a pulse is detected until the target is met, at which point the processor sets aflag signifying that the desired count has been reached and stops the edge counter(See Figure 2.8). To utilize this mode, we split the GSCLK driving PWM signal fromthe microcontroller and route the second line to the input edge count pin througha resistor to prevent current flow. The processor treats its own PWM wave as anexternal signal and track its pulses. By then setting the counter target to 4095, weget an effective replacement of the GSCLK Counter found in the original algorithm.Note that using edge count mode begins to transform the driver into a backgroundprocess, because unlike the initial algorithm, this method requires nearly zero softwareside manipulation to achieve the same functionality. Once it has initialized the edgecounter functionality and the corresponding registers, the user program is free toprocess other tasks without worry, thus taking a large load off of the CPU.

Figure 2.8: An input edge count mode progression diagram specific to the StellarisLM3S1968. Note that on each rising and falling edge the count is decremented untilit matches the target of 0x0006. [6]

The solution to the second requirement also comes as a benefit of using the edgecount functionality. Recall that the edge counter sets a flag when the target countis met. There are then two ways to use this flag to notify the running program ofthe end of the PWM period. In one approach, the program continuously polls theflag, and then executes the post-PWM period routine when it detects the flag as set.However, this technique reduces the driver to a foreground process since active CPUtime must be spent doing the check. To keep the driver in the background, our driverutilizes an edge count interrupt mechanism which is hardware supported. In thissetup, the hardware itself polls the register and automatically calls a preset function

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in the software when it detects the flag. When the interrupt is called the programhalts its current execution thread, completes the corresponding interrupt routine, andthen returns to where it left off. This method also accurately notifies the programwhen a period is over, but also refrains from using any computation cycles, makingthe driver an invisible thread to the user.

This interrupt, called the edge counter interrupt, is an especially important partof the final interface because it acts as the link between the PWM period processand the data input process. Remember that the original algorithm shifted in thegrayscale data alongside the grayscale counter, as each GSCLK pulse was followedby a bit of data being sent through SIN. In the new approach, we do not have theluxury of doing this since GSCLK is interfaced entirely through hardware, and thevalue of the Grayscale Counter Registers must be known to properly clock in data (ifall data is not clocked in before the counters reset the outputs are undefined). Thus,all the input data is sent during the edge counter interrupt, as that is the only timewhere the value of the Grayscale Counter Registers is known and we can be sure thatno undefined behavior will occur.

With all the pieces complete, we can now discuss how the layer selection systemworks. Since the driving system only addresses one cross sectional layer of the arrayat one time, to control every object in the system the driver must iterate throughall the layers which compose the array. Our project aims to accomplish this using ashift register, but again runs into have a timing issue: if a layer shift occurs during aPWM period, then all color control is forfeited because the very basis of the PWMgrayscale cycle is invalidated. For example, suppose an LED on layer 0 is set to havean input value of 2000, and another LED on layer 1 is set at a value of 500. TheGrayscale Counter Registers have just been reset and layer 0 has been set as active.Thus the LED on layer 0 turns on as we want it to. However, now imagine that whenthe GCR reaches 1000, the active layer is changed to 1. Now two things happen:first, the LED on layer 0 immediately shuts off because it is no longer receiving powerto its anode. Obviously this is incorrect as the LED was only on for 1000 GSCLKsinstead of the desired 2000. Furthermore, the LED on layer 1 will not ever turn on,because its value of 500 has already been surpassed by the value in the GCR. BothLEDs now have arbitrary responses and we have lost the ability to control them.From this example it becomes clear that to maintain control over the outputs, thelayers must be switched precisely when a PWM period ends. Thankfully, the edgecounter interrupt is triggered exactly when this happens and so the layer is switchedin the interrupt as well, fixing the timing issue.

To summarize the complete algorithm, all the problems facing the initial imple-mentation are solved by separating the two processes necessary to properly interfacethe TLC5940. The steady incrementing of Grayscale Register Counter is handled bya 50% duty cycle PWM wave generated from the microcontroller. Another pin onthe microcontroller uses the edge counting functionality to log the rising edges of thewave, and causes an interrupt whenever the count matches 4095. The interrupt thenresets the Grayscale Register Counters, latches in the previous data, changes layersand shifts in the next set of data via SPI. Note that the entire process is independentof the user and thus also precisely timed, achieving maximum frame rate as well as

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efficiency and robustness.

Figure 2.9: Process chart of the improved algorithm. Note the dramatic shift fromsoftware to hardware.

Driver Implementation

Now we discuss the specific implementation of the final algorithm that was writtenfor the Stellaris LM3S1968 microcontroller, on evaluation board EKK-LM3S1968. Wewill cover the writing of the driver from start to finish and also describe how the clientinterfaces with it.

Environment The TLC5940 driver was written in C, using the Keil µVision4 in-tegrated development environment to facilitate organization and testing. As such,some general knowledge of the C programing language, specifically pointers, arrays,the preprocessor and functions, will be necessary to completely understand the im-plementation.

Tools The driver utilizes a few tools to further aid in code flexibility and readability.We use the StellarisWare library provided by ARM to interface with the registersthat control internal hardware functionality such as PWM generation, SPI as wellas interrupts, because manually modifying these registers results in both confusingand error-prone code. The StellarisWare library also performs error checking on itsarguments and thus guarantees that the program does not write to invalid addresses,further improving robustness.

A further benefit of using the LM3S1968 controller, the software is also able toutilize the C standard library. The C standard library is a collection of utility files thatprovides a strong foundation for any program to build on. It includes a large number ofmathematical routines (including trigonometric and exponential methods), methodsto input and output to console, and helps with memory allocation and deallocation.

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The C standard library thus assists in all aspects of the driver, compacting it as wellas driving up efficiency.

A Word on Generality Please note that the following library, though it uses ageneral algorithm, is specifically written to drive our LED array. Because of this, thereare parts of the code which will have to be altered in order to allow the library to driveanother system. However, our implementation should provide the basic framework tohelp others with their modifications, and the nature of the algorithm will make surethat no drastic changes will be necessary.

Connections Figure 2.4 highlights the IC connections relevant to the driver.

Writing the TLC5940 Driver The library is primarily contained within two files:LibTLC.h and LibTLC.c. Note however that it does access many other files, mostof which are part of the StellarisWare toolkit and thus are not explained here . Webegin with the header file, which contains general declarations and facilitates theactual implementation in the definition file.

#ifndef LIBTLC

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#define LIBTLC

#include "hw_types.h"

#include "hw_ints.h"

#include "hw_ssi.h"

#include "hw_memmap.h"

#include "interrupt.h"

#include "sysctl.h"

#include "pwm.h"

#include "timer.h"

#include "gpio.h"

#include "ssi.h"

#include "inc/lm3s1968.h"

Here we include all the external files that will be necessary further on. As statedbefore most of these files are needed to employ the StellarisWare tools. The others,including as all the hw x files and the inc/lm3s1968.h file provide macros to commonlyused memory locations and values.

// TLC5940 port definitions //

#define GSCLK_PORT GPIO_PORTG_BASE // PG2 //

#define GSCLK_PIN GPIO_PIN_2

#define SCLK_PORT GPIO_PORTA_BASE // SSI0CLK //

#define SCLK_PIN GPIO_PIN_2

#define BLANK_PORT GPIO_PORTF_BASE // PF7 //

#define BLANK_PIN GPIO_PIN_7

#define XLAT_PORT GPIO_PORTF_BASE // IDX1 //

#define XLAT_PIN GPIO_PIN_1

// Shift register port definitions //

#define SR_DATA_PORT GPIO_PORTD_BASE // U1Rx //

#define SR_DATA_PIN GPIO_PIN_2

#define SR_CLK_PORT GPIO_PORTD_BASE // U1Tx //

#define SR_CLK_PIN GPIO_PIN_3

#define SR_CLR_PORT GPIO_PORTG_BASE // PG3 //

#define SR_CLR_PIN GPIO_PIN_3

Now we define the ports and pins that all our interface lines will use. Doing this hasa few benefits: the actual port names are abstracted and thus made clearer. Also itbecomes trivial to change any of these ports as all one has to do is reassign them here

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and the change will naturally carry over to the entire program. SCLK and GSCLKshould be kept constant as only specific pins support such functions.

// Port functions //

#define setLow(port , pin) (GPIOPinWrite(port , pin , 0x00))

#define setHigh(port , pin) (GPIOPinWrite(port , pin , pin))

#define pulse(port , pin) do{ \

setHigh ((port), (pin)); \

setLow ((port), (pin)); \

} while (0)

#define outputState(port , pin) (GPIOPinRead(port , pin))

These macro definitions are adapted from Pandina’s article [9], and they further ab-stract and simplify pin operations. The user can set or check the state of, as well aspulse any defined pin using the above macro functions. The definitions themselvesare self-explanatory (the GPIO functions are provided by StellarisWare).

void TLCSetup(int num_TLC , int num_Layers);

void TLCSetLED(unsigned char layer , unsigned char x,

unsigned char y, unsigned short * color);

void TLCInterrupt(void);

#endif

We now declare three functions and their parameters which will control all driverfunctionality. This concludes the header file, so let us now discuss the definition file,LibTLC.c.

#include "../ include/LicTLC.h"

#include <stdlib.h>

// Number of TLCs in chain //

unsigned short numTLC;

unsigned short numChannels;

// Number of layers in array //

unsigned short numLayers;

// Element properties //

unsigned short numElementsPerLayer;

unsigned short numElementsPerDimension;

// Counters //

int TLCCounter , TLCCounter2;

int currentLayer = 0;

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// Main data variable //

unsigned short ** colorData;

This section declares all the global variables that will be utilized during the executionfunctions. Their uses are as follows:

• numTLC - Stores how many TLC5940s the user is chaining together.

• numChannels - Stores how many total channels will be controlled by the driver.

• numLayers - Stores the number of layers in the LED array. This is equvalentto the j variable in the established convention.

• numElementsPerLayer - Stores the number of elements per layer, following thesame definition as above.

• numElementsPerDimension - Stores the number of elements in a single dimen-sion of a single layer.

• TLCCounter - This variable has no specific use but is employed as a generalcounter in constructs such as for loops.

• currentLayer - This variable keeps track of the array layer that the TLC5940sare currently coloring.

• colorData - This points to an array which contains all the color data for theentire array.

TLCSetup We now delve into the first function of the TLC5940 library, TL-CInit. This function initializes all the system hardware used to drive the TLC5940and also sets up the user to driver interface.

void TLCSetup(int num_TLC , int num_Layers)

{

// Assign TLC number //

numTLC = num_TLC;

// Calculate number of channels //

numChannels = numTLC * 16;

// Assign layer number //

numLayers = num_Layers;

// Figure out number of elements //

numElementsPerLayer = (numLayers) * (numLayers) * 3;

numElementsPerDimension = (numLayers) * 3;

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The function takes two arguments, num TLC and num Layers, which correspond totheir non-underscored counterparts numTLC and numLayers. numTLC and numLay-ers are initialized, and numChannels is to numTLC ∗ 16 because each TLC has 16channels. The following two assignments determine how many elements are presentin each layer and each dimension of a layer. Note that these assignments are specificto our project as they assume that the output devices are arranged in a cube.

• numElementsPerLayer - Here we calculate the number of elements in a singlecross section of the array by squaring numLayers then multiplying by 3.

• numElementsPerDimension - We drop to a single dimension and calculate howmany elements there are in a single line of LEDs.

// Allocate color map and initialize //

colorData = (unsigned short **) malloc(sizeof(unsigned

short *) * numLayers);

for (TLCCounter = 0; TLCCounter < numLayers; TLCCounter ++)

colorData[TLCCounter] = (unsigned short *) malloc(sizeof(

unsigned short) * numElementsPerLayer);

for (TLCCounter = 0; TLCCounter < numLayers; TLCCounter ++)

for (TLCCounter2 = 0; TLCCounter2 < numElementsPerLayer;

TLCCounter2 ++)

colorData[TLCCounter ][ TLCCounter2] = 0;

Now that we know the total number of elements in the structure, we allocate spaceto hold all of them. Each element is an unsigned short because the maximum valuethat can be represented by the TLC5940 is 4095. The for loop simply initializes allvalues to 0 to assure no unexpected outputs. The actual internal layout of colorDatawill be explained during the TLCSetLED function.

// Enable peripherals //

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);

SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);

SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM0);

SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);

The function enables all peripherals it will need such as GPIO ports, PWM, SSI(which encapsulates SPI), and the hardware timer (which provides the edge countingfunctionality).

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// Setup shift register ports //

GPIOPinTypeGPIOOutput(SR_DATA_PORT , SR_DATA_PIN);

GPIOPinTypeGPIOOutput(SR_CLK_PORT , SR_CLK_PIN);

GPIOPinTypeGPIOOutput(SR_CLR_PORT , SR_CLR_PIN);

// Seed shift register with initial 1 //

pulse(SR_CLR_PORT , SR_CLR_PIN);

setHigh(SR_DATA_PORT , SR_DATA_PIN);

pulse(SR_CLK_PORT , SR_CLK_PIN);

The driver now begins to initialize each component of the entire system, starting withthe shift register. After declaring the lines as GPIO outputs, the function pulses theCLR pin of the IC to make sure all the outputs are low. Then, a single high bit isshifted onto the register to signify that the first layer (layer 0 in our convention) isactive.

// Setup SSI //

GPIOPinTypeSSI(GPIO_PORTA_BASE , GPIO_PIN_5 | GPIO_PIN_4 |

GPIO_PIN_3 | GPIO_PIN_2);

SSIConfigSetExpClk(SSI0_BASE , SysCtlClockGet (),

SSI_FRF_MOTO_MODE_0 , SSI_MODE_MASTER , SysCtlClockGet ()

/ 2, 12);

Note: SSI and SPI are used synonymously in this section, but note that they are notthe same in all cases.

Here we setup the SSI settings, with the following arguments:

• SSI0 BASE - This is simply the base address of the first SSI module (theLM3S1968 has two), which is the one we will be using.

• SysCtlClockGet() - This argument simply asks for the rate of the system clockwhich will be used to supply the SSI module. Note that in our implementationthis value is 50,000,000 (50 MHz).

• SSI FRF MOTO MODE 0 - The SSI system has a few frames of transmissionto choose from. Each frame has a separate starting and ending signature aswell as pulsing pattern. For the TLC5940, the FRF MOTO frame is necessaryfor proper operation. For information regarding the other frames please referto the Stellaris datasheet [7].

• SSI MODE MASTER - Each SSI device can be configured as either a master orslave, which helps a single controller driver multiple chips. The intricate detailswill not be explained here as they are beyond the scope of the document. Wedo, however, place the LM3S1968 in master mode because the master is theprovider of the clock in the SSI protocol.

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• SysCtlClockGet() / 2 - This argument, known as the baud rate, is the rate oftransfer between the master and slave (and vice versa). As a physical limitation,SSI can only transmit data at as much as half the core’s clock speed, which isthe reason for the division by 2. For our project this number is 25,000,000.

• 12 - The final argument tells the hardware how many bits of data will be sentper transaction. Though this number can be anywhere from 4 to 16, we choose12 as it matches the bit resolution of the TLC5940 and consequently makessending values much more straightforward.

// Setup TIMER0A in edge count mode //

GPIOPinTypeTimer(GPIO_PORTB_BASE , GPIO_PIN_0);

TimerConfigure(TIMER0_BASE , TIMER_CFG_SPLIT_PAIR |

TIMER_CFG_A_CAP_COUNT); // Configure timer0 as

input capture that captures positive edges //

TimerControlEvent(TIMER0_BASE , TIMER_A ,

TIMER_EVENT_POS_EDGE);

TimerControlStall(TIMER0_BASE , TIMER_A , true);

TimerLoadSet(TIMER0_BASE , TIMER_A , 4095); //

Initialize timer to 4095 //

TimerIntEnable(TIMER0_BASE ,TIMER_CAPA_MATCH);

// enable capture A interrupts //

TimerMatchSet(TIMER0_BASE , TIMER_A , 0);

// Timer interrupts at 0 //

TimerIntRegister(TIMER0_BASE , TIMER_A , TLCInterrupt);

// Set Timer0 interrupt function //

IntEnable(INT_TIMER0A);

The edge counter is now configured on Timer0A.

• TimerControlEvent(TIMER0 BASE, TIMER A, TIMER EVENT POS EDGE)- Configures the timer to only count rising edges, instead of falling or both edges.This is to mimic the TLC itself increments the GCRs on each rising edge.

• TimerLoadSet(TIMER0 BASE, TIMER A, 4095) - Seed the timer with an ini-tial value of 4095, since the edge counter decrements on each detected event.

• TimerMatchSet(TIMER0 BASE, TIMER A, 0) - Set the value at which thetimer will throw an interrupt. We use 0 because 4095 − 0 = 4095, the numberof edges we wish to count. Note that the load and match values do not matteras long as their difference is the correct value.

• TimerIntRegister(TIMER0 BASE, TIMER A, TLCInterrupt) - Register TL-CInterrupt as the function to call when the interrupt is thrown.

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// Setup PWM0 Generator //

GPIOPinTypePWM(GSCLK_PORT , GSCLK_PIN);

PWMGenConfigure(PWM0_BASE , PWM_GEN_0 , PWM_GEN_MODE_DOWN);

PWMGenPeriodSet(PWM0_BASE , PWM_GEN_0 , SysCtlClockGet () /

2500000);

PWMPulseWidthSet(PWM0_BASE , PWM_OUT_0 , SysCtlClockGet () /

2500000 / 2);

PWMOutputState(PWM0_BASE , PWM_OUT_0_BIT , true);

Here the PWM generator to drive the GSCLK is setup:

• PWMGenConfigure(PWM0 BASE, PWM GEN 0, PWM GEN MODE DOWN)- The generator is configured to generate left/right aligned pulses instead of cen-ter aligned pulses, which are unnecessarily complex for our purposes.

• PWMGenPeriodSet(PWM0 BASE, PWM GEN 0, SysCtlClockGet() / 2500000)- This call sets the period of each PWM cycle. Below is an explanation of thefinal argument to this function.

– The array has 1000 LEDs laid out as 10 layers of 100. Each layer mustreceive one full PWM cycle to be color accurate, as described in Section 2.4.Thus, 10 PWM periods are necessary to update the entire array once.However, we want the array to be updated 60 times a second, so at least10 ∗ 60 or 600 PWM periods are needed per second. Furthermore, eachPWM period must contain 4096 pulses to make sure the GCRs are fullysaturated. Thus, the generated signal must contain 10∗60∗4096 = 2457600pulses per second, a speed of 2.457 MHz. Since the PWM clock is derivedfrom the core clock, the period of each PWM cycle relative to the core isgiven by E

2457600. We round this value up to 2500000 for some headroom in

the frame rate.

• PWMPulseWidthSet(PWM0 BASE, PWM OUT 0, SysCtlClockGet() / 2500000/ 2) - The width of the pulse is set to half that of the entire period, resultingin a 50% duty cycle wave which results in a true clock signal.

// Setup TLC5940 //

GPIOPinTypeGPIOOutput(BLANK_PORT , BLANK_PIN);

GPIOPinTypeGPIOOutput(XLAT_PORT , XLAT_PIN);

setLow(GSCLK_PORT , GSCLK_PIN);

setLow(XLAT_PORT , XLAT_PIN);

setHigh(BLANK_PORT , BLANK_PIN);

Because GSCLK, SCLK, and SIN are all dealt with using other methods, only BLANKand XLAT are setup as normal GPIO outputs. They are then set to their startingstates as dictated by Figure 2.5.

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// Enable SSI //

SSIEnable(SSI0_BASE);

// Enable Edge Counter //

TimerEnable(TIMER0_BASE , TIMER_A);

// Enable PWM generator //

PWMGenEnable(PWM0_BASE , PWM_GEN_0);

Now that the necessary ports, pins, and hardware functionalities are configured, weend the TLCInit method by enabling SSI, the edge counter, and the PWM generator,essentially activating the TLC5940.

User Driver Interface Before discussing the second driver method, TLCSe-tLED, we would first like to describe the interface between the TLC5940 driver and itsclient. Our goal, as has been hinted at throughout this section, is to make the driverinvisible to the user. That is, the user should not have to know how the driver works,nor should he have to accommodate for it in any way when writing his program. Ulti-mately, we want the user to access the LED array like he would any two-dimensionalscreen: by setting pixel colors and letting the background processes translate themto the physical construct.

The interface is quite simple to implement and is achieved using a single array,called colorData in our specialized driver, which contains all data needed to color theLED cube. The idea is that the user writes to this array anytime he want to modifythe color of a pixel, and the library simply indexes the same array when passing val-ues to the TLC5940. Though the cube may not update instantaneously, as the driverwill have to be updating the correct layer for any change to become visible, a largeenough refresh rate will make it appear so to any human observer. Note that moderndisplay screens utilize a similar rendering technique.

TLCSetLED The TLCSetLED function allows the user to alter the colorDataarray and thus control the output of the cube. The method simply takes a colorvalue and assigns it to an LED, given by user coordinate, by placing it in the propercolorData location.

void TLCSetLED(unsigned char layer , unsigned char x,

unsigned char y, unsigned short * color)

{

// Determine index //

unsigned short index = (y * numElementsPerDimension) +

(x * 3);

// Fill in data //

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colorData[layer ][ index] = color [0]; // Red

intensity //

colorData[layer ][ index + 1] = color [1]; // Green

intensity //

colorData[layer ][ index + 2] = color [2]; // Blue

intensity //

}

colorData is organized as a two dimensional array to facilitate indexing. The firstindex selects the layer to be modified and the second chooses which object in thatlayer is to be modified. The y dimension is higher order than the x, meaning that asthe second index iterates from 0 to numElementsPerLayer, the array cycles throughall the x values in a y coordinate before changing the y coordinate:

Figure 2.10: Internal layout of colorArray. All numbers in the top right box areindexes.

The second index is calculated in accordance with the above layout, and the finalarray location is then filled with the 3 color values specified by the user.

TLCInterrupt Now we analyze the final function and the driving force behindthe TLC5940 driver, TLCInterrupt. Being an interrupt, this function cannot takearguments nor return anything. Also, keep in mind that when this function is called,the Grayscale Counter Registers have just hit a count of 4095.

// Counter to track FIFO progress //

unsigned char fillFIFO = 0;

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The Stellaris LM3S1968 contains a hardware based first in first out data queue thatcan be used to queue multiple data frames to the SSI module and let the controllershift them in at the relatively slower baud rate. This allows the interrupt to avoidbusy waiting after each transmission, dramatically increasing the time efficiency ofthe function. However, the queue has a limited depth and so a variable, fillFIFO, isused to keep track of how many locations have been filled.

// Reset timer //

TimerIntClear(TIMER0_BASE , TIMER_CAPA_MATCH);

TimerDisable(TIMER0_BASE , TIMER_A);

TimerLoadSet(TIMER0_BASE , TIMER_A , 4095);

TimerEnable(TIMER0_BASE , TIMER_A);

This block resets the edge counter as the hardware automatically disables it when itdetects a counter match. The timer is again set to 4095 to keep it functioning becauseits current value is 0.

// Reset GCRs and disable all outputs //

setHigh(BLANK_PORT , BLANK_PIN);

In order to prepare for the layer change, we first set BLANK to high, which does twothings: resets the Grayscale Counter Registers, and forces all outputs to off. It isimportant that all outputs be off before changing layers to avoid any ghosting effects.

// Change layers //

if (currentLayer == 0)

{

pulse(SR_CLR_PORT , SR_CLR_PIN);

setHigh(SR_DATA_PORT , SR_DATA_PIN);

pulse(SR_CLK_PORT , SR_CLK_PIN);

}

else

{

setLow(SR_DATA_PORT , SR_DATA_PIN);

pulse(SR_CLK_PORT , SR_CLK_PIN);

}

Here, the layer selecting shift registers are interfaced to produce the correct outputson their parallel pins. If the currentLayer is 0, then the registers are cleared andreseeded with an initial 1, turning on the 1st layer. Otherwise the register outputsare simply shifted over one by shifting in a 0 bit, which in turn activates the next layer.

// Latch in input shift register data //

pulse(XLAT_PORT , XLAT_PIN);

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// Resume new PWM cycle //

setLow(BLANK_PORT , BLANK_PIN);

Now that the layer has been changed, we can safely latch in the data from the InputShift Register into the Grayscale Data Registers. Once that is done the PWM cycleis restarted by forcing BLANK to low.

// Calculate next layer //

currentLayer = (currentLayer + 1) % numLayers;

Here we calculate the index of the next layer using a simple modular correctionscheme. This index is necessary before shifting in new data because, as shown inFigure 2.9, the algorithm requires that the interrupt transfer the next layer’s data.

// Bitflood TLC (queue is 8 deep) //

for (TLCCounter = numElementsPerLayer; TLCCounter >= 0;

TLCCounter --)

{

SSIDataPut(SSI0_BASE , colorData[currentLayer ][ TLCCounter ])

;

fillFIFO ++;

if (fillFIFO == 8)

{

fillFIFO = 0;

while(SSIBusy(SSI0_BASE));

}

}

The final block of the TLCInterrupt function, this for loop initiates and completesthe actual transfer of data to the TLC5940 through the SSI module. Note that thefor loop begins at index numElementsPerLayer and goes to 0, instead of going theother way. This is simply because of the nature of shifting. As the bits keep gettingpushed further down the chain, what was shifted first will actually end up last in thechain. Thus we shift the bits in reversed order so that they appear in the correctlayout on the Input Shift Register.

Within each loop, the SSI module is assigned a new packet. Unless the SSI moduleis free, the packet gets pushed onto the data queue until the module is ready (eventhough each colorData element is actually 16 bits long, only the first 12 bits will betransferred because of the configuration). It is not advisable to keep pushing packetsonto the queue as the hardware only holds 8 packets at once and will reject any more,resulting in loss of control. To avoid this overflow we keep track of the used spaces onthe queue using fillFIFO, and stall the transfer module when all 8 slots are detectedas full.

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Figure 2.11: Data flows between multiple interrupts. The order of variable and pinchanges is crucial. Also note that the first layer is given undefined data during thevery first refresh cycle, an acceptable side effect of this iteration scheme.

This completes the implementation of the TLC5940 driver. To use the library,the user simply includes its header TLCLib.h,and calls the initialization function withthe proper values. Any changes the user then makes using the function TLCSetLEDwill automatically be reflected on the output array. Once again, remember thatthis is a relatively project specific library and will need to be modified for differentapplications.

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The Final Code

TLCLib.h

1 #ifndef LIBTLC

2 #define LIBTLC

34 #include "hw_types.h"

5 #include "hw_ints.h"

6 #include "hw_memmap.h"

7 #include "interrupt.h"

8 #include "sysctl.h"

9 #include "pwm.h"

10 #include "timer.h"

11 #include "gpio.h"

12 #include "ssi.h"

13 #include "inc/lm3s1968.h"

1415 /* TLC5940 Connections

16 GSCLK -> PG2 , CCP0

17 SCLK -> S0CLK

18 SIN -> S0Tx

19 BLANK -> PF7

20 DCPRG -> +5V

21 VPRG -> GND

22 XLAT -> IDX1

23 10k from VCC and PF7

24 Current control resistor from IREF to ground

25 */

2627 /* Shift register connections

28 MR -> PG3

29 CP -> U1Tx

30 DS1 -> U1Rx

31 DS2 -> +5V

32 */

333435 // TLC5940 port definitions //

36 #define GSCLK_PORT GPIO_PORTG_BASE // PG2 //

37 #define GSCLK_PIN GPIO_PIN_2

3839 #define SCLK_PORT GPIO_PORTA_BASE // SSI0CLK //

40 #define SCLK_PIN GPIO_PIN_2

4142 #define BLANK_PORT GPIO_PORTF_BASE // PF7 //

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43 #define BLANK_PIN GPIO_PIN_7

4445 #define XLAT_PORT GPIO_PORTF_BASE // IDX1 //

46 #define XLAT_PIN GPIO_PIN_1

4748 // Shift register port definitions //

49 #define SR_DATA_PORT GPIO_PORTD_BASE // U1Rx //

50 #define SR_DATA_PIN GPIO_PIN_2

5152 #define SR_CLK_PORT GPIO_PORTD_BASE // U1Tx //

53 #define SR_CLK_PIN GPIO_PIN_3

5455 #define SR_CLR_PORT GPIO_PORTG_BASE // PG3 //

56 #define SR_CLR_PIN GPIO_PIN_3

5758 // Port functions //

59 #define setLow(port , pin) (GPIOPinWrite(port , pin , 0x00))

60 #define setHigh(port , pin) (GPIOPinWrite(port , pin , pin))

61 #define pulse(port , pin) do{ \

62 setHigh ((port), (pin)); \

63 setLow ((port), (pin)); \

64 } while (0)

65 #define outputState(port , pin) (GPIOPinRead(port , pin))

6667 void TLCSetup(int num_TLC , int num_Layers);

68 void TLCSetLED(unsigned char layer , unsigned char x,

unsigned char y, unsigned short * color);

69 void TLCInterrupt(void);

7071 #endif

TLCLib.c

1 #include "../ include/tlc.h"

2 #include <stdlib.h>

34 // Number of TLCs in chain //

5 unsigned short numTLC;

6 unsigned short numChannels;

78 // Number of layers in array //

9 unsigned short numLayers;

1011 // Elemnent properties //

12 unsigned short numElementsPerLayer;

13 unsigned short numElementsPerDimension;

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1415 // Main data variable //

16 unsigned short ** colorData;

1718 // Counters //

19 int TLCCounter , TLCCounter2;

20 int currentLayer = 0;

2122 void TLCSetup(int num_TLC , int num_Layers)

23 {

24 // Assign TLC number //

25 numTLC = num_TLC;

2627 // Calculate number of channels //

28 numChannels = numTLC * 16; // RMEMEBER TO CHANGE

THIS WHEN YOU DONT WANT ALL 16 ON EVERY CHIP //

2930 // Assign layer number //

31 numLayers = num_Layers;

3233 // Figure out number of elements //

34 numElementsPerLayer = numLayers * numLayers * 3;

35 numElementsPerDimension = numLayers * 3;

3637 // Allocate color map and initialize //

38 colorData = (unsigned short **) malloc(sizeof(unsigned

short *) * numLayers);

39 for (TLCCounter = 0; TLCCounter < numLayers;

TLCCounter ++)

40 colorData[TLCCounter] = (unsigned short *) malloc(

sizeof(unsigned short) * numElementsPerLayer);

4142 for (TLCCounter = 0; TLCCounter < numLayers;

TLCCounter ++)

43 for (TLCCounter2 = 0; TLCCounter2 <

numElementsPerLayer; TLCCounter2 ++)

44 colorData[TLCCounter ][ TLCCounter2] = 0;

4546 // Enable peripherals //

47 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

48 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);

49 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);

50 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);

51 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);

52 SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM0);

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53 SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);

54 SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER0);

5556 // Setup shift register ports //

57 GPIOPinTypeGPIOOutput(SR_DATA_PORT , SR_DATA_PIN);

58 GPIOPinTypeGPIOOutput(SR_CLK_PORT , SR_CLK_PIN);

59 GPIOPinTypeGPIOOutput(SR_CLR_PORT , SR_CLR_PIN);

6061 // Seed shift register with initial 1 //

62 pulse(SR_CLR_PORT , SR_CLR_PIN);

63 setHigh(SR_DATA_PORT , SR_DATA_PIN);

64 pulse(SR_CLK_PORT , SR_CLK_PIN);

6566 // Setup SSI //

67 GPIOPinTypeSSI(GPIO_PORTA_BASE , GPIO_PIN_5 |

GPIO_PIN_4 | GPIO_PIN_3 | GPIO_PIN_2);

68 SSIConfigSetExpClk(SSI0_BASE , SysCtlClockGet (),

SSI_FRF_MOTO_MODE_0 , SSI_MODE_MASTER ,

SysCtlClockGet ()/2, 12);

6970 // Setup TIMER0A in edge count mode //

71 GPIOPinTypeTimer(GPIO_PORTB_BASE , GPIO_PIN_0);

72 TimerConfigure(TIMER0_BASE , TIMER_CFG_SPLIT_PAIR |

TIMER_CFG_A_CAP_COUNT); // Configure

timer0 as input capture that captures positive

edges //

73 TimerControlEvent(TIMER0_BASE , TIMER_A ,

TIMER_EVENT_POS_EDGE);

74 TimerControlStall(TIMER0_BASE , TIMER_A , true);

75 TimerLoadSet(TIMER0_BASE , TIMER_A , 4095);

// Initialize timer to 4095, since we will be

counting down //

76 TimerIntEnable(TIMER0_BASE ,TIMER_CAPA_MATCH);

// enable capture A interrupts //

77 TimerMatchSet(TIMER0_BASE , TIMER_A , 0);

// Timer interrupts at 0 //

78 TimerIntRegister(TIMER0_BASE , TIMER_A , TLCInterrupt);

// Set Timer0 interrupt function //

79 IntEnable(INT_TIMER0A);

8081 // Setup PWM0 Generator //

82 GPIOPinTypePWM(GSCLK_PORT , GSCLK_PIN);

83 PWMGenConfigure(PWM0_BASE , PWM_GEN_0 ,

PWM_GEN_MODE_DOWN);

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84 PWMGenPeriodSet(PWM0_BASE , PWM_GEN_0 , SysCtlClockGet ()

/ 2500000); // Calculation shown in document

//

85 PWMPulseWidthSet(PWM0_BASE , PWM_OUT_0 , SysCtlClockGet

() / 2500000 / 2);

86 PWMOutputState(PWM0_BASE , PWM_OUT_0_BIT , true);

8788 // Setup TLC5940 //

89 GPIOPinTypeGPIOOutput(BLANK_PORT , BLANK_PIN);

90 GPIOPinTypeGPIOOutput(XLAT_PORT , XLAT_PIN);

91 setLow(GSCLK_PORT , GSCLK_PIN);

92 setLow(XLAT_PORT , XLAT_PIN);

93 setHigh(BLANK_PORT , BLANK_PIN);

9495 // Enable SSI //

96 SSIEnable(SSI0_BASE);

9798 // Enable Edge Counter //

99 TimerEnable(TIMER0_BASE , TIMER_A);

100101 // Enable PWM generator //

102 PWMGenEnable(PWM0_BASE , PWM_GEN_0);

103 }

104105 void TLCSetLED(unsigned char layer , unsigned char x,

unsigned char y, unsigned short * color)

106 {

107 // Determine index //

108 unsigned short index = (y * numElementsPerDimension) +

(x * 3);

109110 // Fill in data //

111 colorData[layer ][ index] = color [0]; // Red

intensity //

112 colorData[layer ][ index + 1] = color [1]; // Green

intensity //

113 colorData[layer ][ index + 2] = color [2]; // Blue

intensity //

114 }

115116 void TLCInterrupt ()

117 {

118 // Counter to track FIFO progress //

119 unsigned char fillFIFO = 0;

120

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121 // Reset timer //

122 TimerIntClear(TIMER0_BASE , TIMER_CAPA_MATCH);

123 TimerDisable(TIMER0_BASE , TIMER_A);

124 TimerLoadSet(TIMER0_BASE , TIMER_A , 4095);

125 TimerEnable(TIMER0_BASE , TIMER_A);

126127 // Reset GCRs and disable all outputs //

128 setHigh(BLANK_PORT , BLANK_PIN);

129130 // Change layers //

131 if (currentLayer == 0)

132 {

133 pulse(SR_CLR_PORT , SR_CLR_PIN);

134 setHigh(SR_DATA_PORT , SR_DATA_PIN);

135 pulse(SR_CLK_PORT , SR_CLK_PIN);

136 }

137 else

138 {

139 setLow(SR_DATA_PORT , SR_DATA_PIN);

140 pulse(SR_CLK_PORT , SR_CLK_PIN);

141 }

142143 // Latch in input shift register data //

144 pulse(XLAT_PORT , XLAT_PIN);

145146 // Resume new PWM cycle //

147 setLow(BLANK_PORT , BLANK_PIN);

148149 // Calculate next layer //

150 currentLayer = (currentLayer + 1) % numLayers;

151152 // Bitflood TLC (queue is 8 deep) //

153 for (TLCCounter = numElementsPerLayer; TLCCounter >=

0; TLCCounter --)

154 {

155 SSIDataPut(SSI0_BASE , colorData[currentLayer ][

TLCCounter ]);

156 fillFIFO ++;

157 if (fillFIFO == 8)

158 {

159 fillFIFO = 0;

160 while(SSIBusy(SSI0_BASE));

161 }

162 }

163 }

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The Refresh Rate

Recall that the driver specifically forces the frame rate to 60 Hz. However, we maywish to increase or decrease this rate depending on the application. With a fullunderstanding of the TLC5940 driver implementation, let us analyze the effects ofchanging the system refresh rate on the rest of the system.

Suppose one wishes to drive an array which consists of n layers with m elements ineach layer at a target refresh rate ftarget. Since each layer requires one PWM period,the generator must go through be n ∗ ftarget PWM periods per second to achieve thedesired frame rate. Each PWM period contains 4096 pulses so the PWM clock, sothe frequency of GSCLK is:

fGSCLK = n ∗ ftarget ∗ 4096 (2.18)

The period of each PWM pulse is then 1fGSCLK

. Recall that the edge counter throwsan interrupt every 4096 pulses, so a new interrupt will be generated at the followingrate:

tinterrupt =4096

fGSCLK=

1

n ∗ ftarget(2.19)

By design the program will be halted until the interrupt is taken care of. However,this also creates a computational diversion as it reduces the amount of time the CPUcan spend on the user program.The amount of CPU time available to the foregroundprogram is thus a function of two variables: the rate at which the interrupt is called,and the length of the actual interrupt.

Figure 2.12: The interrupt essentially stalls the CPU for the user and thus takes timeaway from the main thread.

The most significant time delay in the interrupt occurs during the SPI transfer, aslarge quantities of bits must shifted at a relatively stunted speed. the total number

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of bits to be sent per layer, b, is given by:

b = m ∗ 12 (2.20)

Let fSCLK be the maximum baud rate of the SPI module, then the time to shiftb bits is given by:

tshift =b

fSCLK(2.21)

This is the absolute minimum amount of time that will be spent in each interrupt,as we are ignoring all other instructions. Assuming that tshift is roughly equivalentto the total time spent in the interrupt, the free CPU time can then be calculated as:

Sfree = tinterrupt −tshift

tinterrupt= 1 − tshift

tinterrupt= 1 − (b ∗ n ∗ ftarget

fSCLK) (2.22)

We can now see the overarching effect of changing ftarget. All other variablesconstant, increasing and target frame rate of the system decreases the amount ofCPU time available to the user process. As expected, decreasing the target rate hasthe opposite effect.

Figure 2.13: The Sfree vs fupdate line for our 10x10x10 LED array.

Also note that the number of TLCs chained also dramatically affect this quantity.As the number of TLC5940s increase by x, b grows by 12 ∗ x, significantly reducingfree computation time. This is why it is not feasible to chain endless amounts ofTLC5940s, as eventually the time required to shift all the data will exceed the timebetween interrupts, at which point the user program will essentially become obsolete.

Benchmarking with the FFT

To test the ability of the RGB LED array driven by the Stellaris to render real timeanimations, we implemented a simple FFT to be performed on audio samples receivedfrom a microphone. The microphone is connected to an ADC, which takes samples

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and fills an array with N elements, where N is a power of 2. Our implementation ofthe FFT is a slightly improved version of the Cooley-Tukey algorithm implemented byliterateprograms [10]. Because of the recursive nature of the Cooley-Tukey algorithm(primarily the Danielson-Lanczos Lemma), our implementation does not include anytechniques to unroll the recursion. While recursion slightly decreases efficiency, ourgoal in this case was quite the opposite. We wished to test the limits of our compo-nents, and thus chose not to increase the efficiency beyond the simple to understandrecursive algorithm.

Introduction to the Cooley-Tukey Algorithm

The Discrete Fourier Transform transforms a set of discrete data from the time domainto the frequency domain, thus breaking a signal into its constituent frequencies andtheir amplitudes and phase shifts. The transformation is given by:

Xk =N−1∑n=0

xne− 2πi

Nnk (2.23)

The first step in the development of the Cooley-Tukey algorithm is to split theDFT into the sum of its even and odd components. By transforming the indices,it can be seen that each individual sum only requires N

2calculations. Here is the

separated formula for the DFT:

Xk =

N/2−1∑m=0

x2me− 2πi

N(2m)k +

N/2−1∑m=0

x2m+1e− 2πi

N(2m+1)k (2.24)

which can be reduced toXk = Ek + e−

2πiNkOk (2.25)

where Ek is the sum of the even terms and e−2πiNkOk is the sum of the odd terms.

Notice when calculating the DFT, the sequence is symmetrical, which means only halfthe values have to be calculated. The algorithm is completed by recursively dividingthe set of sample points as discussed above, effectively reducing the complexity fromO(n2) to O(n log n). For a visualization of the algorithm, also called the butterflymethod, see Figure 2.14.

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Figure 2.14: The symmetry that the Cooley-Tukey algorithm takes advantage of. [1]

Breakdown of Code

typedef struct complex

{

float re;

float im;

} complex_t;

To begin with, there is a data type, complex t, which is referenced throughout thecode. It simply contains two floating point values to keep track of the real and imag-inary components of the complex number.

complex_t polar(float r, float theta_radians);

complex_t add(complex_t left , complex_t right);

complex_t sub(complex_t left , complex_t right);

complex_t mult(complex_t left , complex_t right);

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The details of the implementation of these functions is irrelevant, as they are directanalogs to the operations defined on the complex set. For the actual code, see Sec-tion 2.4 below.Note: For simplicity, exi will be calculated using polar coordinates, thus we wrote apolar conversion function.

FFT void FFT(complex t* x, unsigned short int N, complex t* X)

complex_t* temp = (complex_t *) malloc(sizeof(complex_t) * N

);

complex_t* coefficients = (complex_t *) malloc(sizeof(

complex_t) * N / 2);

unsigned short int k;

for(k = 0; k < N / 2; k++)

{

coefficients[k] = polar (1.0f, -2.0f * PI * k / N);

}

The FFT begins with allocation of a temporary buffer to be used to be filled with thepartitioned values and a buffer to be used to store the coefficients. One optimizationon the standard algorithm is to precalculate the coefficients, and only half of themdue to periodicity. Since the same coefficients are used multiple times, precalculatinghas speed benefits by taking up more memory.

FFT_Calculate(x, N, 1, X, temp , coefficients);

This line calls the recursive function to actually calculate the FFT. The parametersare as follows:

• x: data for the signal

• N: number of samples in the signal (must be a power of 2)

• 1: offset step size - discussed later

• X: buffer to be filled with transformed data

• temp: temporary buffer used during partitioning - discussed later

• coefficients: the coefficients of the transformation

free(temp);

free(coefficients);

These lines free up the buffers so as to prevent memory leaks or heap overflow.

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FFT Calculate void FFT Calculate(complex t* x, unsigned short int N, unsignedchar skip, complex t* X, complex t* O, complex t* coefficients)

complex_t* E = O + N / 2;

unsigned short int k;

Two variables are constructed, one of which is used to calculate the offset for parti-tioning, the other of which is used as an iterator.

if(N == 1)

{

X[0] = x[0];

return;

}

This is the escape condition so the recursion stops when there is only one elementleft in the partition.

FFT_Calculate(x, N / 2, skip * 2, E, X, coefficients);

FFT_Calculate(x + skip , N / 2, skip * 2, O, X,

coefficients);

The partitioning is done in this step. The signal is broken down into two halves andthe skip variable is doubled. The effect of this is skip number of consecutive coeffi-cients are ignored in the calculations, thus multiplying the even and odd elements bythe appropriate coefficients without having to split the array into two separate ones.The advantage of using this technique is the removal of two unnecessary memoryallocations.

for(k = 0; k < N / 2; k++)

{

O[k] = multiply(O[k], coefficients[k * skip]);

X[k] = add(E[k], O[k]);

X[k + N / 2] = subtract(E[k], O[k]);

}

Finally, here the parts are summed together. The symmetry of the DFT is takenadvantage of and only N

2iterations are required to put together the entire sequence.

The Final Code

1 typedef struct complex

2 {

3 float re;

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4 float im;

5 } complex_t;

6 complex_t complex_from_polar(double r, double

theta_radians)

7 {

8 complex_t result;

9 result.re = r * cos(theta_radians);

10 result.im = r * sin(theta_radians);

11 return result;

12 }

13 complex_t add(complex_t left , complex_t right)

14 {

15 complex_t result;

16 result.re = left.re + right.re;

17 result.im = left.im + right.im;

18 return result;

19 }

20 complex_t sub(complex_t left , complex_t right)

21 {

22 complex_t result;

23 result.re = left.re - right.re;

24 result.im = left.im - right.im;

25 return result;

26 }

27 complex_t sub(complex_t left , complex_t right)

28 {

29 complex_t result;

30 result.re = left.re * right.re - left.im * right.im;

31 result.im = left.re * right.im + left.im*right.re;

32 return result;

33 }

34 /*

35 * Calculates the DFT of the signal in x, which is

36 * of length N (a power of 2). The result is stored

37 * in X.

38 *

39 * Precondition: X should already be allocated with

40 * size (sizeof(float) * N)

41 */

42 void FFT(complex_t* x, unsigned short int N, complex_t* X)

43 {

44 complex_t* temp = (complex_t *) malloc(sizeof(complex_t)

* N);

45 complex_t* coefficients = (complex_t *) malloc(sizeof(

complex_t) * N / 2);

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46 unsigned short int k;

4748 for(k = 0; k < N / 2; k++)

49 {

50 coefficients[k] = polar (1.0f, -2.0f * PI * k / N);

51 }

5253 FFT_Calculate(x, N, 1, X, temp , coefficients);

5455 free(temp);

56 free(coefficients);

57 }

58 void FFT_Calculate(complex_t* x, unsigned short int N,

unsigned char skip , complex_t* X, complex_t* O,

complex_t* coefficients)

59 {

60 complex_t* E = O + N / 2;

61 unsigned short int k;

6263 if(N == 1)

64 {

65 X[0] = x[0];

66 return;

67 }

6869 FFT_Calculate(x, N / 2, skip * 2, E, X, coefficients);

70 FFT_Calculate(x + skip , N / 2, skip * 2, O, X,

coefficients);

7172 for(k = 0; k < N / 2; k++)

73 {

74 O[k] = multiply(O[k], coefficients[k * skip]);

75 X[k] = add(E[k], O[k]);

76 X[k + N / 2] = subtract(E[k], O[k]);

77 }

78 }

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Chapter 3

Extensions

3.1 Applications

The driver for our LED array is constructed in such a way that it is possible to controlany individual element. In our case, with RGB LEDs that display 36 bits of color,this means we can turn toggle or change the color of any desired LED on demand.This leads to a broad range of applications including, but not limited to, using LEDarray for visualization.

Applications of the RGB LED Array

Take, for instance, the problem of efficiently visualizing population models. Utilizingan RGB LED array in the third dimension, each LED can represent a small region ofa field. Using the HSL color space and incrementing the hue value, or using any othergradient of colors, the population density in the patch can be mapped to a color.However this method only requires a two-dimensional array. The third dimensioncan then be used to represent the changes in the population over time, where thez-axis is representative of the time domain. A system like this has the advantage ofbeing simplistic as well as effective. The numbers are converted into something mucheasier to visualize, and the ability to represent multiple instances in time, or evendynamically change the visualization based on time, highlights major aspects of thepopulation being modeled while still keeping the details intact.

The RGB LED array can also be used in other visualization purposes, such asthat of a fluid in an enclosed space. Similar to how populations are modeled, anenclosure could be discretized by the resolution of the array, and the color of eachLED would move along a gradient based on the density of the fluid. Having a wayof physically representing a fluid field is much more advantageous than a renderingof it on a computer because there is no overhead of running the fluid through thegeometry pipeline, thus allowing for more computation time. Among other things,having a physical visualization also allows for multiple viewing angles simultaneously.

On the topic of LED arrays, another application would be using it in a presenta-tion environment. Assuming high enough resolution, 3D models of objects could berendered on the array, and this could be placed on the center of a conference table

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where all members can view it from their sitting angles. On top of this, rendering arotating model would be even more beneficial because it would facilitate a conferenceby preventing unnecessary adjustments of position and eye strain.

One final example of usage of an LED array is the obvious, a masterful pieceof art. The array can be programmed to constantly iterate through a sequence ofappealing animations or even to use external sensors to adapt an animation towardsthe environment. A simple pulse to the beat of music or a change in color based onthe temperature of the room are some simple examples. Regardless, the LED arraycan provide beautiful decorum and elegant additions to any setting.

Applications of the Driver

While the LED array itself has many applications, the truly expandable part is thedesign of the driver. The driver provides an innovative approach to the problem ofcontrolling a small number of high powered devices in an arbitrary dimension, asopposed to driving a large number of low power devices. The expandability of ourdriver comes from the advantage of only iterating through one dimension, regardlessof the dimension that the array is in.This is achieved by being able to iterate throughcross sections as opposed to elements. Keeping in mind that an iteration consistsof pulsing a shift register, in each iteration an entire cross section can be activated,while maintaining addressability for each of the i elements.Thus, the time complexityfor refreshing the entire array is O(n) for any k. The only effect of increasing i byany number n is the requirement for n more PWM sinks. With our current design,the TLC5940s provide 16 PWM sinks per IC and can be chained indefinitely. Us-ing this product enables a large amount of PWM sinks to be operating in parallel,which in turn means scalability of i is reasonable. Increasing j, on the other hand, isvery slightly more detrimental. This increase requires another cross section to iteratethrough, which means another transistor will be used, and another bit on a shift reg-ister. Since transistors are easy to insert into a design and shift registers, too, can bechained, these changes have minor effect on the overall operation. However, increas-ing j also increases the length between refreshes of each cross section. Depending onthe current state of the design, this could involve increasing the power supply or ausing a microcontroller that has a higher clock speed, but in most cases, this too willbe irrelevant. Therefore, by virtue of the design, expandability of the array in anydimension is trivial. And not only is the driver able to handle RGB LEDs, any highpower device that utilizes PWM can be used. One such device is a motor. An arrayof motors can be used for many things, the most outstanding of which is to performmany small tasks in parallel, or even the same task on multiple objects. As of nowthe only examples that have been mentioned are those involving multiple, individualdevices. The array is not limited to this, however, because it can be used to controlmultiple inputs in the same larger device.

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The Choice of a Dimension Independent Array

A question yet to be answered is why we chose our design to be dimension inde-pendent instead of only in the third dimension, which would be the simple choice.There are a few reasons to this, the most significant of which deals with reducinga problem by simply adding more dimensions. Adding a dimension does not implymoving into a dimension that is not perceivable by humans. Another dimension sim-ply means another way of addressing elements. In fact the problem of driving anarray of RGB LEDs can be reduced to constructing a driver in the fifth dimension,where three dimensions are used to control the red, green, and blue pins accordingly.Another problem that can be reduced to increasing its dimensions is that of repre-senting multiple vector spaces. Using a three dimensional array, multiple spaces inR3 can be represented simultaneously by using a fourth dimension. Referring back tothe example of a fluid, it is possible a project requires modeling multiple fluids simul-taneously. These fluids could be stored in different three-dimensional data structures,and switched on the fly. Of course this could be done on a software level, but usingour driver, this can be done on a hardware level as well, which is faster and moreefficient than the alternative choice.

3.2 Conclusion

Our major goal when considering the problem of driving multiple high power de-vices was to create a design that is both efficient at the hardware level as well asexpandable. It can be concluded that these two goals were not only met, but sur-passed. Traditionally, multiplexed drivers iterate through each device to create theillusion of simultaneous operation. However in our design we have constructed adriver that truly operates a large number of devices simultaneously while iteratingthrough a much smaller number. While we are compromising ease of addressabilityfor a dramatic increase in efficiency, a simple assembly subroutine, taking very fewclock cycles, can be used to debunk this problem. As for expandability, we have notonly constructed a driver that can be scaled up tremendously, but we have abstractedit to any arbitrary dimension. Thus our design can be applied to various situationsas a thorough and complete solution.

TI Analog Design Contest

Throughout the design of our K-Dimensional LED Array, we had the option of mak-ing a selection out of hundreds of parts, all that served the same purpose. In themaking of the decision, various specifications were required, and four products man-ufactured by Texas Instruments met our requirements perfectly: Stellaris LM3S1968Microcontroller, TLC5940 LED Driver, CD54HC164E Shift Register, and CD4505BLevel Shifter. The following sections will give an in depth reasoning as to why wechose these components.

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Stellaris LM3S1968 Microcontroller

The Stellaris, which is an integral part of our project, was chosen for many reasons,the most significant of which is its clock speed. The TLC5940, which was our choicefor driving LEDs, can latch data into the registers at a rate of at most 30 MHz. Sincethe serial clock speed can be at most half of the core clock speed, a microcontrollerwith a clock speed of 60 MHz would be ideal. The Stellaris meets this requirement byhaving a clock speed of 50 MHz, which ensures that the TLC5940 will receive data atalmost its peak speed while still avoiding the possibility of losing data due to a baudrate too fast for it to handle. Another major reason we chose the Stellaris over othermicrocontrollers is because it utilizes the M3 ARM processor. Having a processordeveloped by a company as popular as ARM proves to be beneficial because they arewell documented and support is not an issue. Also, the ARM ISA is useful in manyprocessors, even if the microcontroller itself is specific. While not as essential of areason, a nice aspect of using the Stellaris is that it has a floating point coprocessor andcan utilize the functions defined in the C standard library. These additions simplifythe software level as well as give us functionality for future expansion. Finally, wechose the Stellaris because we will be using this board in a future class and it wouldbe advantageous to have a grasp of the microcontroller beforehand.

TLC5940 LED Driver

The Stellaris may be the brains controlling our project, but the simplification of thedesign into an O(n) time complexity for any dimension and size is heavily reliant onthe capability of having numerous PWM sinks. Without having so many PWM sinksat our disposal, the design would require the limited number of PWM pins on theStellaris board, and all LEDs would have to be connected to the same PWM sinks.On the other hand, having the TLC5940 allowed us to connect each layer of thearray, as opposed to the entire array, to separate sinks. The TLC5940 also providesuseful features which we utilized in our project, such as Dot Correction, LED OpenDetection, and the IREF resistor. Dot Correction enabled us to control brightnesseasily through software, LED Open Detection allowed us to detect if a pin on theTLC5940 burned out or if some other hardware issues prevented the PWM sink fromoperating correctly, and finally the IREF resistor let us limit the amount of currentsunk so as to keep the TLC5940 from sinking too much or letting the LEDs blow out.

CD54HC164E Shift Register

Shift registers play an important role in our design because they prevent us fromhaving to use software as an iteration mechanism, an option which is easier to controlbut requires many more clock cycles. The shift register iterates through a layer ofLEDs as opposed to using an alternative such as a decoder and pins from the Stellaris.This is advantageous for two primary reasons: the propagation delay is significantlysmaller, thus allowing for faster refresh rates, and it requires only three pins regardlessof size.

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CD4505B Level Shifter

The final TI component used in our project is this Level Shifter. The Level Shifterserves the sole purpose of increasing the voltage to 15 V, which is required for properusage of our MOSFETs.

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Bibliography

[1] Cooley-Tukey FFT Algorithm. http://en.wikipedia.org/wiki/

Cooley-Tukey_FFT_algorithm. [Online].

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datasheets/HH-500CRGBW503.pdf. [Online].

[3] R Series Application - Digital Communications Protocols. http://www.ni.com/white-paper/9398/en. [Online].

[4] TLC5940 Programming Flow Chart v0.1. http://www.ti.com/lit/sw/

slvc106/slvc106.pdf. [Online].

[5] CD54HC164 Datasheet. http://www.ti.com/lit/ds/symlink/cd54hc164.

pdf, 2003. [Online].

[6] TLC5940. http://www.ti.com/lit/ds/symlink/tlc5940.pdf, 2007. [Online].

[7] Stellaris LM3S1968 Microcontroller Datasheet. http://www.ti.com/lit/ds/

symlink/lm3s1968.pdf, 2011. [Online].

[8] H. Wayne Beaty Donald G. Fink. Standard Handbook for Electrical Engineers.Mcgraw-Hill.

[9] Matthew T. Pandina. Demystifying the TLC5940. 2011.

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literateprograms.org/Cooley-Tukey_FFT_algorithm_(C). [Online].

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