design of a two dimensio1$ l (2d) platform control system · · 2015-03-23design of a two...

DESIGN OF A TWO DIMENSIONAL (2D) PLATFORM CONTROL

SYSTEM

Kalid Mohammed Idrees 1, Abdulrasoul Jabar Alzubaidi

2

1 PG student. 2 School of Electronic Engineering Faculty of Engineering, Sudan University for Science

and Technology, Khartoum, Sudan , [email protected]

Abstract: The goal of this paper is to

design a reconfigurable control system.

The implemented design tools are based on

static random access memory field

programmable grid array (SRAM FPGA)

circuit board and a very high speed

integrated circuit hardware description

language (VHDL). The design steps start

with software development which consists

of HDL processes where VHDL program

that describes the architectural behavior of

the control system. An HDL synthesis is

the second step, which converts the design

in behavioral description file into gates.

These steps are followed by

implementation techniques and

downloading the design from PC onto

FPGA via a joint test action group (JTAG)

cable. The results show that the overall

average delay timing between inputs to

outputs is relatively very small. Thus the

use of FPGA and VHDL to deploy stepper

control system efficiently improves its

reliability, flexibility, and real time data

processing. In particular this paper has

developed a steppers control system based

on FPGA so as to manage and improve the

process performance of a control system.

In addition, the proposed steppers control

system allows reconfiguration after the

control system is deployed. Finally, it can

be concluded that the proposed control

system can be effectively implemented in

so many application areas.

Keywords: FPGA , VHDL , JTAG, 2D

platform , control system , stepper motors.

I. INTRODUCTION

Steppers control systems have great

applications nowadays, home, industry and

robot. There are different design choices in

implementing steppers control systems

such as application-specific integrated

circuits (ASICs) based systems, processor

or dedicated digital signal processors

(DSPs) based systems, and personal

computer (PC) based systems. ASICs

based system engineers create fixed

hardware design. Once a design has been

programmed onto ASICs, it cannot be

changed. In addition, if an error exists in

the hardware design and not discovered, it

cannot be corrected without a very costly

product recall. Dedicated digital signal

processors are class of hardware devices

that fall somewhere between ASICs and

PC in terms of performance and design

complexity. However, algorithm designed

for a DSPs cannot be highly parallel

without multiple DSPs. But in order to

develop hardware steppers control system

that offers reconfigurability and greater

speed of control process, one must use a

hardware design language such as VHDL

and field programmable gate array. FPGA

and VHDL based control systems offer

parallel executions, multi rate controls, no

slow down as applications grow, I/O

Kalid Mohammed Idrees et al, Int.J.Computer Technology & Applications,Vol 6 (2),188-193

IJCTA | Mar-Apr 2015 Available [email protected]

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functionality is reconfigurable, and control

logic is dedicated hardware.

II. DESIGN LAYOUT

The basic design idea of a steppers control

system is to develop a system that lets the

user defines the control strategy. The

design tools composed of (FPGA/SRAM)

circuit board type, which can be

programmed as often as needed, and

VHDL programming language, a

dedicated language for hardware design.

Figure (1) illustrates the block diagram of

the system design.

Figure (1) Block diagram of the system

The principle design tools are:

- Field Programmable Grid Array (FPGA)

A Field Programmable Grid Array (FPGA) is a regular structure logic cells (or modules)

which is under complete control. This means that one can design, program, and make

changes to circuit whenever wished. In the SRAM logic cells, a look up table (LUT)

determines the output based on the values of the input. Other features of FPGAs are channel

base routing, post layout timing, more complex tools, fine grained, fast register pipelining,

reconfigurable I/O functionality, and multi rate control. Figure (2) shows FPGA circuit board.

Stepper-y

FPGA

(XILINIX) Stepper -x

Keypad

Y

Keypad

X

Buffer

+

Current

Driver



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Figure (2) FPGA circuit board (Xilinx)

- Buffer :

A buffer is used to store the data

output from the FPGA.

- Current driver :

An array of Darlington amplifiers are

used as current drivers for the stepper

motors.

- Hardware Descriptive

Language (VHDL)

Very high speed integrated circuit

hardware description language (VHDL) is

a powerful and versatile language, which

offers numerous advantages. The design

methodology supports many different

design methodologies (top-down, bottom-

up, delay of detail) and is very flexible in

its approach to describing hardware. The

VHDL is independent of any specific

technology or process. Its code can be

written and then targeted for many

different technologies. It can model

RS232

PS/2

VGA

AC wall adapter JTAG Cable

Power on switch

Connect USB

RJ45

LCD display

PROG switch

I/O connectors

Spartan-3A FPGA

Control operation

using rotary/push-

button switch



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hardware at various levels of design

abstraction. It can describe hardware from

the standpoint of a "black box" to the gate

level. Also it allows for different

abstraction-level descriptions of the same

components and allows the designer to

mix behavioral descriptions with gate level

descriptions.

The use of a standard language allows for

easier documentation and the ability to run

the same code in a variety of

environments. Additionally,

communication among designers and

among design tools is enhanced by a

standard language. The use of VHDL

constructs, such as packages and libraries,

allows common elements to be shared

among members of a design group. It can

be used to model digital hardware as well

as many other types of systems, including

analog devices.

III. SOFTWARE

DEVELOPMENT

There are two methods of design,

schematic capture method and HDL design

process which is used as a design method

for this work. The design initially targeted

at the FPGA is on the board.

The last step in the design verification

process is to download the (.bit) file into

the FPGA. In this step the FPGA circuit

board jumpers has been selected for

SRAM programming. Then the FPGA has

been programmed by downloading the

design program to the FPGA via a JTAG

cable connected to a PC parallel port.

When the programming is completed, a

program succeeded message will be

displayed.

IV. ALGORITHM

The circuit is designed for the control of a

(2D) platform..The stepper motors move in

two coordinates (x and y) in order to let

the platform aim towards the desired target

.The algorithm contains two subroutines

for controlling the platform. The first

subroutine controls the x- coordinate

stepper motor .The second subroutine

controls the y- coordinate stepper motor.

Accordingly aiming towards the target is

accomplished .The developed algorithm

for the 2D platform control is as follows ;

Start

Initialization :

…. Declare x as integer.

…. Declare y as integer.

Keypad entry :

… Enter the desired x coordinate.

…. x = desired x coordinate - actual

coordinate.

… Enter the desired y coordinate.

…. y = desired y coordinate - actual

coordinate.

…. Call Stepper motor x subroutine

…. Call Stepper motor y subroutine

… If (keypad input = * ) then go to

termination.

Go to keypad entry

Termination :

End

Stepper motor x:

… Activate winding-1 of stepper motor.

….. Delay 1 second.

…. Decrement x .

… If (x = 0 ) then go to terminate x.



…. Decrement x .



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…. Decrement x .




…. Decrement x .


Go to stepper motor x.

Terminate x:

Return

Stepper motor y:



…. Decrement y .

… If (y = 0 ) then go to terminate y.



…. Decrement y .




…. Decrement y .




…. Decrement y .


Go to stepper motor y.

Terminate y:

Return

V. RESULTS

The approach for the achievement of

control of the (2D) platform is based on

embedding two (2/4) decoders in the

(FPGA).The outputs from the (FPGA) will

control stepper motor -x and stepper

motor-y . The speed of the steps for the

stepper motors can be controlled .Each

stepper motor needs four control lines.

Each line is connected to a winding of the

stepper motor. The resultant electro-

magnetic vector rotates the rotor of the

stepper motor only one step. The result is a

step by step rotation of the stepper motor

(half step technique). The table (1) shows

the sequence of control for the stepper

motor by using (2/4) decoder.

Table (1) sequence of control of the

stepper motors

Delay Decoder

input

Decoder

output

1 sec.

(or

other

value)

0 0

0 1

1 0

1 1

0 0

0 1

0 0

1 0

0 1

0 0

1 0

0 0

The principle of control of the stepper

motors is based on the formula (1) below;

𝜓 = Ns− Nr

2Ns ∗ Nr ∗ 360°……… (1)

Where:

𝜓= step angle in degrees

Ns= Number of teeth in the stator

core

Nr= Number of teeth in the rotor

core

Hence for stepper motor the

formula can be approximated as shown in

equation (2).



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Full step angle = 360o/Nr

…………………. (2)

This gives a step angle of (1.8 o) for

(Nr = 200 rotor teeth)

For half step the angle equals (0.9

o) for Nr=400, that means doubling, the

number of rotor teeth as shown in equation

(3).

Half step angle = 360 o /2*Nr

………………..(3)

The micro stepper motor

technology subdivides the number of

position between poles equation (4) gives

the formula for the micro stepper motor.

Steps per revolution = 360°

𝑁𝑟1

256

……………………(4)

This formula corresponds to

(51200) steps per revolution. This types of

stepper motors can be used for precise

positioning of the platform.

VI . CONCLUSION

The main objective of this paper is to

demonstrate the design of steppers and

control system that can be characterized by

reconfigurability, fast, multi rate control,

flexible, and reliable which does not exist

in traditional systems. These

characteristics are derived from the

advantages and benefits of design tools

used, VHDL programming language as a

software design tool and FPGA SRAM

technology as a hardware tool. The results

show the average delay time of the design,

i.e the time spent from inputs to outputs of

the programmed FPGA is very small for

individual and combined setting,

respectively. The designed stepper control

system is suitable for implementation in ,

airports management, robot, and factory

control.

References :

[1] Cedcc(2008), additional benefits of

VHDL.

[2] Vijay Shonil(2006), Low-Cost FPGA

Based for Pothole Detection on Indian

Roads, Master of Technology, Indian

Institute of Technology, Bombay.

[3] Xilinx(2006), Programmable Logic

Design Guide, Xilinx.

[4] Xilinx(2007), Spartan-3A FPGA

Starter Kit Board User Guide, Xilinx



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design of a two dimensio1$ l (2d) platform control system · · 2015-03-23design of a two...

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