detector for of linear systems · 2018. 11. 13. · the design ofintegrated fault detector for...

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VLS1 DESIGN 2000, Vol. 11, No. 1, pp. 59-74 Reprints available directly from the publisher Photocopying permitted by license only (C) 2000 OPA (Overseas Publishers Association) N.V. Published by license under the Gordon and Breach Science Publishers imprint. Printed in Malaysia. Optimal Detector Design for On-line Testing of Linear Analog Systems EMMANUEL SIMEU* TIMA-Laboratory, 46, Av. FOlix Viallet, F-38031 Grenoble, France (Received I April 1999," In final form 5 October 1999) The design of integrated fault detector for on-line testing of linear analog systems is discussed in this paper. The method consists in a concurrent processing of available the node voltage signals to provide a residual on-line, that carries information about the faults. Contrary to the few previous works dealing with the particular case of state variable analog systems, the method proposed here is useable without limitation for a larger class of linear analog systems, even when the state variables are not available as measurable voltages. For this purpose, an algorithm providing an extended state space model for any linear analog system from its netlist description is developed and implemented. Keywords: Concurrent, testing, state space modeling, analog circuits, optimal residual 1. INTRODUCTION A novel fault detection methodology based on the use of analytical rather than physical redundancy has emerged and is increasingly discussed. For this purpose, the inherent redundancies contained in the static and dynamic relationships among the system input and measured signals are exploited. In other words, a mathematical model of the sys- tem or a part of it is used. In this paper, the problem of concurrent model-based fault detection is discussed for linear analog systems. The basic principle of concurrent testing techniques consists in exploiting the mathematical knowledge avail- able on the monitored system to generate a fault indicating signal (called residual). The residual express the difference between the signals com- ing from the actual system and the information provided by the system nominal model in the normal operation. When the mathematical model is an accurate representation of the nominal sys- tem behavior, the residual characterizes the system operating mode: close to zero in normal operation, different from zero if there is a mismatch. The goal is to detect the faults of interest and their causes early enough so that a failing of the *e-mail: [email protected] 59

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  • VLS1 DESIGN2000, Vol. 11, No. 1, pp. 59-74Reprints available directly from the publisherPhotocopying permitted by license only

    (C) 2000 OPA (Overseas Publishers Association) N.V.Published by license under

    the Gordon and Breach SciencePublishers imprint.

    Printed in Malaysia.

    Optimal Detector Design for On-line Testingof Linear Analog Systems

    EMMANUEL SIMEU*

    TIMA-Laboratory, 46, Av. FOlix Viallet, F-38031 Grenoble, France

    (Received I April 1999," In finalform 5 October 1999)

    The design of integrated fault detector for on-line testing of linear analog systems isdiscussed in this paper. The method consists in a concurrent processing of available thenode voltage signals to provide a residual on-line, that carries information about thefaults. Contrary to the few previous works dealing with the particular case of statevariable analog systems, the method proposed here is useable without limitation fora larger class of linear analog systems, even when the state variables are not availableas measurable voltages. For this purpose, an algorithm providing an extended statespace model for any linear analog system from its netlist description is developedand implemented.

    Keywords: Concurrent, testing, state space modeling, analog circuits, optimal residual

    1. INTRODUCTION

    A novel fault detection methodology based on theuse of analytical rather than physical redundancyhas emerged and is increasingly discussed. Forthis purpose, the inherent redundancies containedin the static and dynamic relationships among thesystem input and measured signals are exploited.In other words, a mathematical model of the sys-tem or a part of it is used. In this paper, theproblem of concurrent model-based fault detectionis discussed for linear analog systems. The basicprinciple of concurrent testing techniques consists

    in exploiting the mathematical knowledge avail-able on the monitored system to generate a faultindicating signal (called residual). The residualexpress the difference between the signals com-ing from the actual system and the informationprovided by the system nominal model in thenormal operation. When the mathematical modelis an accurate representation of the nominal sys-tem behavior, the residual characterizes the systemoperating mode: close to zero in normal operation,different from zero if there is a mismatch. Thegoal is to detect the faults of interest and theircauses early enough so that a failing of the

    *e-mail: [email protected]

    59

  • 60 E. SIMEU

    overall system can be avoided. Residual is gen-erated on-line by means of dedicated additionalhardware into the system data flow graph.The idea of designing additional hardware for

    error detection and fault tolerance was applied toFFT networks by Jou and Abraham in [1]. Morerecently in [2], Chatterjee used the checksum codesproposed in [1] to develop a concurrent errordetection method usable for linear analog andswitched-capacitor state variable systems. In con-trast to the previous works using algorithm-basedfault tolerance [4, 5] the error detection process isdirectly hard-wired into the system using addi-tional detection circuitry. The method proposedin [2] is applicable only to state variable systems.Such systems consist of a serial interconnection ofintegrators and summers (realized with op-amps).The availability for physical connection of allthe state variables facilitates redundancy genera-tion and the design of concurrent error detectionschemes. In the approach proposed in this paper,the use of extra circuitry with the objective of on-line fault detection is extended to a larger class oflinear analog systems, with detection dedicatedcircuitry comparable to those used in the previousworks, for only state variable systems. The schemethat is proposed here involves the eliminationof unknown state variables by aggregation usinglinear combinations of input, output and avail-able node signals. Test dedicated hardware isoptimized by a reduction of the number of in-tegration (or derivations) required for residualgeneration. To minimize the overhead for imple-mentation, information contained on any cir-cuit node available for measurement should beusable as input of the detector scheme. Thisrequires a mathematical model of the circuit pro-viding not only the classical behavioral relation-ships between the circuit input and its functionaloutput, but also an appropriated modeling of thesignal on any internal node.The first part of this paper deals with a symbolic

    modelling method, deriving an appropriated statespace model from the netlist description of anylinear analog circuit. The algorithm presented in

    Section 3 is implemented to transform the netlistdescription (Spice netlist for example) of linearanalog circuit into an extended space state modelusable for residual generation. A dead-beatobserver method described in Section 4 uses theextended state model to generate the equations ofoptimal fault detector circuitry, for a large classof linear analog circuit.

    2. CONCURRENT TESTING PROBLEMSTATEMENT AND MODELINGREQUIREMENTS

    The first step of any model based fault detectionmethod is the determination of an appropriatemathematical behavioural model of the systemunder test. The mathematical knowledge avail-able on the model is then exploited to generatea residual that will be used as on-line fault indi-cating signal.

    Contrary to the classical (off-line) testing stra-tegies, the normal operation of the system undertest is not suspended during on-line testing. Thatinvolves two main constrains governing concur-rent testing:

    (i) The system nominal input/output behaviourshould be held without disturbance:The concurrent signal measurement and

    processing required for on-line residual gen-eration should be made without any pertur-bation of the normal operating mode.

    (ii) Fault detection should be guaranteed for anyinput signal:

    In off-line testing procedure, the test inputsignals are specially chosen and optimizedfor specific fault coverage. Contrary, for con-current testing, the normal operating inputsignals are the only excitation exercising onthe system. So, the input signal used in thedetection process depends on the randomoperating mode. The operating input signalsequence can not be chosen for a particulartesting objective. On-line fault detection will be

  • ANALOG ON-LINE TESTING 61

    guaranteed for any system particular operatingcondition only if the detection process effi-ciency is independent to the input signal form.

    Generally, he residual is obtained by a con-current processing of available signals providedby sensors and actuators [3, 6].

    Electronic circuits are driven by voltage andcurrent sources. Hence, there are no actuators tothe circuit other than these sources. Also, thereare no additional sensors necessary to measurevoltages.The few publications that focus on on-line error

    detection for electronic circuits deal with fullyavailable systems [2]. For this type of circuit, allstate variables are voltages and can be easilytapped from the circuit under test. When the sys-tem state variables are not directly connectable,on-line fault detection can be perform using theclassical input/output behavioral model that isgenerally used for functional output simulation.Unfortunately, the use of such a simulation modelfor concurrent testing of analog circuit would betoo costly in term of additional circuitry. Meas-uring currents is problematic because the corre-sponding signals have to be read with minimaldisturbance to the primary function of the cir-cuit under test. It is assumed in this paper thatonly circuit node voltages are available for meas-urement. The corresponding node voltages areassumed to be read through voltage followerswithout disturbance of initial functionality ofthe circuit under test. Figure shows that the

    residual is build from the functional outputs andthe internal node voltages of the circuit.

    Contrary to the models generally used forfunctional output simulation, the extended modelrequired for fault detection must also give:

    an estimation of the signal on any internal node;a model for unknown inputs or noise effects;a model for fault effects.

    In the extended model, the circuit unknowninputs modeling the noise sources are clearlydifferentiated to the faulty behavior. The requiredextended model for the circuit may have the fol-lowing state equation form:

    z Ax(t) + Bu(t) + Ed(t) + Kf; (1)y(t) Cx(t) + Du(t) + Fd(t) + Gf. (2)

    In these equations, x(t) is the state vector of sizen, u(t) is the input vector, y(t) is the output vec-tor of size p. Each output component yi(t) repre-sents the voltage signal on a circuit node. d(t) isa vector modeling the effects of unknown inputsand disturbances when vector f models the faulteffects. A, B, C, D, E, F, G and K are matrixeswith time invariant components and appropriatedimensions. A similar model has been used inthe topic of automatic control for fault detectionand identification [6, 7].The first problem to be solved is: how to derive

    such extended state space model from the classi-cal analog circuit description tools.

    u(t)_ Analogsystem ")Yp=yf(t)

    ofthenominalI/Obehaviour" Xl’X2 Xn J- .,, Readable without perturbation ’...... On-linetesting.." ,,Detection properties \ conditionsYP ...- ...’- hold independently to)... the input signal u(t)r(ii 0 in fault free conditions Detection

    Residual 0 in faulty conditionsproperties

    FIGURE On’line testing scheme.

  • 62 E. SIMEU

    3. FROM NETLIST DESCRIPTIONTO EXTENDED STATE SPACE MODEL

    The choice of a model to represent a dynamicalsystem depends on the situation and the type ofanalysis required. Contrary to the classical mod-eling techniques available for analog circuit re-presentation (Circuit schematics, Block diagrams,Bond graphs,...), the netlist description is notreally usual for analog systems. It is generally usedas an intermediary stage between the previousrepresentation techniques and the mathematicalbehavioral models, usable for system simulation.Figure 2 shows the schematic and the correspond-ing netlist for a fourth order low pass filter.

    3.1. Variable/Equation Dependency Matrix

    The transformation of a netlist description ofelectrical circuits into admittance matrix form isgenerally simple. A circuit can be simulated withan admittance matrix P and an excitation vectorQ. To obtain the voltages for the nodes of thecircuit, it suffices to solve

    P.v=Q. (3)

    This section explains how the matrixes A, B, C,D, E, F, G and K of the extended model Eqs. (1)and (2) are generated from a circuit descriptionSPICE netlist.Any linear element in a SPCE circuit description

    defines a topologic equation. The connections ofdifferent elements in a circuit give possible addi-tions of Kirchoff node equations.For simplicity and without loss of generality, the

    noise caused by the effects of resistors heating isthe only unknown inputs taken into account in thesystem modeling. Their influence can be modeledas a small voltage source En in series with theresistor. This voltage source is an unknown inputbecause it cannot be measured or controlled. Thismodeling can easily be extended to any other typeof noise disturbing the system nominal behavior.From a netlist description, the following depen-

    dency relations hold for each circuit element:Resistor defines a topology equation and adds

    its current to the nodes it is connected to.

    --iR" g --[- (U+node U-node ER) 0; (4)

    U+node -- iR; (5)U-node iR.This approach works very well for numericalsimulations. There are efficient algorithms to fac-tor P numerically. However, the deduction of asymbolic transfer function or state space modelusing symbolic variables in P and Q is far fromtrivial: it requires the symbolic inversion of P.

    Conductor defines a topology equation and addsits current to the nodes it is connected to

    -it + (U+node U-node Ey)" Y 0; (6)

    U+node at- it;

    U_node iy.(7)

    Circuit drawingNetlistdescription

    V1 0 AC=5R1 12 5kR2 4 0 lkC1 2 0 100nC2 3 0 500nL1 2 3 300uL2 3 4 600u

    FIGURE 2 Circuit schematic and netlist for a fourth orderlow pass filter.

    Capacitor defines a state equation and a topo-logy equation. Its current gets added to the nodesit is connected to

    -sxi C + ic O; (8)

    --Xi - (U+node U-node) 0; (9)U+node + ic; (10)U-node iC.

  • ANALOG ON-LINE TESTING 63

    Inductor defines a state equation and a topologyequation. Its current gets added to the nodes itis connected to

    -sxj. L + (U+node U-node) 0; (11)

    --xj + iL O; (12)

    U+node -1- iL; (13)U-node iL.

    Voltage source defines a topology equation

    --V nt- (U+node U-node) 0. (14)

    Printing of node equations for nodes U+nodeand U-node is inhibited. This is because the cur-rent generated by the voltage source automaticallyadjusts to maintain the voltage across the voltagesource.

    Current source doesn’t define an equationbut its current gets added to the nodes it is con-nected to

    U+node + I; (15)U-node I.

    Voltage Controlled Voltage Source (VCVS)defines a topology equation

    E. (u_t_contro node U-control node)-[- (U+node U-node) 0. (16)

    Current Controlled Current Source (CCCS) addsto the node equations u+ node and U-node.

    U+node + F./control element;U-node F./control element.

    (17)

    Voltage Controlled Current Source (VCCS) addsto the node equations u+ node and U-node.

    U+node -[- G (U+node control elementU-node control element);

    U-node G (U+node control element(18)

    U-node control element).

    Current Controlled Voltage Source (CCVS) addsa topology equation

    --H’/control element -I- (U+node U-node) 0. (19)

    Earth node defines one equation

    u0 O. (20)

    Printing of the node equation associated withthe earth node is inhibited. This equation is re-dundant as it is a linear combination of the othernode equations.A state equation is an equation containing one

    or more signal derivatives sxi and the correspond-ing state variable is the signal xi. Variables that areindexed are: derived state variables SXl,...,SXn,current variables ixx and node variables u0,..., uj.Equations can be subdivided in:

    state dependency equations (SDE);topology node dependency equations (TND);node current dependency equations (NCD).

    Table I shows the contribution of each elementin dependency matrix.For the fourth order low pass filter (Fig. 2) the

    following variables are identified:

    derived state variables: SXo, SX1, SX2 and sx3;current variables: iR1, in, ic,, ic_, t’ and i:;voltage potential variables: no, Ul, u2, u3 and u4;input variables" V1;unknown input variable: ER and ER_.With the method outlined in this section, the

    following equations are obtained:

    State equations

    SXo C1 -Jr" ic 0;SX1 C2 + ic2 O;SX2" L + (U2 U3) O;SX3" L2 d- (u3 u4) 0.

    Topology equations

    V1 nt- (Ul u0) 0;--iR, "R1 d- (Ul --u2--ER,) 0;

    iR2 R2 nt- (U4 uo ER2) 0;

  • 64 E. SIMEU

    Element

    TABLE Circuit element contribution in dependency sub-matrixes

    Circuit element Contribution

    Netlistsymbol SDE TND NCD

    ComponentsResistor RConductor YCapacitor CInductor L

    Sources

    Voltage source (VS) VCurrent source (CS)Voltage controlled voltage source (VCVS) EVoltage controlled current source (VCCS) FCurrent controlled voltage source (CCVS) GCurrent controlled current source (CCCS) H

    x xx xx xx x

    xx

    x

    --X0 + (U2-- U0) 0;X + (U3 U0) 0;

    --x2+i =0;--x3+iL2 =0;U0 --0.

    Kirchoff node equations

    i11 + icl + t’ 0;+ t’- t’ 0;+ ic2- t’ + t’ O.

    A matrix that holds the variable/equation depen-dencies can be constructed. The rows of the matrixcorrespond to successive equations and a columnof the matrix index a variable. The matrix is filledwith zeros and ones. A one (black point) in po-sition (r, c) indicates that equation r contains thevariable c. A zero indicates that the equationdoes not contain this variable. Figure 3 (beforecausality, on the left side of the figure) showshow this translates into a variable/equation depen-dency matrix. Each row represents an equationin the order given above. Each column representsa variable also in the order given above.

    3.2. Construction of a CausalDependency Matrix

    In this step, it’s a question of arranging equationsand variables in such a way that they can be

    successively and easily solved. Causality is as-signed to initial non-causal equations stored inthe adjacency matrix. The degree of dependencyis calculated for each of the following dependingvariables: derived state variables (SXx); currentvariables: (iRx, icx, iLx) and node voltage potentialvariables: (Ux).The degree of dependency nd(cr) assigned to

    each depending variable a is equal to the numberof unsolved equations that contain the vari-able a. As the input signal, state variables Xxare considered as explicit variables. The calcula-tion of the dependency degree of such explicitvariable is not useful in this section. In the exam-ple of the low pass filter, the initial dependencydegree for each variable is

    SXo, SXl, sxz, sx3 = 1;iR, ic, ic:, ul, u4 2;iL,,iL2,iRI,U2, U3 == 3;u0 = 5.The algorithm of Figure 4 is run in order to

    assign a causal order to equations. Each step ofthis algorithm solves a variable crk and an equa-tion Eqk. The weighting of unsolved variablesmust be adjusted by decreasing the degree of de-pendency of unsolved variables that are used inequation Eq,.

    Finding only multiple dependency equationsmeans the existence of loops that have to besolved later on. In this case, the remaining

  • ANALOG ON-LINE TESTING 65

    0

    2

    4

    6

    8

    10

    12

    14

    16

    Before causality

    ooo

    0

    2

    4

    6

    8

    10

    12

    14

    16

    After causality

    oo

    33 non-zero elements 33 non-zero elements

    FIGURE 3 V/E dependency matrix for fourth order low pass filter.

    I k=lInitialisation ofdegreeofvariable dependency( Calculation ofthe minimaldependency degree(Ndmin)

    yesno it, > b"

    T.her.e is a loopyein no ttat has to be

    solved..ISelectionqfavariablewiththe 1minimal dependency degree

    Scelection

    ofan unsolved equation Eqk |ontaining the variable e,k

    Solution of variable (kLine k of matrix CDM corresponds |

    to variable k ISolution ofequation Eqk |

    Column k of matrix C._DM correspondslto equation l’qk

    I Descrease by one the dependency degree f lall the variables that are used in equationeqkFIGURE 4 Causal dependency matrix algorithm.

  • 66 E. SIMEU

    variables are reordered on weighted dependency.Lowest dependency degree comes first; highestdependency degree last. If the number of equa-tions/variables is n, it can be proved that thealgorithm presented on Figure 4 assigns causalityin worst-case time complexity of

    O ( k lgk)

  • ANALOG ON-LINE TESTING 67

    The substitution of this new value for xi in allthe equations g removes one loop.

    3.4. Deriving the Nominal Model

    Using the causal variable/equation dependencymatrix, the system can be solved by a simple back-substitution of variables starting at the lastequation and working up to the first. The back-substitution gives a number of state equationsof signal variables depending only on the explicitvariables (inputs signal or state variables) andthe component parameters. Any equation with asingle dependency has the following form:

    where z is the corresponding depending variable,Xl, X2,...,Xn are the state variables and u is theinput signal. This equation can be written in thefollowing explicative form, expressing the depend-ing variable as function of the input signal andstate variables:

    Isolating the variables selected by the causalityassignment process yields the following equationsin the case of the low pass filter:

    sxo ic, /Csx ic /C2SX2 (U2 u3)/L1;sx3 1/L2" u3 u4/L2ic iR iLic: iL i:U4 R2 iR2 + (Uo @ ER2);U3 U0 + Xl;iR1 --1/RI U2 q- (Ul ER,)/R1;iL X2;iUl UO "nt- V1;

    U2 U0 d- X0;

    iL2 X3;Uo --0.

    Now, these equations have to be put into ma-trix form with the state variables split off fromthe element parameters: The equations expressingthe state variable derivatives (sxi) function of in-put signal and state variables constitute the statedynamic equations and the equations giving thenode voltage signals (uj) function of input signaland state variables form the system outputequations. The nominal model has the followingexpressions.

    -1 0 -1 0 1

    RI-10 0 C’- C-’" X -- V1;k= 1_. -1 0 0L L10 0 L2(yl)Y2Y3

    (u2)U4U3

    (lO0 00 0 R2 x + 00 0 0 V1.3.5. Unknown Input and Fault Model

    Noise generated by the elements should notbe considered as a fault; their effect is temporaryand does not affect the functionality of the circuit.For simplicity and without loss of generality, it isassumed here that only resistors (and conductors)generate noise. Their influence is modeled as asmall voltage source ER in series with the resistor.This voltage source is an unknown input to thesystem because it cannot be measured or con-trolled. This modeling can easily be extended toany other type of noise disturbing the systemnominal behavior. The machinery described inSubsections 3.1-3.4 derives the matrixes for theunknown inputs. For the fourth order low passfilter, the unknown input model is:

    1__!_RC RC (0 O)E= 0 00 0 F= 0 00 00 0

  • 68 E. SIMEU

    Noise affects the state variables because E isnon-zero. But noise does not directly influencethe outputs as F is zero.

    Fault models describe how fault processesinteract with the function of the hardware. Alinear approximation around the nominal modelis used to extract a fault model. Matrices A andB can be concatenated as they are affected bythe same element faults.

    (A + AAf B + ABf) (21)The nominal symbolic matrix for each element is

    substituted by a linear approximation. Any faultyelement X in the circuit is replaced by a powerseries as follows:

    X->X. +-+0 -This substitution is made for each element in thesymbolic matrix. Then the fault matrix can beextracted without difficulty. The power series O(.)nullified and the fault matrix can then be sub-tracted from the nominal matrix to obtain thedifference matrix. This gives the linear approxima-tion for the difference variables for each element.

    4. DESIGN OF ON-LINE DETECTIONCIRCUIT

    The extended state space model derived in theprevious section for linear analog circuits is usedin this section to design an optimal error detec-tion circuit. The detection circuitry is built usingthe dead-beat observer principle. The observer iscombined so that its output is zero under nominalconditions and non-zero in faulty conditions.

    4.1. Dead-beat Observer Principle

    It is assumed that the circuit model can bedescribed with Eqs. (1) and (2). In general, statevector x is not directly measurable from the circuitunder test. The error detection circuitry must use

    only available measurable signals: input vector u,and output vector y. The unknown state para-meters of vector x have to be eliminated fromEqs. (1) and (2). This goal is achieved by expres-sing the successive derivatives of the output vectory explicitly in terms of x, u, d and f. For sim-plicity and without loss of generality, only singleinput is considered.The k successive first derivatives of the output

    vector are given by the following equations:

    y(0) (t) Cx() (t) + Du();y()(t) CAx() (t) + CBu() (t) + Du() (t);

    y(k) (t) CAkx(0) (t) + CAk- Bu(0) (t)+ CAk-2Bu()(t) +... + CBu(k-l)(t)+ Du(k) (t).

    To obtain the equations for d, substitute in theabove equations E for B and F for D; likewise forf, substitute K for B and G for D.

    These equations can be grouped in the followingmatrix form:

    yN Obx(t)+ H]UN + H]D[k] + Hf[klFN(22)

    where

    y(O)y(1)

    y(

    (t)(t)

    (t)

    U[k]u()(t)

    d() (t) f() (t)d()(t)

    Ftklf(1)(t)

    d(k) (t) f()(t)

    Obk

    CCA

    CA

    (23)

  • ANALOG ON-LINE TESTING 69

    and

    D 0 0 0

    CB D ". 0 0

    CAB CB ". 0 0

    CA-B CAk-2B CB D(24)

    The matrix HIdk] (respectively Hkl) is obtainedfrom the expression of matrix H[uk] Oby substitutingB by E (respectively by K) and D by F (respective-ly by G). The integer k is the number of out-put derivatives required for residual generation.k will also define the order of the residual, i.e.,the number of integration needed in the residualgeneration scheme. Generally, in the case ofelectronic circuits, more than one integration israrely necessary. If n is the order of the system,then Obklk=n_ is the observability matrix of thesystem. In the nominal conditions (d(t)=f(t)=O)Eq. (22) has the following simpler form:

    r[k] Obkx(t) + H[uk] U[k]. (25)

    In Eq. (25), it is clear that the signal vectors ytkl(node signal vector) and U tkl (input vector) areassumed to be measurable, when the state vectorx(t) is not necessarily available for connection.The basic idea of the residual generation methodpresented in this paper consists of eliminatingthe unknown variable in Eq. (25). This elimina-tion may be performed by combination of equa-tions or by projection. The projection techniqueconsists of determining the subspace Ps of allthe vectors v defined by Eq. (26).

    Ps {v vTObu 0}. (26)

    Every vector vy of the subspace P can be used togenerate a scalar residual ry(t) that can be used fora parity check. Equation (27) will just do that.

    (27)

    Using Eqs. (22) and (26), the expression of theresidual rj become

    rj(t) v (Obx(t)+ H[dk]D[k] + H[fk]F[k])

    From this explicative form, it is clear that theresidual ry is not affected neither by the initialcondition x(0) nor by the input signal u(t) butis only function of disturbances d and faults f.Hence ry can be used for the purpose of faultdetection. When there is no fault (f=0), thenry is only affected by unknown inputs, d. Whenhowever a fault occurs (f0) ry is influencedby both f and d and its value increases. Thus, afault can be detected by checking the incrementof ry caused by f.The algorithm of Figure 5 summarizes the

    residual generation process.For the low pass filter of Figure (2), an

    application of the relations defined in Eq. (23)(for k 1) gives

    U[1] ( u)// y[1]__

    Obl

    ’ 00 0

    0- 00 RL2\o o/ 0 0

    0 0

    0 0

    0 0

    \ 0 0

    0 0

    0 R20 0-1 0

    0 L2

    C2 C2

    (28)

  • 70 E. SIMEU

    Calculation ofrg k rank(Obk J

    ank test

    +1yes

    fl There exists at leastnr (k+l).n -rg k /independe,nt esidualsoi oraer Knr vectorsof

    independent andorthogonal to Obk

    Vl,V2 Vnr

    I Calculatin f nr residuals 1[k]rj =vj .y[kl vj..Hu-1, 2 nr.not /testofsatisfying .residual)satisfying

    Xerformance

    FIGURE 5 Residual generation algorithm.

    Since Obl is not a full line-rank matrix, thesubspace Ps orthogonal to Obl and defined byEq. (26) is not zero. It is easy to verify that thevectors Vl and v2 defined by Eqs. (29) and (30)respectively belong to Ps

    ]" (R2 R 0 R1R2C 0 R1R2C2); (29)

    v=(0 R2 -R2 0 L2 0). (30)

    According to Eq. (27), the vectors V and v2 canbe used to provide two independent residuals rl(t)and r2(t) defined respectively by the following

    equations:

    r (t) R2Yl + RlY2 + R1R2CII-+- R1R2C2Y3 R2u;

    r2 (t) R2Y2 R2Y3 + L22.

    (31)

    (32)

    More generally, any vector vj in subspace Plinear is a linear combination of form

    Yj 611 d-" 612 026. (33)

    Where 6 is a vector of real numbers of form6T--[61, 62] and 0 has the meaning of the basefor P defined by Os= [Vl, v2].To any vector vj defined by Eq. (33) corresponds

    a scalar residual defined by Eq. (27). The follow-ing equation gives the general expression of sucha scalar residual.

    rj(t) ooyl -I- floy2 --b "Yoy3 -q- O11 Af_/12-[- ")/13 -[" .0U. (34)

    Where the design parameters a0,and A0 are function of vector vj (i.e., function of61 and 62).

    4.2. Optimization of the Residual Equation

    Ideally, the resulting detector should react stronglyunder the presence of a fault but should not reactto unknown inputs to the system, like noise. Thefollowing equations put these robustness require-ments into mathematical rigor:

    vfHf[k] # 0; (35)vH[ff] 0. (36)

    Finding a solution vf that satisfies Eqs. (26)-(36)provides a robust residual that is unaffected byunknown inputs but is affected by a fault.

    Unfortunately, these equations may not yield asolution. In this case, an optimal approximationdue to a performance criterion can be found. Theperformance criterion to be used must take intoaccount the sensitivity of the residual with respect

  • ANALOG ON-LINE TESTING 71

    to unknown disturbance inputs d as well as thesensitivity with respect to faults f. It is then use-ful to define a performance measurement thatshows in a way how much the detector is sensi-tive to faults and insensitive to unknown inputs.The following performance index satisfies theseconstraints:

    IlvfHlI-. (37)llv nf

    where I]" is the 2-norm; the largest singular valueof the matrix. Minimizing the performance indexp will yield the desired residual.

    Pmin min llvrH[fflll) (38)This constrained optimization problem can be

    reduced to the following unconstrained optimi-sation:

    Pmin mn (116r 9 H ] (39)Where G has the meaning of a base for P. Hence,6 singles out the best vector vr amount all thepossible solutions represented by G. The solutionto this optimisation problem is obtained by adifferentiation of the performance index p. Thisleads to the relation

    no9 I4[klI-I[k]To9T 0 (40)6r(gsH]H]vsr ,,s--f --f "s

    The solution of this of this equation gives thevector VT solution to optimal detector designproblem.

    4.3. Residual Implementation

    Normally, the implementation of the residual riusing Eq. (27) requires the differentiation of theoutput and input signals. This operation is proneto error. Integrating the Eq. (34) once (k times inthe general case) replaces differentiation by in-tegration. The drawback of this trick is a poten-tially unstable pole at s=0. The stabilization isobtained by using a negative feedback factorP=-P0 of the residual output into the detectioncircuit. To provide a stable residual signal, pureintegrator has to be replaced by a one a orderfilter. The division of the Laplace transform of re-lation (34) by (s +P0) gives the expression of filt-ered residual rq, usable for on-line fault detection.

    r. (s) (o0yl (s) q- floy2(s) + ")’0y3 (s) q- Aou(s)+ SCelyl (s) + Sflly2(s) + S’yly3(s))/s + Po

    (41)

    The use of a one order transfer function providesa mean to control the sensitivity of the residualsignal to tolerances in component values. As in [2],the residual filter also allows an adjustment of theresponse of the test circuitry to sharp transients.The general scheme of the residual block diagraman the corresponding detection circuit schematicare given on Figures 6 and 7 respectively.

    u=ul (

    Residual

    FIGURE 6 Block diagram of the error detection circuit.

  • 72 E. SIMEU

    rfl/lambdaO

    residual

    FIGURE 7 Schematic of one order detection circuit.

    The size of the detection circuitry is onlyfunction of the number k of output derivativesrequired in the residual generation process. Thisnumber depends on the quality of informationavailable on node voltages and not on the size ofthe circuit under test.

    5. SIMULATION RESULTS

    The method described in the previous sectionshas been applied to different type of analog cir-cuits including biquadratic filter, high pass filter,Pierce oscillator and the low pass filter exampleof Figure 2. For simplicity, the results presentedin this section correspond to the low pass fil-ter circuit of Figure 2 only. The results obtainedfor the other circuits were very similar and arenot presented here.

    In each simulation, the following componentvalues were used: R1 5 kf, R2 kf, C1 IxF,C2 5 tF, L1 30mH and L2 60 mH.

    It was first v.erified that each residual was veryclose to zero in the fault free condition. The sin-gle fault simulation was applied on the circuitmodel. Open, short as well as positive and nega-tive parametric faults were simulated on each cir-cuit element separately, when the other elementswere held at their nominal value.The Figures 8 and 9 show the two residual wave

    forms obtained for positive parametric deviationof + 50%. The overall shapes of the residual weregenerally very close for symmetric negative offsets.

    The results represented on Figures 8 and 9 areobtained on two independent residuals for + 50%parametric deviation faults. The simulation re-sults for fault detection are summarized in theTables II and III that hold the maximum gainvalues associated with each residual for each faultyelement.With a reasonable detection threshold corre-

    sponding to a gain of 0.01, it is clear on Tables IIand III that the detection of all the catastrophicfaults (i.e., short and open on any circuit compo-nent) is ensured on each of the both residuals.

    Figure 8 and Table II show that the parametricfaults on resistors R1 and R2 are detected by thefirst residual up to about 5000 rad/sec. Parametricfaults on capacitors C1 and C2 are detected onlyin the frequency range 500- 5000 rad/sec when+/-50%. Parametric faults on inductors areundetected by the two detectors.Each of the residual may probably cover a

    different spectrum of possible faults. To obtainlarger coverage results, it may be judicious tocombine different residuals with different spect-rum and fault coverage. But we are still lookingfor a formal method. The choice for a residual orpossibly a combination of residuals can depend on

    the allotted space for the error detectioncircuitry;the desired fault coverage;the operational frequency range;the criticality of faults covered (in terms ofeffects gravity and occurrence probability).

  • ANALOG ON-LINE TESTING 73

    0.8

    0.7

    0.6

    0.5

    0.4

    0.3

    0.2

    0.1

    010

    Residue under faulty conditions with an element tolerance of 50%

    Iine................................. line 2"’,, line 3

    ",, line 4line 5

    line 7

    \,,,

    \\

    ......... .....:":.:i :..’.".: ?.:.:: :"." ?.’!."’,.

    O0 1000 10000 100000 e+06 e+07Frequency in rad/sec

    FIGURE 8 First residue under faulty conditions.

    0.16

    0.14

    0.12

    0.1

    0.08

    0.06

    0;04

    0.02

    010

    Residue under faulty conditions with element tolerance of 50%

    ’’line’lline 2

    "’,, lineline 4

    ’,, line

    line 7......\ ’,)’,,,,

    \,\

    \,,,

    /.. .......... ",, "%,

    -."::i :::..1/. ..:...::..’ i’.’:::’. !....O0 1000 10000 100000 lo+06 e+07

    Frequency in rad/sec

    FIGURE 9 Second residue under faulty conditions.

    Element

    TABLE II Maximum response for first residual

    Open + 50% -50% Short

    R1R2C1cLL

    2.062 0.588 1.428 3.3221.325 0.769 0.909 2.0411.071 0.0548 0.162 1.7841.813 0.244 0.322 1.050.539 0 0 0.4780.727 0 0 0.361

  • 74 E. SIMEU

    Element

    TABLE III Maximum response for second residual

    Open + 50% -50% Short

    R1R2C1

    L1L2

    0.8022 0.118 0.286 2.6611.430 0.154 0.182 1.7840.4345 0.0110 0.0324 0.7830.988 0.0488 0.0645 0.9310.167 0 0 0.3890.122 0 0 0.159

    In the end, the designer has to choose betweenmaximum fault coverage and minimum space.

    6. CONCLUSION

    The first part of this paper deals with thegeneration of an extended symbolic model forlinear analog circuits from its netlist description.This extended model required for efficient on-linefault detection comprises state space matrices forthe nominal model, an unknown noise input modeland a fault model. The noise.sources are modeledby the unknown inputs. Fault models are gener-ated from a sensitivity analysis of the symbolicstate space model. From the previous extendedmodel of the circuit, an optimal concurrent errordetection circuitry is derived in the second part ofthis paper. The detector optimality request herecorresponds to maximal sensitivity to faults andminimal sensitivity to unknown inputs.

    Contrary to previously proposed methods onconcurrent fault detection of linear analog circuits,the methodology presented in this paper is usablefor any linear analog circuit, state variable or non.Further development should focus on the exten-sion to non-linear problems. As a first step, non-linearity can be captured in the unknown inputvectors. Techniques on how this can be accom-plished for electronic networks have yet to bedeveloped.

    References

    [1] Jou, J. Y. and Abraham, J. A., Fault tolerant FFTnetworks, IEEE Transactions on Computers, 37, May,1988, 548- 561.

    [2] Chatterjee, A. (1993). Concurrent Error Detection andFault Tolerance in Linear Analog Integrated Circuits Using

    Continuous Checksums, IEEE Transactions on VLSISystems, 1(2), 138-150.

    [3] Chow, E. Y. and Willsky, A. S. (1984). Analytical Redun-dancy and the Design of Robust Failure Detection System,IEEE Transactions on Automatic Control 29, 603-614.

    [4] Nair, V. S. S. and Abraham, J. A. (1990). Real-NumberCode for Fault Tolerance Matrix Operations on ProcessorArray, IEEE Transactions on Computers, 39(4), 426-435.

    [5] Reddy, L. N. and Banerjee, P. (1990). Algorithm-BasedFault Detection for Signal Processing Applications, IEEETransactions on Computers, 39(10), 1304-1308.

    [6] Frank, P. M. (1990). Fault diagnosis in dynamical systemsusing analytical and knowledge based redundancy-Asurvey and some new results, Automatica, 26(3), 459-474.

    [7] Chen, J., Patton, R. J. and Zhang, H. Y. (1996). Design ofUnknown Input Observers and Robust Fault Filters,International Journal of Control, 63(1), 85-105.

    Author’s Biography

    Emmanuel Simeu received his electrical engineeringdegree from Casablanca institute of engineeringsciences in 1987, the DEA in automatic controland signal processing and the Ph.D. in automaticcontrol and system theory, all from national poly-technique institute of Grenoble in 1988 and 1992respectively.From 1989 to 1995 he was researcher in systems

    and control group in Automatic Control Labo-ratory of Grenoble. From 1992 to 1995, he alsoheld the post of associate professor at ValenceInstitute of Automatic and Robotic.

    Since September, 1995, he is an AssociateProfessor of dependability analysis and automaticcontrol in the Department of industrial riskmanagement at Science and Technique Instituteof Joseph Fourier University of Grenoble. He hasbeen researcher in Reliable Integrated SystemsGroup of TIMA laboratory since 1995.

    His current research interests include on-linetesting, synthesis of testable design, experimentaldesign for fault detection, reliability analysis, ro-bust monitoring, modeling and optimization.

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