development of core technologies for green nanoelectronics · fujitsu laboratories ltd. (core...

Naoki Yokoyama Leader, Green Nanoelectronics Center, AIST

Fellow, Fujitsu Laboratories Ltd. (Core Researcher, FIRST Program)

Development of Core Technologies for Green Nanoelectronics

November 3, 2011

2nd Berkeley Symposium on Energy Efficient Electronic Systems

Acknowledgements: This research was funded by JSPS through the Funding Program for World-Leading Innovative R&D on Science and Technology (FIRST Program), initiated by the Council for Science and Technology Policy (CSTP).

1

Acknowledgements Development & application of nanocarbon materials

“Synthesis and transistor application of graphene” Shintaro Sato, Group Leader Fujitsu

Mizuhisa Nihei, Group Leader Fujitsu

Toshimichi Shintani, Subtheme Leader Hitachi

Junji Tominaga, Group Leader AIST

“CNT/graphene interconnects”

“Development of low power superlattice phase-change material and its processing technology for device”

Material research for backend devices

2

Under One Roof

nano

June 17, 2009 President, University of Tsukuba Nobuhiro Yamada President, National Institute for Material Science (NIMS) Teruo Kishi President, National Institute of Advanced Industrial Science and Technology (AIST) Tamotsu Nomakuchi Chair, Committee on Industrial Technology of Nippon Keidanren Ryoji Chubachi

Tsukuba Innovation Arena for Nanotech

TIA Nano Univ. of Tsukba

NIMS

AIST

By adopting joint strategies and management for R&D and education to contribute to the growth of the Japanese and global economies.

3

Univ. of Tsukuba

AIST

Central R&D Hub for Nanotechnology

Core Competencies of TIA Nano Started April 2010

Nano-Material SafetyIntegrative data center and research frame

for nano-material safety

Power ElectronicsIntegrated R&D frame from SiC wafer,

device to power system

Ｎ-ＭＥＭＳ

High-value-added niche MEMS and mass production integrated N-MEMS

Carbon NanotubesR&D framework of CNT mass production and CNT composites for wide applications

Nano-GreenR&D framework for green innovation

driven by nanotechnology

Nanoelectronics・Backend device・New material・Advanced lithography（EUVL）

Nanodevice Research Foundry・Prototype device(45-65nm CMOS and N-MEMS,etc.) fabrication and evaluation（φ200-300mm）・SiC power device fabrication and evaluation

Nanotech Open User Facilities

Open user research facilities in AIST and NIMS (nanocharacterization, nanoprocessing,etc.)

Networking School of Nanotechnology

Graduate school function through cooperation of University of Tsukuba and partnering universities

6 Core Research Domains

3 Core Infra-

structures

・Nano CMOS・Silicon-photonics・Carbon-electronics・Spintronics

4500 m2 super-clean room

4

Enterprise companies

Enterprise companies

Vice President, AIST

Nanoelectronics Research Institute

FIRST: N. Yokoyama Development of core

technologies for green nanoelectronics

SCR Driving Management team

4500m2

Super-clean room (SCR)

FIRST: Y. Arakawa Photonic-electronic integration system

METI: N. Sumihiro

Super-low-voltage devices for low-carbon society

FIRST: H. Ohno Ultralow-power spintronics-

based logic VLSIs

Partial funding

Nanoelectronics Consortium

TIA Promotion Division

Seven universities Two institutes

Researchers

30 researchers

METI: Ministry of Economy, Trade and Industry

Nanoelectronics R&D in TIA nano

5

20 researchers

Renesas, ULVAC, Fujitsu, Toshiba, Hitachi

Background and R&D plans of Green Nanoelectronics Project Graphene growth and top-down

fabrication of graphene nanoribbons Latest hot news about interfacial phase-

change memory devices

Overview

（GMR > 2000% at 400 K）

6

Paradigm Shifts in ICT Society

Broadband

Wireless

Broadband LAN

WAN

PAN

Public space

Personal space

Office

Home

BAN

Network centric

For everyone: Information search

Human centric, Ubiquitous

For anyone: Knowledge integration

Data center

Computer centric

For professionals: Data processing

Personal security/safety and social activities will be provided to everyone, resulting in a truly ubiquitous society.

7 Source: Fujitsu website

Future ICT will need to meet people’s requirements more precisely and become more user friendly and reliable.

190 times increase in traffic · 5.2 times higher · 20% of domestic electric power generation

Increased Power Consumption of ICT Source: Ministry of Economy, Trade and Industry, Japan For Japan

8

2006 20250

50

100

150

200

Inte

rnet

traf

fic

Index (2006 = 1)

Year

637 Gbps

121 Tbps

A paradigm shift in ICT society could result in environmental destruction. Innovations are needed to develop an environmentally friendly ICT society.

0

5E+13

1E+14

2E+14

2E+14

3E+14

3E+14

2006 2025（Year）

Pow

er c

onsu

mpt

ion

（W

h）

Network devices

Display

Server/ Storage

13 times

5.2 times

2.5 times

～240 billion kWh

計算機室内の次世代スパコン (イメージ) “K” Designed by Japan’s RIKEN Research Institute and Fujitsu

800 racks of computing gear housing 80,000 Fujitsu SPARC 64 VIIIfx processors running at 2.2 GHz

The processors are interconnected with a high-capacity direct connection network that enables fast communication between neighbors.

9

・No.1 in the latest Top500 supercomputers list ・Most energy-efficient systems in the list This system is now fully installed and it will be fully operational in 2012.

10-Petaflop K Supercomputer

Copyright 2010 FUJITSU LIMITED

SPARC64TM V (1 core) SPARC64TM VI (2 cores x 2 VMT) SPARC64TM VII (4 cores x 2 SMT)

SPARC64TM VIIIfx (8 cores) ・Large-instruction-set architecture ・Highly integrated systems on chip ・Water cooling for high reliability

ピーク性能と消費電力の推移

0

5

10

15

20

25

V V + VI VII VIIIfx

SPARC64

SPA

RC

64 V

= 1

.0

Power (W) = x 0.5

Performance (GF) = x 3

Peak performance vs power

To reduce the power consumption by another order of magnitude, we need to reduce the supply voltage to a half or less of its current value.

90 nm

65 nm

45 nm

130 nm 90 nm

2.2 Gflops/W: 128 Gflops@58 W

Supply voltage remained constant at 1.0 V for all processors in the SPARC64 series.

.

Progress of SPARC64

10

Overview

14




（GMR > 2000% at 400 K）

Multilayer Graphene with Fe Catalyst

32 nm

Fe 20 nm

7 nm

20 nm

Graphene Graphene

10 nm Bilayer graphene

Source gas: C2H2/Ar Temperature: 650ºC Total pressure: 1 kPa Partial pressure of C2H2: 0.002−5 Pa Growth time: 1−20 min Catalyst: Fe film (100−500 nm)

Th

ickn

ess (n

m)

Pressure × Time (Pa·min)

Appears to be proportional to (Pressure × Time)1/2

Substrate

Graphene Fe film

Catalyst thickness: 200 nm

15

D. Kondo, S. Sato, et al., Appl. Phys. Express 3, 025102 (2010).

We are using thermal CVD to grow graphene films using Fe catalyst film.

Pressure x Time

Thic

knes

s (n

m)

Subjects: ・Improvement of quality of graphene ・Connection of graphene & CNTs

Graphene Grown on a 200-mm Wafer

A B

C

D

E

Source gas: C2H4 Temp: ~860ºC

10 nm Cu film

TEM image

D G

2D

Graphene

200-mm wafer

Monolayer graphene

16

Sato et al., ECS Trans. 35(3), 219 (2011) Sato et al., ECS Trans. 37(1), 121 (2011)

Graphene Tr for BPSK Modulator

R = 3 kW

Vdata

Vdata

Vsin Vsin

Vout

Vout

N. Harada et al., APL 96, 012102 (2010)

Vg (V)

0.03

0.08

0.13

0.18

-40 -20 0 20 40

I d(m

A)

W = 2.6 μmL = 8.5 μmVd = 1 V

17

(Mechanical exfoliation)

n-type p-type

(Binary digital data)

(Sinusoidal carrier wave))

BPSK: Binary Phase Shift Keying

Phase modulation concept are widely used as a modern standard in digital wireless communication systems such as mobile phones and DTV broadcasting.

Two approaches for GNR fabrication

Bilayer graphene Graphene nanoribbon (GNR)

Zigzag type Armchair type

Bottom-up: ・ Self-organization of GNRs by preferential growth on high-index surfaces of Cu ・Chemical synthesis of GNRs (in collaboration with universities) Top-down: Lithography + etching (RIE)

Two Main Techniques for Band Gap Generation

18

He ions Electrons

5 nm

Helium Ion Microscope in Fabrication of GNR

High-precision etching is possible because

No contamination from resist process because

He ion beam etching is ideal for GNR fabrication. However, on/off operation of current has not been realized yet.

smaller beam size than electron beam • de Broglie wavelength is 1/100 that of electron

direct etching of graphene without resist mask • free from edge roughness due to resist mask

5-nm-wide GNR fabricated by HeIM (image from Carl Zeiss website) 50 nm

Advantages:

direct etching of graphene

19

Device Fabrication

5 nm

200 nm

SiO2 Sub. Graphene

S

D

50 nm

10 µm

1. Exfoliation of Single-Layer Graphene HOPG (GE; YZA grade) and “Scotch tape” 300-nm-thick SiO2 layer on Si substrate

2. S/D Contacts Ti/Au (5/30 nm) by Thermal Evap. + Lift-off Two-terminal resistance

3. GNR Fabrication Direct etching by He ion beam

0

1000

2000

3000

4000

5000

-30 -20 -10 0 10 20 30

R2t

(Ω)

1000

2000

4000

3000

0 0 30 −30

EF EF

VBG (V)

5000

(processed on March 10th)

20

S. Nakaharai, et al., SSDM2011, p. 1300 (2011)

Graphene

GNR

0.0E+00

2.0E-12

4.0E-12

6.0E-12

8.0E-12

1.0E-11

1.2E-11

1.4E-11

-40 -20 0 20 40

VBG (V)

Vd = 1 mV T = 45 K

ΔVBG

ΔVBG ∼ 10 V Transport gap ∼ 200 meV

On/Off Operation by Back Gate Bias

VBG (V)

I d (A

)

1.E-14

1.E-13

1.E-12

1.E-11

1.E-10

1.E-09

1.E-08

1.E-07

-40 -20 0 20 400 40 20 −20 −40

10−7

10−8

10−9

10−10

10−11

10−12

10−13

10−14

1 mV

20 mV

100 mV

200 mV Vd=

0 40 20 −20 −40 0

2

10

4

6

8

12

14

I d (p

A)

T = 45 K

21

S. Nakaharai, et al., SSDM2011, p. 1300 (2011)

Eg(eV)= 0.8/w(nm) Hongjie Dai's lab at Stanford University

Xiaolin Li, et al.,Science 319, 1229 (2008)

Overview

22




（GMR > 2000% at 400 K）

(3) New Materials for Back-End Devices PCRAM: Phase-change random access memory

• Conventional (GeSbTe) alloy materials: Structural changes between disordered and crystalline states

• Superlattice (GeTe/Sb2Te3) materials: Only Ge atoms move at the interfaces.

→ power consumption reduced by 1/10–1/100

Sb2Te3

GeTe

GeTe

Sb2Te3

low resistivity high resistivity

voltage pulse

Superlattice PCM is now referred to as interfacial phase change memory (iPCM).

Tominaga et al., Nature Nanotech vol. 6, 501−505 August 2011

Tetrahedrally bonded Ge atoms Octahedrally bonded Ge atoms

23

Since Ge–Sb–Te alloys do not have a magnetic moment, magnetism was not thought to play a role in its switching dynamics or electrical properties.

Demonstration of Low Power Phase Change

0 Current (mA)

5 10 15 102

103

104

105

106

107

108 R

ead

resi

stan

ce (Ω

)

102

103

104

105

106

107

108

Rea

d re

sist

ance

(Ω)

Current (mA) 0 2 4 6

Conventional (Ge2Sb2Te5) iPCM (GeTe/Sb2Te3)

reset reset

24

Applying a magnetic field to iPCM might affect the material properties, since Sb2Te3 was reported to be a topological insulator. This is because an in-plane external magnetic field is expected to further contribute to the splitting in spin states induced by the Rashba effect at the GeTe/Sb2Te3 interfaces.

Power reduction by 1/10

Tominaga

Nanoelectronics Research Institute National Institute of Advanced Industrial Science and Technology

E¥PCOS 2011, Switzerland Topological insulating state in interfacial phase-change memory

Comparison of the Switching Behavior

Ge1Sb4Te7 alloy iPCM [(GeTe)2(Sb2Te3)4]8

V (volt) V (volt)

I (m

A)

I (m

A)

Vset Vset Vset (mag.)

iPCM device Alloy device

Tominaga et al., Appl. Phys. Lett. 99, 152105 (2011)

25

Blue lines: I-V curves under 0.1 T magnetic field in plane Black and red lines: I-V curves w/o magnetic field (before and after applying 0.1 T, respectively)

Vset: 0.85 V Vset: 2.0 V Vset: 0.85 V

ΔR/R =2000%

This finding paves the way for development of conceptually new memory devices that combine the merits of both phase-change and magnetic data storage.

Since our objective and R&D plans for green nanoelectronics seem to be quite similar to those of the Energy Efficient Electronic System Program, I anticipate there will be greater information exchange between them so that we can accelerate our research together to realize energy saving and human-centric ICT societies.

Thank you very much for your attention. 27

development of core technologies for green nanoelectronics · fujitsu laboratories ltd. (core...

Documents