device research conference 2007 erik lind, adam m. crook, zach griffith, and mark j.w. rodwell...

16
Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University of California, Santa Barbara, CA, 93106-9560, USA Xiao-Ming Fang, Dmitri Loubychev, Ying Wu, Joel M. Fastenau, and Amy Liu IQE Inc. 119 Bethlehem, PA 18015, USA 560 GHz f t , f max InGaAs/InP DHBT in a novel dry-etched emitter process

Upload: lucas-boone

Post on 18-Jan-2018

213 views

Category:

Documents


0 download

DESCRIPTION

Standard figures of merit / Effects of Scaling Small signal current gain cut-off frequency (from H 21 ) Charging time for digital logic Power gain cut-off frequency (from U) Thinning epitaxial layers ( vertical scaling ) reduces base and collector transit times… But increases capacitances Reduce R bb and C cb, through lateral scaling More efficient heat transfer

TRANSCRIPT

Page 1: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Device Research Conference 2007

Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. RodwellDepartment of Electrical and Computer EngineeringUniversity of California, Santa Barbara, CA, 93106-9560, USA

Xiao-Ming Fang, Dmitri Loubychev, Ying Wu, Joel M. Fastenau, and Amy LiuIQE Inc. 119 Bethlehem, PA 18015, USA

[email protected], 805-893-3273, 805-893-3262 fax

560 GHz ft, fmax InGaAs/InP DHBT in a novel dry-etched emitter process

Page 2: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Latest UCSB DHBT w/ refractory emitter metal

Scalable below 128 nm width

New refractory metal emitter technology 250 nm emitter width

0

5

10

15

20

25

30

109 1010 1011 1012

109

1010

1011

1012

Gai

ns (d

B)

Frequency (Hz)

U

H21

MAG/MSG

Ie=22 mA, V

ce=1.45V

Je=16 mA/m2, V

cb=0.4V

ft, f

max=560 GHz

First RF resultsSimultaneously 560 GHz ft & fmax

BVceo = 3.3V

Page 3: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Standard figures of merit / Effects of Scaling

Small signal current gain cut-off frequency (from H21)

cbcexcbjec

Bcb CRRCC

qITnk

f

21

effcbCRffeffbb ,,

max 8

VIC

c

cb

Charging time for digital logic

•Power gain cut-off frequency (from U)

Thinning epitaxial layers (vertical scaling) reduces base and collector transit times… But increases capacitances

Reduce Rbb and Ccb, through lateral scaling

More efficient heat transfer

e

e

InP

ceee

WL

KVWJT ln

Page 4: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

emitter 500 250 125 nm width 16 9 4 m2 access

base 300 150 75 width, 20 10 5 m2 contact

collector 150 100 75 nm thick, 5 10 20 mA/m2 current density5 3.5 3 V, breakdown

f 400 500 700 GHzfmax 500 700 1000 GHz

power amplifiers 250 350 500 GHz digital clock rate 160 230 330 GHz(static dividers)

What parameters are needed for THz HBTs?

✓✓

✓✓

✓✓ c<1 m2 U. Singisetti

DRC 2007

Ohmic contacts and epitaxial scaling good for 64nm HBT node!

Develop technology suitable for aggressive lateral scaling

Page 5: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

TiW emitter dry etch formation

TiW

Cr

• Lift-off no good at <300 nm!• Dry etching – very high aspect ratio• Optical Lithography

O2 plasmaICP Cl2O2 etch

Mask Plate

SiO2

ICP SF6/Ar etch

•Refractory Ti0.1W0.9 is thermally stable

• c < 1m2 possible – no degradation of contact resistance for anneals up to 400C

Page 6: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

TiW dry etching results• 250-300 nm emitters routinely formed• Demonstrated scalability down to 150 nm • ~ 50-100 nm tapering during etch sets scaling limit

•Emitter metal height ~ 500-600 nm

150 nm

Page 7: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Wet etch does not scale

{111}A planes – slow{101}A planes – fast

InGaAs etch ~ 30-40nmInP etch ~ 40 nm

Minimum emitter width ~ 150 nm!

Collector

Base

baseInP emitter

InGaAs emitter

TiW metal

Page 8: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Hybrid dry/wet etch• Anisotropic dry etch InGaAs, part of InP emitter, Cl2N2

• Formidable problem – InClx formation• Extensive UCSB know how on dry etching• Solution – low power ICP etch @ 200C, low Cl2 concentration• Short InP wet etch

TiW

InGaAs

InP

InGaAs Base

Page 9: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Current UCSB TiW emitter process

SiO2

TiW

InGaAs n++

InGaAs p++ Base

InP n

CrSF6/Ar ICP Cl2/N2 ICPSiNx sidewall

Wet EtchHCl:H3PO4

BHF

Ti

a b c d e

InGaAs p++ Base InGaAs p++ Base InGaAs p++ Base InGaAs p++ Base

InP nInGaAs n++ InGaAs n++

• 5 nm Ti layer for improved adhesion• 25 nm SiNx sidewalls protects Ti/TiW during Cl2 and BHF etch, improves adhesion• Standard triple mesa• BCB pasivation

Emitter prior to InP wet etch

Page 10: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Layer structure -- 70 nm collector DHBTThickness

(nm) Material Doping cm-3 Description

30 In0.53Ga0.47As 51019 : Si Emitter cap

10 In0.53Ga0.47As 41019 : Si Emitter

60 InP 31019 : Si Emitter

10 InP 1.21019 : Si Emitter

20 InP 1.01018 : Si Emitter

22 InGaAs 5-91019 : C Base

5.0 In0.53Ga0.47 As 21017 : Si Setback

11 InGaAs / InAlAs 21017 : Si B-C Grade

3 InP 6.2 1018 : Si Pulse doping

51 InP 21017 : Si Collector

5 InP 11019 : Si Sub Collector

5 In0.53Ga0.47 As 21019 : Si Sub Collector

300 InP 21019 : Si Sub Collector

Substrate SI : InP

Objective:• Thin collector and base for decreased electron transit time• Collector doping designed for high Kirk threshold, designed for 128 nm node• Setback and grade thinned for improved breakdown

Vbe = 1.0 V, Vcb = 0.0 V

Je = 0, 14, 21 mA/m2-3.0

-2.5

-2.0

-1.5

-1.0

-0.5

0.0

0.5

80 100 120 140 160 180 200 220 240

Ener

gy (e

V)

distance (nm)

emitterbase

collector

valence band

conduction band

Je = 0mA/m2, 15mA/m2, 30mA/m2

Page 11: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

RF & DC data –70 nm collector, 22 nm base InP Type-I DHBT

0

5

10

15

20

25

30

109 1010 1011 1012

109

1010

1011

1012

Gai

ns (d

B)

Frequency (Hz)

U

H21

MAG/MSG

Ie=22 mA, V

ce=1.45V

Je=16 mA/m2, V

cb=0.4V

ft, f

max=560 GHz

0

5

10

15

20

0 0.5 1 1.5 2 2.5 3 3.5 4

BCDHJLBBBB

Vce

(V)

25 mW/m2

Peak fmax

Peak ft

J e (mA

/um

2 )

Aje= 0.25 x 4.5 m2

Ajc= 0.6 x 5 m2

BVceo

~ 3.3 V

Emitter width ~ 250 nm

First reported device with ft, fmax > 500 GHz

BVCEO ~ 3.3 V, BVCBO = 3.9 V (Je,c = 15kA/cm2)

Emitter contact (from RF extraction), Rcont < 5 m2

Base: Rsheet = 780 /sq, Rcont ~ 15 m2

Collector: Rsheet = 11.1 /sq, Rcont ~ 10.1 m2

10-11

10-9

10-7

10-5

10-3

10-1

0

5

10

15

20

25

0.0 0.2 0.4 0.6 0.8 1.0

I c, Ib (A

)

Vce

(V)

Current G

ain

Aje= 0.25 x 4.5m2, A

jc= 0.6 x 5m2

nc= 1.05

nb=2.01

Ic

Ib

Page 12: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

RF data –70 nm collector, 22 nm base InP Type-I DHBT

4

5

6

7

8

9

10

3

4

5

6

7

5 10 15 20 25C

cb (f

F)

Ccb /A

je (fF/um2)

Je (mA/m2)

Vcb

= 0.4 V

0.0 V

Aje=0.25 x 5.5 m2 A

jc=0.6 x 6 m2

Figure 2. Common

-emitter I

-V characteristics

Vcb

= -0.1 V

0.1 V

0.2 V

0.3 V

450

475

500

525

550

575

600

10 12.5 15 17.5 20 22.5J

e (mA/m2)

f (GH

z)

Vcb

= 0.4V

0.0V

0.1V

-0.1V

• No detectable increase in Ccb for high Je

• Indicates that Kirk threshold is not reached• Device performance limited by self heating?• Further scaling needed for better thermal performance!

cb

f

c

cb

cbcb

cb

cc

cb

VIQ

VVQ

IIC

Kirk effect increases Ccb

...even in DHBTs

Ccb / Je

Page 13: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Breakdown performance of InP HBTs

1

10

100 1000

InP/GaAsSbInP/InGaAsInP SHBTThis work

Brea

kdow

n volt

age,

BVce

o (V)

f (GHz)

?

Type I DHBT and Type II DHBT – similar BVceo

Type II DHBTs has low fmax due to base resistance

SHBT have substantially lower breakdown

Ec

Ev

Ec

Ev

Type I DHBT

Type II DHBT

Page 14: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

0

100

200

300

400

500

600

700

800

0 100 200 300 400 500 600 700 800

TeledyneUIUC DHBT NTTFujitsu HEMT

SFU/ETHzUIUC SHBT UCSB NGST Pohang SHBTHRLIBM SiGe

Vitesse

f max

(GH

z)

ft (GHz)

500 GHz400 GHz300 GHz200 GHz maxff

Updated July 2007

600 GHz

Current status of fast transistors

)( ),/( ),/( ),/(

hence , :digital

gain, associated ,F :amplifiers noise low

mW/ gain, associated PAE,

:amplifierspower

)11(

2/) (alone or

min

1max

max

max

max

cb

cbb

cex

ccb

clock

ττVIRVIRIVC

f

m

ff

ff

ffff

:metrics better much

:metrics popular

250-300nm

600nm

300-400nm

Page 15: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Emitter Process will scale to 128 nm & below

• Emitter-base junction has been scaled down to 64 nm• Pure W emitter- no tapering

61 nm emitter-base junction!

Tungsten

Emitter metal peeled off during cross section cleave..

Page 16: Device Research Conference 2007 Erik Lind, Adam M. Crook, Zach Griffith, and Mark J.W. Rodwell Department of Electrical and Computer Engineering University

Conclusion

• HBTs @ 128 nm node→ 700 GHz ft, xx GHz fmax feasblechallenges: contact resistivity, robust deep submicron processes

• Dry etch based DHBT emitter process → sub 100 nm junctions feasible

• First RF results: 250nm junctions: simultaneous ft,fmax ~ 560 GHz• 125 nm devices should come soon !

• … THz before next DRC?

This work was supported by DARPA SWIFT program and a Swedish Research Council grant.