device simulation for 65 nm - smdpii-vlsi:special … · • physical models for device simulation...

Harish B.P. Microelectronics Lab, ECE, IISc 12 December 2006

Device Simulation for 65 nm

ByHarish B.P.

Microelectronics Lab,Dept. of Electrical Communication Engg.,

Indian Institute of Science, Bangalore.E-mail: [email protected]

mailto:[email protected]


Outline

• Introduction – Modeling and simulation approach• Device simulators – DESSIS• Physical models for device simulation• Device simulation: Simple Id – Vg of NMOS• Mixed-mode simulation• Case study I: AC simulation• Case study II: Transient simulation of inverter• Some views on modeling and simulation• Summary


Introduction• Device simulation essential component of process

design and development and device design.• Device simulation provides quick feedback about device

design before long and expensive fabrication.• Commercially available computer simulation tools can

solve all the device equations simultaneously with few or no approximations.

• Simulated results are as accurate as the models of physical effects included in simulation.

• Simulated output is to be compared with experimental measurements for 1. model validity during model/tool development and 2. design validity during tool usage.


Modeling & Simulation Approach

• Establish device equations (e.g. continuum based partial differential equations)

• Discretize PDEs into difference equations• Solve difference equations (usually nonlinear)• Post-process -- interpret simulation results


Device Simulation Approach• In a device simulator Poisson’s eq. and Continuity eq. are

solved.

• Poisson’s Eq. :where = q [p - n + Nd

+ - Na-] (vol. charge density)

• Continuity Eq. :

ρε =Ψ∇−∇ ).(ρ

uxJn

qtn

−∂∂

=∂∂ 1

uxJp

qtp

−∂∂

−=∂∂ 1

where u = R - GG = electron/hole generation

rateR = electron/hole recombination

rate

These coupled PDEs can not be solved analytically and are solved numerically for self-consistent solution.


Device Eq.s (contd.)

• Total electron or hole current density:

Jn = Jndrift + Jndiff

dxdnqnq DJ nnn +Ε= µ for electrons

for holesdxdpqpq DJ ppp

−Ε= µ

Total conduction current density J = Jn + Jp


Discretization: Numerical techniques

• Time and space discretization to tackle coupled non-linear partial differential equations (PDE).

• Non-linear difference equations solved using iteration techniques like Newton-Raphson method etc.

PDE Difference EquationsDiscretization


Space discretization

• The device cross section is represented as the collection of small cells .The various quantites such as φ, n, p etc are constant within the cell.

• Granularity of discretization: meshing - fine or coarse• Mesh must be densest in device regions where

- current density is high (MOS channels, bipolar base)- electric fields are high (MOS channels, drain, depletion regions)- charge generation is high (SEU alpha particle)


Time discretization

• Discretize the time instants at which each cell is evaluated for its physical and chemical composition.


Outline



Device Simulators

• Florida Object Oriented Device Simulator (FLOODS)• Taurus-Medici from Synopsys• ATLAS device simulation framework: S-Pisces/Device3D

from Silvaco• Sentaurus Device from Synopsys• DESSIS from Synopsys


Introduction to DESSIS

• DESSIS is a multidimensional, electrothermal, mixed-mode device and circuit simulator for 1D, 2D, and 3D semiconductor devices.

• Advanced physical models and robust numerical methods for simulation.

• Simulates semiconductor devices from nano scale SiMOSFETs to large bipolar power structures.

• Supports SiC and III-V compound homostructure and heterostructure devices.


DESSIS (contd.)• Simulates the electrical behaviour of a single SC device

or of several devices combined in a circuit, numerically.• Terminal currents, voltages, and charges are computed

based on a set of physical device equations – poissonand continuity equations.

• MOS transistor represented in the simulator as a virtual device whose physical properties are discretized onto a non-uniform grid of nodes.

• Continuous properties like doping profiles are represented on a sparse mesh – defined at a finite no. of discrete points in space.

• Doping at any point between nodes is computed by interpolation.


Representation of Virtual Device• Device structure described by 2

files:1. file_name.grd : - Grid or geometry file describes regions of device – boundaries, material types, location of elec. contacts.- contains the grid or locations of all discrete nodes and their connectivity.

2. file_name.dat: - Data or doping file contains doping profiles in the form of data associated with discrete nodes.


Design Flow: DESSIS simulator

MDRAW

command_mdr.cmd

boundary_mdr.bnd

output_mdr.log

grid_mdr.grd

doping_mdr.dat

command_des.cmd

parameter.par

DESSIS

output_des.log

current_des.plt

plot_des.dat

nmos_dio.grd

nmos_dio.dat


Features of Dessis• Supports 1D, 2D, 3D device structures.• Set of non-linear solvers.• Mixed-mode support for electrothermal netlists with

mesh-based device and SPICE circuit models.• Set of models for device physics and effects:

- Drift-diffusion, Thermodynamic, Hydrodynamic models.- Monte Carlo- Tunneling through insulators- Hot carrier injection- Interface traps, bulk traps- Ferroelectrics- Optical generation (Single Event Upset – SEU)

• Analysis: DC, AC, Transient, Noise


Outline



Physical Models: 65 nm devicesPhysical effects Models

Recombination Carrier generation and recombination – SRH recombination model – doping dependent lifetime

Gate current Direct tunneling, FN-tunneling, Lucky electron injection, hot carrier injection

Interfaces Interface charge, trapped charge

Carrier transport

Drift-diffusion, thermodynamic, hydrodynamic models

Mobility Doping dependence, velocity saturation, transverse field dependence

Si bandgapnarrowing

OldSlotboom, Slotboom (determines intrinsic carrier concentration)

Si bandgapwidening

Channel quantization models – QC van Dortmodel, 1D Schrodinger eq., density gradient model


Modeling Carrier Transport• Drift-diffusion model:

- widely used for simulation of carrier transport in semiconductors - defined by electron and hole current densities in terms of carrier mobility and electric field.- suitable for low power density devices with long active regions

• Thermodynamic model (non-isothermal): - to simulate effects of

a. self-heating on temperature distribution and b. non-uniform temperature distribution on electrical

characteristics. - suitable for high power density devices with long active regions


Modeling Carrier Transport (contd.)

• Hydrodynamic model: - accounts for energy transport of carriers. - to simulate velocity overshoot and correct estimation of impact ionization rates in deep sub-micron devices.- carrier temperatures not assumed to be equal to lattice temperature.- suitable for small active regions.


Selection of Physical Models

• understand the models available in the tool.• understand the parameters in the model you select.• know the default models and their parameters• check for conflicts between various models

(i.e. if model A is selected, model B can’t be used)• Proper selection and specification of physical models is

critical!


Outline



Structure of Simulation Program

• Sections:1. File2. Electrode 3. Physics4. Plot5. Math6. Solve


MOSFET Id-Vg Simulation - Command File• File {* I/O files:

Grid = "nmos_mdr.grd"Doping = "nmos_mdr.dat"Plot = "n_des.dat"Current = "n_des.plt"Output = "n_des.log"

}

• Electrode {{ Name="source" Voltage=0.0 }{ Name="drain" Voltage=0.1 }{ Name="gate" Voltage=0.0 Barrier=-0.55 }{ Name="substrate" Voltage=0.0 }

}


Command File (contd.)• Physics {

Mobility( DopingDep HighFieldsat Enormal )EffectiveIntrinsicDensity(BandGapNarrowing

(OldSlotboom))}

• Plot {eDensity hDensity eCurrent hCurrentPotential SpaceCharge ElectricFieldeMobility hMobility eVelocity hVelocityDoping DonorConcentration AcceptorConcentration

}


Command File (contd.)• Math {

ExtrapolateDerivativesRelErrControlNewDiscretization

}• Solve {

#-initial solution:PoissonCoupled { Poisson Electron }

#-ramp gate:Quasistationary ( MaxStep=0.05

Goal{ Name="gate" Voltage=2 } ){ Coupled { Poisson Electron } }

} END of Command File


Id-Vg and Id-Vds characteristics of 65 nm NMOS

a. Id –Vg characteristics b. Id-Vds characteristics


Outline



Mixed mode Simulation

Combining two simulations with different levels of abstraction

Device Circuit Switch/Logic

DESSIS SPICE IRSIM


Mixed-mode simulations• Combining two simulations with different levels of

abstraction• Combining DESSIS & SPICE is also mixed mode

Simulation• Mixed mode is used in a much broader sense (can mean

one or all of these)1. Mixed signal: analog & digital circuits with distinctively

different waveforms (voltage Vs. logic state)2. Mixed level: same circuit described at different levels of

abstraction3. Mixed precision: multiple precision used at different

levels of abstraction4. Mixed method: different simulation algorithms for

different parts of circuit.


Mixed device and circuit capabilities

a. single device simulationsb. single device with a circuit netlistc. multiple devices with a circuit netlist

1. Different physical models applied on individual devices.2. Supports devices of different dimensionality – 1D, 2D or

3D.3. Combines DESSIS devices with other devices based on

SPICE compact models.

a. b. c.


Model classification

• DESSIS provides 1. SPICE models – compact circuit models from BSIM3v3.2, BSIM4.1.0 and BSIMPDv2.2.2 Ex. R, L, C, VS, CS, BJT, diode, JFET, MOSFET, GaAs MESFET models.2. Built-in models – special purpose models. Ex. Electro-thermal resistor, SPICE temperature interface.3. User models – compact model interface (CMI) available for user-defined models in C++.


Structure of Simulation Program: Mixed-mode Environment

• Device section:1. Electrode2. File3. Physics4. Plot

• General section:1. Math2. File3. System4. Solve


Mixed-mode Simulations - Examples• Two mixed-mode simulations:

1. AC analysis: to obtain small signal admittance Y matrix - current response at a node to a small signal voltage at another node of the form:

i = Y × v = A × v + jωC × vi = small signal current vector (at all nodes)v = voltage vectorDESSIS output is conductance matrix and capacitance matrix.2. Transient analysis of inverter circuit: DESSIS devices combined with other devices based on compact models like capacitor and voltage source (to obtain I/O and transfer characteristics).


Outline



I. MOSFET AC Analysis - Command File

• Device NMOS {Electrode {

{ Name="source" Voltage=0.0 }{ Name="drain" Voltage=1.2 }{ Name="gate" Voltage=0.0 Barrier=-0.55 }{ Name="substrate" Voltage=0.0 }

}

File {Grid = "@grid@"Doping = "@doping@"Current = "@plot@"Plot = "@dat@"Param = "mos"

}


Command File (contd.)

Physics {Mobility( DopingDep HighFieldSaturation Enormal )EffectiveIntrinsicDensity(BandGapNarrowing

(oldSlotboom))}Plot {eDensity hDensity eCurrent hCurrentElectricField eEparallel hEparalleleQuasiFermi hQuasiFermiPotential Doping SpaceChargeDonorConcentration AcceptorConcentration

}}


Command File (contd.)Math {

ExtrapolateDerivativesRelErrControlNewDiscretizationNotdamped=50Iterations=20}

File {Output = "@log@"ACExtract = "@acplot@"}

System {NMOS trans (drain=d source=s gate=g substrate=b)Vsource_pset vd (d 0) {dc=2}Vsource_pset vs (s 0) {dc=0}Vsource_pset vg (g 0) {dc=0}Vsource_pset vb (b 0) {dc=0}}


Command File (contd.)• Solve (

#-a) zero solutionPoissonCoupled { Poisson Electron Hole }#-b) ramp gate to negative starting voltageQuasistationary (

InitialStep=0.1 MaxStep=0.5 Minstep=1.e-5Goal { Parameter=vg.dc Voltage=-2 }){ Coupled { Poisson Electron Hole } }


Command File (contd.)#-c) ramp gate -2V to +3V

Quasistationary (InitialStep=0.01 MaxStep=0.04 Minstep=1.e-5Goal { Parameter=vg.dc Voltage=3 }){ ACCoupled (

StartFrequency=1e6 EndFrequency=1e6NumberOfPoints=1 DecadeNode(d s g b) Exclude(vd vs vg vb)){ Poisson Electron Hole }

}}

END of Command File


CV-characteristics of 65 nm devices

a. NMOS b. PMOS


Outline



II. Inverter Transient Simulation

010


Inverter Simulation - Command File• Device NMOS {

Electrode {{ Name="source" Voltage=0.0 Area=1 }{ Name="drain" Voltage=2.0 Area=1}{ Name="gate" Voltage=0.0 Area=1 Barrier=-0.55 }{ Name="substrate" Voltage=0.0 Area=1}

}File {

Grid = "@grid@"Doping = "@doping@"Current = “nmos"Plot = “nmos"Param = "mos“

}Physics {

Mobility( DopingDep HighFieldSaturation Enormal )EffectiveIntrinsicDensity(BandGapNarrowing (oldSlotboom))

}}


Command File (contd.)• Device PMOS {

Electrode {{ Name="source" Voltage=0.0 Area=1 }{ Name="drain" Voltage=2.0 Area=1}{ Name="gate" Voltage=0.0 Area=1 Barrier=-0.55 }{ Name="substrate" Voltage=0.0 Area=1}

}File {

Grid = "@grid@"Doping = "@doping@"Current = “pmos"Plot = “pmos"Param = "mos“

}Physics {Mobility ( DopingDep HighFieldSaturation Enormal )EffectiveIntrinsicDensity (BandGapNarrowing (oldSlotboom))

}}


Command File (contd.)• System {

Vsource_pset v0 (n1 n0) { pwl = (0.0e+00 0.01.0e-11 0.01.5e-11 2.0

10.0e-11 2.010.5e-11 0.020.0e-11 0.0)}

NMOS nmos ( "source"=n0 "drain"=n3 "gate"=n1 "substrate"=n0 )PMOS pmos ( "source"=n2 "drain"=n3 "gate"=n1 "substrate"=n2 )Capacitor_pset c1 ( n3 n0 ){ capacitance = 3e-14 }Set (n0 = 0)Set (n2 = 2)Set (n3 = 2)Plot "nodes.plt" (time() n0 n1 n2 n3 )}File {Current= "inv"Output = "inv“}


Command File (contd.)Plot {

eDensity hDensity eCurrent hCurrentElectricField eEnormal hEnormal eQuasiFermi hQuasiFermiPotential Doping SpaceChargeDonorConcentration AcceptorConcentration

}Math {

ExtrapolateRelErrControlDigits=4Iterations=12NewDiscretizationNoCheckTransientError

}


Command File (contd.)

• Solve {#-build up initial solutionCoupled { Poisson }Coupled { Poisson Electron Hole }Unset (n3)Transient (

InitialTime=0 FinalTime=20e-11InitialStep=1e-12 MaxStep=1e-11 MinStep=1e-15Increment=1.3

){ Coupled { nmos.poisson nmos.electron nmos.contact

pmos.poisson pmos.hole pmos.contact }}

}END of Command File


Outline



Some views on modeling and simulation

• Many members of the SPICE generation merely hack away at design. They guess at circuit values, run a simulation, and then guess at changes before they run the simulation again…..and again…..and again. Designers need an ability to create a simple and correct model to describe a complicated situation - designing on the back of an envelope. The back of the envelope has become the back of a cathode ray tube, and intuition has gone on vacation.

Paraphrased from:Ronald A. Rohrer, “Taking Circuits Seriously,” IEEE

Circuits and Devices, July, 1990.


another view on modeling and simulation

• “All software begins with some fundamental assumptions that translate into fundamental limitations, but these are not always displayed prominently in advertisements. Indeed, some of the limitations may be equally unknown to the vendor and to the customer. Perhaps the most damaging limitation is that software can be misused or used inappropriately by an inexperienced or overconfident engineer.”

Henry Petroski, “Failed Promises,” American Scientist, 82(1), 6-9 (1994)


stand up to a computer!• “The use of sophisticated computer simulation tools is a

growing component of modern engineering practice. These tools are unavoidably based on numerous assumptions and approximations, many of which are not apparent to the user and may not be fully understood by the software developer. But even in the face of these inherent uncertainties, computer simulation tools can be a powerful aid to the engineer”.

• “Engineers need to develop an ability to derive insight and understanding from simulations. They must be able to “stand up to a computer” and reject or modify the results of a computer-design when dictated to do so by engineering judgement.”

Paraphrased from:Eugene S. Fergusson, Engineering in the Mind’s Eye, MIT Press (1993)


How to use a simulation program?• “The basic difference between an ordinary TCAD user

and an true technology designer is that the former is relaxed, accepting on faith the program’s results, the latter is concerned and busy checking them in sufficient depth to satisfy himself that the software developer did not make dangerous assumptions. It takes years of training, followed by hands-on design practice to develop this capability. It cannot be acquired with short courses, or with miracle push-button simulation tools that absolve the engineer of understanding in detail what he is doing.”

Paraphrased from:Constantin Bulucea, “Process and Device Simulation in the Era of Multi-Million-Transistor VLSI - A Technology Developer’s View,” IEEE Workshop on Simulation and Characterization, Mexico City, Sept. 7-8, 1998.


Final thought on modeling and simulation

• “The purpose of computing is insight, not numbers.”

R. W. Hamming


Outline



Summary

• Modeling and simulation of semiconductor devices introduced.

• Device simulators and their capability introduced by taking DESSIS simulator for a case study.

• A case study of mixed-mode simulation of 65 nm NMOS for DC and AC analysis and transient analysis of inverter circuit presented.


Thank You

device simulation for 65 nm - smdpii-vlsi:special … · • physical models for device simulation...

Documents