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Digital Basics

• Analogue Communications over long distances often were hampered by noise, fluctuations, etc.

• Analogue communications can have high band width. AM and FM radio! (information transfer/sec)

• Digital communications are more robust but can suffer from band width limitations. Drums, Smoke Signals, Morse Code, Internet, etc.

• Analogue-to-digital & Digital-to-Analogue translators important for research and communications.

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In the transistor switch we can create a situation where a small input current can turn a transistor “On” or “Off”, the two states needed for digital electronics. Early computers used the vacuum tubes, but in the 1950’s Silicon rectifiers and diodes were being developed for this purpose. The “On” “Off” state is refered to as a “bit” short for “binary digit”.

Vref

Vin Vout

Digital Comparator

Vin > Vref Vout = 1 HIGH Vin < Vref Vout = 0 LOW

Transistor Switch and Comparator

On

Off

Switch IB high saturating transistor

IB low

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BITS and BYTES

•  Digital information is sent over data packets. bit bit bit bit bit bit bit bit

8 bits = 1byte

•  Internet packet = 32 bits •  Computer word packet = 32 bits long word Computer word packet = 64 bits double precision •  Computer memory = 1 Gbyte = 109 x 8 bits •  Hard disk = >50 GB 2 TB (1012) •  CD = 700 MB ( 80 minutes of audio) •  DVD = 4.7 GB (2 hrs HR video ) •  Blue Ray = 100-125 GB

bit 0 or 1

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AND A

B

AB =C

A+B =C

A

NAND A

B

A B AND 0 0 0 0 1 0 1 0 0 1 1 1

NAND

1 1 0

1

TRUTH TABLE

A B OR

0 0 0 0 1 1 1 0 1 1 1 1

NOR 1 0 0 0

XOR 0 1 1 0

TRUTH TABLE

Digital Gates

A A INERTER

XOR A

B

B NOR

A

B OR

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A . B = C A .and. B = C

A+B= C A .or. B = C

A . B = C A .and. B = C

A+B = C A .or. B = C

Boolean Theorems

(1) A+A = A

(2) A . A = A

(3) A + 1 = 1

(4) A . 1 = A

(5) A + 0 = A

(6) A . 0 = A

(7) A + A = A

(8) A . A = 0

(9) A = A

(10) A + A . B = A

(11) A .(A + B) = A

(12) A .(A + B) = A.B

(13) A + A . B = A + B

(14) A + A . B = A + B

(15) A + A . B = A + B

(16) A . B = A + B

(17) A + B = A . B DeMorgan’s Theorems

Boolean Algebra

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(1) A+A = A

A A A+A 0 0 0 1 1 1

(2) A . A = A

A A AA

0 0 0 1 1 1

(8) A . A = 0

A A AA

0 1 0 1 0 0

(11) A (A+B) = A

A A+B 0 0 1 1

B 0 0

0 1 1 1

1 1

A(A+B) 0 1 0 1

Boolean Proofs by Truth Table

(16) A B = A + B

A AB 0 0 1 0

B 0 0

0 1 1 1

0 1

AB 1 1 1 0

A+B 1 1 1 0

A 1 0

B 1 1

1 0 0 0

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• F = A(A+B) =AA+AB = 0 + AB -8 = AB -5

• #6(a) • F = ABCD + ABCD = A(B+B)CD = A(1)CD -7 = ACD

• #6(b) • F = AB + AC + ABC(AB+C) = AB + AC + ABCAB+ABCC) = AB + AC + (AA)(BB)C+ABCC) 2,8 = AB + AC + (A)(0)C +ABC = A(B+BC) + AC = A(B+C) + AC 13 = AB +AC +AC = = AB

Boolean Proofs by DeMorgan's Theorems

8

9

2o 21 22 23 24 25 26 27

0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0

0 1 2 3 4 5 6 7 8

Decimel

Binary - base2

N2 = a0 20 + a1 21 + a2 22 + a3 23 + = (a3 a2 a1 a0)2

LSB MSB

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Other Systems

Binary 2-digi 0,1 N2 = a0 20 + a1 21 + a2 22 + a323 + Octal 8-digi 0,1,2,3,4,5,6,7 N8 = a0 80 + a1 81 + a2 82 + a383 + Decimal 10-digi 0,1,2,3,4,5,6,7,8,9 N10 = a0 100 + a1 101 + a2 102 + a3103 + Hexadecimal 16-digi 0,1,2,3,4,5,…..A,B,C,D,E,F N16 = a0 160 + a1 161 + a2 162 + a3163 + BCD binary coded decimal 9910 = 1001 1001BCD

a0 a1 a2 a3 … a4

1 0 0 1 1 0 0 1

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12

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LOGIC FAMILIES

TTL Logic- Transistor-Transistor Logic gates Transistors are fully turned on. Excellent noise margin High power (1-20)mW/gate Single Vcc supply voltage. High>3-5V Low~0.2V

ECL Logic- Emitter Coupled Logic

High speed by not saturating transistors. Td < 1ns (gate speed) Low Power (0.5-1.0) mW/gate Multiple supply voltages Higher fan-in capability

CMOS- Complementary Metal Oxide Logic

Very Low Power Excellent Noise Margin Inexpensive Slower than TTL Td>10ns Fragile

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Case of Binary Addition A+B=C

1 1 0 1 0 0 0 0

1 0 0 0 0 0 0 0

A register +

0 1 1 0 0 0 0 0

0 0 1 1 0 0 0 0

B register

Carry A = 1110

B = 0110

C = 1210

10112 + 00012 = 11002 Base 2 notation

1110 + 0110 = 1210 Base 10 notation

registers

1

1

0

1 carry

add In-1

In-2

clock

GATE/FLIP-FLOP

=

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A B AND 0 0 0 0 1 0 1 0 0 1 1 1

NAND

1 1 0

1

TRUTH TABLE

OR 0 1 1 1

NOR 1 0 0 0

XOR 0 1 1 0

A

B

SUM

CARRY carry

add In-1

In-2

clock

0 0 A B SUM CARRY

0 0 0 1 1 0 1 0 1 0 1 1 0 1

ADDITION

XOR OR

A

B

SUM

CARRY

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Analogue-to-Digital

8v

7v

6v

5v

4v

3v

2v

1v

clk

Analogue signal

0 0 0 0 0 0 0 1

0 0 0 0 0 0 1 1

0 0 0 0 0 1 1 1

0 0 0 1 1 1 1 1

0 1 1 1 1 1 1 1

0 0 1 1 1 1 1 1

0 0 0 0 1 1 1 1

0 0 0 0 0 1 1 1

0 0 0 0 0 0 1 1

0 0 0 0 0 0 0 1

Time -->

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Open Collector and Tri-state Logic

• In standard ttl or cmos logic there is a problem with concatenating gates for an output. Consider Y=ABCD formed below from 2 NAND Gates. •  When A=B=C=D=0 F=G=1 and Y=1 When A=0 B=C=D=1 F=1 G=0 and Y=?? indeterminant

7400 C

D

7400 A

B F

G Y

7403 C

D

7403 A

B F

G Y

+5V

tri C

D

tri A

B F

G Y

enable

Open collector Tri-state Standard

Tri-state chips can be enabled/disabled, effectvely setting them to infinite ground, virtually removing them from the circuit.

Outputs are pulled up to +5V when hi and virtual ground when low.

Output can be indeterminant!

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Epitaxial Gates

n n p

base

collector emitter

+V

+V G

Electron flow IC =b IB

BIPOLAR

n-channel

Indium bump p

p-diffusion

source drain

gate

depletion region

-V

G +V

JFET

n-channel

n++ n++

Si Substrate

MOSFET

SiO2

-V +V G source drain

gate