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Getting to Work with OpenPiton
Princeton University
OpenPit
http://openpiton.org
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FPGA Prototyping
2
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Supported Development Boards
Boards supported by toolchain:
Xilinx VC707
Digilent Genesys2
Digilent NexysVideoDigilent Nexys4DDR** doesn’t have DDR controller and FPU
3
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Comparison of Supported Boards
Development Board,FPGA name,
Part
Core Clock(1 core)
Max# of Cores
DDR Type,Size,
Data Width
Price (nonacademic/
academic)
Xilinx VC707Virtex-7
XC7VX485T-2FFG1761C67 MHz 4
DDR31 GB
64 bits$3,495
Digilent Genesys2Kintex-7
XC7K325T-2FFG900C50 MHz 2
DDR31GB
32 bits
$1,299/$600
Digilent NexysVideoArtix-7
XC7A200T-1SBG484C29 MHz 1
DDR3512MB16 bits
$490/$250
Digilent Nexys 4 DDRArtix-7
XC7A100T-ACSG324C29MHz 1
DDR2128MiB16 bits
$320/$160
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Prototype Architecture
OpenPitonCore
DRAM
SD Master
UART
Switches, LEDs
ETH IO_C
TRL_
TOP
Digilent Genesys2
5
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
DRAM
6
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
SD
DRAM
6
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
UART
SD
DRAM
6
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
UART
SD
DRAM
6
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
UART
SD
DRAM
ETH
6
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I/O Interfaces
Wishbone SD Master*:• Up to 2GB SD (microSD) cards• Storage for HV/OS/tests
UART:• Terminal I/O• Loading of assembly test(DMW - Direct Memory Write)
DDR controller*:• Xilinx’s MIG 7 IP core• Configurable data width• Used as main memory
*optional
Ethernet controller*:• Xilinx’s Ethernet Lite MAC IP Core• Driver from Linux kernel• 100 Mb/s
To/From OpenPiton core
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Demo
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Setup for Hands-on with FPGA
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Setting up Your FPGA Board
10
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Setting up Your FPGA Board
10
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Setting up Your FPGA Board
10
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Setting up Your FPGA Board
10
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Setting up Your FPGA Board
10
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Setting up Your FPGA Board
10
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Setting up Your FPGA Board
GO!
10
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Booting Linux
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Booting Linux
11
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FPGA Linux Boot
12
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FPGA Linux Boot
After ~4 min
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Coffee Break
13
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FPGA Linux Boot
14
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Hands on: Login to the System
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Hands on: Login to the System
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Suggested Configurations
BRAM_TEST SD with OS + Eth
UART DMWto DDR
BRAM with hardwired test
DRAM memory controller
SD card controller
UART 16550
Ethernet Lite MAC
UART support fortest streaming
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Suggested Configurations
BRAM_TEST SD with OS + Eth
UART DMWto DDR
BRAM with hardwired test
DRAM memory controller
SD card controller
UART 16550
Ethernet Lite MAC
UART support fortest streaming
16
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Tools
• protosyn
All encompassing tool for creation of FPGA project and generating programming file
• pitonstream
Tool for running assembly tests on FPGA
Sources are located at piton/tools/src/proto/
pitonstreamboard type, asm test list .ustr
protosynboard type, design, config opt.xpr
.bit
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protosyn Flow
bram test?
*.v.pyv -> *tmp.v
sims build
sims run
RTL
mapping test to BRAM
create project?
mem.imagesims.log
test_proto.coe
project creation .xpr
synthesis
mapping, placing, routing, bitstream generation, STA
NO
YES
implement?
YES
NO
IP cfg (.xci),constraints (.cdc),defines
YES
NO
.xpr
.bit,
.ltx
LegendControl FlowData Flowpyv preprocessorSims scriptVivadoinput/output filesflow step conditions
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Bringing up Network
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Bringing up Network
Put a MAC from your board!
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Bringing up Network
Put a MAC from your board!
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Bringing up Network
Put a MAC from your board!
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Running protosyn
…more options are in FPGA manual
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Running protosyn
…more options are in FPGA manual
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Running protosyn
…more options are in FPGA manual
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Running protosyn
…more options are in FPGA manual
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Example protosyn run
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Example protosyn run
21
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Example protosyn run
21
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Example protosyn run
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Example protosyn run
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Example protosyn run
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Example protosyn run
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FPGA Flow Runtimes
• System including DDR controller
– ~1.5 hour including IP generation
– ~40 mins excluding IP generation
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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FPGA Flow Outputs
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Bringing up Network
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Bringing up Network
Put a MAC from your board!
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Bringing up Network
Put a MAC from your board!
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Bringing up Network
Put a MAC from your board!
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Example pitonstream Run
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Example pitonstream Run
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Example pitonstream Run
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Example pitonstream Run
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Writing OS Image to SD Card
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Writing OS Image to SD Card
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Writing OS Image to SD Card
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Writing OS Image to SD Card
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Writing OS Image to SD Card
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Hands-on with FPGA
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Running Tetris on OpenPiton
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Running Tetris on OpenPiton
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Browsing OpenPiton web page onOpenPiton
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Browsing OpenPiton web page onOpenPiton
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Browsing OpenPiton web page onOpenPiton
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