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COMBINATIONAL CIRCUITS
ECE Department
Faculty of Engineering
University of Santo Tomas
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Combinational Circuit
Consists of logic gates whose outputsat any time are determined directlyfrom the present combination of inputs
without regard to previous inputs
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1. HALF ADDER
Adds mathematically two bits
A B S Cr
0 00 1
1 0
1 1
Inputs Outputs
0 01
1
0
0
0
1
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Half Adder Circuit
A
BS
Cr
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2. FULL ADDER
Adds mathematically 3 bits
Inputs Outputs
A B C S Cr
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0
1
1
0
1
0
0
1
0
0
0
1
0
1
1
1
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Full Adder Circuit
BC
A
S
Cr
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3. HALF SUBTRACTER
Subtracts two bits
A B D Br
0 00 1
1 0
1 1
Inputs Outputs
0 01
1
0
1
0
0
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Half Subtracter Circuit
A
BD
Br
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4. FULL SUBTRACTER
Subtracts 3 bits
Inputs Outputs
A B C D Br
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
0
1
1
0
1
0
0
1
0
1
1
1
0
0
0
1
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Full Subtracter Circuit
A
BC
D
Br
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5. BINARY PARALLELADDER Produces the arithmetic sum of two
binary numbers in parallel
Ex. 1101+ 1011
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4-bit Full Adders
FA FA FA FAC1C2C3
C4C5
A1
S1
A2
B2
S2
B1
A3A4
B3B4
S3S4
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6. LOOK AHEAD CARRY GENERATOR
Gi = carry generate, produces anoutput carry when both Ai and Bi areonePi = carry propagate, associated with
the propagation of the carry from Ci to
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Pi = Ai BiGi = AiBi
Si = Pi CiCi+1 = Gi+PiCi
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4-bit full adders with look aheadcarry
C1 C1
A1B1
A2
A3
A4
B2
B3
B4
C2
C3
C4
C5
Look-ahead
carrygenerator
C5
P4
P3
P2
P1
P4
G4
P3
G3
P2
G2
P1
G1S1
S2
S3
S4
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7. BCD ADDER
Addition of 2 decimal digits in BCDwith carry from a previous state.
9
+ 9
1
19
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Binary Sum BCD Sum
K Z8 Z4 Z2 Z1 C S8 S4 S2 S1
0 0 0 0 0 0 0 0 0 0
0 0 0 0 1 0 0 0 0 1
0 0 0 1 0 0 0 0 1 0
0 0 0 1 1 0 0 0 1 1
0 0 1 0 0 0 0 1 0 0
0 0 1 0 1 0 0 1 0 1
0 0 1 1 0 0 0 1 1 0
0 0 1 1 1 0 0 1 1 1
0 1 0 0 0 0 1 0 0 0
0 1 0 0 1 0 1 0 0 1
0 1 0 1 0 1 0 0 0 0
0 1 0 1 1 1 0 0 0 1
0 1 1 0 0 1 0 0 1 0
0 1 1 0 1 1 0 0 1 1
0 1 1 1 0 1 0 1 0 0
0 1 1 1 1 1 0 1 0 1
1 0 0 0 0 1 0 1 1 0
1 0 0 0 1 1 0 1 1 1
1 0 0 1 0 1 1 0 0 0
1 0 0 1 1 1 1 0 0 1
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0 1 0 1 0 1 0 0 0 0
0 1 0 1 1 1 0 0 0 1
0 1 1 0 0 1 0 0 1 0
0 1 1 0 1 1 0 0 1 1
0 1 1 1 0 1 0 1 0 0
0 1 1 1 1 1 0 1 0 1
1 0 0 0 0 1 0 1 1 0
1 0 0 0 1 1 0 1 1 1
1 0 0 1 0 1 1 0 0 0
1 0 0 1 1 1 1 0 0 1
K Z8 Z4 Z2 Z1 C S8 S4 S2 S1
Binary Sum BCD Sum
When to add 6?
When K = 1Z8Z4 = 1Z8Z2 = 1
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Carry in
BCD Adder Circuit
4 bit binary adder
addend augend
4 bit binary adder
K Z8 Z4 Z2 Z1C
0
C S8 S4 S2 S1