drabrh 6core laquit microprocessor

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  • 8/3/2019 DRABRH 6CORE LAQUIT MICROPROCESSOR

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    DRABRH 6CORE LAQUIT MICROPROCESSOR

    BY Dr.A.B.RAJIB HAZARIKA, PhD, FRAS,AES, ASSISTANT PROFESSOR,DEPT. OF MATHEMATICS,DIPHU

    GOVT. COLLEGE,DIPHU,ASSAM,INDIA-782462

    ARM cortex M4 ARM cortex M4

    Dynamic memory manager ARM cortex M4 ARM cortex M4

    ARM cortex A15 MP core ARM cortex A15MP core

    Power VR SGX544 3D-GPU

    C64x DSP IVA 3HD videoaccelerator

    Shared memory controller /DMA 2D graphics

    processor

    Image-signal

    processor

    Multi-pipe

    display sub-

    system(DSS)

    Timer, interrupt

    controller ,system DMA

    Audio processor L-2 cache

    memory

    L-4 cache

    memory

    Boot/secure ROM L3

    cache

    M-shield-security tech SHA-1/SHA-2/MD5/3 DES, RNG, AES, PKA, secure WDT, keys, crypto DMA

    DRABRH6CORELAQUITMICROPROCESSOR

    Developed by Dr.A.B.Rajib Hazarika, PhD, FRAS, AES a smaller ,power saving chip with six cores

    increasing the computing power and the special processors also reduce the power consumption.

    M4CPU is power saving CPU with limited command set for special tasks.

    C64x DSP is decoder for reproducing the multimedia files. 2D graphics processor has hardware accelerator for representing the 2d graphics. Multi-pipe DSS combines content of several graphics and video sources and displays it. L-2 cache memory,L-4 cache memory used which banks double memory to 1MB to 4MB for L-2

    , 2MB to 8MB for L-4 cache memory.

    MP coreCPU is the cortex A15 core runs with double the clock rate of cortex A9. Video accelerator is the new one which computes with 2.64 times more faster than the older

    one required for 3D blue- ray.

    Dynamic memory manager is used in it. Maximum number 6(six) core. Typical work cycle of 2.64 GHz. Pipe length is of 15 levels. Thermal design power (TDP) 2.5 watt. Manufacturing size 22nm. C128x DSP decoder can be used for much faster multimedia functioning. Application can be done in android, tablets, PCs, Laptops, mainframes, supercomputer etc. The transistor is made up of source and drain. Source of phosphorus or arsenic which have one electron more than silicon making it positive. Substrate gets charged with boron or aluminum which do not have an electron making it

    negative.

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    DRABRH 6CORE LAQUIT MICROPROCESSOR

    BY Dr.A.B.RAJIB HAZARIKA, PhD, FRAS,AES, ASSISTANT PROFESSOR,DEPT. OF MATHEMATICS,DIPHU

    GOVT. COLLEGE,DIPHU,ASSAM,INDIA-782462

    Depletion zone is created between P and N-doped silica which block the flow of electrons. Voltage is applied to gate. A channel opens in depletion zone helping in the flow of electrons ,thus switching the

    transistor on.

    Cortex A15 extend its address space to 40 bits and are able to address to 1 TB of RAM