ec 252 ec-252-l10-instruction sets and addressing modes

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EC-252: COMPUTER ARCHITECTURE AND MICROPROCESSORS Vaskar Raychoudhury Indian Institute of Technology Roorkee

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Page 1: Ec 252 ec-252-l10-instruction sets and addressing modes

EC-252: COMPUTER ARCHITECTURE AND MICROPROCESSORS

Vaskar Raychoudhury

Indian Institute of Technology Roorkee

Page 2: Ec 252 ec-252-l10-instruction sets and addressing modes

What is an Instruction Set?

� The complete collection of instructions that are understood by a CPU

� Machine Code

� Binary

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� Binary

� Usually represented by assembly codes

Page 3: Ec 252 ec-252-l10-instruction sets and addressing modes

Elements of an Instruction

� Operation code (Op code)

� Do this

� Source Operand reference

� To this

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� To this

� Result Operand reference

� Put the answer here

� Next Instruction Reference

� When you have done that, do this...

Page 4: Ec 252 ec-252-l10-instruction sets and addressing modes

Where have all the Operands Gone?

� Main memory (or virtual memory or cache)

� CPU register

� I/O device

� (Immediate)

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� (Immediate)

Page 5: Ec 252 ec-252-l10-instruction sets and addressing modes

Instruction Representation

� In machine code each instruction has a unique bit pattern

� For human consumption (well, programmers anyway) a symbolic representation is used

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a symbolic representation is used

� e.g. ADD, SUB, LOAD

� Operands can also be represented in this way

� ADD A, B

Page 6: Ec 252 ec-252-l10-instruction sets and addressing modes

Simple Instruction Format6

Page 7: Ec 252 ec-252-l10-instruction sets and addressing modes

Instruction Types

� Data processing

� Data storage (main memory)

� Data movement (I/O)

� Program flow control

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� Program flow control

Page 8: Ec 252 ec-252-l10-instruction sets and addressing modes

Number of Addresses (a)

� 3 addresses

� Operand 1, Operand 2, Result

� a = b + c;

� May be a fourth - next instruction (usually implicit)

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� May be a fourth - next instruction (usually implicit)

� Not common

� Needs very long words to hold everything

Page 9: Ec 252 ec-252-l10-instruction sets and addressing modes

Number of Addresses (b)

� 2 addresses

� One address doubles as operand and result

� a = a + b

� Reduces length of instruction

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� Reduces length of instruction

� Requires some extra work

� Temporary storage to hold some results

Page 10: Ec 252 ec-252-l10-instruction sets and addressing modes

Number of Addresses (c)

� 1 address

� Implicit second address

� Usually a register (accumulator)

� Common on early machines

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� Common on early machines

Page 11: Ec 252 ec-252-l10-instruction sets and addressing modes

Number of Addresses (d)

� 0 (zero) addresses

� All addresses implicit

� Uses a stack

� e.g. push a

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� e.g. push a

� push b

� add

� pop c

� c = a + b

Page 12: Ec 252 ec-252-l10-instruction sets and addressing modes

How Many Addresses

� More addresses

� More complex (powerful?) instructions

� More registers

� Inter-register operations are quicker

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Inter-register operations are quicker

� Fewer instructions per program

� Fewer addresses

� Less complex (powerful?) instructions

� More instructions per program

� Faster fetch/execution of instructions

Page 13: Ec 252 ec-252-l10-instruction sets and addressing modes

Design Decisions (1)

� Operation repertoire

� How many ops?

� What can they do?

� How complex are they?

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� How complex are they?

� Data types

� Instruction formats

� Length of op code field

� Number of addresses

Page 14: Ec 252 ec-252-l10-instruction sets and addressing modes

Design Decisions (2)

� Registers

� Number of CPU registers available

� Which operations can be performed on which registers?

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� Addressing modes (later…)

� RISC v CISC

Page 15: Ec 252 ec-252-l10-instruction sets and addressing modes

Types of Operand

� Addresses

� Numbers

� Integer/floating point

� Characters

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� Characters

� ASCII etc.

� Logical Data

� Bits or flags

Page 16: Ec 252 ec-252-l10-instruction sets and addressing modes

Types of Operation

� Data Transfer� Source, Destination, Amount of data

� Arithmetic

� Logical� Bitwise operations

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� AND, OR, NOT

� Conversion� Binary to Decimal

� I/O

� System Control� OS specific operations

� Transfer of Control� Branch, Skip, Subroutine call (e.g., interrupt)

Page 17: Ec 252 ec-252-l10-instruction sets and addressing modes

Arithmetic

� Add, Subtract, Multiply, Divide

� Signed Integer

� Floating point ?

� May include

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� May include

� Increment (a++)

� Decrement (a--)

� Negate (-a)

Page 18: Ec 252 ec-252-l10-instruction sets and addressing modes

Addressing Modes

� Immediate

� Direct

� Indirect

� Register

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� Register

� Register Indirect

� Displacement (Indexed)

� Stack

Page 19: Ec 252 ec-252-l10-instruction sets and addressing modes

Immediate Addressing

� Operand is part of instruction

� Operand = address field

� e.g. ADD 5

� Add 5 to contents of accumulator

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� Add 5 to contents of accumulator

� 5 is operand

� No memory reference to fetch data

� Fast

� Limited range

Page 20: Ec 252 ec-252-l10-instruction sets and addressing modes

Immediate Addressing Diagram

OperandOpcode

Instruction

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Page 21: Ec 252 ec-252-l10-instruction sets and addressing modes

Direct Addressing

� Address field contains address of operand

� Effective address (EA) = address field (A)

� e.g. ADD A� Add contents of cell A to accumulator

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Add contents of cell A to accumulator

� Look in memory at address A for operand

� Single memory reference to access data

� No additional calculations to work out effective address

� Limited address space

Page 22: Ec 252 ec-252-l10-instruction sets and addressing modes

Direct Addressing Diagram

Address AOpcode

Instruction

Memory

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Operand

Page 23: Ec 252 ec-252-l10-instruction sets and addressing modes

Indirect Addressing (1)

� Memory cell pointed to by address field contains the address of (pointer to) the operand

� EA = (A)

� Look in A, find address (A) and look there for operand

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� Look in A, find address (A) and look there for operand

� e.g. ADD (A)

� Add contents of cell pointed to by contents of A to accumulator

Page 24: Ec 252 ec-252-l10-instruction sets and addressing modes

Indirect Addressing (2)

� Large address space

� 2n where n = word length

� May be nested, multilevel, cascaded

� e.g. EA = (((A)))

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� e.g. EA = (((A)))

� Draw the diagram yourself

� Multiple memory accesses to find operand

� Hence slower

Page 25: Ec 252 ec-252-l10-instruction sets and addressing modes

Indirect Addressing Diagram

Address AOpcode

Instruction

Memory

Pointer to operand

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Operand

Page 26: Ec 252 ec-252-l10-instruction sets and addressing modes

Register Addressing (1)

� Operand is held in register named in address filed

� EA = R

� Limited number of registers

� Very small address field needed

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� Very small address field needed

� Shorter instructions

� Faster instruction fetch

Page 27: Ec 252 ec-252-l10-instruction sets and addressing modes

Register Addressing (2)

� No memory access

� Very fast execution

� Very limited address space

� Multiple registers helps performance

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� Multiple registers helps performance

� Requires good assembly programming or compiler writing

� N.B. C programming

� register int a;

� c.f. Direct addressing

Page 28: Ec 252 ec-252-l10-instruction sets and addressing modes

Register Addressing Diagram

Register Address ROpcode

Instruction

Registers

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Operand

Page 29: Ec 252 ec-252-l10-instruction sets and addressing modes

Register Indirect Addressing

� C.f. indirect addressing

� EA = (R)

� Operand is in memory cell pointed to by contents of register R

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register R

� Large address space (2n)

� One fewer memory access than indirect addressing

Page 30: Ec 252 ec-252-l10-instruction sets and addressing modes

Register Indirect Addressing Diagram

Register Address ROpcode

Instruction

Memory

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OperandPointer to Operand

Registers

Page 31: Ec 252 ec-252-l10-instruction sets and addressing modes

Displacement Addressing

� EA = A + (R)

� Address field hold two values

� A = base value

� R = register that holds displacement

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� R = register that holds displacement

� or vice versa

Page 32: Ec 252 ec-252-l10-instruction sets and addressing modes

Displacement Addressing Diagram

Register ROpcode

Instruction

Memory

Address A

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OperandPointer to Operand

Registers

+

Page 33: Ec 252 ec-252-l10-instruction sets and addressing modes

Relative Addressing

� A version of displacement addressing

� R = Program counter, PC

� EA = A + (PC)

� i.e. get operand from A cells from current location

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� i.e. get operand from A cells from current location pointed to by PC

� c.f locality of reference & cache usage

Page 34: Ec 252 ec-252-l10-instruction sets and addressing modes

Base-Register Addressing

� A holds displacement

� R holds pointer to base address

� R may be explicit or implicit

� e.g. segment registers in 80x86

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� e.g. segment registers in 80x86

Page 35: Ec 252 ec-252-l10-instruction sets and addressing modes

Indexed Addressing

� A = base

� R = displacement

� EA = A + R

� Good for accessing arrays

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� Good for accessing arrays

� EA = A + R

� R++

Page 36: Ec 252 ec-252-l10-instruction sets and addressing modes

Combinations

� Postindex

� EA = (A) + (R)

� Preindex

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� Preindex

� EA = (A+(R))

� (Draw the diagrams)

Page 37: Ec 252 ec-252-l10-instruction sets and addressing modes

Stack Addressing

� Operand is (implicitly) on top of stack

� e.g.

� ADD Pop top two items from stackand add

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and add