ec6411 circuit & devices lab manual

EC 6211 CIRCUITS AND DEVICES LABORATORY MANUAL 2015

Ms B.KALAIMATHI AP/ECE

EC 6211 CIRCUITS AND DEVICES LABORATORY

1. Characteristics of PN Junction Diode

2. Zener diode Characteristics & Regulator using Zener diode

3. Common Emitter input-output Characteristics

4. Common Base input-output Characteristics

5. FET Characteristics

6. SCR Characteristics

7. Clipper and Clamper & FWR

8. Verifications of Thevinin & Norton theorem

9. Verifications of KVL & KCL

10. Verifications of Super Position Theorem

11. verifications of maximum power transfer & reciprocity theorem

12. Determination of Resonance Frequency of Series & Parallel RLC Circuits

13. Transient analysis of RL and RC circuits

Content beyond the syllabus

14. Half wave rectifier

15.Bridge wave rectifier



CIRCUIT DIAGRAM:

FORWARD BIAS:

REVERSE BIAS:



Ex.No:

CHARACTERISTICS OF PN DIODE

Date:

AIM:

To study the PN junction diode characteristics under Forward & Reverse bias conditions.

APPARATUS REQUIRED:

S.No. Name of the Component Range Quantity Required

1 RPS (0-30)V 1

2 Ammeter

(0–30)mA 1

(0–100)µA 1

3 Voltmeter

(0–10)V 1

(0–1)V 1

4 Resistor 1K , 10K Each 1

5 Diode IN4007 1



TABULAR COLUMN:

FORWARD BIAS: REVERSE BIAS:

MODEL GRAPH

S.No. VOLTAGE

(In Volts)

CURRENT

(In mA)

S..No. VOLTAGE

(In Volts)

CURRENT

(In A)



PROCEDURE:

FORWARD BIAS:

1. Connect the circuit as per the diagram.

2. Vary the applied voltage V in steps of 0.1V.

3. Note down the corresponding Ammeter readings I.

4. Plot a graph between V & I

OBSERVATIONS

1. Find the d.c (static) resistance = V/I.

2. Find the a.c (dynamic) resistance r = V / I (r = V/ I) = 12

12

II

VV.

3. Find the forward voltage drop = [Hint: it is equal to 0.7 for Si and 0.3 for Ge]

REVERSE BIAS:


2. Vary the applied voltage V in steps of 1.0V.



5. Find the dynamic resistance r = V / I.

Specification for 1N4001: Silicon Diode

Peak Inverse Voltage: 50V

Idc = 1A.

Maximum forward voltage drop at 1 Amp is 1.1 volts

The maximum reverse current @50 volts is 5 A



RESULT:

Forward and Reverse bias characteristics of the PN junction diode was studied and

Dynamic Resistance = ---------------------

Static Resistance = --------------------------

Cut in Voltage = ----------------------------

Performance 2

Observation 2

Viva 2

Total 6



VIVA QESTIONS:-

1. Define depletion region of a diode?

2. What is meant by transition & space charge capacitance of a diode?

3. Is the V-I relationship of a diode Linear or Exponential?

4. Define cut-in voltage of a diode and specify the values for Si and Ge diodes?

5. What are the applications of a p-n diode?

6. Draw the ideal characteristics of P-N junction diode?

7. What is the diode equation?

8. What is PIV?

9. What is the break down voltage?

10. What is the effect of temperature on PN junction diodes?



CIRCUIT DIAGRAM (ZENER DIODE)

FORWARD BIAS:

REVERSE BIAS:



Ex.No:

CHARACTERISTICS OF ZENER DIODE

Date:

AIM:

To study the Zener diode characteristics under Forward & Reverse bias conditions.

APPARATUS REQUIRED:

S.No. Name of the Component Range Quantity Required

1 RPS (0-30)V 1

2 Ammeter (0–30) mA 1

3 Voltmeter (0–30)V 1

4 Zener diode FZ5.1 1

5 Resistor 1K 1



MODEL GRAPH



PROCEDURE:

FORWARD BIAS:

1. Connect the circuit as per the circuit diagram.

2. Vary the power supply in such a way that the readings are taken in steps of 0.1V in the

voltmeter till the needle of power supply shows 30V.

3. Note down the corresponding ammeter readings.

4. Plot the graph :V (vs) I.


REVERSE BIAS:


2. Vary the power supply in such a way that the readings are taken in steps of 0.1V in the

voltmeter till the needle of power supply shows 30V.




6. Find the reverse voltage Vr at Iz=20 mA.

RESULT:

Forward and Reverse bias characteristics of the Zener diode was studied and

Forward bias dynamic resistance = ---------------------

Zener breakdown voltage= -----------------------------



VIVAQUESTIONS:-

1. What type of temperature Coefficient does the zener diode have?

2. If the impurity concentration is increased, how the depletion width effected?

3. Does the dynamic impendence of a zener diode vary?

4. Explain briefly about avalanche and zener breakdowns?

5. Draw the zener equivalent circuit?

6. Differentiate between line regulation & load regulation?

7. In which region zener diode can be used as a regulator?

8. How the breakdown voltage of a particular diode can be controlled?

9. What type of temperature coefficient does the Avalanche breakdown has?

10. By what type of charge carriers the current flows in zener and avalanche breakdown

diodes?



CIRCUIT DIAGRAM:

TABULAR COLUMN:

Input characteristics: VCE constant

VCE = VCE = VCE =

VBE

(Volts)

IB

( A)

VBE

(Volts)

IB

( A)

VBE

(Volts)

IB

( A)



Ex.No:

CHARACTERISTICS OF CE CONFIGURATION OF BJT

Date:

AIM:

To plot the transistor characteristic of common-emitter configuration and to find the h-

parameters for the same.

EQUIPMENT REQUIRED:

S.No Name of the component Range Quantity

1 Power supply (0-30)V 2

2 Ammeter (0-10)mA,

(0-1)mA

Each 1

3 Voltmeter (0-30)V,(0-2)V Each 1

PROCEDURE:

i. Input characteristic:

1. Rig up the circuit as per the circuit diagram.

2. Set VCE = 5V (say), vary VBE insteps of 0.1V till the power supply VBB shows

20V and note down the corresponding IB. Repeat the above procedure for

10V, 15V etc.,

3. Plot the graph: VBE vs IB for a constant VCE.

4. Find the h-parameters: a. hrc : reverse voltage gain

b. hfc: input impedance



MODEL GRAPH:

Input Characteristics

TABULATION:

Output characteristics: IB constant

IB = IB = IB =

VCE

(Volts)

IC

(mA)

VCE

(Volts)

IC

(mA)

VCE

(Volts)

IC

(mA)



ii. Output characteristic:


2. Set IB = 20 A (say), vary VCE insteps of 1V and note down the corresponding

IC. Repeat the above procedure for 80 A, 200 A, 600 A etc.,

3. Plot the graph: VCE Vs IC for a constant IB.

4. Find the h-parameters: a. hoc : output admittance

b. hfc: forward current gain



MODEL GRAPH:

Output Characteristics



Result:

Thus the input and output characteristics of BJT under CE configuration are obtained.

Parameters Practical readings

hfc

hic

hrc

hoc

Performance 2

Observation 2

Viva 2

Total 6



VIVA QUESTIONS:

1. What is the range of for the transistor?

2. What are the input and output impedances of CE configuration?

3. Identify various regions in the output characteristics?

4. what is the relation between and

5. Define current gain in CE configuration?

6. Why CE configuration is preferred for amplification?

7. What is the phase relation between input and output?

8. Draw diagram of CE configuration for PNP transistor?



CIRCUIT DIAGRAM:

TABULAR COLUMN:

Input characteristics: VCB constant

VCB = VCB = VCB =

VEB

(Volts)

IE

(mA)

VEB

(Volts)

IE

(mA)

VEB

(Volts)

IE

(mA)



Ex.No:

CHARACTERISTICS OF CB CONFIGURATION

Date:

AIM:

To plot the transistor characteristic of common-base configuration and to find the h-

parameters for the same.

APPARATUS REQUIRED:


1 Power supply (0-30) V 2

2 Ammeter (0-20)mA, 2

3 Voltmeter (0-20)V 2

PROCEDURE:

i. Input characteristic:


2. Set VCB = 5V (say), vary VEB in a regular steps 0.1V till the power supply VEE

shows 20V and note down the corresponding IE. Repeat the above procedure

for 10V, 15V etc.,

3. Plot the graph: VEB Vs IE for a constant VCB.

4. Find the h-parameters: a. hrb : reverse voltage gain b. hfb: input impedance

ii. Output characteristic:


6. Set IE = 1mA (say), vary VCB insteps of 1V and note down the corresponding

IC. Repeat the above procedure for 3mA, 6mA, 10mA etc.,

7. Plot the graph: VCB Vs IC for a constant IE.

8. Find the h-parameters: a. hob : output admittance b. hfb: forward current gain



MODEL GRAPH:

Input characteristics

Output characteristics: IE constant

IE = IE = IE =

VCB

(Volts)

IC

(mA)

VCB

(Volts)

IC

(mA)

VCB

(Volts)

IC

(mA)



MODEL GRAPH:

RESULT:

Thus the input and output characteristics of BJT under CB configuration are obtained.


hfb

hib

hrb

hob

Performance 2

Observation 2

Viva 2

Total 6



CIRCUIT DIAGRAM:

PIN DIAGRAM:

BOTTOM VIEW OF BFW10:

SPECIFICATION:

Voltage : 30V, IDSS > 8mA.



Ex.No:

CHARACTERISTICS OF JUNCTION FIELD EFFECT TRANSISTOR

Date:

AIM:

To Plot the characteristics of given FET & determine rd, gm, , IDSS,VP.

APPARATUS REQUIRED:

S.No. Name of the component Range Quantity

1 RPS (0-30)V 2

2 Ammeter (0–30)mA 1

3 Voltmeter (0–30)V 2

4 FET BFW10

1

5 Resistor 1k ,68K One Each

6 Bread Board 1

PROCEDURE:

DRAIN CHARACTERISTICS:


2. Set the gate voltage VGS = 0V.

3. Vary VDS in steps of 1 V & note down the corresponding ID.

4. Repeat the same procedure for VGS = -1V.

5. Plot the graph VDS Vs ID for constant VGS.



MODEL GRAPH:


TRANSFER CHARACTERISTICS:



OBSERVATIONS

1. d.c (static) drain resistance, rD = VDS/ID.

2. a.c (dynamic) drain resistance, rd = VDS/ ID.

3. Open source impedance, YOS = 1/ rd.



2. Set the drain voltage VDS = 5 V.

3. Vary the gate voltage VGS in steps of 1V & note down the corresponding ID.

4. Repeat the same procedure for VDS = 10V.

5. Plot the graph VGS Vs ID for constant VDS.

FET PARAMETER CALCULATION:

Drain Resistancd rd = GS

D

DS VI

V

Transconductance gm = DS

GS

D VV

I

Amplification factor μ=rd . gm



TABULAR COLUMN:


VGS = 0V VGS = -1V

VDS (V) ID(mA) VDS (V) ID(mA)


VDS =5volts VDS = 10volts

VGS (V) ID(mA) VGS (V) ID(mA)



RESULT:

Thus the Drain & Transfer characteristics of given FET is Plotted.

Rd =

gm =

=

IDSS =

Pinch off voltage VP =

Performance 2

Observation 2

Viva 2

Total 6



VIVA QUESTIONS:

1. What are the advantages of FET?

2. Different between FET and BJT?

3. Explain different regions of V-I characteristics of FET?

4. What are the applications of FET?

5. What are the types of FET?

6. Draw the symbol of FET.

7. What are the disadvantages of FET?

8. What are the parameters of FET?



SCR CIRCUIT DIAGRAM:

MODEL GRAPH:

TABULAR COLUMN:

VAK (volts) IA (mA)

IA

(mA)

Negative resistance region

VBO VAK (VOLTS)

IH

IL



Ex.No:

CHARACTERISTICS OF SCR

Date:

AIM:

To find the latching and holding current for a given SCR.

APPARATUS REQUIRED:


1.

2.

3.

4.

5.

6.

Power supply

SCR

Resistor

Ammeter

Voltmeter

Bread Board

(0-30)V

1KΩ

(0-30)mA

(0-30)V

-

2

1

1

2

1

1

PROCEDURE FOR SCR:


2. Set gate current IG equal to firing current, vary anode to cathode voltage VAK in steps

of 0.5V and note down the corresponding anode current IA.

3. VBO is the point where the SCR voltage (VAK) suddenly drops and sudden increase

anode current IA.

4. Note down the current at that point called latching current.

5. Increase the VAK insteps of 1V till its maximum.

6. Open the gate terminal and decrease the anode voltage VAK.

7. Holding current is the current below, which the deflection in both voltmeter (VAK)

and an ammeter (IA) suddenly reduces to zero.

8. Holding current is the minimum current that a SCR can maintain its condition.

Holding current always less than latching current.



RESULT:

Thus the characteristics of SCR verified and graph were drawn.


Peak voltage

Valley voltage

Performance 2

Observation 2

Viva 2

Total 6



Clipper Circuit Diagram



Ex.No:

CLIPPER AND CLAMPER

Date:

AIM:

To design and construct the clipper, clamper, integrator, differentiator circuits and draw

the waveforms.

APPARATUS REQUIRED:

Procedure:

1.Ring up the circuit as per the circuit diagram.

2. Set input signal voltage (say 5V, 1 k Hz) using signal generator.

3. Observe the output waveform using CRO (DC – mode).

4. Sketch the observed waveform on the graph sheet.

S.No APPARATUS REQUIRED RANGE QUANTITY

1 Resistors 1KΩ 1

2 Diode 1N4007 1

3 Power supply 0-30V 1

4 Capacitors 0.1 µF 1

5 CRO (0 -30)MHz 1

6 Bread board - 1

7 CRO Probes - 3

8. Signal generator (0-2)MHz 1

9. Bread Board –



Clamper circuit diagram

Tabulation:

Amplitude (volts)

Time(sec)



RESULT:

Thus Clipper and Clamper circuits were constructed and their output was obtained.

Performance 2

Observation 2

Viva 2

Total 6



Circuit diagram:

Without Filter:-

With Filter:-



Ex.No:

FULL WAVE RECTIFIER

Date:

Aim:

To construct a full wave rectifier and to measure DC voltage under load and to calculate

the ripple factor.

Apparatus Required:

S.No. Name of the Component / Apparatus Specification / Range Quantity

1 Transformer (9 – 0 – 9 ) V 2

2 Diode 1N4007 2

3 Resistor 1kΩ 2

4 Capacitor 47µF 1

5 CRO (0-30)MHz 1

6 Bread Board - 1

7 Connecting wires -



Model Graph:



Procedure:

Connections are given as per the circuit diagram without filter.

Note the amplitude and time period of the input signal at the secondary winding of the

transformer and rectified output.

Repeat the same steps with the filter and measure Vdc.

Calculate the ripple factor.

Draw the graph for voltage versus time.

as no such means is provided.



Tabulation:

S.No Condition

Input Signal Output Signal

Amplitude Time Amplitude Time

1 Without Filter

2 With Filter



RESULT:

Thus the full wave rectifier was constructed and its input and output waveforms are

drawn.

Theoretical Practical

DC Voltage

Ripple Factor

Performance 2

Observation 2

Viva 2

Total 6



VIVA QUESTIONS:-

1. Define regulation of the full wave rectifier?

2. Define peak inverse voltage (PIV)? And write its value for Full-wave rectifier?

3. If one of the diode is changed in its polarities what wave form would you get?

4. Does the process of rectification alter the frequency of the waveform?

5. What is ripple factor of the Full-wave rectifier?

6. What is the necessity of the transformer in the rectifier circuit?

7. What are the applications of a rectifier?

8. What is ment by ripple and define Ripple factor?

9. Explain how capacitor helps to improve the ripple factor?

10. Can a rectifier made in INDIA (V=230v, f=50Hz) be used in USA (V=110v, f=60Hz)?



Circuit diagram:

Thevenin’s Voltage Experiment set up:

Thevenin’s Resistance Experiment set up:

Thevenin’s circuit:



Ex.No: VERIFICATION OF THEVENIN AND NORTON THEOREMS

Date:

AIM:

To verify the Thevenin and Norton theorem for the given circuit diagram

APPARATUS REQUIRED:



2 Ammeter (0-10)V 1

3 Power supply (0 – 30)V 1

4 Resister 1KΩ 4

500Ω,50Ω Each 1

PROCEDURE:

THEVENIN THEOREM


2. Measure the voltage across the load using voltmeter.

To find Thevenin’s voltage:


2. Remove the load resistance and measure the open circuited voltage across the output

terminal using voltmeter (Vth).

To find thevenin’s resistance:


2. Replace the supply by its internal resistance and open circuit the load.



3. Using multimeter in resistance mode measure the resistance across the output

terminal (Rth).

TABULAR COLUMN: THEVENIN THEOREM

Voltage (volts) Open circuit

voltage (volts)

Thevenin’s

resistance ( )

Voltage (fig 2d)

(volts)

Circuit Diagram:

Norton’s Voltage Experiment Set up:



Thevenin’s circuit:

1. Connect the power supply (Vth) & resistance (Rth) in series.

2. Connect the load resistance (1K ).

3. Switch on the power supply & measure the voltage drop across load resistance using

voltmeter.

4. Voltage measured should be equal to the voltage measured.

NORTON THEOREM


2. Measure the voltage across the load using voltmeter.

To find Norton’s voltage:


2. Short-circuit the load resistance and measure the short-circuited current using

ammeter (INO).

To find Norton’s resistance:


2. Replace the supply by its internal resistance and open circuit the load.

3. Using multimeter in resistance mode measure the resistance across the output

terminal (Rth).

To find Norton’s circuit:

1. Connect the current source (INOR) and Rth in parallel.

2. Connect the load resistance (1K ).

3. Switch on the current source & measure the voltage drop across load resistance using

voltmeter.

4. Voltage measured should be equal to the voltage measured.



Norton’s Resistance Experiment Set up:

Norton’s Circuit:

TABULAR COLUMN:

I1(mA) I2(mA) I1 + I2 (mA) I (mA)



RESULT:

Thus the Thevenin and Notron theorem was verified.

Performance 2

Observation 2

Viva 2

Total 6



CIRCUIT DIAGRAM:

Fig.1a Circuit diagram for verification of KCL

Fig.1b Circuit diagram for verification of KVL

Circuit diagram for verification of KCL

Circuit diagram for verification of KVL



Ex.No: VERIFICATION OF KIRCHOFF’S CURRENT AND VOLTAGE LAWS

Date:

AIM:

To verify Kirchhoff’s Current law (KCL) and Kirchhoff’s Voltage law (KVL).

APPARATUS REQUIRED:


Required

1 Resistor

270Ω, 330Ω, 3560Ω 1 each

2 Ammeter (0-10)mA 3

3 Regulated power supply(RPS) (0-30)V 1


5 Bread board - 1

PROCEDURE (KCL):

1. Connect the circuit as shown in Fig (1).

2. Switch ON the Regulated Power Supply (RPS) and set the RPS to a particular value of

voltage say 5V.

3. Record the readings of three ammeters namely I1,I2,I3 with proper sign by taking current

entering the node as positive and leaving the node as negative in the observation

Table(1).

4. Add I2 and I3 and verify whether the added value is equal to I1. (As per KCL, I1=I2+I3).

5. Increase the RPS settings in steps of 5V up to a maximum of 25V.

6. Repeat the steps 3 to 5 by incrementing the RPS settings in terms of 5V.



TABULAR COLUMN (KCL)

SL.NO RPS VOLTAGE (Volts) I1 (mA) I2 (mA) I3 (mA) I1= I2+I3(mA)

1

2

3

4

5

TABULAR COLUMN (KVL)

SL.NO RPS Voltage (Volts) V1(Volts) V2 (Volts) V3

(Volts)

V=V1+ V2 + V3

(Volts)

1

2

3

4

5



PROCEDURE (KVL):

1. Connect the circuit as shown in Fig (2).

2. Switch ON the Regulated Power Supply (RPS) and set the RPS to a particular value of

voltage (V) say 5V.

3. Record the readings of two voltmeters namely V1, V2 and RPS Voltage in the observation

table (2).

4. Add V1 and V2 and verify whether the added value is equal to V. (as per KVL V =

V1+V2).

5. Increase the RPS settings in steps of 5V up to a maximum of 25V.

Repeat the steps 2 to 5 for each value of RPS setting.

RESULT

Thus the verification of Kirchhoff’s current law and Kirchhoff’s voltage law is done.

Performance 2

Observation 2

Viva 2

Total 6



TABULAR COLUMN:

I1(m

A)

I2(m

A)

I1 + I2

(mA)

I

(mA

)



Ex.No:

VERIFICATION OF SUPERPOSITION THEOREM

Date:

AIM:

To verify the superposition theorem

APPARATUS REQUIRED:




3 Resister 10KΩ, 50Ω 3,1

4 Bread board 1

PROCEDURE:

1. Connect the circuit as per the circuit diagram [fig4a]

2. Switch on the DC power supplies (10V & 5V) and note down the corresponding

ammeter readings (say I A).

3. Replace the second power supply by its internal resistance [fig4b].

4. Switch on the power supply (10V) and note down the corresponding ammeter reading

(say I1).

5. Connect back the second power supply (5V) and replace the first power supply by its

internal resistance [fig4c].

6. Switch on the power supply (5V) and note down the corresponding ammeter reading

(say I2).

7. Verify the following condition:

I = I1 + I2



RESULT:

Thus the superposition theorem was verified.

Performance 2

Observation 2

Viva 2

Total 6



MAXIMUM POWER TRANSFER CIRCUIT DIAGRAM:

TABULAR COLUMN:

S.No. Resistance RL (Ω) Current IL (mA) Power P=IL2 RL



Ex.No:

VERIFICATION OF MAXIMUM POWER TRANSFER AND

RECIPROCITY THEOREM

Date:

AIM:

To verify the maximum power transfer theorem for the given circuit diagram

APPARATUS REQUIRED:


1 Signal generator (0-1)MHz 1



PROCEDURE:

1. The circuit connections are given as per the circuit diagram.

2. Switch ON the power supply.

3. Initially set 5V as input voltage from RPS.

4. The ammeter reading is noted for various values of load resistance and the values are

tabulated.

5. The load resistance for the maximum power is obtained from the table



Maximum Power Transfer Model Graph:

Reciprocity Theorem Circuit Diagram

Voltage & Current Before interchanging After interchanging

Voltage (Volts)

Current (mA)



RESULT:

Thus the maximum power transfer theorem and reciprocity theorem were verified.

Performance 2

Observation 2

Viva 2

Total 6



CIRCUIT DIAGRAM:

Series resonance

Calculation:

R = 600Ω

L = 101.4mH

C = 0.01μF

Tabulation:

S.No. Frequency (KHz) Output voltage (Volts) I = V / R (mA)



Ex.No: FREQUENCY RESPONSES OF SERIES AND PARALLEL

Date: RESONANCE CIRCUITS

AIM:

To design a RLC series and parallel resonance circuit and to obtain the frequency

response.

APPARATUS REQUIRED:


1 Signal generator (0-1)MHz 1



4 Resistor 1KΩ 2

5 Capacitor 1µF 1

6 Inductor 1mH 1

7 Bread board 1

PROCEDURE (Series Resonance):

1. The circuit connections are given as per the circuit diagram.

2. Switch ON the power supply.

3. The input is given in the form of sin wave by function generator.

4. The amplitude of the response across the resistor is noted for various frequency ranges.

5. The current is calculated and tabulated

To measure the resonance frequency:

1. Plot the graph: Current Vs frequencies.



Model Graph :

Parallel Resonance:

Calculation:

R= 600Ω

L = 101.4mH

C = 0.01μF



1. Draw a horizontal line, which intersects the curve at 2

1times the maximum current

reading.

2. Lower intersected point and upper intersected point are respectively called lower cut-

off frequency and upper cut-off frequency on frequency axis.

Bandwidth, BW = f2 – f1

Selectivity = Bandwidth/f0 = (f2 – f1)/ f0

PROCEDURE (Parallel Resonance):


2. Set input voltage, VI = 5V using signal generator and vary the frequency from (0-1M)

Hz in a regular steps.

3. Note down the corresponding output voltage and current.

4. Plot the graph: Normalized impedance 0Z

Z Vs frequencies

To measure the resonance frequency:

1. Plot the graph: Normalized impedance 0Z

Z Vs frequencies

2. Draw a horizontal line, which intersects the curve at 2

1times the maximum current

reading.

3. Lower intersected point and upper intersected point are respectively called lower cut-

off frequency and upper cut-off frequency on frequency axis.

Quality factor:



Q0 = Reactance

Resistnace=

Lω

R

0

= RL

C

MODEL GRAPH:

Tabulation:

S.No. Frequency (KHz) Output voltage (Volts) I = V / R (mA)

Bandwidth & selectivity:

In parallel resonance circuit, the specified points are the one at which normalized impedance

falls to 2

1of its value at resonance.

Bandwidth, BW = f2 – f1



Selectivity = Bandwidth/f0 =(f2 – f1)/ f0

RESULT:

Thus the parallel and series RLC circuit was designed and the frequency response curves

were drawn.

Performance 2

Observation 2

Viva 2

Total 6



CIRCUIT DIAGRAM:

RC circuit diagram:

RL circuit diagram:



Ex.No: TRANSIENT ANALYSIS OF RL AND RC CIRCUITS

Date:

AIM:

To design a RL and RC circuit and to obtain the Steady state response.

APPARATUS REQUIRED:





4 Resistor 12KΩ 1

5 Capacitor 1000µF 1

6 Inductor 1mH 1

7 Bread board 1

PROCEDURE (Series Resonance):


2. Switch over the contact to position 1.

3. Switch on the power supply and stopwatch simultaneously.

4. Take the ammeter and voltmeter reading in a regular time interval.

5. Switch over the contact to position 2 and simultaneously reverse the polarity of ammeter.

6. Note down the reading from the ammeter and voltmeter at regular time intervals.

7. Plot the graph: voltage vs time (charging and discharging)

Current vs time (charging and discharging)



MODEL GRAPH:

Charging graph:

Tabulation: Charging

Voltage(volts) Time( sec)



Discharging graph:

Tabulation: Discharging

Voltage(volts) Time( sec)



RESULT:

Thus the RL & RC circuit was designed and the Steady state response curves were

drawn.

Performance 2

Observation 2

Viva 2

Total 6



CIRCUIT DIAGRAM:

WITHOUT FILTER:

WITH FILTER:



Ex.No:

HALF WAVE RECTIFIER

Date:

Aim:

To construct a half wave rectifier and to measure DC voltage under load and to calculate

the ripple factor.

Apparatus Required:



2 Diode 1N4007 1

3 Resistor 1kΩ 2


5 CRO (0-30)MHz 1

6 Bread Board - 1




Model Graph:

Tabulation:

S.No Condition


Amplitude Frequency Amplitude Frequency

1 Without Filter

2 With Filter



Procedure:








RESULT:

Thus the half wave rectifier was constructed and its input and output waveforms are

drawn.


DC Voltage

Ripple Factor

Performance 2

Observation 2

Viva 2

Total 6



Viva Questions and answers:

1. In a half-wave rectifier, the load current flows for only the

…………………………………….. of the input signal.

2. A half-wave rectifier is equivalent to a ……………………… circuit.

3. The output of a half-wave rectifier is suitable for running …........... motors.

4. The DC output polarity from a half-wave rectifier can be reversed by reversing the

………………….…

5. In a half wave rectifier if a resistance equal to load resistance is connected in parallel with

the diode then the circuit will ………………………………………….

6. The efficiency and ripple factor of a half-wave rectifier is ………………… and

………………..

7. The main job of a voltage regulator is to provide a nearly …….…………… output voltage.

8. In a Zener diode voltage regulator, the diode regulates so long as it is kept in

………………….. bias condition.

9. In Zener diode regulator, the maximum load current which can be supplied to load resistor is

limited in between ………………….. and ……………………….

10. The percentage voltage regulation of voltage supply providing 100 V unloaded and 95 V at

full load is …………………………………



CIRCUIT DIAGRAM:

WITHOUT FILTER:

WITH FILTER:



Ex.No:

BRIDGE WAVE RECTIFIER

Date:

Aim:

To construct a bridge wave rectifier and to measure DC voltage under load and to

calculate the ripple factor.

Apparatus Required:



2 Diode 1N4007 4

3 Resistor 1kΩ 2


5 CRO (0-30)MHz 1

6 Bread Board - 1




Model Graph:

Tabulation:

S.No Condition


Amplitude Frequency Amplitude Frequency

1 Without Filter

2 With Filter



Procedure:








RESULT:

Thus the bridge wave rectifier was constructed and its input and output waveforms are

drawn.


DC Voltage

Ripple Factor

Performance 2

Observation 2

Viva 2

Total 6



VIVAQUESTIONS:-

1. What is the PIV of Bridge rectifier?

2. What is the efficiency of Bridge rectifier?

3. What are the advantages of Bridge rectifier?

4. What is the difference between the Bridge rectifier and fullwaverectifier?

5. What is the o/p frequency of Bridge Rectifier?

6. What is the disadvantage of Bridge Rectifier?

7. What is the maximum secondary voltage of a transformer?

8. What are the different types of the filters?

9. What is the difference between the Bridge rectifier and half wave Rectifier?

10. What is the maximum DC power delivered to the load?

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