ECE 101Exploring Electrical Engineering

Chapter 11LabJack Introduction

Herbert G. Mayer, PSUStatus 11/30/2015

Taken with permission from PSU Prof. Phillip Wong

Syllabus LabJack HW Overview LabJack Features LabJack HW Control Input & Output Channels Digital Input Output Analog Input Analog Output

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LabJack HW Overview

The LabJack U3 is a basic external DAQ unit that is used to interface a computer to the physical world.

Company website: http://labjack.comGeneral tech support: http://labjack.com/supportU3-specific support: http://labjack.com/u3

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What can LabJack do? Read the output of sensors which measure:

voltage, current, power, temperature humidity, wind speed, force, pressure, strain acceleration, RPM, light intensity, sound intensity gas concentration, position, and many more

A LabJack brings this data into a computer where it can be stored and processed.

Control things like motors, lights, solenoids, relays, valves, and more.

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LabJack FeaturesModel U3-LV (Low Voltage)• 16 flexible I/O (digital input, digital output, or analog input)• Up to 16 12-bit analog inputs (0 → 2.4 V or 0 → 3.6 V, SE or Diff)• Maximum input stream rate of 2.5 → 50 kHz• 2 analog outputs (10-bit, 0-5 V, 16 Hz)• 4 additional digital I/O• Up to 2 timers (pulse timing, PWM output, quadrature input)• Up to 2 counters (32 bit each)• USB 2.0/1.1 interface → Connect to computer via USB cable• Windows, Linux, Mac drivers

Model U3-HV (High Voltage)• First 4 FIO are replaced by dedicated HV analog inputs• The HV inputs have ±10 V or -10/+20 V range

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Model U3-LV Pinouts:

VS = +5 V DCGND = ground

FIOxx = flexible I/O

AINx = analog input

DACx = analog output

DB15 Port

USB Port

DAC1

FIO0FIO1

FIO2FIO3

SGNDSPC

DAC0SGNDGND

VS

VS

VSGND

FIO7FIO6GNDVS

GNDVSFIO5

FIO4GNDVS

DB15 Port

USB Port

DAC1

AIN0AIN1

AIN2AIN3

SGNDSPC

DAC0SGNDGND

VS

VS

VSGND

FIO7FIO6GNDVS

GNDVSFIO5

FIO4GNDVS

Model U3-HV Pinouts:

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DB15 & USB Ports

screw terminals

status LED

USB(type B)

DB15(EIO & CIO)

DB15 Female Connector Pinout

EIO2

CIO1GND

VSCIO3

EIO0EIO4

EIO6

EIO1

CIO0EIO7

CIO2

GNDEIO3

EIO5

12345678

9101112131415

VS = +5 V DCGND = ground

EIOxx = 8 flexible I/O

CIOx = 4 dedicated digital I/O

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LabJack HW Control LabJack company-supplied software

Windows configuration utility: LJControlPanel

3rd party softwaree.g., DAQFactory Express

User developed softwareSupported languages include:

C/C++, VC6, .NET, Java Python, VB6, PureBasic MATLAB LabVIEW, VEE

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Ground & VS

GND is an electrical ground point.(USB → PC → AC mains)

VS is a fixed +5 V DC output voltage.

These can be used to power external circuits.

Maximum current: 450 mA

DAC1

FIO0FIO1

FIO2FIO3

SGNDSPC

DAC0SGNDGND

VS

VS

VSGND

FIO7FIO6GNDVS

GNDVSFIO5

FIO4GNDVS

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Input & Output Channels

An I/O channel is a hardware circuit inside the LabJack that can Sense an input signal Generate an output signal

Supported signals: Digital (binary levels)

Analog (continuous levels)

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LabJack Channels (U3-LV model) FIO (16: FIO0-FIO7 terminals

EIO0-EIO7 DB15) Flexible - can be any one

of the following: Digital input or output Analog input Timer Counter

DAC (2: DAC0-DAC1 terminals) Analog output only

CIO (4: CIO-CIO3 DB15) Digital input or output only

DAC1

FIO0FIO1

FIO2FIO3

SGNDSPC

DAC0SGNDGND

VS

VS

VSGND

FIO7FIO6GNDVS

GNDVSFIO5

FIO4GNDVS

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Digital Input Output Input → Sense a low or high input voltage

Output-Low → Force a low output voltage

Output-High → Force a high output voltage

FIO: R = 550 Ω

EIO/CIO: R = 180 Ω GND Output = 0 VR

+3.3 V Output = +3.3 V (no load)RFIO: R = 550 Ω

EIO/CIO: R = 180 Ω

+3.3 V

Maximum Input LimitFIO: -10 V to +10 V

EIO: -6 V to +6 VSense

100K Ω

Sense: 0 = Low, 1 = High

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Analog Input Single-ended

One analog input is required Input voltage is measured with respect to ground

Differential Two analog inputs are required The voltage difference between the input and the

reference is measured (i.e., VInput – VReference)

AINx

GND

Input

Ground

AINx

AINy

Input

Reference

Maximum Input LimitFIO: -10 V to +10 V

EIO: -6 V to +6 V

Sense: 0 to +2.44

Input values < 0 V are reported as 0 V.

Input values > +2.44 V are reported as +2.44 V

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Analog Input Sampling Modes Command/Response (Software based timing)

Program initiates an input request LabJack measures a single sample Program reads the sample data value Easy to set up but slow sampling rate

Stream (Hardware based timing) Program initiates an input request LabJack hardware continuously samples the input Program reads an entire block of sample data Complicated to set up but fast sampling rate

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Analog Output

The DAC can generate an output voltage with a specified amplitude (within limits).

The output filter limits the output sampling rate to approximately 16 Hz.

Output RangeDAC: +0.04 V to +4.95 V

DACx

GND

Output

Ground

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Timer & Counter

The timer is for applications that require accurate hardware-based timing.

A counter accumulates the number of falling edges (H-to-L signal transition) detected on an FIO.

TimerFIO

1 2 3

Counter (32-bit register)00000000000000000000000000000011

= 310

FIO

This keeps track of the number of times an event has occurred.

In PWM mode, the timer generates a pulse width modulated output signal.

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SummaryScrew Terminals• FIO (8: FIO0-FIO7)

• Digital input (-10 V to +10 V)• Digital output (L: 0 V, H: +3.3 V)• Analog input (-10 V to +10 V)

[Usable range: 0 V to +2.44 V]• Timer / Counter

• DAC (2: DAC0-DAC1)• Analog output (0 V to +4.95 V)

• VS (6)• Fixed DC voltage (+5 V)

• GND (5)• Ground reference (0 V)

DB15 Port• EIO (8: EIO0-EIO7)

• Digital input (-6 V to +6 V)• Digital output (L: 0 V, H: +3.3 V)• Analog input (-6 V to +6 V)

[Usable range: 0 V to +2.44 V]• Timer / Counter

• CIO (4: CIO0-CIO3)• Digital input (-6 V to +6 V)• Digital output (L: 0 V, H: +3.3 V)

• VS (1)• Fixed DC voltage (+5 V)

• GND (2)• Ground reference (0 V)

Warnings• Do not exceed rated voltage limits for inputs.• Never apply an external voltage into an output.• Do not short-circuit the LabJack.• Do not overtighten screw terminals.

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REFERENCE: I/O Specifications

The following tables contain more detailed specifications for the LabJack's hardware.

VS Parameter Conditions Min Typ Max Units

Output Voltage Self-Powered 4.75 5.0 5.25 V

Bus-Powered 4.0 5.0 5.25 V

Maximum Current Self-Powered 450 mA

Bus-Powered 50 mA

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Digital I/O Parameter Conditions Min Typ Max Units

Low Level Input Voltage -0.3 0.8 V

High Level Input Voltage 2 5.8 V

Maximum Input Voltage FIO -10 10 V

EIO/CIO -6 6 V

Output Low Voltage No Load 0 V

FIO Sinking 1 mA 0.55 V

EIO/CIO Sinking 1 mA 0.18 V

EIO/CIO Sinking 5 mA 0.9 V

Output High Voltage No Load 3.3 V

FIO Sourcing 1 mA 2.75 V

EIO/CIO Sourcing 1 mA 3.12 V

EIO/CIO Sourcing 5 mA 2.4 V

Short Circuit Current FIO 6 mA

EIO/CIO 18 mA

Output Impedance FIO 550 Ω

EIO/CIO 180 Ω

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Analog Input Parameter Conditions Min Typ Max Units

Typical Input Range Single-Ended, LV 0 2.44 V

Differential, LV -2.44 2.44 V

Special, LV 0 3.6 V

Max AIN Voltage to GND Valid Readings, LV -0.3 3.6 V

Max AIN Voltage to GND No Damage, FIO -10 10 V

No Damage, EIO -6 6 V

Resolution 12 bits

Integral Linearity Error ±0.05 % FS

Differential Linearity Error ±1 counts

Effective Resolution (RMS) QuickSample Off >12 bits

Noise-free Resolution QuickSample Off 11.0 bits

Single-Ended, LV 1.2 mV

Diff., Special, LV 2.4 mV

Input Impedance LV 40 MΩ

Source Impedance LongSettling Off, LV 10 kΩ

LongSettling On, LV 200 kΩ

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Analog Output Parameter Conditions Min Typ Max Units

Nominal Output Range No Load 0.04 4.95 V

@ ±2.5 mA 0.225 4.775 V

Slew Rate 0.4 V/ms

Resolution 20 bits

Absolute Accuracy 5% to 95% FS ±5.0 % FS

Short Circuit Current Max to GND 45 mA

Source Impedance 50 Ω

Output frequency Sinusoidal 16 Hz

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Timer & Counter Modes

Allowed channels: FIO4-FIO7, EIO0-EIO3

Mode Description Mode Description

0 16-bit PWM output 7 Frequency output

1 8-bit PWM output 8 Quadrature input

2 Period input (32-bit, rising edges) 9 Timer stop input (odd timers only)

3 Period input (32-bit, falling edges) 10 System timer low read (default)

4 Duty cycle input 11 System timer high read

5 Firmware counter input 12 Period input (16-bit, rising edges)

6 Firmware counter input (debounced) 13 Period input (16-bit, falling edges)