ece 171 digital circuits chapter 6 logic circuits herbert g. mayer, psu status 1/16/2016 copied with...
DESCRIPTION
Lecture 6 Topics –Combinational Logic Circuits Graphic Symbols (IEEE and IEC) Switching Circuits Analyzing IC Logic Circuits Designing IC Logic Circuits Detailed Schematic Diagrams Using Equivalent Symbols 3TRANSCRIPT
ECE 171Digital Circuits
Chapter 6Logic Circuits
Herbert G. Mayer, PSUStatus 1/16/2016
Copied with Permission from prof. Mark Faust @ PSU ECE
Syllabus
Combinatorial Logic Circuits Truth Tables Logic Functions References
Lecture 6
• Topics– Combinational Logic Circuits
• Graphic Symbols (IEEE and IEC)• Switching Circuits• Analyzing IC Logic Circuits• Designing IC Logic Circuits• Detailed Schematic Diagrams• Using Equivalent Symbols
3
Combinational Logic Circuits
• Combinational Logic– Outputs depend only upon the current inputs (not
previous “state”)• Positive Logic
– High voltage (H) represents logic 1 (“True”)– “Signal BusGrant is asserted High”
• Negative Logic– Low voltage (L) represents logic 1 (“True”)– “Signal BusRequest# is asserted Low”
4
IEEE: Institute of Electricaland Electronics Engineers
IEC: International Electro-technical Commission
5
n.o. = normally openn.c. = normally closed
6
7
8
9
10
11
12
13
All Possible Two Variable FunctionsQuestion: How many unique functions of twovariables are there?
Recall earlier question…
14
Truth Tables
B5 B4 B3 B2 B1 B0 F
0 0 0 0 0 0 0
0 0 0 0 0 1 1
0 0 0 0 1 0 1
0 0 0 0 1 1 0
.
.
.
1 1 1 1 1 1 1
0
1
2
3
.
.
.
63
26 = 64
Question: How many rows are there in a truth tablefor n variables?As many rows as unique combinationsof inputs
Enumerate by counting in binary
2n
15
Two Variable FunctionsQuestion: How many unique combinations of 2n bits?
Enumerate by counting in binary
22n
264
16
B5 B4 B3 B2 B1 B0 F
0 0 0 0 0 0 0
0 0 0 0 0 1 1
0 0 0 0 1 0 1
0 0 0 0 1 1 0
.
.
.
1 1 1 1 1 1 1
0
1
2
3
.
.
.
63
26 = 64
All Possible Two Variable FunctionsQuestion: How many unique functions of twovariables are there? B1 B0 F
0 0 0
0 1 1
1 0 1
1 1 0
22 = 4 rows 4 bits
Number of unique 4 bit words = 24 = 16
17
18
Analyzing Logic Circuits
Reference Designators (“Instances”)
X + Z
XX + Y
(X + Y)×(X + Z)
19
Analyzing Logic Circuits
C
A×B
B×C
A×B + B×C
20
Designing Logic Circuits
F1 = A×B×C + B×C + A×B
SOP form with 3 terms 3 input OR gate
21
Designing Logic Circuits
F1 = A×B×C + B×C + A×B
Complement already available
22
Some Terminology
F1 = A×B×C + B×C + A×BSignal line – any “wire” to a gate input or output
23
Some Terminology
F1 = A×B×C + B×C + A×BNet – collection of signal lines which are connected
24
Some Terminology
F1 = A×B×C + B×C + A×BFan-out – Number of inputs an IC output is driving
Fan-out of 2
25
Some Terminology
F1 = A×B×C + B×C + A×BFan-in – Number of inputs to a gate
Fan-in of 3
26
Vertical Layout Scheme – SOP Form
27
Vertical Layout Scheme – SOP Form
28
>2 Input OR Gates Not Available for all IC Technologies
Solution: “Cascading” gates
29
Vertical Layout Scheme – POS Form
F2 = (X+Y)×(X+Y)×(X+Z)
30
Designing Using DeMorgan Equivalents
• Often prefer NAND/NOR to AND/OR when using real ICs– NAND/NOR typically have more fan-in– NAND/NOR “functionally complete”– NAND/NOR usually faster than AND/OR
31
AND/OR forms of NAND
DeMorgan’s Theorem
32
Summary of AND/OR forms
Change OR to AND“Complement” bubbles
33
Equivalent Signal Lines
34
NAND/NAND Example
35
NOR/NOR Example
36
37