ecoe 560 design methodologies and tools for software/hardware systems spring 2006

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ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006 Serdar Taşıran

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ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006. Serdar Ta şı ran. The Boolean Space B n. B = { 0,1} B 2 = {0,1} X {0,1} = {00, 01, 10, 11}. Karnaugh Maps:. Boolean Cubes:. B 0. B 1. B 2. B 3. B 4. Boolean Functions. x 2. x 1. Boolean Functions. - PowerPoint PPT Presentation

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Page 1: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

ECOE 560

Design Methodologies and Tools for Software/Hardware Systems

Spring 2006

Serdar Taşıran

Page 2: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

2

The Boolean Space BThe Boolean Space Bnn

• B = { 0,1}• B2 = {0,1} X {0,1} = {00, 01, 10, 11}

BB00

BB11

BB22

BB33

BB44

Karnaugh Maps: Boolean Cubes:

Page 3: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

3

Boolean FunctionsBoolean Functions

1 2

1 2

1 1 2 2

1 2 1 2

Boolean Function: ( ) :{0,1}

( , ,..., ) ;

- , ,... are - , , , ,... are

- essentially: maps each vertex of to 0 or 1

Exampl

vari

e:{(( 0, 0),0),(( 0,

ablesliterals

1

n

nn i

n

f x B BBx x x x B x B

x xx x x x

f B

f x x x x 1 2 1 2

),1), (( 1, 0), 1),(( 1, 1),0)}x x x x 1x

2x

001

1x2

x1

Page 4: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

4

Boolean FunctionsBoolean Functions

1 1

1 0

1

0 1

- The of is { | ( ) 1} (1)

- The of is { | ( ) 0} (0)

- if , is the i.e. 1

- if ( ), is

Onset

Offset

tautology.

not satisfyabl , i.e. 0

- if ( ) ( ) , t

e

hen a

n

n

n

f x f x f ff x f x f f

f B f ff B f f ff x g x for all x B f

1

nd

- we say

are equiva

instea

le

nt

d of

gf f

Literals:A is a variable or its negation ,and represents a logic

l

f

ite

unc n

ral

tiox x

Page 5: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

5

LiteralsLiterals

A literal is a variable or its negationy, y

It represents a logic function

Literal x1 represents the logic function f, where f = {x| x1 = 1}

Literal x1 represents the logic function g where g = {x| x1 = 0}

x3

x1

x2

x1

x2

x3

f = x1 f = x1

Page 6: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

6

Set of Boolean FunctionsSet of Boolean Functions

• There are 2n vertices in input space Bn

• There are 22n distinct logic functions.

– Each subset of vertices is a distinct logic function: f Bn

x1x2x3

0 0 0 10 0 1 00 1 0 10 1 1 01 0 0 11 0 1 01 1 0 11 1 1 0

x1

x2

x3

• Truth Table or Function table:

Page 7: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

7

Representation of Boolean FunctionsRepresentation of Boolean Functions• A Boolean formula is defined as an expression with the following

syntax:

formula ::= ‘(‘ formula ‘)’ | <variable> | formula “+” formula (OR operator) | formula “” formula (AND operator) | ^ formula (complement)

Example:f = (x1x2) + (x3) + ^^(x4 (^x1))

typically the “” is omitted and the ‘(‘ and ‘^’ are simply reduced by priority, e.g.

f = x1x2 + x3 + x4^x1

Page 8: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

8

Boolean Operations - Boolean Operations - AND, OR, COMPLEMENTAND, OR, COMPLEMENT

Given two Boolean functions:f : Bn Bg : Bn B

• The AND operation h = f g is defined ash = {x | f(x)=1 g(x)=1}

• The OR operation h = f g is defined ash = {x | f(x)=1 g(x)=1}

• The COMPLEMENT operation h = ^f is defined ash = {x | f(x) = 0}

Page 9: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

9

CubesCubes• A cube is defined as the AND of a set of literal functions (“conjunction” of literals).

Example:C = x1x2x3

represents the following functionf = (x1=1)(x2=0)(x3=1)

x1

x2

x3

c = x1

x1

x2

x3

f = x1x2

x1

x2

x3

f = x1x2x3

Page 10: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

10

Representation of Boolean FunctionsRepresentation of Boolean Functions• Truth table (Function Table):

The truth table of a function f : Bn B is a tabulation of its value at each of the 2n vertices of Bn.

In other words the truth table lists all mintemsExample: f = abcd + abcd + abcd +

abcd + abcd + abcd + abcd + abcd

The truth table representation is- intractable for large n- canonical

Canonical means that if two functions are the same, then thecanonical representations of each are isomorphic.

abcd f0 0000 01 0001 12 0010 03 0011 14 0100 05 0101 16 0110 07 0111 0

abcd f 8 1000 0 9 1001 110 1010 011 1011 112 1100 013 1101 114 1110 115 1111 1

Page 11: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

11

Representation of Boolean FunctionsRepresentation of Boolean Functions• Sum of Products:• A function can be represented by a sum of cubes (products):

f = ab + ac + bcSince each cube is a product of literals, this is a “sum of products” (SOP) representation

• A SOP can be thought of as a set of cubes FF = {ab, ac, bc}

• A set of cubes that represents f is called a cover of f. F1={ab, ac, bc} and F2={abc,abc,abc,abc,bc}

are covers of f = ab + ac + bc.

Page 12: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

12

SOPSOP

• Covers (SOP’s) can efficiently represent many practical logic functions (i.e. for many, there exist small covers).

• Two-level minimization seeks the minimum size cover (least number of cubes)

bc ac

abc

a

b

= onset minterm

Note that each onset minterm is “covered” by at least one of the cubes!None of the offset minterms is covered

Page 13: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

13

Shannon (Boole) CofactorsShannon (Boole) CofactorsLet f : Bn B be a Boolean function, and x= (x1, x2, …, xn) the variables in the support of f. The cofactor fa of f by a literal a=xi or a=xi is

fxi (x1, x2, …, xn) = f (x1, …, xi-1, 1, xi+1,…, xn)

fxi (x1, x2, …, xn) = f (x1, …, xi-1, 0, xi+1,…, xn)

The computation of the cofactor is a fundamental operation in Boolean reasoning!!!!

Example:

ab

c

f = abc + abc

ab

c

fa = bc

Page 14: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

14

Shannon ExpansionShannon Expansionf : Bn B

Theorem:

Theorem: F is a cover of f. Then

We say that f (F) is expanded about xi.

xi is called the splitting variable.

i i

ii x xf x f x f

i iii x xF x F x F

Page 15: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

15

Example

Cube bc got split into two cubes

( ) ( )a a

F ab ac bc

F aF aF a b c bc a bc

ab ac abc abc

c

a

bc

a

b

bc

ac

ab

Shannon Expansion (cont.)Shannon Expansion (cont.)

Page 16: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

16

Boolean ReasoningBoolean Reasoning• Fundamental mechanism to decide about synthesis and

verification steps– Is a particular change to the circuit or code valid?– Are two sub-circuits or pieces of code functionally identical?– Is a particular path in my circuit or code sensitizable?

• Boolean reasoning requires an efficient representation and manipulation of Boolean functions– build a Boolean function

• AND, OR, NOT, …– decide about tautology or satisfiability (SAT)

• f 0? f 1?• E.g.: Are f and g functionally equivalent? (f g) 0?

• Boolean reasoning algorithms also used for efficient set manipulations– sets of states, sets of simulation vectors, ...

Page 17: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

17

Boolean ReasoningBoolean Reasoning• Two fundamental approaches:

– keep representation canonical with respect to the function• tautology or SAT check is easy• but representation may blow-up in space• Example:

– BDDs and their derivatives– keep representation non-canonical

• representation can remain compact• tautology or SAT check is exponential (NP or co-NP complete)• Example:

– Boolean formulas– circuits (networks), – list of cubes

– and anything in between

Page 18: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

18

Binary Decision TreeBinary Decision TreeThe recursive Shannon expansion corresponds to a binary decision tree

(binary recursion tree)

Path (v) to node v corresponds to cube c(v)

Example: c(v) = x1 x2 x3

1 0

1

1 0

0

x1

x3

x211

1

0

0

0

x

yy

v

(v)

( ) ( )x x

xy x y xy x y

f xf x f

x yf y f x yf y f

xyfx yf xyf x yf

Page 19: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

19

Binary Decision TreeBinary Decision Tree

• The root represents the original function f.

• Each node v corresponds to fc(v).

• Minterms represent complete path and are constants:

– fm(v) = 0 (1)

• Reduction Rule:

– If all leafs of a subtree below node v have same constant c, replace v by constant c

– i.e. if fc(v) = 1 or 0 we can terminate the tree and replace v by 1 or 0. Such a node v becomes leaf.

Page 20: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

20

ExampleExample

11

1

0

0

0

1

a

cb

0 1 0

11

1

0

0

0

1

a

bb

0

1 0 1 0

cc

Splitting variable

f ab ac

Page 21: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

21

ROBDD’sROBDD’s

• Directed acyclic graph (DAG)• one root node, two terminals 0, 1• each node, two children, and a variable• Shannon co-factoring tree, except reduced and ordered (ROBDD)

– Reduced:• any node with two identical children is removed• two nodes with isomorphic BDD’s are merged

– Ordered: • Co-factoring variables (splitting variables) always follow the

same order along all pathsxi1

< xi2 < xi3

< … < xin

Page 22: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

22

Variable OrderingVariable Ordering– Assign arbitrary total ordering to variables

• e.g., x1 < x2 < x3

– Variables must appear in ascending order along all paths

OK Not OK

PropertiesProperties No conflicting variable assignments along path Simplifies manipulation

x1

x2

x3

x1

x3

x3

x2

x1

x1

x1

Page 23: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

23

Reduction Rule #1Reduction Rule #1

Merge equivalent leaves

a a

0 0

x3

0 1

x3

x2

0 1

x3

0 1

x3

x2

x1

x3 x3

x2

x3

0 1

x3

x2

x1

a

Page 24: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

24

Reduction Rule #2Reduction Rule #2

y

x

z

x

Merge isomorphic nodes

x3 x3

x2

x3

0 1

x3

x2

x1

x3

x2

0 1

x3

x2

x1

y

x

z

x

y

x

z

x

Page 25: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

25

Reduction Rule #3Reduction Rule #3

x3

x2

0 1

x3

x2

x1

Eliminate Redundant Tests

y

x

y

x2

0 1

x3

x1

Page 26: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

26

Example OBDDExample OBDD

Initial Graph Reduced Graph

• Canonical representation of Boolean function For given variable ordering– Two functions equivalent if and only if graphs isomorphic

• Can be tested in linear time– Desirable property: simplest form is canonical.

x2

0 1

x3

x1 (x1+x2)·x3

0 0

x3

0 1

x3

x2

0 1

x3

0 1

x3

x2

x1

Page 27: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

27

Example FunctionsExample Functions

ConstantsUnique unsatisfiable function

Unique tautology1

0

Variable

Treat variableas function

0 1

x

Odd Parity

Linearrepresentation

x2

x3

x4

10

x4

x3

x2

x1

Typical Function

x2

0 1

x4

x1 (x1 x2 ) x4

No vertex labeled x3 independent of x3

Many subgraphs shared

Page 28: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

28

Representing Circuit FunctionsRepresenting Circuit Functions

b3 b3

a3

Cout

b3

b2 b2

a2

b2 b2

a2

b3

a3

S3

b2

b1 b1

a1

b1 b1

a1

b2

a2

S2

b1

a0 a0

b1

a1

S1

b0

10

b0

a0

S0

• Functions– All outputs of 4-bit adder– Functions of data inputs

A

B

Cout

SADD

• Shared Representation– Graph with multiple roots– 31 nodes for 4-bit adder– 571 nodes for 64-bit adder Linear growth

Page 29: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

29

Effect of Variable OrderingEffect of Variable Ordering

Good Ordering Bad Ordering

Linear Growth

0

b3

a3

b2

a2

1

b1

a1

Exponential Growth

a3 a3

a2

b1 b1

a3

b2

b1

0

b3

b2

1

b1

a3

a2

a1

)()()( 332211 bababa

Page 30: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

30

Onset is Given by all Paths to “1”Onset is Given by all Paths to “1”

Notes:• By tracing paths to the 1 node, we get a cover of pairwise disjoint cubes.• BDDs can be used to efficiently represent sets

– interpret elements of the onset as elements of the set– f is called the characteristic function of that set

F = b’+a’c’ = ab’+a’cb’+a’c’ all paths to the 1 node

a

cb

0 1

10

1

10

0

f

fa= b’fa = cb’+c’

Page 31: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

31

ROBDD’sROBDD’s• Representation of a logic function as graph (DAG):

– many logic functions can be represented compactly - usually better than SOP’s

• Are canonical !!• Many logic operations can be performed efficiently on BDD’s:

– usually linear in size of result – tautology, satisfiability and complement are constant time

Page 32: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

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Function is Given by Tracing Function is Given by Tracing All Paths to 1All Paths to 1

NotesNotes::• By tracing paths to the 1 node, we get a By tracing paths to the 1 node, we get a covercover of pairwise of pairwise

disjointdisjoint cubes. cubes.• The power of the BDD representation is that it does The power of the BDD representation is that it does notnot

explicitly enumerate all paths; rather it represents paths by explicitly enumerate all paths; rather it represents paths by a graph whose size is measures by its nodes and not paths.a graph whose size is measures by its nodes and not paths.

• A DAG can represent an exponential number of paths with a A DAG can represent an exponential number of paths with a linear number of nodes.linear number of nodes.

• Each node is given by its Shannon representation: Each node is given by its Shannon representation: ff = a = affaa + + aaffaa

F = b’+a’c’ = ab’+a’cb’+a’c’ all paths to the 1 nodeF = b’+a’c’ = ab’+a’cb’+a’c’ all paths to the 1 node

aa

ccbb

00 11

1100

11

110000

ff

ffaa= b’= b’ffa a = cb’+c’= cb’+c’

Page 33: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

33

ImplementationImplementationVariables are Variables are totally orderedtotally ordered:: If If vv < < ww then then vv occurs “higher” up in the occurs “higher” up in the

ROBDD ROBDD (call it BDD from now on).(call it BDD from now on).Definition 1:Definition 1: Top variableTop variable of a function of a function ff is a variable associated with its is a variable associated with its

root noderoot node..ExampleExample: : ff = ab + a’bc + a’bc’. Order is (a < b < c). = ab + a’bc + a’bc’. Order is (a < b < c).

ffaa = b, = b, ffaa = b = b

aa

bb

00 11

ff b is top variable of fb is top variable of f

bb

00 11

ffreducedreducedff does not depend on a, does not depend on a,

since since ffa a = = ffaa . .

Each node is written as a Each node is written as a tripletriple: : ff = ( = (v,g,hv,g,h) where ) where g g = = ffvv and and h h = = ffvv . We read this triple as: . We read this triple as:ff = if = if vv then then gg else else hh = = iteite ((v,g,hv,g,h) = ) = vg+v ’ hvg+v ’ h

vv ff

00 11

hh gg

11 00ff

vv

gg hh

muxmux

v is top variable of fv is top variable of f

Page 34: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

– 34 –

Arguments Arguments II, , TT, , EE Functions over variables X Represented as OBDDs

ResultResult OBDD representing

composite function (I T) (I E)ImplementationImplementation

Combination of depth-first traversal and dynamic programming.

Worst case complexity product of argument graph sizes.

MUX1

0

I T, E 

X

I  

If-Then-Else Operation

ConceptConcept Basic technique for building OBDD from logic network or

formula.

Page 35: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

– 35 –

0 1

d

c

a

B3 B4

B2

B5

B1

Argument I1

Argument T Argument E

A4,B3 A5,B4

A3,B2

A6,B2

A2,B2

A3,B4A5,B2

A6,B5

A1,B1

Recursive Calls

b

0

d

1

c

a

A4 A5

A3

A2

A6

A1

If-Then-Else Execution Example

OptimizationsOptimizations Dynamic programming Early termination rules

Page 36: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

– 36 –

0 1

d

c

b

11

c

a

A4,B3 A5,B4

A3,B2

A6,B2

A2,B2

A3,B4A5,B2

A6,B5

A1,B1

Recursive Calls Without Reduction With Reduction

C2

C4

C5

C3

C6

C1 0

d

c

b

1

a

If-Then-Else Result Generation

Recursive calling structure implicitly defines unreduced BDD Apply reduction rules bottom-up as return from recursive calls

Generates reduced graph

Page 37: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

– 37 –

G  F xi –1

xi +1

xn 

x1

x1

xn F [xi =G]

x1

xn xi –1

xi +1

xn 

x1

xi –1

xi +1

xn 

x1

1 F 

0 F 

MUX1

0

Functional Composition

Create new function by composing functions F  and G. Useful for composing hierarchical modules.

Page 38: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

– 38 –

xi –1

xi +1

xn 

x1

F  xi F 

1 F 

0 F 

xi –1

xi +1

xn 

x1

xi –1

xi +1

xn 

x1

Variable Quantification

Eliminate dependency on some argument through quantification

Combine with AND for universal quantification.

Page 39: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

39

ITE OperatorITE Operator

iteite operator can implement any two variable logic function. There are operator can implement any two variable logic function. There are 16 such functions corresponding to all subsets of vertices of 16 such functions corresponding to all subsets of vertices of B B 22::

TableTable Subset Subset Expression Expression Equivalent FormEquivalent Form00000000 00 0 0 0000010001 AND(f, g)AND(f, g) fg fg ite(f, g, ite(f, g, 0)0)00100010 f > gf > g f fgg ite(f,ite(f,g, 0)g, 0)00110011 ff f f ff01000100 f < gf < g fgfg ite(f, 0, g)ite(f, 0, g)01010101 gg g g gg01100110 XOR(f, g)XOR(f, g) f f g g ite(f,ite(f,g, g, g)g)01110111 OR(f, g)OR(f, g) f + g f + g ite(f, 1, g)ite(f, 1, g)10001000 NOR(f, g)NOR(f, g) f + g f + g ite(f, ite(f, 0,0,g)g)1001 1001 XNOR(f, g)XNOR(f, g) f f g g ite(f, g,ite(f, g,g)g)10101010 NOT(g)NOT(g) gg ite(g, 0, 1)ite(g, 0, 1)10111011 f f g g f + f + gg ite(f, 1, ite(f, 1, g)g)11001100 NOT(f)NOT(f) ff ite(f, 0, 1)ite(f, 0, 1)11011101 f f g g f + gf + g ite(f, g, 1)ite(f, g, 1)11101110 NAND(f, g)NAND(f, g) fg fg ite(f, ite(f, g, 1)g, 1)11111111 11 1 1 11

ite( , , )f g h fg f g

( , , , )f g f g f g fg

Page 40: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

40

Unique Table - Hash TableUnique Table - Hash Table

Before a node (Before a node (v, g, h v, g, h ) is added to BDD data base, it is looked up in ) is added to BDD data base, it is looked up in the the “unique-table”.“unique-table”. If it is there, then existing pointer to node is If it is there, then existing pointer to node is used to represent the logic function. Otherwise, a new node is used to represent the logic function. Otherwise, a new node is added to the unique-table and the new pointer returned.added to the unique-table and the new pointer returned.

Thus a Thus a strong canonical formstrong canonical form is maintained. The node for is maintained. The node for ff = ( = (v, g, h v, g, h ) exists ) exists iffiff((v, g, h v, g, h ) is in the unique-table. There is only one pointer ) is in the unique-table. There is only one pointer for (for (v, g, h v, g, h ) and that is the address to the unique-table entry.) and that is the address to the unique-table entry.

Unique-table allows single multi-rooted DAG to represent all users’ Unique-table allows single multi-rooted DAG to represent all users’ functions:functions:

hash valuehash valueof keyof key

collisioncollisionchainchain

Page 41: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

41

Recursive Formulation of ITERecursive Formulation of ITE

vv = top-most variable among the three BDD’s = top-most variable among the three BDD’s f, f, g, hg, h

( , , )

( ) ( )

( ) ( )

( , ( , , ), ( , , ))

( , ( , , ), ( , , ))

( , , )

v v

v v v v v v v v

v v v v v v

v v v v v v

ite f g h fg f h

v fg f h v fg f h

v f g f h v f g f h

ite v ite f g h ite f g h

v ite f g h ite f g h

v f g R

Page 42: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

42

Recursive Formulation of ITERecursive Formulation of ITETerminal cases:Terminal cases: (0,(0, g g,, f f ) = (1,) = (1, f f,, g g) =) = f f

ite ite ((ff, , gg, , gg) =) = g g ite(ite(f, g, hf, g, h) ) if(terminal case) {if(terminal case) { return result;return result;} else if(computed-table has entry (} else if(computed-table has entry (ff, , gg, , h h )) {)) { return result;return result;} else {} else { let let vv be the top variable of ( be the top variable of (ff, , gg, , h h );); f <- ite(f <- ite(ffvv , g , gvv , , hhv v );); g <- iteg <- ite((ffvv , g , gvv , , hhv v );); if( f equals g ) return g;if( f equals g ) return g; R <- find_or_add_unique_table(v, f, g );R <- find_or_add_unique_table(v, f, g ); insert_computed_table( {insert_computed_table( {ff, , gg, , h h }, R);}, R); return R; } }return R; } }

The “insert_computed_table” is a cache table where ite results are The “insert_computed_table” is a cache table where ite results are cached.cached.

Page 43: ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2006

43

ExampleExample

II = = ite ite ((FF,, G G,, H H) ) = (= (aa, , ite ite ((FFaa ,, G Ga a , , HHa a ), ), ite ite ((FFa a ,, G Ga a , , HHa a ))))= (= (aa, , ite ite (1,(1, C C , , HH ), ), iteite((BB,, 0, 0, H H ))))= (= (aa, , CC, (, (bb ,, ite ite ((BBb b , 0, 0b b , , HHb b ), ), ite ite ((BBb b ,, 00b b , , HHbb )) )) = (= (aa, , CC, (, (bb , , ite ite (1,(1, 0, 1), 0, 1), ite ite (0, 0, (0, 0, DD))) ))) = (= (aa, , CC, (, (bb ,, 0, 0, DD))))== ((aa, , CC, , JJ))

Check:Check: F = a + bF = a + bG = acG = acH = b + dH = b + d

iteite((FF,, G G,, H H) = (a + b)(ac) +) = (a + b)(ac) +aab(b + d)b(b + d) = ac + = ac + aabdbd

F,G,H,I,J,B,C,DF,G,H,I,J,B,C,Dare pointersare pointers

bb11

11

aa

00

11 00

11 00

FF

BB1111

aa

00

11 00

00

GG

cc 00CC

11

bb

00

11 00

00

HH

dd DD

1111

00

aa11 00

00

II

dd JJ

11CC

DD

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Computed TableComputed TableKeep a record of (Keep a record of (FF, , GG, , H H ) triplets already computed by the ) triplets already computed by the iteite operator operator

in a in a hash-based cache hash-based cache ( ( “cache” table“cache” table). This means that the collision ). This means that the collision chain is chain is not usednot used ( (if collision, old entry thrown away if collision, old entry thrown away ).).

The above structure is wasteful since the BDD nodes and The above structure is wasteful since the BDD nodes and collision chain can be merged.collision chain can be merged.

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Multivalued Decision Multivalued Decision Diagrams(MDD’s) “BDD’s” for MV-Diagrams(MDD’s) “BDD’s” for MV-

functionsfunctionsThere is an equivalent theory There is an equivalent theory (canonical etc.)(canonical etc.) for MDD’s: for MDD’s:

Typically, we Typically, we encodeencode the multi-valued variable with the multi-valued variable with loglog22(|P(|Pvv|) |) binarybinary variables and use variables and use unusedunused codes codes as “don’t cares” in a particular way:as “don’t cares” in a particular way:

vv00

11 22 3344

PPvv = (0,1,2,3,4) = (0,1,2,3,4)

00 1122 3344

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Sets and Graphs:Sets and Graphs:

With MDDs we can represent and manipulate With MDDs we can represent and manipulate general general sets sets andand graphs graphs..SetSet:: characteristic function of set characteristic function of set

((((f f ((v v ) = 1) ) = 1) ( (vv S S P Pvv))))

GraphGraph: : (set of edges)(set of edges) (( ((f f ((xx, , y y ) = 1) ) = 1) ( (xx, , y y ) ) is an edge in graph where is an edge in graph where xx and and yy are multi- are multi-valued variables representing nodes in the valued variables representing nodes in the graph.graph.

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Generating OBDD from Network

Network Evaluation

Task: Represent output functions of gate network as OBDDs.

A

B

C

T1

T2

Out

Resulting GraphsA B C

T1 T2

Out

0 1

a

0 1

c

0 1

b

0 1

b

a

0 1

c

b

c

b

0 1

b

a

A A new_var ("a");new_var ("a");BB new_var ("b");new_var ("b");C C new_var ("c");new_var ("c");T1 T1 And (A, 0, B);And (A, 0, B);T2 T2 And (B, C); And (B, C);OutOut Or (T1, T2);Or (T1, T2);

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0 1

a

T1 Or (A, C);O2 And (T1, B);if (O2 == Out)

then Equivalentelse Different

Alternate Network Evaluation

Resulting Graphs

A

B

C

T1

O2

A B CT1

O2

c

b

0 1

b

a

c

0 10 1

b

0 1

a

c

Checking Network EquivalenceTask: Do two networks compute same Boolean function?Method: Compute OBDDs for both networks and compare

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Finite State System Analysis

Systems Represented as Finite State MachinesSystems Represented as Finite State Machines Sequential circuits Communication protocols Synchronization programs

Analysis TasksAnalysis Tasks State reachability State machine comparison Temporal logic model checking

Traditional Methods Impractical for Large MachinesTraditional Methods Impractical for Large Machines Polynomial in number of states Number of states exponential in number of state variables. Example: single 32-bit register has 4,294,967,296 states!

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A0 /1

Set Operations

A

B

UnionA

B

Intersection

Characteristic Functions

ConceptConcept A {0,1}n

Set of bit vectors of length n Represent set A as Boolean

function A of n variablesX A if and only if A(X ) = 1

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Nondeterministic FSM Symbolic Representation

o1,o2 encodedold state

n1, n2 encodednew state

00

10

01

11 o2

o1

1

n2

0

n1

o2

Symbolic FSM Representation

Represent set of transitions as function (Old, New) Yields 1 if can have transition from state Old to state New

Represent as Boolean function Over variables encoding states

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Reachability Analysis

Rstate 0/1old state

new state0/1

TaskTask Compute set of states reachable from initial state Q0

Represent as Boolean function R(S) Never enumerate states explicitly

Given Compute

InitialR0

=

Q0

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R0

00

Breadth-First Reachability Analysis

Ri – set of states that can be reached in i transitions Reach fixed point when Rn = Rn+1

Guaranteed since finite state

00

10

01

11

R1R0

00 01

R2R1R0

00 01 10

R3R2R1R0

00 01 10

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Iterative Computation

Ri +1 – set of states that can be reached i +1 transitionsEither in Ri

or single transition away from some element of Ri

Ri

Ri

Ri +1

old

new

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Example: Computing R1 from R0

o2

o1

1

n2

0

n1

o2

R0

00

R1

00 01

Old [R0(Old) (Old, New)]

1

n2

0

n1

0

1

n2

0

n1

0

1 0

n1

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Symbolic FSM Analysis Example K. McMillan, E. Clarke (CMU) J. Schwalbe (Encore Computer)

Encore Gigamax Cache SystemEncore Gigamax Cache System Distributed memory multiprocessor Cache system to improve access time Complex hardware and synchronization protocol.

VerificationVerification Create “simplified” finite state model of system (109 states!) Verify properties about set of reachable states

Bug DetectedBug Detected Sequence of 13 bus events leading to deadlock With random simulations, would require 2 years to generate

failing case. In real system, would yield MTBF < 1 day.

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What’s Good about OBDDsPowerful OperationsPowerful Operations

Creating, manipulating, testing Each step polynomial complexity

Graceful degradation Maintain “closure” property

Each operation produces form suitable for further operations

Generally Stay Small EnoughGenerally Stay Small Enough Especially for digital circuit applications Given good choice of variable ordering

Weak CompetitionWeak Competition No other method comes close in overall strength Especially with quantification operations

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What’s Not Good about OBDDsDoesn’t Solve All ProblemsDoesn’t Solve All Problems

Can’t do much with multipliers Some problems just too big Weak for search problems

Must be CarefulMust be Careful Choose good variable ordering

Critical effect on efficiencyMust have insights into problem characteristicsDynamic reordering most promising workaround

Some operations too hardMust work around limitations

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Another Representation: Factored FormsAnother Representation: Factored Forms

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Factored FormsFactored FormsExample: (ad+b’c)(c+d’(e+ac’))+(d+e)fg

Advantages• good representative of logic complexity

f=ad+ae+bd+be+cd+ce f’=a’b’c’+d’e’ f=(a+b+c)(d+e)• in many designs (e.g. complex gate CMOS) the implementation of a function corresponds directly

to its factored form• good estimator of logic implementation complexity• doesn’t blow up easily

Disadvantages• not as many algorithms available for manipulation• hence often just convert into SOP before manipulation

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Factored FormsFactored Forms

Note: literal count transistor count area • however, area also depends on

– wiring– gate size etc.

• therefore very crude measure