efficient static compaction algorithms for combinational circuits based on test relaxation
DESCRIPTION
Efficient Static Compaction Algorithms for Combinational Circuits Based on Test Relaxation. Yahya E. Osais Advisor: Dr. Aiman H. El-Maleh Members: Dr. Sadiq Sait & Dr. Allaeldin Amin Dept. of Computer Engineering KFUPM 11-Oct-03. Outline. Motivation. Research problems & contributions. - PowerPoint PPT PresentationTRANSCRIPT
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Efficient Static Compaction Efficient Static Compaction Algorithms for Combinational Algorithms for Combinational
Circuits Based on Test RelaxationCircuits Based on Test Relaxation
Yahya E. OsaisYahya E. OsaisAdvisor: Dr. Aiman H. El-MalehAdvisor: Dr. Aiman H. El-Maleh
Members: Dr. Sadiq Sait & Dr. Allaeldin Members: Dr. Sadiq Sait & Dr. Allaeldin AminAmin
Dept. of Computer EngineeringDept. of Computer EngineeringKFUPMKFUPM
11-Oct-0311-Oct-03
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11-Oct-03 yosais 2
Outline Motivation. Research problems & contributions. Taxonomy of static compaction algorithms. Test vector decomposition. Independent fault clustering. Class-based clustering. Test vector reordering. Conclusions & future research.
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Motivation Rapid advancement in VLSI led to SoC. Testing SoCs requires large amount of
data. Impact on testing time & memory
requirements of test equipment. Challenges:
Reduce amount of test data. Reduce time a defective chip spends on a
tester.
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Research Problems Static compaction for combinational
circuits. Reduce the size of a test set as much as
possible. Test vector reordering for combinational
circuits. Steepen the curve of fault coverage vs.
number of test vectors.
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Contributions Taxonomy of static compaction
algorithms. Test vector decomposition.
Test vector can be eliminated if its components can be moved to other test vectors.
Efficient static compaction algorithms. IFC CBC
Efficient test vector reordering algorithm. Solutions to time and memory bottlenecks.
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Taxonomy of Static Compaction Algorithms
Static Compaction Algorithms for Combinational Circuits
Redundant Vector Elimination
Test Vector Addition & Removal
Test Vector Modification
Set Covering
Test Vector Reordering
Essential Fault Pruning
Based on ATPG
Essential Fault Pruning
Based on ATPG
Merging
Based on Relaxation
Based on Raising
Test Vector Decomposition
IFC CBC Graph Coloring
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Test Vector Decomposition (TVD) Decompose a test vector into its atomic
components. Employ relaxation per a fault. tp = 010110 & Fp = {f1,f2,f3}
(f1,01xxxx)
(f2,0x01xx)
(f3,x1xx10)
Compaction modeled as graph coloring.
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Independent Fault ClusteringPreliminariesPreliminaries
Two faults are independent if they cannot be detected by a single test vector.
Two faults are compatible if their components are compatible.
A set of faults is independent (IFS) if no two faults can be detected by the same test vector.
A set of faults is compatible (CFS) if all faults can be detected by the same test vector.
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Fault simulate T without fault dropping. Match essential faults:
Extract atomic component cf from t.
Map to cf CFS.
Find IFSs. Match remaining faults:
Extract atomic component cf from t Tf.
Map cf to CFS.
Independent Fault ClusteringAlgorithm DescriptionAlgorithm Description
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Independent Fault ClusteringIllustrative ExampleIllustrative Example
Test VectorFault Detected
Fault Component
v10xx11x0x10f1xxx1xx0xxx
f20xxx1xxxx0
fe30xxxxx0x10
v210x1xxxx00f1x0x1xxxxxx
fe41xxxxxxx00
fe510x1xxxxxx
v30xx0xxx00xfe60xx0xxxxxx
fe7xxxxxxx00x
v4111xxxx0x0f2x11xxxxxx0
fe811xxxxx0xx
v5xx000x11x1f9xx000xxxxx
fe10xx0xxx11x1
v6x0x01xxx1xf9xxx0xxxx1x
fe11x0x01xxxxx
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Independent Fault ClusteringIllustrative ExampleIllustrative Example
Cluster
After Mapping Essential Faults
After Mapping IFSsAfter Merging
Components
FaultFault Component
Fault Fault Component
Test Vector
1f30xxxxx0x10f30xxxxx0x1000x01x0x10
f60xx0xxxxxxf60xx0xxxxxx
f11x0x01xxxxxf11x0x01xxxxx
f20xxx1xxxx0
2f41xxxxxxx00f41xxxxxxx0010x1xx0000
f510x1xxxxxxf510x1xxxxxx
f7xxxxxxx00xf7xxxxxxx00x
f1xxx1xx0xxx
3f811xxxxx0xxf811xxxxx0xx11000xx0xx
f9xx000xxxxx
4f10xx0xxx11x1f10xx0xxx11x1xx0xxx11x1
IFS1={f1,f9}
IFS2={f2}
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Class-Based ClusteringPreliminariesPreliminaries
Conflicting Component (CC)A component c of a test vector t belonging to a test set T is called a CC if it is incompatible with every other test vector in T.
Degree of Hardness of a Test VectorA test vector is at the nth degree of hardness if it has n CCs.
Class of a Test VectorA test vector belongs to class k if its degree of hardness is k.
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Movable CCA CC ci is movable to a test vector t if the components in t incompatible with ci can be moved to other test vectors.
Candidate Test VectorsSet of test vectors to which the CC ci can be moved.
Potential Test VectorA test vector whose CCs are all movable.
Class-Based ClusteringPreliminariesPreliminaries
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Fault simulate T without fault dropping. Generate atomic components. Remove redundant components using fault
dropping simulation. Classify test vectors. Process class ZERO test vectors. Re-classify test vectors. Process class ONE test vectors. Re-classify test vectors. Process class i test vectors, where i > 1.
Class-Based ClusteringAlgorithm DescriptionAlgorithm Description
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For every test vector t: For every fault detected by t:
If f is essential Extract atomic component cf from t.
Else Decrement the number of test vectors detecting f by
one.
Component of a fault is extracted from a test vector that detects a large number of faults.
Class-Based ClusteringComponent GenerationComponent Generation
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Class-Based ClusteringBlockage ValueBlockage Value
),()(
)()(
1
jii
NumComp
i
i
tcCBMincCB
cCBtTVB
Blockage value of component ci
Number of class ZERO test
vectors blocked when ci is moved to
tj.
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Components of a test vector whose blockage value is ZERO can be moved without blocking any class ZERO test vector.
Blockage value MUST be updated after moving components.
Update Rules: If Scomp of a component is modified. If a test vector receives new components. If ci is in conflict with cj, Scomp(cj) modified, and
Scomp(cj) = 1.
Class-Based ClusteringBlockage ValueBlockage Value
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Class-Based ClusteringIllustrative ExampleIllustrative Example
Test Vecto
r
ClassFaultComponentSet of Compatible Test Vectors
v10f30xxxxx0x10{v6}
v20f1x0x1xxxxxx{v1,v5}
f41xxxxxxx00{v4}
f510x1xxxxxx{v5}
v30f60xx0xxxxxx{v1,v5,v6}
f7xxxxxxx00x{v2,v4}
v41f2x11xxxxxx0{v1,v3}
f811xxxxx0xx{}
v50f10xx0xxx11x1{v6}
v60f9xxx0xxxx1x{v1,v4,v5}
f11x0x01xxxxx{v1,v3,v5}
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Class-Based ClusteringIllustrative ExampleIllustrative Example
Test Vecto
r
ClassFaultComponentSet of Compatible Test Vectors
v20f1x0x1xxxxxx{v5}
f41xxxxxxx00{v4}
f510x1xxxxxx{v5}
v30f60xx0xxxxxx{v5,v6}
f7xxxxxxx00x{v2,v4}
v41f2x11xxxxxx0{v3}
f811xxxxx0xx{}
v51f10xx0xxx11x1{}
v61f9xxx0xxxx1x{v4,v5}
f11x0x01xxxxx{v3,v5}
f30xxxxx0x10{}
f6
f7
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Class-Based ClusteringIllustrative ExampleIllustrative Example
Test Vecto
r
ClassFaultComponentSet of Compatible Test Vectors
v20f1x0x1xxxxxx{v5}
f41xxxxxxx00{v4}
f510x1xxxxxx{v5}
v42f2x11xxxxxx0{}
f811xxxxx0xx{}
f7xxxxxxx00x{v2}
v51f10xx0xxx11x1{}
v61f9xxx0xxxx1x{v5}
f11x0x01xxxxx{v5}
f30xxxxx0x10{}
f60xx0xxxxxx{v6}
f1
f4
f5
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Class-Based ClusteringIllustrative ExampleIllustrative Example
Test Vecto
r
ClassFaultComponentSet of Compatible Test Vectors
v44f2x11xxxxxx0{}
f811xxxxx0xx{}
f7xxxxxxx00x{}
f41xxxxxxx00{}
v53f10xx0xxx11x1{}
f1x0x1xxxxxx{}
f510x1xxxxxx{}
v64f9xxx0xxxx1x{}
f11x0x01xxxxx{}
f30xxxxx0x10{}
f60xx0xxxxxx{}
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Test Vector ReorderingBottlenecksBottlenecksAlgorithm: Rorder
Using non-fault dropping fault simulation, set of all faults detected by each test vector is recorded.
Repeat the following steps until no test vector is left in T: Select a test vector ti from T such that ti detects the largest number
of faults. Remove ti from T and append ti to the end of the ordered test set T*,
which is initially empty. For each test vector tj in T, remove the faults detected by ti from the
set of faults detected by tj. Return T*.
● Fault simulation without fault dropping is time consuming.● Memory requirement is high since all faults detected by every
test vector are recorded.
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Double detection fault simulation A fault is dropped once it is detected twice.
Significant reduction in fault simulation time. Not all faults are considered by a test vector.
Memory is always 2xF. Impact on quality of final test sets
If average number of test vectors detecting a fault is much greater than two.
Test Vector ReorderingRecently Proposed SolutionRecently Proposed Solution
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Use of CRItical Path Tracing (CRIPT) as a fault simulator. Cost of fault simulation without dropping is the
same as that of fault simulation with dropping. Experimental results reported by the inventors show
that CRIPT is faster than concurrent fault simulation.
CRIPT does not solve the memory problem although it considers less faults.
Test Vector ReorderingOur Proposed Solution to Time Our Proposed Solution to Time ProblemProblem
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For i = 1 to n: Run CRIPT. Do not store faults. Store only the
number of faults detected by every test vector. Select the best m test vectors. Drop all faults detected by the selected test
vectors. Run algorithm Reorder. Use CRIPT as a
fault simulator.
Test Vector ReorderingOur Proposed Solution to Memory Our Proposed Solution to Memory ProblemProblem
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Experimental ResultsBenchmark CircuitsBenchmark Circuits
Cct# Inputs# Outputs# Gates# TVs# CFs# DFsFC
c267023314011931542747263095.741
c3540502216693503428289584.452
c531517812323071935350529198.897
s13207.1f70079079516339815966498.462
s15850.1f6116849772657117251133596.674
s208.1f18910478217217100
s3271f142130157225632703270100
s3330f172205178970428702870100
s3384f226209168524033803380100
s38417f16641742221791472311803100499.436
s38584f14641730192531174363033479795.852
s4863f153120234213247644764100
s5378f21422827793594603456399.131
s6669f322294308013866846684100
s9234.1f24725055976206927647593.475
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Experimental ResultsResults by RM, GC, and IFCResults by RM, GC, and IFC
CctROFRMGCIFC
# TVs# TVs# Comp# TVsTime (sec.)# TVsTime (sec.)
c2670106100761998.03966.95
c35408380657839.08838.98
c5315119106149111734.9510331
s13207.1f4762523516248339.93243169
s15850.1f4561814135169463.95144249
s208.1f333394330.009320.93
s3271f1157612126914.97617.02
s3330f277248126323311.012089
s3384f827510487315.01727.97
s38417f822187122151735327.31452072
s38584f8192321608621092501452590
s4863f65596075224.014925.96
s5378f252145146013034.9512323
s6669f524212864060.013537.91
s9234.1f3752022093185104.0117268.06
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Experimental ResultsResults by RM, GC, and IFCResults by RM, GC, and IFC
GC computes smaller test sets. As much as 11.9% smaller compared to RM. 1% for c2670; 9.5% for s38584f; 11.9% for s4863f.
Results by IFC are better compared to RM & GC. Improvement over RM:
3% for s208.1f – 37.5% for s38584f Improvement over GC:
1.4% for s3384f – 31% for s38584f Runtime of IFC is better than that of GC.
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Experimental ResultsSources of Time Consumption in IFCSources of Time Consumption in IFC
Building IFSs. Matching non-
essential faults.
CctTime (Sec.)
FSND
Mat. EFs
Build IFSs
Mat. Rem.Faults
Total
c26700.950.061.963.966.95
c35400.950.070.9778.98
c53151.931.03424.131
s13207.1f151061.9775169
s15850.1f231556.05151249
s3271f0.050.931.0657.02
s3330f1.040.9633.949
s3384f0.950.021.9757.97
s38417f877475311332072
s38584f8966121211892590
s4863f0.960.982.0521.9525.96
s5378f2.041.015.961423
s6669f0.960.958.0227.0437.91
s9234.1f95.061142.0268.06
Non-dropping fault simulation for large circuits.
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Experimental ResultsResults by Iterative IFCResults by Iterative IFC
CctIFCIterative IFC
# TVs# TVs# IterationsTime (sec.)
c26709685642.07
c35408375326.95
c531510386488.04
s13207.1f2432382473.12
s15850.1f1441291374.95
s208.1f323210.01
s3271f6160218.98
s3330f208196330.02
s3384f727217.07
s38417f14512023775.06
s38584f14512438217.08
s4863f4942370.88
s5378f1231176109
s6669f35304175.01
s9234.1f1721554200.93
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Improvement over RM: 3% - 46.6% e.g. 35.8% for s38417f
Improvement over IFC: 1.6% - 17.2% e.g. 14.5% for s38584f
Experimental ResultsResults by Iterative IFCResults by Iterative IFC
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Experimental ResultsResults by CBC (ROF+RM)Results by CBC (ROF+RM)
CctRMCBC
# TVs# TVsTime (sec.)
After Class 0After Class 1After Rem. Classes
c267010094949410
c35408078787813.02
c531510696969529.03
s13207.1f252243243243443
s15850.1f181147145145476.02
s208.1f333333330.01
s3271f7666656515.95
s3330f24822622322327
s3384f7572727211.02
s38417f1871461431435750
s38584f2321591531538813
s4863f5952525224.04
s5378f14512211711652
s6669f4237373750.1
s9234.1f202168166163136
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Experimental ResultsStatistics about Test SetsStatistics about Test Sets
Cct# Elim. Comp.
# TVsMaximum Degree of Hardeness
Class 0Class 1Class 1 Potential
c267018691246018
c35402263012023
c531537587721029
s13207.1f6219252150049
s15850.1f728318063439
s208.1f123022015
s3271f2090763917
s3330f1595194134521
s3384f236332403
s38417f19055186242470
s38584f20386232101041
s4863f4173581709
s5378f3085144171614
s6669f54264115013
s9234.1f441419464228
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Maximum reduction is 34%. 2.5% for c3540; 23.5% for s38417f; 34%
for s38584f.
Experimental ResultsResults by CBC (ROF+RM)Results by CBC (ROF+RM)
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Experimental ResultsSources of Time Consumption in Sources of Time Consumption in
CBCCBC Component
generation. Component
elimination. Blockage value
computation.
CctTime (sec.)
FSND
Comp. Gen
Comp. Elim.
TV Block.
Proc. Class 0
Peoc. Class 1
Total
c26700.0535.030.0010.0020.0110
c35400.965.037.02000.000113.02
C53151.017.0516.9411.960.00429.03
s13207.1f8.0126.921231742570.99443
s15850.1f9.0173.931771162006.91476.02
s208.1f0.0010.0030.00200.000010.00010.01
s3271f0.942.056.9345.020.0315.95
s3330f1.022.035.92714.01227
s3384f0.942.066.970.00050.0010.0111.02
s38417f205881102231029191195750
s38584f25.047301369409253402568813
s4863f0.0610.92120.11.030.000324.04
s5378f1.925191019.032.0552
s6669f0.0618.0325.964.9360.00250.1
s9234.1f41254.0224.0248.032.01136
Non-dropping fault simulation for large circuits.
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Experimental ResultsResults by CBC (ROF+IFC & Results by CBC (ROF+IFC & ROF+Iter_IFC)ROF+Iter_IFC)
CctROF+IFCROF+IFC+CBCROF+Iter_IFCROF+Iter_IFC+CBC
# TVs# TVsTime (sec.)# TVs# TVsTime (sec.)
c267096931085839.97
c3540837813.95757313
c53151037831.96867033
s13207.1f243239174238236180
s15850.1f144134248129126250
s208.1f32320.0132320.01
s3271f61599.98605810
s3330f20820111.931961887
s3384f727211727211.96
s38417f14512246841201113433
s38584f14512953221241213563
s4863f494424424225.96
s5378f12311337.9611711226.97
s6669f353543303044
s9234.1f1721568215514372
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ROF+IFC+CBC Maximum reduction is 23.5%. 16% for s38417f; 23.5% for c5315.
ROF+Iter_IFC+CBC Maximum reduction is 18.6%. 7.7% for s9234.1f; 18.6% for c5315.
ROF+IFC+CBC vs. ROF+RM+CBC 1.1% - 18%
ROF+Iter_IFC+CBC vs. ROF+RM+CBC 3% - 26.3%
ROF+Iter_IFC+CBC vs. ROF+IFC+CBC 1.3% - 14.3%
Experimental ResultsResults by CBC (ROF+IFC & Results by CBC (ROF+IFC & ROF+Iter_IFC)ROF+Iter_IFC)
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Experimental ResultsRuntimes spent by reordering Runtimes spent by reordering proceduresprocedures
Cct# TVs
Time (sec.)
GreedyDDCPTCPT+
s13207.1f63311.9714.043774
s15850.1f6572828166204
s38417f147280718318002569
s38584f117470212414102188
s5378f3591.971.126.0115
s9234.1f6208111738
● In Greedy, fault simulation is performed using HOPE.● In CPT, fault simulation is performed using CRIPT.● DD is run for four iterations.● In CPT+, n = 4 & m = 4.
● In Greedy, fault simulation is performed using HOPE.● In CPT, fault simulation is performed using CRIPT.● DD is run for four iterations.● In CPT+, n = 4 & m = 4.
Effect of non-dropping fault simulation on the performance of TVR procedures.
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Experimental ResultsMemory Required for CircuitsMemory Required for Circuits
Cct# Faults
Total Memory (bytes)Memory Reduction (%)
DDCPTCPT+DDCPT
s13207.1f981519630136494117886998.7
s15850.1f1172523450154622729359098
s38417f31180623609745991287771097
s38584f36303726069317334321100096.6
s5378f46039206353358559439.298.4
s9234.1f69271385464052516631097.4
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Experimental ResultsFault Coverage Curves for s5378fFault Coverage Curves for s5378f
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Experimental ResultsFault Coverage Curves for s38417fFault Coverage Curves for s38417f
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Experimental ResultsEfficiency of Reordering ProceduresEfficiency of Reordering Procedures
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Experimental ResultsEfficiency of Reordering ProceduresEfficiency of Reordering Procedures
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Conclusions & Future Research Contributions
Taxonomy of static compaction algorithms for combinational circuits.
Test vector decomposition. Efficient static compaction algorithms.
IFC CBC
Efficient test vector reordering algorithm. Future Work
Investigate the impact of CRIPT & DD on the quality of compacted test sets.
Consider reducing the complexity of non-essential fault matching in IFC.
Improve the current implementation of building the IFSs. Consider improving the time consuming phases in CBC.
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Publications Aiman H. El-Maleh and Yahya E. Osais, "Test Vector
Decomposition-Based Static Compaction Algorithms for Combinational Circuits", ACM Transactions on Design Automation of Electronic Systems, Special issue on VLSI Testing, pp. 430-459, vol. 8, issue 4, Oct. 2003.
Yahya E. Osais and Aiman H. El-Maleh, "A Static Test Compaction Technique for Combinational Circuits Based on Independent Fault Clustering", To appear in Proc. of the 10th IEEE Int'l Conference on Electronics, Circuits, and Systems, Dec. 2004.
Aiman H. El-Maleh and Yahya E. Osais, "A Class-Based Clustering Static Compaction Technique for Combinational Circuits", Submitted to ISCAS 2004.
Aiman H. El-Maleh and Yahya E. Osais, "On Test Vector Reordering for Combinational Circuits", Submitted to ISCAS 2004.
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Technique is NOT exact. Although v1 has a ZERO blockage value, it blocks
v2.
Class-Based ClusteringBlockage ValueBlockage Value
Test Vecto
r
ComponentSet of Compatible Test
Vectors
v1c11{v3}
c12{v4}
v2c21{v3,v4}
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Worst-Case AnalysisMethodologyMethodology
Test set, fault list, and circuit structure are given as inputs.
NT = No. of test vectors in given test set.
NPI = Size of a test vector.
NF = Number of faults in given circuit.
NG = Number of gates in given circuit.
Logic simulation of a test vector requires O(NG) basic operations.
Fault simulation of a test vector for a single fault requires O(NG) basic operations.
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Worst-Case AnalysisSpace Complexity of IFCSpace Complexity of IFC
O(NFNT)Storing the indexes of test vectors detecting every fault.
O(NPI)Storing a component when it is generated.
O(NTNPI)Storing test vectors of compatibility sets.
O(NF)Memory space required for building IFSs.
O(NT(NF+NPI))
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Worst-Case AnalysisSpace Complexity of CBCSpace Complexity of CBC
O(NFNT)Storing set of faults detected by every test vector.
O(NFNPI)Storing all components.
O(NT)Storing the indexes of compatible/candidate test vectors for every component.
O(NT)Storing blockage values for every component belonging to class zero test vector.
O(NF(NT+NPI))
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Worst-Case AnalysisTime Complexity of IFCTime Complexity of IFC
O(NFNTNG)Fault simulation without dropping.
O(NF)Finding essential faults.
O(NG)Extracting a single component.
O(NTNPI)Mapping a single component.
O(N2FN2
T)Computing IFSs.
O(NFlog2NF)Sorting IFSs.
O(NFNTlog2NT)Sorting test vectors detecting every fault.
• Dominating sources of time consumption:
• Computing IFSs = O(N2FN2
T).
• Matching non-essential faults = O(NFNT(NTNPI+NG)).
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Worst-Case AnalysisTime Complexity of CBCTime Complexity of CBC
O(NFNTNG)Fault simulation without fault dropping.
O(NTlog2NT)Sorting test vectors.
O(NFNG)Component generation.
O(N2FNG)Dropping redundant components using fault simulation with
dropping.
O(NF)Merging components.
O(NFNTNPI)Classification of test vectors.
O(N2FNTNPI)Computing blockage values for all class zero test vectors.
O(NFNT)Moving components to appropriate test vectors.
O(NFNTNPI)Updating Scomp for all components belonging to class zero test vectors.
O(N2FN2
TNPI)Updating blockage values for all class zero test vectors.
O(NFN2TNPI)Processing remaining class zero test vectors.
O(NT)Finding class i test vectors.
O(NFNPI)Computing Scand of a CC belonging to class one test vector.
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Worst-Case AnalysisTime Complexity of CBCTime Complexity of CBC
O(NFN2TNPI)Processing class one test vectors.
O(NFN2TNPI)Processing remaining classes.
• Dominating sources of time consumption in class zero algorithm:
• Computing blockage value = O(N2FNTNPI).
• Updating Scomp = O(NFNTNPI).
• Updating blockage values of components = O(N2FN2
TNPI).
• Dominating sources of time consumption in CBC:
• Component generation = O(NFNG).
• Component elimination = O(N2FNG).
• Blockage value computation = O(N2FNTNPI).