ekt 221 : digital 2 serial transfers & microoperations date : lecture : 2 hr

EKT 221 : Digital 2EKT 221 : Digital 2Serial Transfers & Serial Transfers & Microoperations Microoperations

Date : Date :

Lecture : 2 hrLecture : 2 hr

Serial Transfers & Serial Transfers & MicrooperationsMicrooperations

Serial transfersSerial transfers– Used for “narrow” transfer pathsUsed for “narrow” transfer paths– Example : Telephone or cable lineExample : Telephone or cable line

Parallel – to – Serial : at sourceParallel – to – Serial : at source Serial – to – Parallel : at destinationSerial – to – Parallel : at destination

Serial micro-operationsSerial micro-operations– Example 1 : AdditionExample 1 : Addition– Example 2 : Error – Correction for CDsExample 2 : Error – Correction for CDs

Parallel Serial Serial Parallel

Source Destination

Serial TransfersSerial Transfers

Serial mode Serial mode info is transferred / info is transferred / manipulated one bit at a timemanipulated one bit at a time

Serial transfer from RA to RB is done with Serial transfer from RA to RB is done with shift registersshift registers


Serial output (SO) of A connected with Serial output (SO) of A connected with serial input (SI) of Bserial input (SI) of B

SI of A receives 0’sSI of A receives 0’s Data from A transferred to BData from A transferred to B Initial content of B shifted out to SO of B Initial content of B shifted out to SO of B

and lostand lost


To maintain the data in A, connect SO of A To maintain the data in A, connect SO of A to its SIto its SI


ShiftShift determine when & how many times determine when & how many times the registers are shiftedthe registers are shifted

Clock pulse (Clock pulse (ClockClock) can pass to ) can pass to CC only when only when ShiftShift is HIGH (1)is HIGH (1)

Serial Micro-operationsSerial Micro-operations

Serial addition is a low cost way to add large Serial addition is a low cost way to add large numbers of operands, since a “tree” of full numbers of operands, since a “tree” of full adder cells can be made to any depth.adder cells can be made to any depth.

Other operations can be performed serially as Other operations can be performed serially as well, such as parity generation / checking or well, such as parity generation / checking or more complex error – check codes.more complex error – check codes.

Shifting a binary number left = multiplying by 2Shifting a binary number left = multiplying by 2– E.g E.g sl 0100 sl 0100 1000 1000

Shifting a binary number right = dividing by 2Shifting a binary number right = dividing by 2– E.g E.g sr 0100 sr 0100 0010 0010

Serial AdderSerial Adder The circuit shown uses 2 shift registers for operands The circuit shown uses 2 shift registers for operands

– A (3 :0)A (3 :0)– B (3:0)B (3:0)

A full adder, and one more FF (for carry) is used to compute the A full adder, and one more FF (for carry) is used to compute the sumsum

Result stored in A register and final carry in FFResult stored in A register and final carry in FF

Serial AdderSerial Adder

SI of B can receive SI of B can receive new inputsnew inputs

In each clock pulse / In each clock pulse / cycle :cycle :

– New sum bit is New sum bit is transferred to Atransferred to A

– New carry transferred New carry transferred to FFto FF

– Both registers shifted Both registers shifted once to the rightonce to the right

– Process cont. until Process cont. until ShiftShift = 0 = 0

Analyzing the circuit : Serial Analyzing the circuit : Serial AdderAdder

A3A3 A2A2 A1A1 A0A0 B3B3 B2B2 B1B1 B0B0 SUM SUM (A+B) (A+B) + Cin+ Cin

CouCoutt

CinCin

T0T0 11 00 00 00 00 11 00 11 00 00 00

T1T1

T2T2

T3T3

T4T4

Example 1:Reg A : 1000Reg B : 0101



CouCoutt

CinCin

T0T0 11 00 00 00 00 11 00 11 00 00 00

T1T1 11 11 00 00 00 00 11 00 11 00 00

T2T2 00 11 11 00 00 00 00 11 00 00 00

T3T3 11 00 11 11 00 00 00 00 11 00 00

T4T4 11 11 00 11 00 00 00 00 11 00 00

ANSWER : 1101, after 4 clock cycle



CouCoutt

CinCin

T0T0 11 00 11 11 00 11 00 11 00 00 00

T1T1

T2T2

T3T3

T4T4

Example 2:Reg A : 1011Reg B : 0101



CouCoutt

CinCin

T0T0 11 00 11 11 00 11 00 11 00 00 00

T1T1 00 11 00 11 00 00 11 00 00 11 00

T2T2 00 00 11 00 00 00 00 11 00 11 11

T3T3 00 00 00 11 00 00 00 00 00 11 11

T4T4 00 00 00 00 00 00 00 00 00 11 11

ANSWER : 10000, after 4 clock cycle

1 is indicated in Cout

Parallel AdderParallel Adder

FAA0B0Cin

FAA1B1

FAA2B2

FAA3B3 Cout

S0

S1

S2

S3

Reg A

Sin

Sout

A0A1A2A3

Reg B

Sin

Sout

B0B1B2B3

Can be the input for Reg A

Serial Vs Parallel TransfersSerial Vs Parallel Transfers Space Vs Time Trade-offSpace Vs Time Trade-off Serial adder is a seq. cct because it Serial adder is a seq. cct because it

includes the carry from FF. but need includes the carry from FF. but need nn clock cycle to complete the addition (Less clock cycle to complete the addition (Less Space, more Time)Space, more Time)

Parallel adder is a comb. cct because it Parallel adder is a comb. cct because it needs needs nn FA for FA for nn bit operation. Need only bit operation. Need only one clock cycle to complete the addition. one clock cycle to complete the addition. (More Space, less Time)(More Space, less Time)

Gives the designer choice.Gives the designer choice.– More Space – More costMore Space – More cost– More Time – More delay (not fast)More Time – More delay (not fast)

Thank YouThank You

ekt 221 : digital 2 serial transfers & microoperations date : lecture : 2 hr

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