electronics ii
TRANSCRIPT
ELECTRONICS II
Engr. Ryann AlimuinINSTRUCTOR
BJT Modelings• 2 models
1. RE Model
2. Hybrid Model
Model – is the combination of the circuit elements properly chosen that best appropriate the actual behavior of the semiconductor devices under specific operating condition.
Steps in getting the AC Equivalent Circuit
• Set all the DC source to zero and replace them by a short circuit equivalent.
• Replace all the capacitors by a circuit equivalent.• Remove all the elements bypassed by the short circuit
equivalent introduced by steps 1 and 2.• Redraw the networks In a more convenient and logical
form.
1. Input Impedance, Zi
• for small signal analysis, once the input impedance has been determined the same numerical value can be used for changing levels of applied signals.
• The input impedance of a BJT amplifier is purely resistive in nature and depending in the manner in which the transistor is employed, can vary form a few ohms to mse.
Note:
An ohmmeter can be used to measure the small signal ac input impedance since the ohmmeter operates in dc mode.
2. Output impedance, Zo
• The output impedance is determined at the output terminals looking back into the system with the applied signal set to zero.
3. Voltage Gain – Av
• One of the most important characteristics of an amplifier is the signal AC voltage gain as determined by
• Condition is if Rl is approaching infinity.
• AVNL – No Load Voltage Gain
• The load has not been converted to the output terminals• • For Transistor amplifiers , The no load voltage gain is
greater than the loaded voltage gain
Depending on the configuration, magnitude of the
voltage gain for a loaded single stage transitive amplifier
typically ranges from just less than 1 to a few hundred.
A multi-stage system, however can have a voltage gain in
thousands.
4. Current Gain- Ai
• For BJT Amplifier, the current typically range from a level , just less than 1 to a level that may exceed 100
• Voltage gain
Example:•Vi•Zi•Avnl•Avs (A.)Vi
Vs-IiRs-Vi=018mV-(10µA)(.65KΩ)-Vi
Vi= 11.5mV
(B.)ZiZi=Vi/Ii
=11mV/10mA=1.15KΩ
(C.) Avnl
Avnl=Vo/Vi
=3.6V/11.5mV
=313V
(D.) Avs
= Vo/Vs
=3.6/18mV
=200V
Systems Approach
• Effects of Rs and Rl
• Using Voltage Divider
Example
In the figure , a load impedance has been applied to the fixed bias transistor amplifier.Determine Av and Ai using two port systems. Determine Av and Ai using the RE Model and compare results.
• Rc= Ro• Ro=10.71• Avnl= -280.11• Zi= 1.071KΩ• Zo= 3KΩ
• Av using current divider theorem
2. For prefixed bias,
Determine:
A. Avnl,Zi and Zo
B. Sketch the two port model and parameters
C. Calculate Av.
D. Determine Ai
E. Calculate Av and Ai using AC analysis
• DC Analysis
• (B.)Sketch two port model and parameter• (C.)Calculate Av
• (D.)Determine Ai
• (E.)Calculate Av and Ai using AC Analysis
Effects of Source Impedance (Rs)• - the effect of an internal resistance on the gain of the
amplifier • - The parameter Zi and Avnl of a two port system are
unaffected by an internal resistance of the applied source.
• In Fig. A source w/ an internal resistance has been applied to the fixed bias transistor
• Determine the voltage gain Avs= Vo/Vs.What % of the applied signal
• Determine the voltage gain Avs= Vo/Vs using the RE model
DC Analysis
Combined Effects Of Rs and Rl
• A source of Rs and a load Rl have been applied in a two port systems for which the parameters Zi, Avnl, and Zo have been specified.
• Assume Zi and Zo are unaffected by Rl and Rs
• Using Voltage Divider Bias
• Example.
For a single stage amplifier with Rl= 4.7KΩ and Rs= 0.3KΩ.
BJT And JFET Frequency Response
• Logarithms
• Example. B=10 , X= 2
Decibels
• the relationship of logarithms to power and audio levels.
• the term (BEL) was derived from the surname of Alexander Grahambell.
Power = 10• Voltage = 20• Current = 20
Examples.
1.) Find the magnitude gain corresponding to a decibel gain of 100.
2.) The input power to a device is 10000v at avoltage of 1000v. The output power is 500w, while the output impedance is 20Ω.
• (a.)Find the power gain dB
• b.)Find the voltage gain in dB
CASCADED AMPLIFIER
AVT= (Av1)(Av2)
V4.77V
15KΩ4.7KΩ
4.7KΩ20V
RR
R VV
21
2
ccTH
3.58KΩ15KΩKRTH //7.4
A(201)1KΩ3.58KΩ
0.7V4.77V
1)R(βR
VVI
ETH
BETH
B 89.19
3.94mAμA(201)19.89IE
6.50Ω3.94mA
26mVre
953.69ΩΩ)(200)(6.50KBRZ reTHi //58.3//
102.3346.50Ω
953.69ΩK
re
ZiRcAv1
//2.2//
mVVAvVo i11 56.225334.102
338.466.50Ω
2.2KΩ
re
RcAv2
34,635338.46)102.334)((ΑvΤ
865.9mVV)5(34,635)(2ViAVo VT2 If a 10KΩ resistor is connected across the output. What is Vi?
709.75mV856.9mV2.2KΩ10KΩ
10KΩVo
RCRL
RLVi
JFET(JUNCTION FIELD EFFECT TRANSISTOR)
A type of FET that operates with a reversed-biased junctio.n to control current in a channel.
GM= Forward transconductance change in drain current
for a given change in rate to source voltage
with the drain to source voltage constant. DI GSV
2
GS(OFF)
GS
DSS
GS
B
V
V1IIB
SIEMENSΔV
ΔIGM
gm or Forward Transfer Admittance
DEPLETION MOSFET ( D-MOSFET)- The drain & source are diffused into the substrate material & then connected by a narrow channel adjacent to the insulated gate.
||V
2Igm
V
V1gmgm
GS(off)
DSS
o
GS(off)
GS
o
n-channel-operates in the depletion mode when a negative gate-to-source voltage is applied & in enhancement mode when a positive gate to source voltage is applied
FET AMPLIFIERS
AC Equivalent
gmRs1
gmRdAv
2
GS(Off)
D
SDSD
V
RsI1II
RsIV DGS
FET EQUIVALENT CIRCUIT
If no RL: Id
gmIdRd
gmId
IdRd
V
Vout
Vo
ViAv
Gs
gmRDAv
gmRdAv
Internal Drain Resistance
Effects of the source resistance on gain
By KVL:
)gm(rds//RdAv
)//Rgm(rds//(RAv CD
IdRdVo
IdRsVgsVi
IdRsVgsVi
0
( If there is Rs )
gmRs1
gmRdAv
IdRsgmId
IdRd
IdRsVgs
IdRd
Vi
VoAv
gmRs1
gmRdAv
Example: Bypassed source Resistance
D
LO
gmRAv
)//Rgm(RAv
RdZo
RZi G
gmRs1
gmRdAv
Example: The JFET has a gm=4mS w/ external ac drain resistance of 1.5K Ω , is the ideal voltage gain?
-6Av
4mS(1.5KAv
gmRDAv
)
Example: An FET equivalent circuit is shown. Determine the volatage gain when the output is taken across Rd.
1.852Av
4mS(560Ωm1
4mS(1.5KΩm
gmRs1
gmRAv
D
JFET SELF-BIAS CONFIGURATION
AC Analysis
yosrd
1
yos
1rd
Example: The fixed bias configuration has an operating point defined by VGSQ=-2V and
IDQ=5.625mA with IDSS=10mA & Vp=-8V, The network should be redrawn w/ an applied signal Vi. The Value of yos is provided as 40µS.
Calculate:
a. gm e. Av
b. rd f. Av if rd is IGNORED
c. Zi
d. Zo
Circuit Diagram
d.)2KΩ
c.)1MΩ
25KΩ40μ0
1
yos
1b.)rd
1.875mS8
212.5mgm
2.5mS8
0.02
//V
2Ia.)gm
p
DSS
o
75.3)2)(875.18(.)
475.3
)25//2)(875.1()//(.)
KmSAvf
KKmSRdRDgmAve
CASCODE CONNECTION (BJT)
- Cascode Connection has a transistor on top or in series with another.-A Common Emitter ( CE ) stage feeding a Common Base
(CB ) stage
Ex.Calculate the Av for the cascode amplifier
6.74Ω3.86mA
26mV
Ie
26mvre
3.86mA1.1KΩ
0.74.95
R
VVI
0RIVVusing:
10.89V6.8KΩ4.7KΩ5.6KΩ
4.7KΩ.18v(5.6KΩ
RRR
)RVcc(RVB2
4.95V18V6.8KΩ5.6KΩ4.7KΩ
4.7KΩVcc
RRR
RV
E
BEB1
E
EEBEB1
B3B2B1
B3B2
B3B2B1
B3
B1
sdsdsdsds
267.29267.29(1)))(A(AA
267.296.74KΩ
1.8KΩ
re
RcA
1re
re
re
RcA
V2V1VT
V2
V1
Darlington Connection- A super beta transistor-The composite transistor acts as a single unit with a current gain that the product of the current gain of the individual transistor.
if
21 D
2
21
D
What current gain is provided by a darlington connection of two identical transistor each having a current gain of
200
000,40
20022
D
D
EEE
BDE
BEEB
EBB
BECCB
EBBBEcc
EBBeBBcc
EEBeBBcc
RIV
II
VVV
RR
VVI
RRIVV
RIVRIV
RIVRIV
1
0)1((
0)1(
0
DC Bias of a darlington circuit
Calculate the dc bias voltage and current ECCB VVII ,,,
VV
IV
RIVV
VV
mARIV
mAI
AIII
AI
MRBR
VVI
CC
CCC
CCCCC
E
EEE
C
BDEC
B
EDB
BECCB
18
0
957.7
390403.20
403.20
55.2180001
55.2
39080003.3
6.118
VVBE
D
6.1
8000
AC equivalent circuit
- For a darlington emitter-follower the ac input signal is applied to the base of the darlington transistor through capacitor C1. with the ac output Vo obtained from the emitter through capacitor Cr
- The darlington transistor is replaced by an ac equivalent circuit composed of an input resistance, ri and an output current source BDIB
BDI
EDBO
DRBO
EDEBO
EEDEBO
OiBC
RIV
RIV
RRIV
RIRIV
VrIV
1
0
0
BEDi
BDi
DEiB
B
i
B
i
oD
BDBo
i
B
B
o
i
oi
DEiBi
DEiB
i
DEiBi
DEBiBi
oiBi
RRr
RA
RrR
R
I
I
I
I
III
I
I
I
I
I
IA
RrRZ
RrI
V
RrIV
RIrIV
VrIV
)//(
0
If ri is so small if not given = 0
BED
BDi RR
RA
VVBE
D
6.1
8000
4112
3.3)390(8
)3.7)(8(
61.1Z
)390)(8(5//3.3Z
5r if impedanceinput theCalculate
i
i
i
i
i
A
Mk
MkA
M
kkM
k
1
0given not is r i
v
EDi
EDv
EDiB
EDB
i
ov
A
if
Rr
RA
RrI
RI
V
VA
998.0A
)390)(8000(5
)390(8000A
Av Calculate
v
v
k
Feedback Pair
2121
2222
1111
CCCEC
EBC
EBC
IIIII
III
III
180
140
2
1
CB
EBB
CBBEB
BBCBEB
BBEBCB
BBEBCC
RR
VI
RRIV
RIRIV
RIVRI
RIVRI
21
CC1
21CC
21CC
21CC
CC
V
V
V
0V
0V
:KVLby
Calculate the dc bias current and voltages
AI
MRR
VVI
B
CDB
EBCCB
465.4
)75)(180)(140(2
7.18
1
1
mAI
mAAIII
mAI
AI
AI
III
C
CCC
C
C
C
BBC
143.113
518.1121.625
518.112
1.625180
1.625
)465.4(140
21
2
2
1
1121
VV
VVV
VVV
VV
mA
RIVV
dci
EBodc
i
oEBdc
i
dco
CCCCdc
o
81.8
7.051.9
0
51.9
)75)(143.113(18
)(
)(
)(
)(
\)(
AC Operation
11 BI 22 BI
BCi
CB
o
CBo
CB
CB
CBBo
CBBCCo
RRZ
RI
V
RIV
RI
RI
RIIV
RIIRIV
//
1
21
211
22
211
211
11121
1122
211
211
211
211
1121
111112
11122
1
11
1
B
o
Bo
B
B
B
BBB
BBBo
I
I
II
I
I
I
III
IIII
iC
CV
iBCB
CBoV
iBiiBoiB
Bi
i
B
B
oi
iB
B
i
B
rR
RA
rIRI
RIVA
rIVrIVZR
RA
I
I
I
IA
ZR
R
I
I
21
21
21
21
i
oi21
V
V , V
Calculate the ac circuit values of Zi , Zo and Av and Ai assume that ri = 3kΩ
KZ
MZ
i
i
72.971
2//)75)(180)(140(180
140
2
1
048.119
)180)(140(
3
)180)(140(
o
io
Z
KrZ
88.1695929.9712
)2)(140(180
KM
MAi
9998.03)750)(180)(140(
)750)(180)(140(
KAV
Differential Amplifier Circuit
-If an output signal is applied to either input with the other input connected to ground, the operator is referred to as “single ended”.
-If two opposite polarity input signals are applied, the operation is referred to as “double-ended”.
-If the same input is applied to both inputs, the operator is called “common mode”.
-In double ended operation two input signals are applied the difference of the inputs resulting in outputs from both collectors due to the difference of the signals applied is both input.
- In common-mode operation, the common-input signal results in opposite signals to each collector, these signals canceling so that the resulting output signal is zero.
- The main future of the differential amplifier is the very large gain when opposite signals are applied to the inputs as compared to the very small gain resulting common inputs.
Common-mode rejection ratio- ratio of the difference gain to common gain DC bias.
2E
C
II
0BVE
EEEE
EEEEE
R
VVI
VRIV
0
7.0
E
BEE
BEBE
V
VV
VVV
CE
CCC
CCCCC
RI
VV
RIVV
2
Solve for Ie and Vc
mVIK
I
E
E
515.23.3
)7.0(9
VV
Km
V
C
C
096.4
)3.3(2
515.29
Single Ended
11 BI 22 BI
eii
iii
BBB
rZr
rrr
III
21
21
i
iB
iBi
iBiBi
r
VI
rIV
rIrIV
2
02
0
e
CV
i
C
i
OV
Ci
iO
CBO
CCO
BC
r
RA
r
R
V
VA
Rr
VV
RIV
RIV
II
2
2
2
Calculate the single ended output voltage = Vo
AK
I
R
VVI
E
E
EEEE
02.19343
7.09
mAI
II
C
EC
51.962
02.193
2
39.26951.96
26
mA
mVre
mVV
mVV
VAV
KA
o
o
iVo
V
56.174
)2(23.87
23.87)39.269(2
47
Low Frequency Reponse- BJT Amplifier
• Effect of Cs on low frequency response
• Getting AC Equivalent
• Effect of Cc on the Low Frequency Response
Low Frequency Response
• Can be establish for each capacitive element and the frequency at which the output voltage drops to 0.707 of its maximum value
• -3db drop in gain from the midband level w hen f=f an RC network will determine the low-frequency cut-off frequency for a BJT transistor, f will be
• Example.– Determine the lower out off frequency using:
– Solution:
OP-AMP BASICS
• A very high gain differential amplifier with very high input ompedance and low output impedance.
1. Provide voltage amplitude amplitude changes
2. Oscillators
3. Filter circuits
4. Instrumentation circuit
• Single-ended input (mode)– Results when the input signal is connected to one
input with the order input connected to the ground.
• Differential mode, two opposite-polarity(out of phase signals are appliedto the inputs. Refered as double-ended).
• Common mode input voltage range– Range of input voltages which, when applied to both
inputs will not cause clipping or other output distortion.
• Input offset voltage– Differential dc voltage required between the inputs to
force the output to zero volts.
• Input offset voltage drift– Specifies how much change occurs in the input offset
voltage for each degree change in temperature.
• Input bias current– DC current required by the inputs of the amplifier to
properly operate the first stage.
• Input impedance ( Differential input impedance )– Total resistance between the inverting and non-
inverting inputs.
• Input offset current– Difference of the input bias currents.
• Output impedance– Resistance viewed from the output terminal.
• Double Ended Differential Input
• Double Ended output
• Common Mode Operation– Two inputs one equally amplified and since they result
in opposite polarity signals at the output, these signals cancel and results in 0V output.
• CMR ( Common Mode Rejection )
– Amplifier the difference signal while rejecting the common signal at the two inputs.
Common and Differential Mode Operation
• Differential Inputs– difference of the two signals.
• Common Input– Average of the sum of the two signals.
• Output Voltage
• CMMR – Common Mode Rejection Ratio
• The output for Vo
• Example.– Determine the output voltage of an op-amp for input
voltage of Vi=150μV, Vi2=140μV. The amplifier has a differential gain of Ad= 4000 and CMRR is
(a)100
(b)10^5
Solution:
• Slew Rate– Maximum rate of change of the output voltage in
response to a step input voltage.
• Negative Feedback– The inverting (-) input effectively makes the
feedback signal 180 degrees out of phase with the input signal.
• Closed-Loop Voltage Gain, Acl– Voltage gain of an op-amp with external feedback.
• Non-Inverting Amplifier– Op-amp connected in a closed-loop configuration.
• Example.– Determine the gain of the amplifier. The open-loop
voltage gain of the op-amp is 100,000.
– Solution:
• Voltage Follower– A special case of a non-inverting amplifier where all of
the output voltage is fed back to the inverting (-) input by a straight connection.
• Inverting Amplifier– Configuration where there is a controlled amount of
voltage gain.
• Example.– Given the op-amp configuration determine the value
of Rf required to produce a closed-loop voltage gain of -100.
– Solution:
• Impedance of Non-Inverting Amplifier– Input impedance
– Output impedance
• Example.– Determine the input and output impedance of the
amplifier . The op-amp datasheet gives Zin=2MΩ, Zout=75Ω and Acl= 200,000.
– Solution:
BASIC OP-AMP CIRCUITS
• Comparator– To determine when an input voltage exceeds a
certain level the (-) inverting input is grounded to produce a zero level and that the input signal voltage is applied to the non-inverting (+) input.
• Non-Zero Level Detection
– The zero level detector can be modified to detect voltages other than zero by connecting a fixed reference voltage source to the (-) inverting input.
• Example. The input signal is applied to the comparator circuit make a sketch of the output showing its proper relationship to the input signal. Assume the maximum output levels of the op-amp are 12V.
• Summing Amplifier– Has two or more inputs, its output voltage is
proportional to the negative of the algebraic sum of its input voltages.
• Summing Amplifier with Unity Gain
• Example.– Determine the output voltage.
• Summing Amplifier with Gain Greater than Unity.
Since
• Example.– Determine the output voltage for the summing
amplifier.
– Solution :
• Averaging Amplifier– A summing amplifier can be make to produce the
mathematical average of the input voltages. This is done by setting the ratio equal to the reciprocal of the number of inputs(n).
• Example.– Show that the amplifier produces an output whose
magnitude is the mathematical average of the input voltages.
– Solution :
• Scaling Adder
– Example. Determine the weight of each input and the output voltage.
• Solution:
• Multiple-Stage Gain
• Example– Determine the output voltage using the circuit for
resistor components of value Rf = 470kΩ, R1= 4.3kΩ, R2 = 33kΩ, and R3 = 38kΩ for an input of 80μΩ
• Voltage Subtraction
• Example.– Determine the output for the circuit with components
Rf= 1MΩ, R1= 100kΩ, and R3= 500kΩ.
solution:
Submitted by:
Octavo, Antonio
Pasquile, Ronald
Pineda, John
Ricarde, Julius Clarrence Ricarde B.
Rogador, Mark
Trinanes, Nomeer
EC32FB1