embedded real-time control for dc multi-converter … 2/issue 1/ijeit1412201207_70.pdf · embedded...

ISSN: 2277-3754 ISO 9001:2008 Certified

International Journal of Engineering and Innovative Technology (IJEIT)

Volume 2, Issue 1, July 2012

373

Embedded Real-Time Control for DC Multi-Converter

Systems

M. M. Abdel Aziz, A. A. Mahfouz, D. M. Khorshied

Abstract—Tightly regulated closed-loop converters are

problematic when used as a load since they tend to draw constant

power and exhibit negative incremental resistance. This negative

resistance causes stability problems for the feeder system,

whether it is an input filter or another converter. In multi-

converter systems, there are many converters loaded by others.

Therefore, the destabilizing effect of the load converters, which

are considered constant-power loads (CPLs), is a major issue. In

this paper, a novel nonlinear feedback control algorithm

“Enhanced Modified Pulse Adjustment” is introduced. This

technique is used to compensate the destabilizing effect of CPLs.

xPC Target Turnkey is used for real-time testing and validation

of the proposed controller design. Analytical, as well as real-time

power hardware-in-the-loop (PHIL) simulation results of the

controller rapid prototyping achieved constant output voltage

regulation, while maintaining the system stability under different

operating conditions sudden changes.

Index Terms — CPLs, Multi-converter systems, Negative

impedance instability, PHIL.

I. INTRODUCTION

Feeding CPLs may impact the stability and dynamics of

the power electronic converters/systems in automotive and

electrical distribution systems. Because of the nonlinearity

and time dependency of converters and motor drivers, and

because of the negative impedance destabilizing

characteristics of CPLs, classical linear control methods

have stability limitations around the operating points and

are not applicable to these systems. Therefore, digital and

nonlinear stabilizing control methods must be applied to

ensure large-signal stability [1] - [18]. In this paper, a novel

digital control ―Enhanced Modified Pulse Adjustment‖

control technique is introduced and applied to the feeder

converter, which operates in discontinuous conduction

mode (DCM) and drives either CPLs or constant voltage

loads (CVLs) [19].

This control approach treats the converter as a digital

system and achieves output-voltage regulation based on

applying high power pulses (DH) of duty cycle ranges

within DH_L to DH_U, and low power pulses (DL) of duty

cycle ranges within DL_L to DL_U. These upper and lower

limits of DH and DL; DH_U, DH_L, DL_U, and DL_L are

calculated each sampling cycle. The feeder converter is

designed to deliver an output power ranges between Pmin

and Pmax, when its input supply voltage varies between

Vin_min to Vin_max.

Also, this control algorithm evaluates the required duty

cycle (dcal) to achieve the desired output voltage regulation.

The controller chooses to apply this dcal between the limits

of either DH or DL according to the difference between Vo

and Vref. Henceforth, if the measured output voltage (Vo) is

less than the desired value (Vref), the controller chooses to

apply this dcal between DH limits, to increase the amount of

energy delivered to the load. Such that; if DH_L ≤ dcal ≤

DH_U , then the controller will generate dcal, else generates

DH_U. These power pulses are generated sequentially until

reaching the desired output voltage level.

Similarly, when Vo is greater than Vref, the controller

applies dcal between DL limits, to decrease the transferred

energy to the load. Such that; if DL_L ≤ dcal ≤ DL_U then

the controller will generate dcal, else generates DL_U.

The main objective of combining between conventional

PWM techniques in calculating (dcal) and applying it within

limits of either high or low power pulses is to reduce the

output voltage ripples by smoothly reach the desired voltage

level. For large differences between Vo and Vref, the

controller will apply the high or low pulses limits to rapidly

reach Vref value. Then for small differences between Vo and

Vref, the controller generates dcal. Hence, dcal value is used

for fine tuning of the output voltage around Vref, to reach

and keep the desired output voltage value with minimum

ripples.

Therefore, the digital control task is to deliver right

amount of energy to the load by right numbers of state

operations, so the average power delivered matches the

required load power [20]. It relies on simple concepts of the

waveform shaping of the inductor current of the power

converters.

Stability analyses, controller design procedures and

design constraints, as well as real-time power-hardware-in-

the-loop (PHIL) simulation results are depicted for the

feeder buck converter using xPC Target Turnkey. The

system dynamic response under various step changes in the

reference voltage, the input supply voltage, and loading

conditions are studied. Moreover, a comparison between

the proposed controller and previous designs is introduced

to depict the contribution of the proposed control algorithm.

II. MERITS OF THE NOVEL PROPOSED DIGITAL

CONTROL TECHNIQUE

The novel proposed digital control technique features the

following merits:

1- Line and load regulations are simply achievable for

CPLs & CVLs.

2- Fast and smooth dynamic response for a wide

range of operating conditions changes

3- Applicable to all power-electronic converters;

either conventional or integrated topologies loaded by

different load types [5], [7], [13], [14].




374

4- Simple, low cost and ease to develop, using DSPs

or ASIC, as it needs few logic gates and comparators to be

implemented.

5- Robust against variations of the power converter

parameters. Thus handles the actual DC/DC converters

nonlinearities.

6- It is efficient to be used in the advanced

applications which include large number of multi-

converter power systems.

III. STABILITY ANALYSIS OF BUCK

CONVERTER IN DCM

The multi-converter power system is simply

represented by two cascaded levels of DC-DC buck

converters as shown in Fig. 1.

The average inductor current

(1)

Fig. 1 Switching Period of a Dc-Dc Converter in DCM

When the inductor at the charging mode, during ton = d TS:

∵ (2)

& When the inductor at the discharging mode, during tD:

∵ (3)

At steady state conditions, of which our always

consideration, and interest of study not in transients, the

inductor discharging current equals to the inductor charging

current.

(4)

Subst. in

(5)

So,

(6)

(7)

Since the input current increases linearly with the on-time

of the switch, the energy, which is drawn from the input-

power source is equal to

(8)

Duty cycle calculations ( :

In the buck dc/dc converters during the time intervals tonH

= dHT, diode is off; therefore, the output capacitor

discharges through the load, and the magnitude of the

output voltage decreases. During ton = d TS, using the

Kirchoff’s laws, one can write

Solving the differential equation earlier, output-voltage

variations of a buck–boost converter during tonH and tNH in a

high power cycle can

(9)

So, the calculated duty cycle is evaluated as;

(10)

This relationship ensures that any changes in Vo & P

(loading conditions) reflect its direct effect on the duty

cycle. Also the supply input voltage changes indirectly

affect the duty cycle through P & Vo. So, the controller

decides the appropriate switching pattern to regulate the

output voltage.

IV. ENHANCED MODIFIED PULSE

ADJUSTMENT CONTROL ALGORITHM

Ref. [19] proposes the design, verification, and validation

processes of this control algorithm. Nevertheless, the flow

chart of the Enhanced Modified pulse adjustment control

method can be described as follows:

1- Enter the input parameters, such as; Vref, Vin_min,

Vin_max, Pmin, Pmax, fS, Ts and L, C, of the feeder converter.

Fig. 2 Multi-Converter System Prototype Block

diagram




375

2- For each sampling cycle:

1. Measure Vo, io, iL, Vin of the feeder converter.

2. Calculate the operating converter duty cycle, such

that; .

3. Calculate the feeder converter input power using

eq. (8).

4. Output power is equal to the input power,

neglecting the losses, hence assuming 100% power

converter efficiency. Evaluate the required duty cycle "dcal"

is calculated using eq. (10).

5. Using eq. (8), each of DH & DL upper and lower

limits (DH_U , DH_L , DL_U , and DL_L) are calculated each

sampling cycle according to Pmin, Pmax, Vin_min, and Vin_max

such that:

&

(11)

&

(12)

6. According to the error voltage sign; Ve = Vref - Vo ,

the controller chooses to apply " " within the limits of

high power pulses ( ) or Low power pulses

( ).

7. If Ve is positive, so the delivered energy to the

load must be increased. Hence, the controller decides to

apply DH limits. Hence ― ‖ will be limited within DH_U &

DH_L values. Else, the controller decides to apply DL limits,

so " ‖ will be limited within DL_U & DL_L values.

8. These pulses are sequentially applied until the

desired reference voltage is obtained at the output voltage.

V. DCM OPERATION CONSTRAINT

To ensure DCM, the inductor discharge current should be

less than or equal the inductor charging current.

Hence, in order to ensure in the DCM operating

condition, DH_U should not exceed , which is

evaluated as described below:

(13)

For the high power pulses, considering the DCM

constraint limits their values between VCH_L & VCH_max.

Hence in this case the controller may skip evaluating VCH_U

value so save its speed.

VI. EXPERIMENTAL SETUP

The enhanced modified pulse-adjustment control

algorithm was employed to the feeder buck converter. This

converter is loaded with a CPL, represented as tightly

regulated buck converter feeding a resistive load. The

controller of the buck load converter is a conventional PI

controller, implemented using TL494 PWM [21]. The

proposed control algorithm is implemented and tested in

real-time using the xPC target turnkey, as illustrated in Fig.

5. Experimental work was done in Science & Technology

Center of Excellence (STCE) in Automatic Control

Laboratory.

Using the derived formulation in the previous sections, a

prototype conventional dc-dc feeder converter of a step

down buck converter power supply with Vin_min = 5V to

Vin_max= 20V, Pmin = 0.1W to Pmax= 30W.

MATLAB / Simulink is used to simulate the Enhanced

Modified pulse adjustment control technique. Both feeder

and load buck converters are electrically modeled using

"SimPowerSys" toolbox [19]. Table 1: The Proposed Feeder Buck Converter Parameters

Variable Parameter Value

Vin (V) Input voltage 15

Vref (V) Reference output voltage 8




376

fS (kHz) Switching frequency 6.25

L (µH) Magnetizing inductance 428

C (µF) Output filter capacitance 330

The sampling frequency is 30 kHz, as the switching

frequency (fs) of the feeder buck converter is 6.25 kHz and

of the load buck converter is 5 kHz. The output control

voltages of the controller will be limited within 0.15V to

3V, which is the practical VC range of TL494 PWM chip as

shown in Fig.5.

VII. EXPERIMENTAL RESULTS

The following experimental results illustrate the

negative impedance characteristics of the tightly regulated

load converter, the design constraints of the controller

parameters. Also, the system dynamic response under step

changes of the reference voltage, the input voltage and the

loading conditions are depicted.

a) CPL CHARACTERISTICS:

Fig. 7 illustrates the incremental negative impedance

characteristics of this load are obviously clear. It is obvious

that increases as the V increases. This is the indicated

feature of CPLs, that impacts the power quality and stability

of the multi-converter systems.

b) DESIGN CONSTRAINTS

For a load of 5W average power, experimental results are

introduced to indicate the appropriate limits for the

Controller input parameters, such as; Pmax, Pmin and

Vin_min. It is worth to mention that the TL494 PWM closed

loop controller of the load buck converter operates for an

input voltage ranges from 7V – to – 40V. Hence it appears

as a CPL at the feeder converter input terminals; exhibits

negative incremental impedance characteristics ;

Fig. 5 Fully Assembled, Power Hardware-in-The-Loop (PHIL) Real-Time Testing For Rapid

Controller Prototyping Using Xpc Target

Fig. 7 Practical Load Negative Impedance Characteristics

Of CPL at Fs = 5 Khz




377

only within this voltage range. Else, the load converter will

be considered as a conventional CVL not a CPL. This is

represented by the case of Vo = 6V, to validate the proposed

controller operation in achieving output voltage regulation

for both loading cases; CVLs and CPLs.

1- Pmax Limitations

Set Pmin = 0.1W, Vin_min = 5V, Vin_max = 20V.

For Pload = 5W; it is observable from Fig. 8 that when Vo

= 8V,

Fig. 8 Effect of Pmax Limits on the Feeder Output Voltage

So Pmax should be at least 15W to deliver the right amount

of energy to the load. I.e., Pmax ≥ 3PLoad , as the load

requires to sink 0.584A from the feeder converter. So the

controller increases the DH limits to increase the energy

delivered to the load. DH limits mainly is a function of Pmax

according to eq. (11). Also, For Vo = 10V, Pmax ≥ 10W and

Vo = 12V, Pmax = 5W. For Vo = 6V, Pmax should be at least

30W to enable proper load supplying. Generally, its

recommended that Pmax ≥ 6 PLoad to satisfy all operating

conditions for either CVLs or CPLs.

2- Pmin limitations

Set Pmax = 30W, Vin_min = 5V, Vin_max = 20V.

Fig. 9 illustrates that, when Vo = 8V, so Pmin should not

exceeds 1W. I.e., Pmin ≤ 0.2PLoad . Otherwise, the output

voltage is dropped to ≈ 6V, so can’t maintain the required

operating voltage. According to eq. (12), DL limits mainly

depends on Pmin value. So when Pmin increases, DL increases

causing the output voltage level to decrease. Also for Vo =

10V, Pmin ≤ 0.4PLoad and Vo = 12V, Pmin ≤ 0.5PLoad For Vo =

6V, there is no significant constraint on Pmin.

Generally, its recommended that Pmin ≤ 0.2PLoad to

satisfy all operating conditions for either CVLs or CPLs.

3- Vin_min limitation

Set Pmax = 30W, Pmin = 0.1V, Vin_max = 20V. According to

(11), (12), DH_U and DL_U are functions of the difference

between the Vin_max and Vref.

Fig. 10 Effect of Vin_Min Limits on the Feeder Output Voltage

Fig. 10 illustrates that for Vo = Vref = 8V, there is no

effect of the Vin_min limits on the output voltage limit. But

for 10V and 12V reference voltages, as the difference

between Vin_max and Vref decreases, the energy transferred to

the load is not sufficient to maintain the required operating

voltage, hence the output voltage drops.

Hence, as the difference between Vin_min and Vref

increases, the feeder converter can deliver the right amount

of energy to the load, thus can keep constant output voltage

at its desired level. Generally, Vin_min limits could be

assumed to be; Vin_min ≤ 0.3 Vin.

c) Effect of Vref step changes on Vo

The following results are recorded relying on adjusting

the controller parameters such that; Vin_min = 5V, Vin_max =

20V, Pmax = 30W, Pmin = 0.1W. It is depicted that when the

output voltage increased from 8V to 10V, the average load

current decreased from 0.556A to 0.472A, and when the

output voltage increased from 10V to 12V, the average load

current decreased from 0.472A to 0.405. So is negative

and increases as Vo increases, which is the incremental

negative impedance characteristics; the worst destabilizing

effect of CPLs.

Fig.11 proved that the proposed controller algorithm

achieves good dynamic response to rapidly track the

variations of the reference voltage, and precisely achieve

the output voltage regulation with minimum voltage ripples,

while maintaining the system stability.

Fig. 9 Effect of Pmin limits on the feeder output voltage




378

This is achievable by controlling the inductor current

waveform such that; the controller generates the right

number of power pulses of specified duty ratios that

control the transferred energy to the load as depicted in

Fig.12.

d)

d) Effect of Vin step changes on Vo

(a)

(b)

Fig. 11 Dynamic Response of the Proposed Controller for The

Buck Feeder Converter To Reference Voltage Step Changes,

When Vin = 15V; (A) Output Voltage, (B) Inductor Current

(C) Load Current (D) Load Power

(c)

(d)

(e)

Contd’ Fig. 11 (e) Duty ratio and (f) Input voltage

(f)

(e)

(f)




379

The system dynamic response for Vin step change from

15V to 19V at 3.9S is discussed in this section. The

following results are recorded for the following controller

parameters Vin_min = 5V, Vin_max = 20V, Pmax = 30W, Pmin =

0.1W.

It is noticed that when Vin increased from 15V to 19V,

the converter duty cycle decreased from 0.541 to 0.431 to

maintain constant output voltage; Vo = 8V

Moreover, Fig. 13 shows that the inductor is reshaped to

actuate this control action; to maintain output voltage

regulation while transferring the right amount of energy to

the CPL.

e) Effect of PLoad sudden changes on Vo

The system dynamic response for the loading step

change from 7.2W to 4.46W at 4.2S is below. The

controller parameters are set to Vin_min = 5V, Vin_max = 20V,

Pmax = 30W, Pmin = 0.1W.

(b)

(d)

(c)

(a)

Fig. 13 Dynamic Response of the Proposed Controller for

the Buck Feeder Converter to Input Voltage Step Change

from 15V to 19V, When Vref=8V; (A) Input Voltage B)

Output Voltage, (C) Inductor Current, (D) Load Current.

(a)

Fig. 14 Dynamic response of the proposed controller for

the buck feeder converter to load converter step load

change from 7.2W to 4.46W at 4.2S, when Vref = 8V; (a)

Load power.

Contd' Fig. 13 (e) Load power, and (f) Duty ratio

(f)

Contd' Fig. 14 , (f) Duty cycle




380

Fig. 14 illustrates the system dynamic response in case

of sudden load switching off; the controller then generates

more low power pulses to decrease the transferred energy

to the CPL that maintains regulated output voltage of 8V

with the same duty cycle of 0.54. Agreed with [5], it is

observed that increasing the CPL (decreasing RLoad)

decreases the damping of the LC tank, hence decrease the

output voltage ripples.

f) Stabilizing control of DC/DC converters with

CPLs using Digital Power Alignment technique

A comparative study between the proposed control

algorithm and power alignment controller [7] is

introduced. Experimental results when applying constant

power cycles of VC_H = 2.3 & VC_L = 0.15are shown

below;

The Power Alignment Control algorithm is applied in

this section assuming that the sampling frequency is 30

kHz and the switching frequency of the feeder is 6.25 kHz.

So, they are not synchronized as mentioned in the previous

work. Comparing Fig. 15 to Fig. 12, it is obvious that the

output voltage ripples is decreased when using the

proposed control algorithm, also the settling time here is

0.04S while in Fig. 12 it was 0.018S. So it achieves faster

system response to track Vref step changes smoothly with

less overshoot.

VIII. CONCLUSION

In this paper, a novel digital control technique

―Enhanced Modified Pulse Adjustment‖ is introduced. It is

(d)

(e)

Contd' Fig. 14 , (b) the output voltage; (c) the inductor

current (d) Load current, (e) Input voltage and

(f) Duty cycle

(b)

(c)

Fig. 15 Inductor current waveform when

Vo changes from 12V to 10V using power

alignment control algorithm




381

used to achieve the required output voltage regulation of a

dc/dc buck converter driving a CPL. It is applied to

compensate the destabilizing impact of the CPL negative

incremental resistance on its feeder convert. This proposed

fixed frequency control algorithm was implemented in real-

time using the xPC target turnkey. This method is

applicable to all power-electronic converters topologies,

driving different load types. In spite of its simplicity, it has

robust, fast and smooth dynamic response to maintain

constant output voltage in spite of any sudden changes of

the operating conditions.

REFERENCES

[1] A. Emadi, M. Ehsani and J. M. Miller, Vehicular Electric Power Systems: Land, Sea, Air and Space Vehicles, CRC Press, 2004.

[2] A. Griffo, and J. Wang, ―Modeling and stability analysis of hybrid power systems for the more electric aircraft,‖ Electrical power systems research, Vol. 82, pp. 59-67, 2012.

[3] A. Khaligh, A. M. Rahimi, and A. Emadi, ―Negative Impedance Stabilizing Pulse Adjustment Control Technique for DC/DC Converters Operating in Discontinuous Conduction Mode and Driving Constant Power Loads,‖ IEEE Trans. on Vehicular Technology, Vol. 56, No. 4, pp. 2005-

2016, July 2007.

[4] A. Emadi, A. Khaligh, H. R. Claudio, and G. A. Williamson, ―Constant Power Loads and Negative Impedance Instability in Automotive Systems: Definition, Modeling, Stability, and Control of Power Electronic Converters and Motor Drives,‖ IEEE trans. on Vehicular Technology, Vol. 55, No. 4, pp. 1112-1125, July 2006.

[5] A. M. Rahimi, " Addressing negative impedance instability problem of constant power loads: comprehensive view

encompassing entire system from the load to the source." Ph.D. Dissertation, Illinois Institute of Technology, Chicago, IL, 2008.

[6] A. Khaligh, and A. Emadi, ―Mixed DCM/CCM Pulse Adjustment with Constant Power Loads,‖ IEEE Trans. on Aerospace and Electronic Systems, Vol. 44, No. 2, pp. 766-782, April 2008.

[7] A. Khaligh, ―Digital control of DC/DC converters driving

constant power loads in vehicular systems,‖ Ph.D. Dissertation Illinois Institute of Technology, Chicago, IL, 2006.

[8] Emadi, A., ―Modeling, analysis, and stability assessment of multi-converter power electronic systems,‖ Ph.D. Dissertation, Texas A&M University, December 2000.

[9] F. Arteche, B. Allongue, F. Szoncso, and C. Rivetta, ―EMI Filter Design and Stability Assessment of DC Voltage

Distribution based on Switching Converters,‖http://lhc-electronics-workshop.web.cern.ch/LHC-electronics-workshop/2001/gsc/rivetta.pdf

[10] H. R. Claudio, ―Non linear analysis and control of DC-DC power converters feeding downstream power converters,‖ Ph.D. Dissertation, Illinois Institute of Technology, Chicago, Illinois, July 2005.

[11] A. Khaligh, and A. Emadi, ―Suitability of the pulse

adjustment technique to control single DC/DC choppers

feeding vehicular constant power loads in parallel with conventional loads,‖ Int. J. Electric and Hybrid Vehicles, Vol.

1, No. 1, pp. 20 - 45, 2007.

[12] J. I. Corcau, and E. Stoenescu, ―Fuzzy logic controller as a power system stabilizer,‖ International journal of circuits, systems and signal processing, Issue 3, Volume 1, pp 266-273, 2007.

[13] M. Ferdowsi, ―Advanced digital control techniques for integrated power electronic converters,‖ Ph.D. Dissertation, Illinois Institute of Technology, Chicago, IL, 2004.

[14] A. Khaligh, A. M. RAHIMI, and A. Emadi, ―Modified Pulse-Adjustment Technique to Control DC/DC Converters Driving Variable Constant-Power Loads,‖ IEEE Trans. on Indust. Electronics, Vol. 55, No. 3, pp. 1133-1146, March 2008.

[15] C. N. Onwuchekwa, and A. Kwasinski,― Analysis of Boundary Control for Buck Converters With Instantaneous Constant-Power Loads,‖ IEEE Trans. on Power Electronics, Vol. 25, No. 8, pp. 2018–2032, Aug. 2010.

[16] A. M. Rahimi, G. A. Williamson, and A. Emadi, ―Loop-

Cancellation Technique: A Novel Nonlinear Feedback to Overcome the Destabilizing Effect of Constant-Power Loads,‖ IEEE Trans. on Vehicular Technology, Vol. 59, No. 2, pp. 650-661, Feb. 2010.

[17] D. Marx, P. Magne, B. Nahid-Mobarakeh, S. Pierfederici, and B. Davat, ―Large Signal Stability Analysis Tools in DC Power Systems With Constant Power Loads and Variable Power Loads—A Review,‖ IEEE Trans. on Power

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[18] A. M. Rahimi, A. Emadi, ―Discontinuous-Conduction Mode DC/DC Converters Feeding Constant-Power Loads,‖ IEEE Trans. on Industrial Electronics, Vol. 57, No. 4, pp. 1318-1329, April 2010.

[19] D. M. Khorshied, ―Embedded real-time control for DC multi-converter systems,‖ Ph. D. Dissertation, Faculty of Engineering, Cairo University, 2012.

[20] A. Emadi, ―Modeling, analysis and stability assessment of Multi-converter power electronic systems,‖ Ph.D. Dissertation, Texas A&M University, College Station, TX, Aug. 2000.

[21] M. M. Abdel Aziz, A. A. Mahfouz, and D. M. Khorshied, ―Simplified Approaches For Controlling Dc-Dc Power Converters,‖ International Journal of Engineering Science and Technology (IJEST), Vol. 4, No. 2, pp. 828-840, Feb.

2012.

BIBLIOGRAPHY

Mohamed Mamdouh Abdel Aziz is

professor of electrical power and machines.

He has a B.Sc. in electrical power and

machines, distinction and first class honors,

Cairo University, Giza, Egypt, 1970.

Following graduation he was an instructor in

the Department of Electrical Power and

Machines, at Cairo University from 1970 to

1972. He has a M.Sc. in electrical power and

machines, Cairo University, Giza, Egypt,

1972. Following graduation he was a teaching

assistant in the Department of Electrical

Power and Machines, at Cairo University from 1972 to 1975. He has a

Ph.D. in electrical power and machines, Cairo University, Giza, Egypt,

http://lhc-electronics-workshop.web.cern.ch/LHC-electronics-workshop/2001/gsc/rivetta.pdf






382

1975. He is currently a professor in the Department of Electrical Power

and Machines, at Cairo University. Dr. Abdel Aziz has been member of the

Institute of Electrical and Electronics Engineers. On the technical side Dr.

Abdel Aziz is author or co-author of many refereed journal and conference

papers. Areas of research include cables, contact resistance, harmonics,

power quality, photovoltaic systems, and wind energy systems.

Ahmed A. Mahfouz received the B.Sc.

degree in electrical engineering with the

emphasis on power electronics in 1981, the

M.S. degree in power electronics in 1987 both

from Cairo University, Egypt, and the Ph.D.

in power electronics in 1991, through a

channel program funded by DAAD between

Cairo University (Egypt) and Wuppertal

University (Germany) in 1991. Since 1991,

he has been on the faculty of Engineering,

Cairo University, where he served as

Lecturer. 1992 to 1993 he was on scientific

leave from Cairo University to Calgary University (Canada).

From 1998 to 2005 he served as an Associate Professor at Cairo

University. From 2005 till now he is a full Professor at Cairo University.

He served as Technical Director of Siemens Automation Lab at Faculty of

engineering, Cairo University. He is currently involved in landmine

detection project. His research interests include power electronics,

microcontrollers and DSP programming, measurements, industrial

automation, renewable energy, and power quality. He has authored over 60

technical publications..

Dina Mamdooh Khorshied received the B.Sc. degree in electrical power

and machines, Cairo University, Giza, Egypt, 1999. She had the M.Sc.

degree in electrical power and machines, Cairo University, Giza, Egypt,

2006. Practically, she worked in the field of AC-to-DC electric traction

substations. Currently, she is working in the automatic control research

laboratory at Science and Technology Center of Excellence (STCE) ,

Egypt. Areas of research include harmonic filters design for power

systems, analog & digital controllers design, verification and validation;

including system analysis, modeling, simulation and real time

implementation.

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