EXPERIMENT 6
AIM : To design a 16:1 multiplexer using a 4:1 multiplexer at the datalo! and "eha#ioural le#els$
EDA TOOL USED : %ilinx &'( )$1i
METHODOLOGY : 16:1 *ux is a +om"inational +ir+uit ha#ing 16 input lines rom &, - &1.
and 4 sele+t lines rom ', '0$ n the "asis o sele+t lines it is de+ided !hi+h input !ill "e
transmitted to output$ Large multiplexers +an "e implemented "2 using smaller si3e multiplexers$ n
the "asis o this theor2 16:1 mux +an "e designed "2 using i#e 4:1 muxes as sho!n in igure$
Logic Symbol :
Trut T!bl":
#loc$ Di!gr!m :
%ERILOG &ODE :
module muxd8&, &1 & &0 ', '1 9;
input &,&1&&0','1; output 9; assign
<9=>',?8'1? &0:&1:8'1?&:&,;
endmodule
2122024;
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'ele+t lines utput
muxd m08&@)&@&@1,&@11'@,'@120;
muxd m48&@1&@10&@14&@1.'@,'@124;
muxd m.82122024'@'@09;
endmodule
module mux"8&'9;
al!a2s8&'
end+ase end endmodule
module mux8& ' 9 F;
mux"8&@1.:1'@1:,9@0; mux"89@0:,'@0:F;
endmodule
Fig 6$0 ETL s+hemati+ o 16 : 1 *5%
#"!)iour!l l")"l Mo*"lli+g
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Fig 6$. utput !a#eorm o 16 : 1 *5%
RESULT :  'u++essull2 implemented 16 : 1 multiplexer using 4 : 1 multiplexer modules and
#eriied its operation through simulation$
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