final ie lab manual

34
Industrial Electronics Lab Manual 1 CONTENTS S.C.R. CHARACTERISTICS.................................................................................................................. 2 R, R-C AND UJT TRIGGERING CIRCUITS ......................................................................................... 5 SINGLE PHASE FULLY CONTROLLED CONVERTER ................................................................... 12 MONOSTABLE MULTIVIBRATOR ................................................................................................... 15 STUDY OF ASTABLE MULTIVIBRATOR USING IC 555 ................................................................ 18 INTEGRATOR USING IC741 OP-AMP............................................................................................... 21 STUDY OF LOGIC GATES ................................................................................................................. 23 REALIZATION OF BASIC GATES USING UNIVERSAL GATES .................................................... 28 LIGHT DIMMER ................................................................................................................................. 30 SPEED CONTROL OF DC SHUNT MOTOR. ..................................................................................... 32

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Page 1: FINAL IE Lab Manual

Industrial Electronics Lab Manual

1

CONTENTS

S.C.R. CHARACTERISTICS .................................................................................................................. 2

R, R-C AND UJT TRIGGERING CIRCUITS ......................................................................................... 5

SINGLE PHASE FULLY CONTROLLED CONVERTER ................................................................... 12

MONOSTABLE MULTIVIBRATOR ................................................................................................... 15

STUDY OF ASTABLE MULTIVIBRATOR USING IC 555 ................................................................ 18

INTEGRATOR USING IC741 OP-AMP ............................................................................................... 21

STUDY OF LOGIC GATES ................................................................................................................. 23

REALIZATION OF BASIC GATES USING UNIVERSAL GATES .................................................... 28

LIGHT DIMMER ................................................................................................................................. 30

SPEED CONTROL OF DC SHUNT MOTOR. ..................................................................................... 32

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S.C.R. CHARACTERISTICS

Aim: - To study the V-I characteristics of S.C.R. and determine the Break over voltage, on state

resistance Holding current & Latching current.

Apparatus required: - SCR, Power Supplies, Wattage Resistors, Ammeter, Voltmeter, etc.

Circuit Diagram: -

Theory:-

The Silicon Controlled Rectifier (SCR) is simply a conventional rectifier controlled by a

gate signal. The main circuit is a rectifier; however the application of a forward voltage is not

enough for conduction. A gate signal controls the rectifier conduction. The rectifier circuit

(anode-cathode) has a low forward resistance and a high reverse resistance. It is controlled from

an off state (high resistance) to the on state (low resistance) by a signal applied to the third

terminal, the gate. Once it is turned on it remains on even after removal of the gate signal, as

long as a minimum current, the holding current, Ih, is maintained in the main or rectifier circuit.

To turn off an SCR the anode-cathode current must be reduced to less than the holding current,

Ih. Notice the reverse characteristics are the same as discussed previously for the rectifier or

diode, having a break over voltage with its attending avalanche current; and a leakage current for

voltages less than the break over voltage. However, in the forward direction with open gate, the

SCR remains essentially in an off condition (notice though that there is a small forward leakage)

up until the forward break over voltage is reached. At that point the curve snaps back to a typical

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forward rectifier characteristic. The application of a small forward gate voltage switches the SCR

onto its standard diode forward characteristic for voltages less than the forward break over

voltage.

Procedure: -

1. Connections are made as shown in the circuit diagram.

2. The value of gate current IG, is set to convenient value by adjusting VGG.

3. By varying the anode- cathode supply voltage VAA gradually in step-by-step, note down the

corresponding values of VAK & IA. Note down VAK & IAat the instant of firing of SCR and

after firing (by reducing the voltmeter ranges and increasing the ammeter ranges) then increase

the supply voltage VAA. Note down corresponding values of VAK & IA.

4. The point at which SCR fires, gives the value of break over voltage VBO.

5. A graph of VAK V/S IA is to be plotted.

6. The on state resistance can be calculated from the graph by using a formula.

7. The gate supply voltage VGG is to be switched off

8. Observe the ammeter reading by reducing the anode-cathode supply voltage VAA. The point

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at which the ammeter reading suddenly goes to zero gives the value of Holding Current IH.

9. Steps No.2, 3, 4, 5, 6, 7, 8 are repeated for another value of the gate current IG.

Observation Table:-

Forward Characteristics Latching Current Holding Current

Ig= ….. Vg=……. IL=…. Ig= … Vg=… IL=…

Conclusion:-

1. SCR characteristics has been studied and the forward break over voltage is found out to

be ………… volts.

2. The observed values of holding and latching currents are ………. And ………

respectively.

3. SCR characteristics have been drawn from the observed values of VAk and IAk.

4. From the graph it is clear that after forward breakdown voltage SCR starts conducting

and there is a sudden decrease in the voltage across SCR.SCR remains in the ON state

even if the gate is removed. If anode current falls below the holding current SCR get

turned OFF.

Sr no VAK

Volts

IAk

Sr no IA(mA)

Sr no IA(mA)

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R, R-C AND UJT TRIGGERING CIRCUITS

Aim:- To study the operation of resistance, resistance capacitance and UJT triggering circuits of

SCR .

Apparatus required: - SCR – TY604, Power Supplies, Ammeter, Voltmeter, etc.,

Circuit Diagram: R - Triggering Circuit:

Theory:

Resistance Triggering:

Resistance trigger circuits are the simplest & most economical method. During the

positive half cycle of the input voltage, SCR become forward biased but it will not conduct

until its gate current exceeds Igmin . Diode D allows the flow of current during positive half

cycle only. R2 is the variable resistance & R is the stabilizing resistance .R1 is used to limit

the gate current. During the positive half cycle current Ig flows. Ig increases and when Ig=

Igmin the SCR turns ON .The firing angle can be varied from 0 — 90° by varying the

resistance R.

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Model Graph: R - Triggering Circuit:

Procedure :- R Firing :

1. Connections are made as shown in fig.

2. Switch on the power supply to the CRO.

3. Set the CRO to the line trigger mode.

4. Switch on power supply to the SCR trainer.

5. Observe the waveform on the CRO.

6. Study the waveforms for various firing angle by varying the pot in R trigger circuit.

7. Observe the range of firing angle control.

8. For any one particular firing angle plot the waveforms of the ac voltage, voltage across the

load and the SCR.

9. Measure the average dc voltage across the load and rms value of the ac input voltage using a

digital multimeter.

10. Calculate the dc output voltage using the equation.

V - Vrms value of ac input voltage

Vm - \/2Vrms.And compare the measured value.

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Observation Table:-

Sr No Firing Angle α cos α

Theoretical Vo

Indicated Vo

Circuit Diagram:- RC Triggering Circuit:

Theory :- R —C Triggering:

By varying the variable resistance R, the firing angle can be varied from 0 —180° .In

the negative half cycle the capacitance C charges through the diode D2 with lower plate

positive to, the peak supply voltage Emax .This Capacitor voltage remains constant at until

supply voltage attains zero value. During the positive half cycle of the input voltage, C

begins to charge through R. When the capacitor voltage reaches the minimum gate trigger

voltage SCR will turn on.

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Model Graph:

Procedure:-

RC FIRING:

1. Connections are made as shown in fig.

2 .Switch on the power supply to the CRO .

3. Set the CRO to the line trigger mode.

4. Switch on power supply to the SCR trainer.

5. Observe the waveform on the CRO.

6. Study the waveforms for various firing angle by varying the pot in R trigger circuit.

7. Observe the range of firing angle control. t u t e o f T e c h n o l o g y Page 53

8. For any one particular firing angle plot the waveforms of the ac voltage, voltage across the load

and the SCR.

9. Measure the average dc voltage across the load and rms value of the ac input voltage using a

digital millimeter.

10. Calculate the dc output voltage using the equation.

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Observation Table:

Input Input

Voltage

Resistance

Value

O/P Voltage

V rms (V)

Voltage

Across(Anode

Cathode)

UJT Triggering Circuit :-

Theory: -

A synchronized UJT triggered circuit using an UJT is shown in the figure. Diodes

‘D1’ to ‘D4’ rectify ac to dc. Resistor R1 lowers Vdc to a suitable value for the zener diode

and UJT. Zener diode ‘Z’ functions to clip the rectified voltage to a standard level, ‘Vz’ which

remains constant except near the Vdc zero. The voltage Vz is applied to the charging circuit

RC. Current ‘I’, charges capacitor ‘c’ at a rate determined by ‘R’ voltage across capacitor

is marked by ‘Vc’ as shown. When ‘Vc’ reaches the

the t-B1 junction of UJT breaks down and the capacitor ‘c’ discharges through the primary of

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pulse transformer sending a current ‘C2’ as shown.

As the current ‘i2’ is in the form of pulse, windings of the pulse transformer have pulse voltages

at their secondary terminals. Pulse at the two secondary windings feeds the same in phase

pulse to two SCRs of a full wave circuits. SCR with positive anode voltage would turn ON.

As soon as the capacitor discharges, it starts to recharge as shown. Rate of rise of capacitor

voltage can be controlled by varying ‘R’. The firing angle can be controlled up to above

150o. This method of controlling the output power by varying the charging resistor ‘r’ is

called ramp control, open loop control (or) manual control.

Model Graph:-

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Procedure:-

1. Connect a & k terminal of UJT triggering circuit to the gate cathode terminals of SCR.

2. Give a 24 V ac supply.

3. Observe the waveforms and plot it for one particular firing angle by adjusting the potentiometer

and observe the range over which firing angle is controllable.

4. Observe that capacitor voltage is set at every half cycle.

Observation Table:-

Sr No Firing Angle α cos α

Theoretical Vo

Indicated Vo

Result: - Thus the operation of resistance, resistance capacitance and UJT triggering circuits of

SCR has been studied.

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SINGLE PHASE FULLY CONTROLLED CONVERTER

Aim:- To study the operation of single phase fully controlled converter using R and RL load and

to observe the output waveforms.

Apparatus Required:

Power Thyristors, Rheostat, CRO, Transformer (1-phase) 230V/24, Connection wires.

Circuit Diagram :-

Theory :-

A fully controlled converter or full converter uses thyristors only and there is a wider

control over the level of dc output voltage. With pure resistive load, it is single quadrant

converter. Here, both the output voltage and output current are positive. With RL- load it

becomes a two-quadrant converter. Here, output voltage is either positive or negative but

output current is always positive. Figure shows the quadrant operation of fully

controlled bridge rectifier with R-load. Fig shows single phase fully controlled

rectifier with resistive load. This type of full wave rectifier circuit consists of four SCRs.

During the positive half cycle, SCRs T1 and T2 are forward biased. At ωt = α, SCRs T1

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and T3 are triggered, then the current flows through the L - T1- R load - T3 - N. At ωt = π,

supply voltage falls to zero and the current also goes to zero. Hence SCRs T1 and T3 turned

off. During negative half cycle (π to 2π). SCRs T3 and T4 forward biased. At ωt = π + α, SCRs

T2 and T4 are triggered, then current flows through the path N - T2 - R load- T4 - L. At ωt =

2π, supply voltage and current goes to zero, SCRs T2 and T4 are turned off. The Fig-3,

shows the current and voltage waveforms for this circuit. For large power dc loads, 3-phase

ac to dc converters are commonly used. The various types of three-phase phase-controlled

converters are 3 phase half-wave converter, 3-phase semi converter, 3-phase full controlled

and 3-phase dual converter. Three-phase half-wave converter is rarely used in industry

because it introduces dc component in the supply current. Semi converters and full

converters are quite common in industrial applications. A dual is used only when

reversible dc drives with power ratings of several MW are required. The advantages of

three phase converters over single-phase converters are as under: In 3-phase converters, the

ripple frequency of the converter output voltage is higher than in single-phase converter.

Consequently, the filtering requirements for smoothing out the load current are less. The

load current is mostly continuous in 3-phase converters. The load performance, when 3-

phase converters are used, is therefore superior as compared to when single-phase

converters are used.

Edc=(2Em)(Cosα)/π

Idc=Edc/R

Procedure:

1. Single Phase Fully Controlled Bridge Rectifier

2. Make the connections as per the circuit diagram.

3. Connect CRO and multimeter (in dc) across the load.

4. Keep the potentiometer (Ramp control) at the minimum position (maximum resistance).

5. Switch on the step down ac source.

6. Check the gate pulses at G1-K1, G2-K2,G3-K3,& G4-K4 respectively.

7. Observe the waveform on CRO and note the triggering angle ‘α’ and note the corresponding

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reading of the multimeter. Also note the value of maximum amplitude Vm from the waveform.

8. Set the potentiometer at different positions and follow the step given in (6) for every position.

9. Tabulate the readings in observation column.

10. Draw the waveforms observed on CRO.

Observation Table: -

Sr No Firing Angle α cos α

Theoretical Vo

Indicated Vo

Result:

Thus the operation of single phase fully controlled converter using R load has been

studied and the output waveforms has been observed.

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MONOSTABLE MULTIVIBRATOR

Aim:- To study and design monostable multivibrator.

Apparatus:- CRO, connecting wires,function generator,probes etc.

Circuit diagram:-

THEORY:-

A monostable multivibrator (MMV) often called a one-shot multivibrator, is a pulse

generator circuit in which the duration of the pulse is determined by the R-C network, connected

externally to the 555 timer. In such a vibrator, one state of output is stable while the other is

quasi-stable (unstable). For auto-triggering of output from quasi-stable state to stable state

energy is stored by an externally connected capacitor C to a reference level. The time taken in

storage determines the pulse width. The transition of output from stable state to quasi-stable state

is accomplished by external triggering. The schematic of a 555 timer in monostable mode of

operation is shown in figure.

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In the monostable mode, the 555 timer acts as a “one-shot” pulse generator. The pulse

begins when the 555 timer receives a signal at the trigger input that falls below a third of the

voltage supply. The width of the output pulse is determined by the time constant of an RC

network, which consists of a capacitor (C) and a resistor (R). The output pulse ends when the

charge on the C equals 2/3 of the supply voltage. The output pulse width can be lengthened or

shortened to the need of the specific application by adjusting the values of R and C.

The output pulse width of time t, which is the time it takes to charge C to 2/3 of the supply

voltage, is given by

where t is in seconds, R is in ohms and C is in farads. See RC circuit for an explanation

of this effect.

Procedure :-

1. Connect the circuit as shown in the circuit diagram.

2. Apply Negative triggering pulses at pin 2 of frequency 1 KHz as shown in Fig .

3. Observe the output waveform and capacitor voltage as shown in and Measure the pulse

duration.

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4. Theoretically calculate the pulse duration as Thigh=1.1. RAC

5. Compare it with experimental values

Observation Table :-

Ton Toff Frequency Duty cycle

THEOROTICAL

PRACTICAL

Result:- Thus the monostable multivibrator has been designed and studied successfully.

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STUDY OF ASTABLE MULTIVIBRATOR USING IC 555

Aim:- Study of Astable multivibrator using IC 555 for frequency 1 khz and duty cycle 75%.

Apparatus required :- IC 741,Bread-board,dual power supply ,function generator resistors and

connecting wire.

Circuit diagram:-

Theory:-

The circuit diagram for the astable multivibrator using IC 555 is shown here. The

astable multivibrator generates a square wave, the period of which is determined by the circuit

external to IC 555. The astable multivibrator does not require any external trigger to change the

state of the output. Hence the name free running oscillator. The time during which the output is

either high or low is determined by the two resistors and a capacitor which are externally

connected to the 555 timer The above figure shows the 555 timer connected as an astable

multivibrator. Initially when the output is high capacitor C starts charging towards Vcc through

RA and RB.

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Block diagram of IC 555

However as soon as the voltage across the capacitor equals 2/3 Vcc , comparator1 triggers the

flip-flop and the output switches to low state. Now capacitor C discharges through RB and the

transistor Q1. When voltage across C equals 1/3 Vcc, comparator 2’s output triggers the flip-

flop and the output goes high. Then the cycle repeats. The capacitor is periodically charged and

discharged between 2/3 Vcc and 1/3 Vcc respectively. The time during which the capacitor

charges from 1/3 Vcc to 2/3 Vcc is equal to the time the output remains high and is given by

where RA and RB are in ohms and C is in Farads. Similarly the time during which the capacitor

discharges from 2/3 Vcc to 1/3 Vcc is equal to the time the output is low and is given by

Thus the total time period of the output waveform is

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Procedure:-

1. Make the connectins as shown in the fig with the designed values.

2. Vary the preset and observe the output on CRO.

3. Observe the output across capacitor

4. Verify the practical values of Ton and Toff with theoretical values.

Observations:-

Ton Toff Duty Cycle Frequency

THEORIOTICAL

PRACTILAC

Graph:-

1) O/p voltage v/s time

2) Voltage across capacitor v/s time.

Conclusion:-

IC 555 can be used for generating square wave of required duty cycle .By varying the

values of C, Rb we can get variable duty cycle of square wave at the output

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INTEGRATOR USING IC741 OP-AMP

Aim:-

To study the operation of the Integrator using op-amp and trace the output wave forms

for sine and square wave inputs.

Apparatus Required:-

Bread Board IC741, Resistors, Capacitors Function Generator CRO Probes Connecting wires

Circuit Diagram :- (To be Drawn)

Theory:-

Integrator:

A circuit in which the output voltage is the integration of the input voltage is called an

integrator.

In the practical integrator to reduce the error voltage at the output, a resistor RF is

connected across the feedback capacitor CF. Thus, RF limits the low-frequency gain and hence

minimizes the variations in the output voltage.

The frequency response of the integrator is shown in the fig. fb is the frequency at which

the gain is 0 dB and is given by fb = 1/2R1Cf In this fig. there is some relative operating

frequency, and for frequencies from f tofa the gain RF/R1 is constant. However, after fa the gain

decreases at a rate of 20 dB/decade. In other words, between fa and fb the circuit of fig. acts as

an integrator. The gain limiting frequency Normally fa<fb. From

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the above equation, we can calculate Rf by assuming fa & Cf.This is very important frequency. It

tells us where the useful integration range starts.

Integrator has wide applications in

1. Analog computers used for solving differential equations in simulation arrangements.

2. A/D Converters

3. Signal wave shaping

4. Function Generators.

Procedure:-

1. Connect the components/equipment as shown in the circuit diagram.

2. Switch ON the power supply.

3. Apply sine wave at the input terminals of the circuit using function Generator.

4. Connect channel-1 of CRO at the input terminals and channel-2 at the output terminals.

5. Observe the output of the circuit on the CRO which is a cosine wave (90o phase shifted from

the sine wave input) and note down the position, the amplitude and the time period of Vin & Vo.

6. Now apply the square wave as input signal.

7. Observe the output of the circuit on the CRO which is a triangular wave and note down the

position, the amplitude and the time period of Vin & Vo.

8. Plot the output voltages corresponding to sine and square wave inputs.

Model Graphs:-

Result: Thus, Integrator circuit has been studied and the waveforms has been observed.

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STUDY OF LOGIC GATES

Aim: To study about logic gates and verify their truth tables.

Apparatus required: ICs ,Connecting Wires and Bread Board.

Circuit Diagram :-

AND

OR

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NAND

NOT

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NOR

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EX-OR

Theory :-

Circuit that takes the logical decision and the process are called logic gates. Each

gate has one or more input and only one output. OR, AND and NOT are basic

gates. NAND, NOR and X-OR are known as universal gates. Basic gates form

these gates.

AND GATE:

The AND gate performs a logical multiplication commonly known as

AND function. The output is high when both the inputs are high. The output is

low level when any one of the inputs is low.

OR GATE:

The OR gate performs a logical addition commonly known as OR function.

The output is high when any one of the inputs is high. The output is low level

when both the inputs are low.

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NOT GATE:

The NOT gate is called an inverter. The output is high when the input is

low. The output is low when the input is high.

NAND GATE:

The NAND gate is a contraction of AND-NOT. The output is high when both

inputs are low and any one of the input is low .The output is low level when both

inputs are high.

NOR GATE:

The NOR gate is a contraction of OR-NOT. The output is high when both inputs

are low. The output is low when one or both inputs are high.

X-OR GATE:

The output is high when any one of the inputs is high. The output is low when both the inputs

are low and both the inputs are high.

Procedure: -

1. Connections are given as per circuit diagram.

2. Logical inputs are given as per circuit diagram.

3. Observe the output and verify the truth table

.

Result :- All the basics gates are studied and the truth tables are verified.

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REALIZATION OF BASIC GATES USING UNIVERSAL GATES

Aim :- Realization of Basic Gates using Universal Gates

Apparatus required:- ICs ,Connecting Wires and Bread Board.

Circuit Diagram :-

NOT using NAND

NOT using NOR

AND using NAND

OR using NOR

AND using NOR

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OR using NAND

Theory :-

Universal gates are the ones which can be used for implementing any gate like AND, OR and NOT, or any combination of these basic gates; NAND and NOR gates are universal gates.

Any logic function can be implemented using NAND gates. To achieve this, first the logic function has to be written in Sum of Product (SOP) form. Once logic function is converted to SOP, then is very easy to implement using NAND gate. In other words any logic circuit with AND gates in first level and OR gates in second level can be converted into a NAND-NAND gate circuit.

Any logic function can be implemented using NOR gates. To achieve this, first the logic function has to be written in Product of Sum (POS) form. Once it is converted to POS, then it's very easy to implement using NOR gate. In other words any logic circuit with OR gates in first level and AND gates in second level can be converted into a NOR-NOR gate circuit.

Result :- All the basics gates have derived using universal gates by verifying the truth tables.

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LIGHT DIMMER

Aim: -To study application of DIAC &TRIAC.

Apparatus Required:- Connecting wires, Power Supply, Light Dimmer Kit etc.

Circuit Diagram:-

Theory:

Light Dimmer Using TRIAC.

Lamp is a resistive load. Hear DIAC is used to trigger the TRIAC which cause the current to

flow through the load.

In the +ve half cycle of the I/p AC supply vtg the L is +ve w.r.t N point. The charging

current for the capacitor C1flows through R1 as shown in the fig. As soon as the Vtg across C1

reach the break over vtg of the diac, it is turned on to supply gate current for the Triac. Triac will

be on Thus the conducting Triac R, C, & diac circuit is short circuit. The load vtg is equal to the

instantaneous supply vtg.The –ve half cycle of the AC supply vtg the Li –ve w.r.t NThe

TRIAC& DIAC both are in the off state.

The charging current for the capacitor C1 flows through R1. Now the vtg on C1 is –ve &

as soon as this voltage reaches the break over vtg of the DIAC it is turned on & supplies gate

A.C.

LOAD

TIRC

DIAC

R

C

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current to the TRIAC. Thus the TRIAC is turned on. Thus when the TRIAC is turned on the

current flows through the load & the light glows. The intensity of can be change by changing the

firing angle α. As α incases the light intensity will decrease.

1) Fan Regulator Using TRIAC:

The fan motor is a single ф induction motor. The speed of which depends on depends on

the rms value of voltage applied to it.

As soon as vtg across the capacitor in both the half cycle reaches the breakdown voltage

of the DIAC a triggering pulse is generated & TRIAC is turned on. As soon as the TRIAC is

turned on, the vtg between the point A & N will drop down to state vtg drop the TRIAC. The vtg

on C is negligibly small the capacitor can charge again after the TRIAC is turn off.

The charging rate of the capacitor C is decided by R with increase in value of R, the

capacitor charge slowly increases the firing angle of TRIAC thus increasing the speed & vice-

versa too. In this way the fan speed can be regulated by controlling the firing angle of TRIAC in

both the half cycles.

Procedure:

Connect the light dimmer kit to the mains (AC supply).

Keep the pot at max resistance position.

Then on the supply.

Measure the voltage the voltage across the load.

Then off the circuit & measure the corresponding resistance(R).

Vary the resistance R from max to min value.

For each change in resistance turned on the supply & measure the voltage across

the load.

Observation Table:

Resistance of Load(KΩ)

O/P VTG ( V )

Conclusion: Thus we have studied application of DIAC &TRIAC.

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SPEED CONTROL OF DC SHUNT MOTOR.

Aim: Speed control of Dc shunt motor.

Apparatus Required : DC SHUNT MOTOR SETUP (1 No’s), DC VOLTMETER (0- 300) V-1

No’s, RHEOSTAT S-1 No’s,TACHOMETER-1 No

Theory:

Speed of DC shunt motor is given by,

So,

Where,

.

.

.

Thus from the above relation, the speed of D.C. shunt motor can be controlled by;

Varying the applied voltage the armature.

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The speed is directly proportional to the applied voltage and inversely proportional to the flux

( ) which is proportional to the field current ( ).

Diagram:

Procedure:

1. Make the connection as shown in the circuit diagram

2. Keep the field circuit rheostat in minimum position and armature circuit rheostat in

maximum position.

3. Switch on the supply.

(1) Armature voltage control method

a) Keeping field current constant, vary the armature voltage using the

rheostat and note down the voltage and corresponding speed for each

reading.

b) Plot the graph of N Vs. Va.

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Observation Table:

Sr No Armature Voltage(volt) Speed (rpm)

Conclusion: It is verified that speed of D.C. shunt motor.