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Formal Verification of Distributed Branching Multiway Synchronization Protocols Hugues EVRARD and Frédéric LANG Inria Grenoble Team CONVECS

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Page 1: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Formal Verification of Distributed Branching Multiway

Synchronization Protocols

Hugues EVRARD and Frédéric LANG

Inria Grenoble – Team CONVECS

Page 2: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Introduction

Distributed System design is complex

Formal Methods can help!

Formal specification help finding design bugs early, e.g., using process algebra and model checking

But… semantic gap between formal specs and implementation

2 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 3: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Introduction

Distributed System design is complex

Formal Methods can help!

Formal specification help finding design bugs early, e.g., using process algebra and model checking

But… semantic gap between formal specs and implementation

Automatic distributed code generation is a solution we want to implement

A distributed implementation requires synchronization protocols

3 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 4: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

This Talk

Focus on the correctness of existing synchronization protocols

Study of 3 protocols selected from the literature

Formal specification in the language LNT

Correctness verification using the toolbox CADP

4 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 5: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

The Specification Language LNT Short for LOTOS NT, also inspired by E-LOTOS

Process Algebra, with rendezvous on gates (actions)

Labeled Transition System (LTS) semantics

5 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

process p[A,B] is

loop

select

A ; stop

[]

B

end select

end loop

end process

Page 6: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

The Specification Language LNT Short for LOTOS NT, also inspired by E-LOTOS

Process Algebra, with rendezvous on gates (actions)

Labeled Transition System (LTS) semantics

Parallel composition operator more expressive than LOTOS

(m-among-n synchronizations)

6 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

process p[A,B] is

loop

select

A ; stop

[]

B

end select

end loop

end process

process

main[A,B]

is

par A#2, B in

p[A,B]

|| p[A,B]

|| p[A,B]

|| p[A,B]

end par

end process

Page 7: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

The Verification Toolbox CADP Construction and Analysis of Distributed Processes

– Developed by Inria CONVECS (formerly VASY)

Supports LNT specifications (among others)

– Model Checker EVALUATOR 4.0 for MCL temporal logic

– Equivalence Checker BISIMULATOR

– …more tools, see cadp.inria.fr

7 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

CADP (EVALUATOR 4.0)

spec.lnt

prop.mcl

TRUE/FALSE + diagnostic

Page 8: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Distributed System: a model Task specified as Labeled Transition System (LTS)

Asynchronous execution

Interaction by synchronization on gates (label names)

General model of synchronization: multiway and non-deterministic

8 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

A synchronization scenario with 4 tasks synchronizing on 3 gates

Page 9: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

From Model to Implementation Target: Distributed Implementation

Each Task becomes a local, sequential process

9 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

t1

t2 t3

t4

Page 10: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

From Model to Implementation Target: Distributed Implementation

Each Task becomes a local, sequential process

Tasks are branching: they may be ready on several gates a the same time (e.g. t2)

10 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

t1

t2 t3

t4

ready{A}

ready{A,B} ready{B}

ready{B}

Page 11: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

From Model to Implementation Target: Distributed Implementation

Each Task becomes a local, sequential process

Tasks are branching: they may be ready on several gates a the same time (e.g. t2)

A protocol is needed for task synchronizations

11 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Synchro Protocol t1

t2 t3

t4

ready{A}

ready{A,B} ready{B}

ready{B}

Page 12: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Naïve Solution Unique central synchronizer

Knows all ready tasks, select possible synchros

12 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Central Synchronizer

Page 13: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Naïve Solution Unique central synchronizer

Knows all ready tasks, select possible synchros

Obvious bottleneck

… need distributed protocols!

13 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Central Synchronizer

Page 14: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Protocols under study Sisto, Ciminiera & Valenzano (1991)

– A protocol for multirendezvous of LOTOS processes

Sjödin (1991)

– From LOTOS Specifications to Distributed Implementations (PhD Thesis)

Parrow & Sjödin (1996)

– Designing a multiway synchronization protocol

14 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 15: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Protocols under study Sisto, Ciminiera & Valenzano (1991)

– A protocol for multirendezvous of LOTOS processes

Sjödin (1991)

– From LOTOS Specifications to Distributed Implementations (PhD Thesis)

Parrow & Sjödin (1996)

– Designing a multiway synchronization protocol

15 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 16: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Parrow’s Protocol Ports represent gates

Mediators are attached to Tasks

Negotiation:

– Task sends request to Mediator

– Mediator sends ready to Ports

16 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

port

med

task

Page 17: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Parrow’s Protocol Ports represent gates

Mediators are attached to Tasks

Negotiation:

– Task sends request to Mediator

– Mediator sends ready to Ports

– Ports send query to 1st Mediator

– Mediators propagate locks in order

17 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

port

med

task

Page 18: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Parrow’s Protocol Ports represent gates

Mediators are attached to Tasks

Negotiation:

– Task sends request to Mediator

– Mediator sends ready to Ports

– Ports send query to 1st Mediator

– Mediators propagate locks in order

– Last Mediator replies yes to Port, commit to Mediators

– Mediators propagate commit, and confirm their Task

18 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

port

med

task

Page 19: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Parrow’s Protocol Ports represent gates

Mediators are attached to Tasks

Negotiation:

– Task sends request to Mediator

– Mediator sends ready to Ports

– Ports send query to 1st Mediator

– Mediators propagate locks in order

– Last Mediator replies yes to Port, commit to Mediators

– Mediators propagate commit, and confirm their Task

Plus abort mechanism

19 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

port

med

task

Page 20: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Task Model Task behavior: LTS

Model:

– send request message with set of gates

– wait for a confirm answer with successful synchronization

20 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

0

1

request {A,B}

confirm A

confirm B

Page 21: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Task Model Task behavior: LTS

Model:

– send request message with set of gates

– wait for a confirm answer with successful synchronization

21 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

0

1

request {A,B}

confirm A

confirm B

Page 22: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Protocol Model Overview

22 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Task Task

Mediator Mediator

Port

Buffer Buffer

Buffer

EXT

Page 23: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Protocol Model

Mediators & Ports

– Behavior specified in original publication

– Write corresponding processes in LNT

– Arguments (e.g. port: possible synchros on its gate)

23 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Task Task

Med Med

Port

Buff Buff

Buff

EXT

Page 24: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Protocol Model

Mediators & Ports

– Behavior specified in original publication

– Write corresponding processes in LNT

– Arguments (e.g. port: possible synchros on its gate)

Inter-Process Communication

– Asynchronous message passing: buffers on channels

24 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Task Task

Med Med

Port

Buff Buff

Buff

EXT

Page 25: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Protocol Model

Mediators & Ports

– Behavior specified in original publication

– Write corresponding processes in LNT

– Arguments (e.g. port: possible synchros on its gate)

Inter-Process Communication

– Asynchronous message passing: buffers on channels

Trace successful synchronizations

– Message on EXT (External World)

25 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Task Task

Med Med

Port

Buff Buff

Buff

EXT

Page 26: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

High-Level and Low-Level LTS

26 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

High-level LTS: all possible task synchronizations w.r.t. scenario

Synchronization Scenario

State Space Generation

High-Level LTS

Hig

h

Page 27: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

High-Level and Low-Level LTS

27 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

High-level LTS: all possible task synchronizations w.r.t. scenario

Low-level LTS: all possible sequences of protocol message (messages on EXT announce high-level synchro)

Synchronization Scenario

State Space Generation

High-Level LTS

Instantiate Protocol

Model of Protocol Instantiation

State Space Generation

Low-Level LTS

Hig

h

Low

Page 28: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

High-Level and Low-Level LTS

28 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Synchronization Scenario

State Space Generation

High-Level LTS

Instantiate Protocol

Model of Protocol Instantiation

State Space Generation

Low-Level LTS

Hig

h

Low

Deadlock & Livelock Checking

Page 29: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Livelock checking Infinite protocol message exchange without reaching a synchro

Look for cycle with no EXT message in Low-level LTS

Verified using EVALUATOR 4.0 on the LTS obtained from the protocol model.

29 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

CADP (EVALUATOR 4.0)

any cycles of no “EXT” messages ?

TRUE/FALSE + diagnostic Low-level LTS

Page 30: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock checking Classic deadlock: a state with no outgoing transitions

– Can be a High-level deadlock (e.g., after action A)

30 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 31: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock checking Classic deadlock: a state with no outgoing transitions

– Can be a High-level deadlock (e.g., after action A)

Low-level deadlock == triggered by the protocol

– Protocol is blocked after a sequence of messages, while a synchronization could have been reached

31 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 32: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock checking Classic deadlock: a state with no outgoing transitions

– Can be a High-level deadlock (e.g., after action A)

Low-level deadlock == triggered by the protocol

– Protocol is blocked after a sequence of messages, while a synchronization could have been reached

In Low-level LTS, search for states from which there exists both:

– a sequence leading to a classic deadlock with no EXT (protocol blocks with no synchronization)

– a sequence which contains EXT (protocol may reach a synchro)

If found, model checker EVALUATOR 4.0 provides an example

32 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 33: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock in Parrow’s protocol Simple scenario: two similar tasks with two synchro on gate G:

– on Port G, set T stores ready notifications

33 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 34: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock in Parrow’s protocol Simple scenario: two similar tasks with two synchro on gate G:

– on Port G, set T stores ready notifications

– “yes” message is delayed (dashed line)

34 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 35: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock in Parrow’s protocol Simple scenario: two similar tasks with two synchro on gate G:

– on Port G, set T stores ready notifications

– “yes” message is delayed (dashed line)

– on reception of “yes”, T := { }

35 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 36: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Deadlock in Parrow’s protocol Simple scenario: two similar tasks with two synchro on gate G:

– on Port G, set T stores ready notifications

– “yes” message is delayed (dashed line)

– on reception of “yes”, T := { }

– no second synchro on G (OK if “yes” was received sooner by Port G…)

High-level model is OK, this is a protocol deadlock

36 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 37: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Synchronizations Consistency A protocol can be livelock- and deadlock-free…

… but still not match synchronization semantics !

37 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Synchronization Scenario

State Space Generation

High-Level LTS

Generate Protocol Specification

Model of Protocol Instanciation

State Space Generation

Low-Level LTS

Hig

h

Low

Equivalence Checking

Deadlock & Livelock Checking

Page 38: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

High and Low level LTS equivalence Compared using several equivalence relations

Always have safety equivalence

No branching bisimulation in some cases:

– Three synchronizations are possible

– Protocol negociation eliminates possible synchros step by step

– Gray states in Low-level have no bisimilar state in High-level

38 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 39: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Conclusion Complex synchronization protocols are required for automatic distributed implementation

We modeled three protocols (LNT)

We verified properties on 50+ scenarios (CADP)

Some scenarios revealed possible deadlocks for one protocol

Better understanding of difficulties of distributed synchronization

39 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 40: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Conclusion

40 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Future Work Reuse protocols models for performance evaluation

Rapid prototyping of distributed systems from LNT specifications

Consider data exchange at synchronization (with guards…)

Complex synchronization protocols are required for automatic distributed implementation

We modeled three protocols (LNT)

We verified properties on 50+ scenarios (CADP)

Some scenarios revealed possible deadlocks for one protocol

Better understanding of difficulties of distributed synchronization

Page 41: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Thank you for your attention

Questions?

41 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 42: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Verification Overview

High-level: original synchronization scenario (tasks + interactions)

Low-level: protocol instantiation (task model, mediators, ports…)

42 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG

Page 43: Formal Verification of Distributed Branching Multiway ...convecs.inria.fr/doc/presentations/Evrard-FORTE-13.pdf · Formal Verification of Distributed Branching Multiway Synchronization

Verification Overview (SVL) Generic script for any scenario

43 FORTE / FMOODS - Florence - June 2013 Hugues EVRARD, Frédéric LANG