1Fujitsu Microelectronics America, Inc. 02/02

Fujitsu System Applications Support

2Fujitsu Microelectronics America, Inc. 02/02

Overview – System Applications Support

• SOC Application Development Lab• Multimedia – VoIP• Wireless – Bluetooth• Processors, DSP and Peripherals – ARM Reference Platform

3Fujitsu Microelectronics America, Inc. 02/02

SOC Application Development Lab

• System-level evaluation and emulation systems• A platform for system development• A real system environment for H/W and S/W verification• Vehicles for demonstration of functionality

Fujitsu provides:

4Fujitsu Microelectronics America, Inc. 02/02

VoIP Core Brief

• Applications• Residential gateway, IP phone, cable modem, CT, wireless

• Key Features• Designed for implementing speech vocoders to support VoIP applications for

CPE• Supports four simultaneous and independent voice channels

• G.168 echo cancellation• Vocoders: G.711, G.726, G.728, G.729A, G.729E• DTMF decode and DTMF encode• Jitter buffering

• ARC-3 DSP core with co-processor provides efficient & flexible soft solution • Bus master interface with built-in DMA for accessing host and system memory• Shared system memory eliminates need for a dedicated memory• Audio CODEC interface (SPORT) with AC’97 compliant audio CODEC

interface• Test chip available in 0.25µm technology• Complete reference design supports residential gateway application

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VoIP Software Architecture

GATEWAY APPLICATION

MGCP

RTOSKERNEL UDP

ETHERNETDevice Driver

VOCODERs(G.’s)

IP NETWORK PCM

RTP

IP

JITTERBUFFER

SCHEDULER

BUFFER MANAGER

VoIP Chip Device Driver

VoIP API

HO

ST A

RC

SPORT DriverVO

IP T

ES

T C

HIP

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VoIP Test Chip Block Diagram

text

ARC-3RISC Core

IRQ

DebugPort

DSP Engine

VOIP Test Chip

GPIO

PCM

Host Bus

DebugPort

Interrupt

Memory Bus

AHB Bus

JTAG JTAG

ARC/AHB BUS Inteface GPIO

SPORT

BUSInterface

Unit

Memory

DMA

CacheXYMemory

LoadStore

AuxRegister

Co-Processor

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VoIP Evaluation System – Home Gateway

HOST

IP NETWORK

VoIP Evaluation System

ARC-3

SDRAM

FLASH

Ethernet

VoIP Test Chip

AFE

MemorySequencerArbiterDebug

FPGAPowerInput

RS232C

PCInterface

4-ChannelVoice

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Bluetooth Software Architecture

L2CAP

RFCOMM

Host Drivers and Applications

SDP

PPP

Middle-Ware

TCP/UDP TCSBin

Middle-wareOBEXMiddle-ware

IP

HCI-Upper

Bluetooth Host Controller

IrMC Middle-Ware

ProtocolSupport Software Provided by Fujitsu

Bluetooth Link Controller

Link Manager Protocol

L2CAP

RFCOMMSDP

PPP

TCP/UDP TCSBin

Middle-wareOBEXMiddle-Ware

IP

Embedded SystemHost Drivers and Applications

Middle-Ware IrMC Middle-Ware

Transport Bus

Bluetooth Link Controller

Link Manager Protocol

HCI-Lower

Bluetooth RadioBluetooth RadioBluetooth RadioBluetooth Radio

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Bluetooth Evaluation System

RF-LSIReference Board

RF LSIModule

ANT

EvaluationBoard

BasebandLSI

MB86C00

FlashROM

TX

RX

RS232C

JTAG

ProtocolMonitor

FirmwareBoot

CODECMB86437

A-lawu-law

Ext Bus

USB

RS232COscilloscope

ARM7Multi-ICE

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EvaluationBoard

FLASHROM

Baseband LSIMB86C00

RS232C x 2chUSB

CODECMB86437

Mic Sp

Bluetooth Evaluation System

Multi-ICERF Module

11Fujitsu Microelectronics America, Inc. 02/02

Fujitsu ARM Reference Platform

• Mainly designed for enabling the ASIC/ASSP designer to design ARM core blocks efficiently for fast time to market

• Flexible RTL source codes are integrated in order to meet customdesign requirements

• Based on single-chip microcontroller “ARMONDE”• Peripheral modules have already been evaluated in ARMONDE• Verification program for the ARMONDE chip can be run on the

PISTACHIO design without any changes• ARMONDE: a header board mounted on the “Nuts Farm” board for

evaluation of the ARM core and micro functions. • Nuts Farm: a general-purpose evaluation board to evaluate the

functions of the ARM core and micros, including ARM7TDMI core (ARMONDE)

Pistachio

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Fujitsu ARM Reference Platform

Pistachio Block Diagram

AHB-APBBridge

ARM7TDMI+

Cache

Decoder

Arbiter

DMAC8ch

ExternalBus I/F

InternalMemory

DefaultSlave

DummySlave

DummyMaster

IRC ExternalIRC 4ch

16-bitTimer 2ch

Config.Register

ClockControl

AHB

APB

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Fujitsu ARM Reference Platform

ARMONDE Test Chip

APB (Advanced Peripheral Bus) APBW

Timer

AHB (ARM High speed Bus)

DecoderArbiter

UART

AHBWrapper

TAPcont Unified 16KB AHB

repeaterARM7TDMIICE I/F

ExternalBusI/F

CacheController

DMAC8ch

128KBSRAM

AHB-APBbridge

ClockControl

Interrupt Control

AHB-APBWBridgeRemap

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ARMO

NDE

Daug

hter

Boa

rdFujitsu ARM Reference Platform

FPGA

B

FPGA

A

FLAS

H Me

mory

4MB

SRAM

2MB

LAN

Contr

oller

EPRO

M

Available for user logic Available for user logic

Nuts Farm Mother Board

AHB

External Bus

Seria

l Por

t2

Seria

l Por

t1

JTAG

Por

t

ARMO

NDE

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Fujitsu ARM Reference Platform

Nuts Farm Option

AHB-APBBridge

ARMdummy

+Cache

Decoder

Arbiter

DMACdummy

ExternalBus I/F

InternalMemory

DefaultSlave

AHBRepeater

IRC ExternalIRC 4ch

16-bitTimer 2ch

Config.Register

ClockControl

AHB

APB

FPGA A

AHB-APBBridge

RepeaterI/F

Decoder

DMAC2ch

UART2ch

Config.Register

AHB

APB

FPGA BACT I/F

ACT725ARM7TDMITest chip