gan technology for optoelectronics & electronics · 2020. 4. 10. · ganext | gan technology...
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Coordinated by CRHEA-CNRS research laboratory, this monthly newsletter is produced by Knowmade in collaboration with the managers of GANEXT groups. The newsletter presents a selection of newest scientific publications, patent applications and press releases related to Optoelectronics (LED, micro-LED, laser, photonics, etc.) and Electronics (Power, RF, advanced electronics, etc.) based on III-Nitride semiconductors (GaN, AlN, InN and alloys).
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GANEXT
Cluster of Excellence (Labex, 2020-2024) GANEXT is a cluster gathering French research teams involved in GaN technology. The objective of GANEXT is to strengthen the position of French academic players in terms of knowledge and visibility, and reinforce the French industrial players in terms of know-how and market share. GANEXT replaces and succeed GANEX Cluster of Excellence (Labex 2012-2019). www.ganex.fr
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GANEXT Newsletter No. 03 April 2020
GaN Technology for Optoelectronics & Electronics
GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 03 | 2
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IMPORTANT NOTE: The end of GaNeX Cluster of Excellence program (Labex 2012-2019) was scheduled on December 2019. However, the French government decided to expand the labex program for five additional years, in order to further strengthen the synergy between French academic research organizations and industrial players in the field of GaN optoelectronics and electronics. Therefore, GANEXT Cluster of Excellence program will replace and succeed GaNeX for the next five years (2020-2024). Accordingly, the GANEXT newsletter will follow and adapt to the new program, focusing on scientific publications, patent applications and press releases related to optoelectronics (LED, µ-LED, laser, photonics, etc.) and electronics (power, RF, advanced electronics, etc.), ruling out publications which are not related to one of these two families of applications. For instance, publications dealing with MEMS, sensors, photovoltaics, nanostructures, semi-polar and non-polar materials, fundamental physics, etc. that do not obviously relate to optoelectronic or electronic applications will not be included in the GANEXT newsletter. Besides, a panel of GANEXT experts will continue to interact with Knowmade team in order to select the most relevant publications of the month, consistently with GANEXT’s ongoing projects.
TABLE OF CONTENTS
METHODOLOGY ........................................................................................................... 3
SCIENTIFIC PUBLICATIONS............................................................................................ 4
OPTOELECTRONICS ....................................................................................................... 4
ELECTRONICS .............................................................................................................. 16
PRESS RELEASES ......................................................................................................... 33
PATENT APPLICATIONS .............................................................................................. 65
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METHODOLOGY
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SCIENTIFIC PUBLICATIONS Selection of new scientific articles
OPTOELECTRONICS Group leader: Bruno Gayral (CEA)
Information selected by Julien Brault (CNRS-CRHEA) and Maria Tchernycheva (CNRS-C2N) Material-to-device performance correlation for
AlGaN-based solar-blind p–i–n photodiodes Centre for Nano Science and Engineering, Indian Institute of
Science, Bangalore, 560012, India
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab5df8
We report on crystalline quality-to-device
performance correlation for self-powered
Al0.40Ga0.60N, p–i–n ultraviolet (UV) photodetectors
on c-plane sapphire. The active p–i–n detector stack
was grown over an AlN buffer. Careful optimization of
the nucleation density on growth surface helped
achieve a two-orders and one-order of magnitude
reduction in the screw and edge dislocation density in
the buffer layer, respectively. This resulted in a nine-
orders of magnitude reduction in the reverse leakage
current from 4.3 mA to 4.2 pA (at 10 V).
Correspondingly, a thirteen-fold enhancement in the
zero-bias external quantum efficiency (EQE) from 3.4%
to 45.5%, when measured under 289 nm front-
illumination was also observed. The detector epi-stack
grown over the optimal AlN buffer layers led to the
realization of high-performance p–i–n detectors with
a dark current density below 4 nA cm−2 at 10 V and a
zero-bias EQE of 74.7% under back-illumination. This
is one of the highest zero-bias EQE reported for solar-
blind detectors realized on template-free and mask-
free III-nitrides grown using metal organic chemical
vapor deposition on any substrate. The deep-UV-to-
visible rejection ratio exceeded 106 while the deep-
UV-to-near UV rejection exceeded 103. The thermal-
noise limited detectivity was estimated to be 4 × 1014
cm Hz1/2 W−1. Hopping conduction along screw
dislocation-mediated localized trap states was found
to be the dominant carrier transport mechanism in the
samples exhibiting high reverse leakage. For these
samples, the responsivity (photocurrent) exhibited an
exponential variation with reverse bias and a
nonlinear variation with input optical power. This is
explained using a hole-trapping associated gain
mechanism and its impact on the transient
characteristics of the detectors is investigated. A 6 × 1
linear array of the highest EQE detectors was realized
and detector performance parameters were found to
be comparable before and after wire bonding. This
study is expected to enhance the understanding of III-
nitrides-based vertical, self-powered detectors and
benefit the development of high-performance, focal
plane arrays using less complicated growth
techniques.
Strongly localized carriers in Al-rich AlGaN/AlN single
quantum wells grown on sapphire substrates OSRAM Opto Semiconductors GmbH, Leibnizstr. 4, 93055
Regensburg, Germany
Institut für Festkörperphysik, Technische Universität Berlin,
Hardenbergstr. 36, 10623 Berlin, Germany
Journal of Applied Physics
https://doi.org/10.1063/1.5144152
Carrier dynamics in AlGaN-based single quantum well
(QW) structures grown on sapphire are studied by
means of time-integrated and time-resolved
photoluminescence spectroscopy (PL) in a wide
temperature range from 5 K to 350 K. The samples
cover a broad compositional range, with aluminum
contents ranging between 42% and 60% and QW
widths between 1.5 nm and 2.5 nm. All samples reveal
the characteristic “S”-shape temperature dependence
of the PL emission energy as frequently reported in
InGaN-based systems, albeit with significantly larger
localization strengths of up to 60 meV. It is shown that
in the compositional range investigated, carrier
localization is determined primarily by the QW width
and, in contrast, exhibits a much weaker dependence
on aluminum concentration. By the combination of
time-integrated and time-resolved PL measurements,
the localization of carriers is demonstrated to have a
significant impact on the recombination dynamics of
AlGaN/AlN QWs grown on sapphire, heavily affecting
the internal quantum efficiency and efficiency droop
even in standard LED operation conditions.
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Simultaneous emission–detection operation of
vertical-structure LED Nanjing University of Posts and Telecommunications,
Nanjing, People's Republic of China
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab7215
The overlap between the emission and detection
spectra of an LED allows one single LED to exhibit both
light emission and detection simultaneously, wherein
the LED can function as a transmitter and a receiver at
the same time for communication using light. Here, we
report the simultaneous emission–detection
operation of vertical-structure LEDs, which are
implemented on an III-nitride-on-silicon platform. The
III-nitride epitaxial films are thinned without an etch
hard mask to suppress optically-confined modes
inside the LED. The simultaneous emission–detection
operation occurs when the forward voltage of the LED
is larger than the turn-on voltage V th. The measured
current is a sum of the driving current and the
photocurrent generated by external light. By
integrating a feedback circuit, the photocurrent is
extracted from the superimposed current and
consequently converted into a control signal to
regulate the driving current, leading to the automatic
adjustment of light output of the LED.
Room-temperature operation of AlGaN ultraviolet-B
laser diode at 298 nm on lattice-relaxed
Al0.6Ga0.4N/AlN/sapphire Innovative Devices R&D Center, Asahi-Kasei Corporation,
Fuji, Shizuoka 416-8501, Japan
Faculty of Science and Technology, Meijo University,
Nagoya, Aichi 468-8502, Japan
Graduate School of Regional Innovation Studies, Mie
University, Tsu, Mie 514-8507, Japan
Akasaki Research Center, Nagoya University, Nagoya, Aichi
464-8603, Japan
Applied Physics Express
https://doi.org/10.35848/1882-0786/ab7711
An AlGaN ultraviolet-B laser diode at 298nm was
realized at room temperature using pulse operation.
The laser diode has a lattice-relaxed Al0.6Ga0.4N layer
from the underlying AlN/sapphire template and a
composition-graded p-AlGaN cladding layer. The
multimodal laser spectrum with proper polarization
properties at 298 nm was obtained over the threshold
current at 0.90 A corresponding to 67kA.cm–2. By
broadening the width of the p-electrode to 11.5μm,
the threshold current density decreased to 41kA.cm–2.
Evidence for trap-assisted Auger recombination in
MBE grown InGaN quantum wells by electron
emission spectroscopy Materials Department, University of California, Santa
Barbara, California 93106, USA
Institute of Applied Research, Vilnius University, Sauletekio
9-3, 10222 Vilnius, Lithuania
Laboratoire de Physique de la Matière Condensée, CNRS,
Ecole Polytechnique, IP Paris, 91128 Palaiseau Cedex,
France
Applied Physics Letters
https://doi.org/10.1063/1.5125605
We report on the direct measurement of hot electrons
generated in the active region of blue light-emitting
diodes grown by ammonia molecular beam epitaxy by
electron emission spectroscopy. The external
quantum efficiency of these devices is <1% and does
not droop; thus, the efficiency losses from the
intrinsic, interband, electron–electron–hole, or
electron–hole–hole Auger should not be a significant
source of hot carriers. The detection of hot electrons
in this case suggests that an alternate hot electron
generating process is occurring within these devices,
likely a trap-assisted Auger recombination process.
Ultraviolet Stimulated Emission in AlGaN Layers
Grown on Sapphire Substrates using Ammonia and
Plasma‐Assisted Molecular Beam Epitaxy Institute of Physics of NAS of Belarus, 68 Nezalezhnasci Ave,
Minsk, 220072 Belarus
physica status solidi a
https://doi.org/10.1002/pssa.201900927
Ammonia and plasma‐assisted (PA) molecular beam
epitaxy modes are used to grow AlN and AlGaN
epitaxial layers on sapphire substrates. It is
determined that the increase of thickness of AlN
buffer layer grown by ammonia‐MBE from 0.32 μm to
1.25 μm results in the narrowing of 101 X‐Ray rocking
curves whereas no clear effect on 002 X‐Ray rocking
curve width is observed. It is shown that strong GaN
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decomposition during growth by ammonia‐MBE
causes AlGaN surface roughening and compositional
inhomogeneity, which leads to deterioration of its
lasing properties. AlGaN layers grown by ammonia‐
MBE at optimized temperature demonstrate
stimulated emission (SE) peaked at λ = 330 nm, 323
nm, 303 nm and 297 nm with the SE threshold values
of 0.7 MW cm−2, 1.1 MW cm−2, 1.4 MW cm−2 and 1.4
MW cm−2, respectively. In comparison to these,
AlGaN layer grown using PA‐MBE pulsed modes
(migration‐enhanced epitaxy, metal‐modulated
epitaxy, and droplet elimination by thermal annealing)
shows a SE with a relatively low threshold (0.8 MW
cm−2) at the considerably shorter wavelength of λ =
267 nm.
Theoretical analysis of a white-light LED array based
on a GaN nanorod structure National Center for International Joint Research of
Electronic Materials and Systems, Henan Key Laboratory of
Laser and Opto-electric Information Technology, School of
Information Engineering, Zhengzhou University, Zhengzhou
450052, China
Department of Traffic Information Engineering, Henan
College of Transportation, Zhengzhou 450005, China
Institute of Photonics and Optoelectronics, and Department
of Electrical Engineering, National Taiwan University, No. 1,
Section 4, Roosevelt Road, Taipei 10617, Taiwan
Applied Optics
https://doi.org/10.1364/AO.387059
Based on the experimentally demonstrated In content
distribution in the InGaN/GaN quantum wells on a
two-section GaN nanorod (NR) sidewall, a white-light
light-emitting diode (LED) without phosphor is
designed and simulated. Following the dependencies
of the In diffusion length and incorporation ratio on NR
geometric variables of a theoretical model, the height,
radius, and tapering section geometry of the GaN NR
are designed for controlling the relative intensities of
a blue and a yellow emission component to mix into
white light. The higher-In upper section of the NR is
first excited to emit a relatively stronger yellow
component when injection current is low. As the
injection current increases, more current spreads into
the lower-In lower section, eventually leading to a
stronger blue emission component. The proposed NR
LED structure provides an alternative solution for
phosphor-free white-light generation.
Intrinsically p-type cuprous iodide semiconductor for
hybrid light-emitting diodes Peta Lux Inc., 3F TLi Building, 12 Yanghyeon-ro, 405 beon-
gil, Jungwon-gu, Seongnam-si, Gyeonggi-do, 13438,
Republic of Korea
Department of Electrical and Computer Engineering and
Center for Quantum Information Processing, University of
Seoul, 163 Seoulsiripdae-ro, Dongdaemun-gu, Seoul, 02504,
Republic of Korea
Physics Department, Charles E. Schmidt College of Science,
Florida Atlantic University, 777 Glades Road, Boca Raton, FL,
33431-0991, USA
Post-Silicon Semiconductor Institute, Korea Institute of
Science and Technology Hwarang-ro 14 gil, Seoungbuk-ku,
Seoul, 02792, Republic of Korea
Department of Physics, Kyung Hee University, 26
Kyungheedae-ro, Dongdaemun-gu, Seoul, 02447, Republic
of Korea
Electronics Department, Catholic University of Daegu, 13
Hayang-Ro, Hayang-Eup, Gyeongsan-si, Gyeongbuk, 38430,
Republic of Korea
WONIK IPS, 75 Jinwisandan-ro, Jinwi-myeon, Pyeingtaek-si,
Gyeonggi-do, 17709, Republic of Korea
TLi Inc., 10 F TLi Building, 12 Yanghyeon-ro, 405 beon-gil,
Jungwon-gu, Seongnam-si, Gyeonggi-do, 13438, Republic of
Korea
Department of Materials Science & Engineering, Yonsei
University, 50 Yonsei-ro, Seodaemun-gu, Seoul, 03722,
Republic of Korea
Yonsei-KIST Convergence Research Institute, 50 Yonsei-ro,
Seodaemun-gu, Seoul, 03722, Republic of Korea
Scientific Reports
https://doi.org/10.1038/s41598-020-61021-2
Cuprous halides, characterized by a direct wide band-
gap and a good lattice matching with Si, is an intrinsic
p-type I-VII compound semiconductor. It shows
remarkable optoelectronic properties, including a
large exciton binding energy at room temperature and
a very small piezoelectric coefficient. The major
obstacle to its application is the difficulty in growing a
single-crystal epitaxial film of cuprous halides. We first
demonstrate the single crystal epitaxy of high quality
cuprous iodide (CuI) film grown on Si and sapphire
substrates by molecular beam epitaxy. Enhanced
photoluminescence on the order of magnitude larger
than that of GaN and continuous-wave optically
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pumped lasing were found in MBE grown CuI film. The
intrinsic p-type characteristics of CuI were confirmed
using an n-AlGaN/p-CuI junction that emits blue light.
The discovery will provide an alternative way towards
highly efficient optoelectronic devices compatible
with both Si and III-nitride technologies.
On the origin for the hole confinement into apertures
for GaN-based VCSELs with buried dielectric
insulators School of Electronics and Information Engineering, Hebei
University of Technology, Key Laboratory of Electronic
Materials and Devices of Tianjin, 5340 Xiping Road, Beichen
District, Tianjin, 300401, China
State Key Laboratory of Reliability and Intelligence of
Electrical Equipment, 5340 Xiping Road, Beichen District,
Tianjin, 300401, China
Optics Express
https://doi.org/10.1364/OE.385787
A better lateral current confinement is essentially
important for GaN-based vertical-cavity-surface-
emitting lasers (VCSELs) to achieve lasing condition.
Therefore, a buried insulator aperture is adopted.
However, according to our results, we find that the
current cannot be effectively laterally confined if the
insulator layer is not properly selected, and this is
because of the unique feature for GaN-based VCSELs
grown on insulating substrates with both p-electrode
and n-electrode on the same side. Our results indicate
that the origin for the current confinement arises from
lateral energy band bending in the p-GaN layer rather
than the electrical resistivity for the buried insulator.
The lateral energy band in the p-GaN layer can be
more flattened by using a buried insulator with a
properly larger dielectric constant. Thus, less bias can
be consumed by the buried insulator, enabling better
lateral current confinement. On the other hand, the
bias consumption by the buried insulator is also
affected by the insulator thickness, and we propose to
properly decrease the insulator layer thickness for
reducing the bias consumption therein and achieving
better lateral current confinement. The improved
lateral current confinement will correspondingly
enhance the lasing power. Thanks to the enhanced
lateral current confinement, the 3dB frequency will
also be increased if proper buried insulators are
adopted.
GaN Single Nanowire p–i–n Diode for High-
Temperature Operations ECE Department, Hong Kong University of Science and
Technology, Kowloon 999077, Hong Kong
School of Information Science and Technology,
ShanghaiTech University, Shanghai 201210, China
ACS Appl. Electron. Mater.
https://doi.org/10.1021/acsaelm.9b00801
III-Nitride single nanowire (NW)-based p–i–n diode
was fabricated using a top–down etching method and
its electrical and optoelectronic characteristics were
investigated from room temperature to high
operation temperatures up to 150 °C. The NW p–i–n
diode exhibited good rectifying I–V properties at all
measurement temperatures and the forward current
could be further enhanced when the temperature was
increased. Simulation-based data fitting revealed that
the enhanced conduction was a result of increased
carrier concentration inside the NW, especially holes
in the drift layer, as well as reduced contact resistance.
The reverse leakage current was kept low even at
elevated temperatures so that the UV (∼365 nm)
responsivity remained high for a wide temperature
range, suggesting the feasibility of NW p–i–n diode for
rectifying purposes and UV photon detection
applications in high-temperature environments.
Room-temperature operation of near-infrared light-
emitting diode based on Tm-doped GaN with ultra-
stable emission wavelength Division of Materials and Manufacturing Science, Graduate
School of Engineering, Osaka University, 2-1 Yamadaoka,
Suita, Osaka 565-0871, Japan
Journal of Applied Physics
https://doi.org/10.1063/1.5140715
Near-infrared (NIR) light with a wavelength of 650–
950 nm is used for various biomedical applications.
Although NIR emitters are typically based on GaAs-
related materials, they contain toxic elements, and the
emission wavelength can easily shift during the device
operation due to temperature changes and current
injection levels. On the other hand, Tm3+, which is one
of the rare-earth ions, can generate ultra-stable NIR
luminescence with a wavelength of ∼800nm, based on
3H4–3H6 transitions in a 4f shell, and we have recently
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focused on Tm-doped GaN (GaN:Tm) based light-
emitting diodes (LEDs) as novel NIR emitters. In this
paper, we present a demonstration of a NIR-LED based
on GaN:Tm grown by the organometallic vapor phase
epitaxy method with optimized growth conditions and
structures, where the parasitic reaction is well
suppressed. NIR luminescence from the GaN:Tm-
based LED is derived from 3H4–3H6 transitions of
Tm3+ ions and consists of three dominant peaks at
795, 806, and 814 nm. The turn-on voltage of the NIR-
LED is ∼6.9 V, and it is significantly lower than the
previously reported electroluminescent devices based
on GaN:Tm with impact ionization processes. From a
current dependence of the electroluminescence
spectra and temperature-dependent
photoluminescence for the NIR-LED, the peak shifts
are determined to be <7.6 pm/mA and ∼1.3 pm/K,
respectively.
Growth of strain-relaxed InGaN on micrometer-sized
patterned compliant GaN pseudo-substrates Department of Electrical and Computer Engineering,
University of California Santa Barbara, Santa Barbara,
California 93106, USA
Materials Department, University of California, Santa
Barbara, California 93106, USA
Department of Physics, University of California, Santa
Barbara, California 93106, USA
Applied Physics Letters
https://doi.org/10.1063/5.0001480
The compliant behavior of high fill-factor 10 × 10 μm2
square patterned 60–140 nm thick GaN-on-porous-
GaN tiles was demonstrated by utilizing porous GaN as
a semi-flexible underlayer. High resolution x-ray
diffraction measurements showed a larger a-lattice
constant of InGaN layers deposited on these
patterned GaN-on-porous GaN pseudo-substrates in
comparison to those deposited on co-loaded planar
GaN-on-sapphire templates. Additionally, InGaN
based light emitting diode (LED) structures deposited
on these GaN pseudo-substrates exhibited room
temperature electroluminescence at 547 nm
compared to 506 nm for the LED structures grown on
co-loaded planar GaN on sapphire templates,
corresponding to a redshift of around 40 nm. The
longer emission wavelength was associated with the
higher indium incorporation into the InGaN quantum
wells deposited on the compliant GaN pseudo-
substrates, owing to a reduced lattice mismatch
between the quantum well and the n-InGaN base
layers grown on the compliant pseudo-substrates, due
to the composition pulling effect.
Development of microLED Department of Electrical and Computer Engineering, Texas
Tech University, Lubbock, Texas 79409, USA
Applied Physics Letters
https://doi.org/10.1063/1.5145201
This perspective provides an overview of early
developments, current status, and remaining
challenges of microLED (μLED) technology, which was
first reported in Applied Physics Letters in 2000 [S. X.
Jin, J. Li, J. Z. Li, J. Y. Lin and H. X. Jiang, "GaN Microdisk
Light Emitting Diodes," Appl. Phys. Lett. 76, 631
(2000)]. Today, microLED is recognized as the ultimate
display technology and is one of the fastest-growing
technologies in the world as technology giants utilize
it on a wide range of products from large flat panel
displays and televisions, wearable displays, and virtual
reality displays to light sources for the neural interface
and optogenetics. It is anticipated that the collective
R&D efforts worldwide will bring microLED products
not only to the mass consumer electronic markets but
also to serve the society on the broadest scale by
encompassing sectors in medical/health, energy,
transportation, communications, and entertainment.
Role of underlayer for efficient core-shell InGaN QWs
grown on m-plane GaN wire sidewalls Univ. Grenoble Alpes, CEA, IRIG, PHELIQS, NPSC, Grenoble
38000, France
Univ. Grenoble Alpes, CNRS, Institut Néel, Grenoble 38000,
France
Univ. Grenoble Alpes, CEA, IRIG, MEM, LEMMA, Grenoble
38000, France
Univ. Grenoble Alpes, CEA, IRIG, MEM, NRS, Grenoble
38000, France
ACS Appl. Mater. Interfaces
https://doi.org/10.1021/acsami.9b19314
Different types of buffer layers like InGaN underlayer
(UL) and InGaN/GaN superlattices are now well-
known to significantly improve the efficiency of c-
plane InGaN/GaN based light emitting diodes (LEDs).
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The present work investigates the role of two different
kinds of pre-growth layers (low In-content InGaN UL
and GaN UL namely “GaN spacer”) on the emission of
core-shell m-plane core-shell single InGaN/GaN
quantum well (QW) grown around Si-doped c -̅GaN
microwires obtained by silane-assisted MOVPE.
According to photo- and cathodoluminescence
measurements performed at room temperature, an
improved efficiency of light emission at 435 nm with
internal quantum efficiency > 15 % has been achieved
by adding a GaN spacer prior to the growth of QW. As
revealed by scanning transmission electron
microscopy, an ultra-thin residual layer containing Si
located at the wire sidewall surfaces favors the
formation of high-density of extended defects
nucleated at the first InGaN QW. This contaminated
residual incorporation is buried by the growth of GaN
spacer and avoids the structural defect formation,
therefore explaining the improved optical efficiency.
No further improvement is observed by adding the
InGaN UL to the structure, which is confirmed by
comparable values of the effective carrier lifetime
estimated from time-resolved (TR) experiments.
Contrary to the case of planar c-plane QW where the
improved efficiency is attributed to a strong decrease
of point defects, the addition of an InGaN UL seem to
have no influence in the case of radial m-plane QW.
Realization of ultra-high quality InGaN platelets to be
used as relaxed templates for red microLEDs NanoLund, Lund University, Box 118, S-221 00 Lund,
Sweden
RISE Research Institutes of Sweden AB, 22370 Lund, Sweden
Division of Synchrotron Radiation Research, Department of
Physics, Lund University, Box 118, S-221 00 Lund, Sweden
Department of Mechanical Engineering, Lund University,
Box 118, S-22100 Lund, Sweden
ACS Appl. Mater. Interfaces
https://doi.org/10.1021/acsami.0c00951
In this work, arrays of predominantly relaxed InGaN
platelets with indium contents of up to 18%, free from
dislocations and offering a smooth top c-plane, are
presented. The InGaN platelets are grown by metal-
organic vapor phase epitaxy on a dome-like InGaN
surface formed by chemical mechanical polishing of
InGaN pyramids defined by six equivalent {101 1̅}
planes. The dome-like surface is flattened during
growth, through the formation of bunched steps,
which are terminated when reaching the inclined
{101 1̅} planes. The continued growth takes place on
the flattened top c-plane with single bilayer surface
steps initiated at the six corners between the c-plane
and the inclined {101 1̅} planes, leading to the
formation of high quality InGaN layers. The top c-plane
of the as-formed InGaN platelets can be used as a
high-quality template for red microLEDs.
Graphene‐Assisted Epitaxy of Nitrogen Lattice
Polarity GaN Films on Non‐Polar Sapphire Substrates
for Green Light Emitting Diodes State Key Laboratory for Mesoscopic Physics and Frontiers
Science Center for Nano-optoelectronics School of Physics,
Peking University, Beijing 100871, P. R. China
State Key Laboratory of Integrated Optoelectronics, College
of Electronic Science and Engineering, Jilin University,
Changchun 130012, P. R. China
Electron Microscopy LaboratorySchool of Physics, Peking
University, Beijing 00871, P. R. China
Collaborative Innovation Center of Quantum Matter, Beijing
100871, P. R. China
Advanced Functional Materials
https://doi.org/10.1002/adfm.202001283
Lattice polarity is a key point for hexagonal
semiconductors such as GaN. Unfortunately, only Ga‐
polarity GaN have been achieved on graphene till now.
Here, the epitaxy of high quality nitrogen‐polarity GaN
films on transferred graphene on non‐polar sapphire
substrates by molecular beam epitaxy is reported. This
success is achieved through atomic nitrogen
irradiation, where C N bonds are formed in graphene
and provide nucleation sites for GaN and leading to N‐
polarity GaN epitaxy. The N‐polarity characteristics are
confirmed by chemical etching and transmission
electron microscopy measurement. Due to the higher
growth temperature of InGaN at N‐polarity than that
at Ga‐polarity, green light emitting diodes are
fabricated on the graphene‐assisted substrate, where
a large redshift of emission wavelength is observed.
These results open a new avenue for the polarity
modulation of III‐nitride films based on 2D materials,
and also pave the way for potential application in
longer wavelength light emitting devices.
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Subwavelength-scale nanorods implemented
hexagonal pyramids structure as efficient light-
extraction in Light-emitting diodes Department of Materials Science and Engineering, Pohang
University of Science and Technology (POSTECH), Pohang,
790-784, Korea
Division of Advanced Materials Science, Pohang University
of Science and Technology (POSTECH), Pohang, 790-784,
Korea
Scientific Reports
https://doi.org/10.1038/s41598-020-62257-8
Subwavelength-scale nanorods were implemented on
the hexagonal pyramid of photochemically etched
light-emitting diodes (LEDs) to improve light
extraction efficiency (LEE). Sequential processes of Ag
deposition and inductively coupled plasma etching
successfully produce nanorods on both locally
unetched flat surface and sidewall of hexagonal
pyramids. The subwavelength-scale structures on flat
surface offer gradually changed refractive index, and
the structures on side wall of hexagonal pyramid
reduce backward reflection, thereby enhancing
further enhancement of the light extraction efficiency.
Consequently, the nanorods implemented LED shows
a remarkable enhancement in the light output power
by 14% compared with that of the photochemically
etched LEDs which is known to exhibit the highest light
output power. Theoretical calculations using a
rigorous coupled wave analysis method reveal that the
subwavelength-scale nanorods are very effective in
the elimination of TIR as well as backward reflections,
thereby further enhancing LEE of the LEDs.
TE/TM mode full-spatial decomposition of AlGaN-
based deep ultraviolet light-emitting diodes Wuhan National Laboratory for Optoelectronics, Huazhong
University of Science and Technology, Wuhan 430074,
People's Republic of China
Journal of Physics D: Applied Physics
https://doi.org/10.1088/1361-6463/ab740b
The full-spatial decomposition of transverse electric
(TE)/transverse magnetic (TM) mode in AlGaN-based
deep ultraviolet light-emitting diodes (DUV-LEDs) has
been experimentally investigated by introducing self-
built light intensity test system mainly composed of
angle resolution bracket, Glan–Taylor prism and
spectrometer. Through roughening the sapphire
sidewall, the extraction efficiency of DUV-LED is
improved, for both TE and TM mode light with no
polarization selectivity. The introduction of self-built
light intensity metrology system has been reflected via
scribing the sapphire sidewalls using various laser
conditions, which show a reliability in the
enhancement validation of the light extraction
efficiency. More importantly, the self-built light
intensity test system enables effective feedback on
epitaxial structures and chip structure design and
provides a new perspective to design high efficiency
AlGaN-based DUV-LEDs.
Self-Aligned Hierarchical ZnO Nanorod/NiO
Nanosheet Arrays for High Photon Extraction
Efficiency of GaN-Based Photonic Emitter Department of Advanced Convergence Technology,
Research Institute of Advanced Convergence Technology,
Korea Polytechnic University, Gyeonggi-do 15073, Korea
Department of Nano & Semiconductor Engineering, Korea
Polytechnic University, Gyeonggi-do 15073, Korea
Department of Electrical Engineering and Computer
Science, University of Michigan, Ann Arbor, MI 48109, USA
Micromachines
https://doi.org/10.3390/mi11040346
Advancements in nanotechnology have facilitated the
increased use of ZnO nanostructures. In particular,
hierarchical and core–shell nanostructures, providing
a graded refractive index change, have recently been
applied to enhance the photon extraction efficiency of
photonic emitters. In this study, we demonstrate self-
aligned hierarchical ZnO nanorod (ZNR)/NiO
nanosheet arrays on a conventional photonic emitter
(C-emitter) with a wavelength of 430 nm. These
hierarchical nanostructures were synthesized through
a two-step hydrothermal process at low temperature,
and their optical output power was approximately
17% higher than that of ZNR arrays on a C-emitter and
two times higher than that of a C-emitter. These
results are due to the graded index change in
refractive index from the GaN layer inside the device
toward the outside as well as decreases in the total
internal reflection and Fresnel reflection of the
photonic emitter.
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A new model on recombination dynamics of polar
InGaN/GaN MQW LED and IQE measurement Laboratory of optoelectronic materials & detection
technology, Guangxi Key Laboratory for the Relativistic
Astrophysics, School of Physics Science & Technology,
Guangxi University, Nanning, 530004 People's Republic of
China
Center on Nanoenergy Research, Guangxi University,
Nanning, 530004 People's Republic of China
HC Semitek Corporation, Zhangjiagang, 215600 People's
Republic of China
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab73ed
Understanding the recombination nature in a polar
InGaN/GaN multiple quantum well (MQW) light-
emitting diode (LED) or similar device is critical for
their further performance enhancements. This paper
reports a new theoretical model for investigating the
recombination dynamics in MQW LEDs, which more
comprehensively takes both localized exciton
recombination (LER) and free carrier recombination
(FCR) into account. The obtained rates for LER, FCR
and nonradiative recombination show a clear picture
of recombination paths in a commercial blue MQW
LED wafer. They can be also used to calculate the
internal quantum efficiency without involving any
extra measurements or prerequisites. This model may
provide a universal solution to express the
complicated recombination dynamics in various kinds
of MQW LEDs.
Room-temperature continuous-wave operation of
green vertical-cavity surface-emitting lasers with a
curved mirror fabricated on {20−21} semi-polar GaN R & D Center, Sony Corporation, 4-14-1 Atsugi, Kanagawa,
Japan
Applied Physics Express
https://doi.org/10.35848/1882-0786/ab7bc8
We demonstrate a room-temperature continuous-
wave operation of green vertical-cavity surface-
emitting laser (VCSEL) with a 20 μm long cavity
possessing a dielectric curved mirror formed over a
{20−21} semi-polar gallium nitride substrate. The
emission wavelength and the threshold current were
515 nm and 1.8 mA, respectively. We also confirmed
that white light is generated by overlaying three prime
colors of light, i.e. red, blue and green, emitted only
from VCSEL.
GaN-based vertical cavity surface emitting lasers
with lateral optical confinements and conducting
distributed Bragg reflectors Department of Materials Science, Meijo University, 1-501
Shiogamaguchi, Tempaku-ku, Nagoya 468-8502, Japan
Akasaki Research Center, Nagoya University, Furo-cho,
Nagoya 468-8603, Japan
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab6e05
We aimed to further improve performances of GaN-
based vertical cavity surface emitting lasers (VCSELs)
by applying a combination of conducting distributed
Bragg reflectors (DBRs) and lateral optical
confinement structures simultaneously, generally
used in GaAs-based VCSELs. Si-doped conducting
AlInN/GaN DBRs and buried SiO2 apertures were
adopted in the GaN-based VCSELs. By comparing the
VCSELs and micro LEDs to those with undoped non-
conducting DBRs, we found that lower device
resistances and more uniform lateral current
distributions were obtained with the conducting DBRs.
At the same time, the maximum light output power of
2.6 mW was observed from the VCSEL with the
conducting DBR while 4.4 mW was obtained from the
VCSEL with undoped DBR. Inferior characteristics of a
GaInN quantum well active region was found on the
Si-doped conducting DBR.
Effect of dislocation density on optical gain and
internal loss of AlGaN-based ultraviolet-B band lasers Department of Materials Science and Engineering Meijo
University, Nagoya 468-8502, Japan
Graduate School of Regional Innovation Studies, Mie
University, Tsu 514-8507, Japan
Asahi-Kasei Corporation, Fuji, Shizuoka 416-8501, Japan
Akasaki Research Center, Nagoya University, Nagoya 464-
8603, Japan
Applied Physics Express
https://doi.org/10.35848/1882-0786/ab7caf
We investigated the dependence of the lasing
threshold power density, optical gain, and internal loss
on the dislocation density of an optically pumped
AlGaN-based ultraviolet-B band laser. Reducing the
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dislocation density was found to not only increase the
optical gain by reducing the non-radiative
recombination centers but also reduce the internal
loss. Furthermore, this reduction in internal loss was
appropriately explained using an increased scattering
model based on an increase in the refractive index
fluctuations formed by the dislocations.
Investigation of coherency stress-induced phase
separation in AlN/AlxGa1-xN superlattices grown on
sapphire substrates Key Laboratory of Semiconductor Materials Science, and
Beijing Key Laboratory of Low Dimensional Semiconductor,
Materials and Devices, Institute of Semiconductors, Chinese
Academy of Sciences, P. O. Box 912, Beijing 100083,
People’s Republic of China
Center of Materials Science and Optoelectronics
Engineering, University of Chinese Academy of Sciences,
Beijing 101408, People’s Republic of China
Research Center of Electronic Manufacturing and Packaging
Integration, School of Power and Mechanical Engineering,
Wuhan University, Wuhan 430072, People’s Republic of
China
CrystEngComm
https://doi.org/10.1039/D0CE00147C
AlN/AlGaN superlattices (SLs) structure has been
proven promising for various applications including
deep ultraviolet light-emitting diodes. However, phase
separation in AlGaN of SLs leads to undesirable
changes in the optical and electrical properties of SL-
based devices. Herein, we investigate the influence of
the pulse duration on the compositional structure and
surface morphology of the upper AlGaN layer of
AlN/AlGaN SLs, grown on CVD-deposited single crystal
AlN template/sapphire substrate by pulsed metal-
organic chemical vapor deposition (MOCVD). Spectral
transmittance measurements reveal that phase
separation happened in the AlxGa1-xN layer of SLs
with inhomogeneous distribution of the aluminum
composition. The coherency stress and strain profiles
of AlN/AlGaN SLs were evaluated by finite element
simulations. High compressive stress in the upper
AlxGa1-xN layer and tensile stress in the underlying
AlN layer were observed for the SLs with a long pulse
duration. This increased stress in SLs facilitates the
exclusion of aluminum atoms, thus leading to the
apparent phase separation in the upper AlxGa1-xN
layer of SLs. Additionally, the effect of the shear strain
component at the interfaces on the piezoelectric
polarization of epitaxial layers was also discussed. This
study paves the avenue for preventing the phase
separation during the AlN/AlGaN SLs growth by
controlling the pulse mode configuration, thereby
offering new perspectives for the growth of high-
quality AlGaN epitaxial layers targeted for practical
applications.
In situ fabrication of Al surface plasmon
nanoparticles by metal–organic chemical vapor
deposition for enhanced performance of AlGaN deep
ultraviolet detectors State Key Laboratory of Luminescence and Applications,
Changchun Institute of Optics, Fine Mechanics and Physics,
Chinese Academy of Sciences, Changchun 130033, People's
Republic of China
Center of Materials Science and Optoelectronics
Engineering, University of Chinese Academy of Sciences,
Beijing 100049, People's Republic of China
College of Materials Science and Engineering, Shenzhen
University, Shenzhen 518071, People's Republic of China
Key Laboratory of Advanced Structural Materials, Ministry
of Education, Changchun University of Technology,
Changchun 130012, People's Republic of China
Nanoscale Advances
https://doi.org/10.1039/D0NA00022A
Al nanoparticles (NPs) have been proven to be the
efficient choice for plasmon enhanced AlGaN-based
ultraviolet (UV) photodetectors. Previous studies have
mainly been focused on the ex situ preparation of Al
NPs, but the in situ growth of Al NPs is more desired.
In this work, we predict the feasibility for in situ
growth of Al surface plasmon NPs on AlGaN-based UV
photodetectors by first-principles calculations, and
realized it experimentally by metal–organic chemical
vapor deposition. For metal–semiconductor–metal
type AlGaN-based photodetectors with in situ grown
Al surface plasmons, the peak of responsivity was at
288 nm, enhanced 9 times more than that without Al
NPs at 10 V bias. The in situ growth method of Al NPs
in the present work provides an efficient method for
improving the performance of AlGaN-based UV
photoelectric devices.
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Anisotropic properties of pipe-GaN distributed Bragg
reflectors Department of Materials Science and Engineering,
Innovation and Development Center of Sustainable
Agriculture, Research Center for Sustainable Energy and
Nanotechnology, National Chung Hsing University,
Taichung, 145 Xingda Rd., South Dist., Taichung 402, Taiwan
Department of Applied Materials and Optoelectronic
Engineering, National Chi Nan University, No.1, University
Rd., Puli Township, Nantou 545, Taiwan
Department of Chemical Engineering, Feng Chia University,
Seatwen, Taichung 407, Taiwan
Department of Electrical Engineering, Yale University, 15
Prospect St, New Haven, Connecticut, USA
Nanoscale Advances
https://doi.org/10.1039/C9NA00743A
We report here a simple and robust process to convert
periodic Si-doped GaN/undoped-GaN epitaxial layers
into a porous-GaN/u-GaN distributed Bragg reflector
(DBR) structure and demonstrate its material
properties in a high-reflectance epitaxial reflector.
Directional pipe-GaN layers with anisotropic optical
properties were formed from n+-GaN : Si layers in a
stacked structure through a lateral and doping-
selective electrochemical etching process. Central
wavelengths of the polarized reflectance spectra were
measured to be 473 nm and 457 nm for the pipe-GaN
reflector when the direction of the linear polarizer was
along and perpendicular to the pipe-GaN structure.
The DBR reflector with directional pipe-GaN layers has
the potential for a high efficiency polarized light
source and vertical cavity surface emitting laser
applications.
High doping efficiency in p-type Al-rich AlGaN by
modifying Mg doping planes State Key Laboratory of Optoelectronic Materials and
Technologies, School of Electronics and Information
Technology, Sun yat-sen University, Guangzhou 510275,
People’s Republic of China
Materials Advances
https://doi.org/10.1039/D0MA00026D
High doping efficiency of Mg dopant in Al-rich AlGaN
is highly desired for the AlGaN based deep ultraviolet
optoelectronics. In this work, the Mg doping planes
were modified by the pulsed group-III source,
according to the first-principles calculation results on
the Mg substituting Al or Ga on the surface and in the
bulk of Ai-rich AlGaN. The Mg-delta-doped AlxGa1-xN
(x~0.42) layer, using pulsed Ga source to modify the
doping planes, exhibits a very high hole concentration
of 8.3 × 1018 cm-3, which is 67% higher than that of
the reference one. A record doping efficiency of 51.9%
was achieved and the consequent resistivity is as low
as 0.51 Ω·cm. It was found that the Mg incorporation
was significantly enhanced and the acceptor activation
energy (EA) was substantially reduced, contributing to
the high doping efficiency. The improved
incorporation is attributed to the enhanced Mg
substitution for Al at the doping planes and the
increased substitution for Ga in the bulk by the
modification, whereas the decreased EA is ascribed to
the enlarged valence-band bending. This method
provides a simple and effective way to realize efficient
p-type doping of Al-rich AlGaN.
Multi-wavelength light emission from InGaN
nanowires on pyramid-textured Si (100) substrate
grown by stationary plasma-assisted molecular beam
epitaxy Guangdong Provincial Key Laboratory of Optical
Information Materials and Technology, South China
Academy of Advanced Optoelectronics, South China Normal
University, Guangzhou 510006, People’s Republic of China
National Center for International Research on Green
Optoelectronics, South China Normal University,
Guangzhou 510006, People’s Republic of China
Academy of Shenzhen Guohua Optoelectronics, Shenzhen
518110, People’s Republic of China
Research Institute for Soft Matter and Biomimetics, Fujian
Provincial Key Laboratory for Soft Functional Materials
Research, Department of Physics, Xiamen University,
Xiamen 361005, China
Nanoscale
https://doi.org/10.1039/D0NR00071J
We demonstrate multi-wavelength light emission
from InGaN nanowires (NWs) monolithically grown on
pyramid-textured Si (100) substrates by plasma
assisted molecular beam epitaxy (PA-MBE) at
stationary conditions. Taking advantage of the highly
unidirectional source materials beam fluxes, the In
content of the NWs is tuned on the different pyramid
facets due to varied incidence angle. This is confirmed
by distinct NW morphologies observed by scanning
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electron microscopy (SEM) and by energy-dispersive
X-ray (EDX) element mapping. Photoluminescence
(PL) and cathodoluminescence (CL) reveal multiple
lines originating from InGaN NWs on the different
pyramid facets. The anomalous temperature
dependence of the emission wavelength results from
carrier redistribution between localized or confined
states, spontaneously formed within the NWs due to
composition fluctuations, verified by high-resolution
EDX element analysis. First-principles calculations
show that the pyramid facet edges act as a barrier for
atom migration and enhance atom incorporation. This
leads to uniform composition within the facets for not
too high growth temperature, consistent with the
SEM, EDX and CL results. At elevated temperature,
InGaN decomposition and In desorption is enhanced
on facets with low growth rate, accompanied by Ga
inter-facet migration, leading to non-uniform
composition over the Ga migration length which is
deduced to around 580 nm. Our study presents a
method for the fabrication of multi-wavelength light
sources by highly unidirectional MBE on textured Si
substrates towards color temperature tunable solid-
state lighting and RGB light-emitting diode (LED)
displays
Over 10 Gbps VLC for Long-Distance Applications
Using a GaN-Based Series-Biased Micro-LED Array Department of Physics, Institute of Photonics, University of
Strathclyde, Glasgow, G1 1RD, U.K.
Li–Fi Research and Development Centre, Institute for Digital
Communications, The University of Edinburgh, Edinburgh,
U.K.
IEEE Photonics Technology Letters
https://doi.org/10.1109/LPT.2020.2981827
By employing a GaN-based series-biased micro-light
emitting diode (μ-LED) array and orthogonal
frequency division multiplexing modulation format, a
high-speed free-space visible light communication
system for long-distance applications has been
demonstrated. The blue series-biased μ LED array,
which consists of 3×3 , 20 μm -diameter μ LED
elements, presents promising performance with an
optical power and −6dB electrical modulation
bandwidth of over 10 mW and 980 MHz, respectively.
Record data transmission rates have been successfully
achieved at different free-space distances. Within 5 m
transmission distances, over 10 Gbps data rates at the
forward error correction (FEC) floor of 3.8×10−3 are
accomplished. Extending the transmission distances to
20 m, the data rates are maintained at the Gbps level
at the FEC floor.
Ultrafast UV AlGaN Metal–Semiconductor–Metal
Photodetector With a Response Time Below 25 ps Laboratory for Laser Energetics, University of Rochester,
Rochester, NY, USA
IEEE Journal of Quantum Electronics
https://doi.org/10.1109/JQE.2020.2981043
Aluminum-gallium-nitride photodetectors were
successfully fabricated with micrometer-scale metal–
semiconductor–metal structures and tested with
ultrafast, UV laser pulses. The measurements were
done with single-shot oscilloscopes. Pulse-broadening
effects caused by the measurement system were
systematically evaluated and reduced to resolve the
intrinsic response time of the detector. The best-
performing devices showed a response time of below
25 ps and dark currents below 20 pA. The devices
showed linear response with the bias voltage and the
laser energy.
Efficient Carrier Transport for AlGaN-Based Deep-UV
LEDs With Graded Superlattice p-AlGaN Optoelectronics and MOEMS Group, CSIR-CEERI, Pilani,
India
IEEE Transactions on Electron Devices
https://doi.org/10.1109/TED.2020.2974408
In this article, a novel graded superlattice (SL) p-AlGaN
structure for deep ultraviolet light-emitting diode
(DUV LED) capable of emitting 273 nm has been
studied. It is observed that the output power in the
case of graded SL p-AlGaN LED structure (GSLED) is
significantly high (7.68-fold higher, at the current
density of 200 A/cm 2 ) compared with a conventional
structure. Moreover, noticeable improvements in the
maximum value of external quantum efficiency, as
well as the efficiency droop, are achieved with the
modified structures. The abrupt potential barrier
height in conventional DUV LED (CLED) obstructs the
hole injection inside the quantum well region. On the
contrary, smoother band variation in GSLED prevents
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potential barrier height of hole and causes ease in the
flow of hole into the quantum well (QW) region. Also,
the electron concentration in the multiple-quantum-
well (MQW) region for GSLED is increased by around
100% due to the reduced leakage of electrons toward
the p-region.
Analysis of Factors Affecting Optical Performance of
GaN-Based Micro-LEDs with Quantum Dots Films School of Electric Communication Technology, Shenzhen
Institute of Information Technology, Shenzhen 518072,
China
School of Power & Mechanical Engineering, Wuhan
University, Wuhan 430072, China
Shenzhen Key Lab for Advanced Quantum Dot Display and
Lighting, Department of Electrical & Electronic Engineering,
Southern University of Science &Technology, Shenzhen
518055, China
Academy for Advanced Interdisciplinary Studies, Southern
University of Science and Technology, Shenzhen 518055,
China
Crystals
https://doi.org/10.3390/cryst10030203
Optical performance in terms of light efficiency, color
crosstalk and ambient contrast ratio were analyzed for
blue GaN-based micro-light emitting diodes (micro-
LEDs) combined with red/green quantum dots (QDs)-
polymethyl methacrylate (PMMA) films. The thickness
and mass ratio of QDs films are two critical factors in
affecting the performance of micro-LEDs. Firstly, the
precise optical modeling of QDs-PMMA films is
established based on the double integrating sphere
(DIS) testing system and inverse adding doubling
algorithm (IADA) theory. Red and green QDs-PMMA
films are composed of ZnCdSe/ZnS QDs and green
ZnCdSeS/ZnS QDs, respectively. The fundamental
optical parameters of QDs-PMMA films, including
scattering, absorption and anisotropy coefficients, are
obtained successfully. Secondly, based on these
optical parameters, the Monte Carlo ray tracing
method is applied to analyze the effect of a QDs-
PMMA film’s thickness and mass ratio on the optical
performance of micro-LEDs. Results reveal that the
light efficiency first increases and then decreases with
the increase of a QDs film's thickness or mass ratio,
owing to the scattering characteristics of QDs.
Different from the variation tendencies of light
efficiency, the crosstalk between adjacent pixels
increases as the QDs-PMMA film's thickness or mass
ratio increases, and the ambient contrast ratio is kept
stable when the thickness increases. The mass ratio
variation of QDs film can change the optical
performance of micro-LEDs more effectively than
thickness, which demonstrates that mass ratio is a
more important factor affecting the optical
performance of micro-LEDs.
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ELECTRONICS Group leader: Farid Medjoub (CNRS-IEMN)
Information selected by Farid Medjoub (CNRS-IEMN), Jean-Claude Dejaeger (CNRS-IEMN) and Yvon Cordier (CNRS-CRHEA)
Improved DC-RF dispersion with epitaxial passivation
for high linearity graded AlGaN channel field effect
transistors Department of Electrical and Computer Engineering, The
Ohio State University, Columbus, OH 43210, United States
of America
Qorvo, Inc., Richardson, TX 75081, United States of America
Applied Physics Express
https://doi.org/10.35848/1882-0786/ab7480
We demonstrate DC-RF dispersion-free graded AlGaN
channel transistor with an epitaxial passivation. The
device used for this experiment was an AlGaN channel
polarization-graded field effect transistor (PolFET)
with Al-composition grading from 0% to 30%. We were
able to reduce the dispersion to almost zero current
collapse and zero knee-walkout for pulsed I–V up to 30
V drain quiescent bias condition with epitaxial
passivation, compared to 8 V knee-walkout and 25%
current collapse for PolFETs with traditional PECVD
SiNx for the same measure conditions. We also report
large signal power density and two-tone linearity for
these devices up to X-band frequencies.
Improved DC performance and current stability of
ultrathin-Al2O3/InAlN/GaN MOS-HEMTs with post-
metallization-annealing process Graduate School of Information and Science Technology
and Research Center for Integrated Quantum Electronic
(RCIQE), Hokkaido University, Sapporo 060-8628, Japan
Fujitsu Laboratories Ltd, Atsugi, Kanagawa 243-0197, Japan
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab708c
We evaluated the effect of the post-metallization-
annealing (PMA) process on drain current stability of
InAlN/GaN metal-oxide-semiconductor high electron
mobility transistors (MOS-HEMTs) with a 1 nm thick
ultrathin-Al2O3, by focusing on the Al2O3/InAlN
interface properties. We clarified that the
improvement in DC characteristics (drain current, on-
state resistance, and transconductance) with PMA was
attributed to the decrease in sheet resistance (R sh),
and the current collapse evaluated by pulsed I–V
characteristics was effectively suppressed, because of
the reduction in the electronic states at the
Al2O3/InAlN interface. Transmission electron
microscope analysis of the Al2O3/InAlN structures
revealed that the bond disorder at the Al2O3/InAlN
interface was significantly recovered after PMA. It is
considered that the PMA process is effective in
enhancing the relaxation of dangling bonds and/or
point defects at the Al2O3/InAlN interface, leading to
the improved DC performance and current stability for
the Al2O3/InAlN/GaN MOS-HEMTs.
The influence of AlN nucleation layer on RF
transmission loss of GaN buffer on high resistivity Si
(111) substrate Department of Materials Science and Engineering, National
Chiao Tung University, University Rd. 1001, Hsinchu 30010,
Taiwan
IMEC, Kapeldreef 75, Leuven B-3001, Belgium
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab7149
A sufficiently low transmission loss in radio frequency
(RF) is one of the critical requirements for GaN-on-Si
RF devices to achieve high performance. We have
systematically studied the mechanism and effect of
the AlN nucleation layer on the RF loss of the GaN-on-
Si device buffer stack. Our results show that the RF loss
is strongly influenced by the growth parameters of the
AlN nucleation layer during epitaxial process. It is
observed that the AlN nucleation layer grown at a low
thermal budget with a low density of deep surface pits
can efficiently reduce the AlN/Si interface loss by
suppressing the conductive channel at AlN/Si interface
which is governed largely by the thermal diffusion of
Al and Ga into the Si substrate. By optimizing the
growth process of the AlN nucleation layer, the RF loss
of the GaN-on-Si device buffer can be dramatically
reduced by up to ~40%.
GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 03 | 17
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A modified analytical model for AlGaN/GaN FinFETs
I – V characteristics Department of Electrical Engineering, Capital University of
Science and Technology, Islamabad, Pakistan
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab6101
In this paper, a high electron mobility transistor's
(HEMT) analytical model, which is based on the
vertical operation of Schottky barrier gate, has been
modified for the I−V characteristics of rectangular
shaped AlGaN/GaN FinFETs having three-sided
Schottky barrier gate operation. The proposed model
includes the effect of the tri-gate structure on sheet
carrier concentration (n s ) of the device. A three
dimensional Poisson equation is solved keeping in
view, the device geometry and applied potentials, to
get the effect of the side gates on n s . It is
demonstrated that n s of a FinFET depletes relatively
faster than its HEMT counterpart due to the extra
fields caused by the side gates. Knowing bias
dependent n s , FinFET I−V expressions are developed
and tested on AlGaN/GaN FinFETs of varying gate
lengths (L g = 0.4 – 1.0 μm) for the above threshold
regime. A good agreement between the experimental
and modeled characteristics is observed, which
demonstrates the validity of the proposed model in
predicting the DC characteristics of tri-gate
AlGaN/GaN FinFETs.
Failure analysis of normally-off GaN HEMTs under
avalanche conditions University of Valencia, Department of Electronic
Engineering, E-46100 Burjassot, Spain
Fraunhofer Institute for Integrated Systems and Device
Technology, D-91058 Erlangen, Germany
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab6bad
Gallium nitride (GaN) high electron-mobility
transistors (HEMTs) are promising devices in the
power electronics field owing to their wide bandgap
(WBG). However, all the potential advantages
provided by their WBG require reliability
improvement. In industrial applications, robustness is
one of the main factors considered by circuit
designers. This study focuses on the observation of the
degradation behavior of the main waveforms of
unclamped inductive-switching (UIS) test circuits of
two different commercial GaN HEMT structures. The
relevance of this study lies in the potential applications
of these devices to high-voltage applications and
automotive systems where they are subjected to
many UIS events over their lifetime. This study shows
that avalanche does not occur on these devices;
therefore, the breakdown is caused by the high
voltage. A deeper analysis of the breakdown
mechanism is achieved using a curve/tracer analyzer,
lock-in thermography, and focused ion beam. These
experiments reveal that impact ionization is the main
failure mechanism that causes breakdown in both
structures.
Growth and Characterization of Nitrogen‐Polar
AlGaN/AlN Heterostructure for High‐Electron‐
Mobility Transistor Graduate School of Sciences and Technology for Innovation,
Yamaguchi University, 2-16-1 Tokiwadai, Ube, Yamaguchi,
755-8611 Japan
Materials Research & Development Laboratory, Japan Fine
Ceramics Center (JFCC), 2-4-1 Mutsuno, Atsuta, Nagoya,
Aichi, 456-0023 Japan
physica status solidi b
https://doi.org/10.1002/pssb.201900589
A nitrogen‐polar (N‐polar) AlGaN/AlN high‐electron‐
mobility transistor (HEMT) is proposed, and the
generation of a 2D electron gas (2DEG) is simulated.
The band diagram of N‐polar (Al)GaN/AlN shows the
generation of the 2DEG, whereas that of the
conventional metal‐polar (Al)GaN/AlN structure
shows the generation of a 2D hole gas. Furthermore,
the concentration of the 2DEG is considerably high
even when the (Al)GaN layer is as thin as a few
nanometers. N‐polar AlGaN/AlN is grown on sapphire
substrates with a misorientation angle of 2°;
furthermore, atomic force microscope measurements
in a range of 5 × 5 μm2 demonstrate that the root‐
mean‐square value obtained from atomic force
microscopy of N‐polar AlGaN is approximately 0.7 nm.
N‐polar AlGaN layers with a thickness of
approximately 40–60 nm with more than 50% Al
content are almost coherently grown on the N‐polar
AlN layer with a thickness of approximately 400 nm.
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Improved conduction in GaN Schottky junctions with
HfO2 passivation layers through post-deposition
annealing Department of Electronic and Electrical Convergence
Engineering, Hongik University, Sejong 30016, Republic of
Korea
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab71d6
The conduction in GaN Schottky junctions with HfO2
passivation layers can be improved by post-deposition
annealing (PDA). Surface defects and ionic states of
Ga-polar GaN removed by PDA lead to the formation
of downward bend banding with a positive surface
polarity. X-ray photoelectron spectroscopy is utilized
to assess the effects of PDA on the atomic composition
and surface polarity changes at the HfO2/GaN
interface and GaN surface. The leakage current level
and ideality factor of the GaN Schottky junctions
improved from 4.73 × 10−6 A cm−2 to 8.21 × 10−8 A
cm−2 and from 1.47 to 1.14, respectively. With the
application of PDA, the flow of leakage current
through the Schottky metal area reduced as the
surface defect states were removed.
GaN-on-diamond technology platform: Bonding-free
membrane manufacturing process School of Engineering, University of Glasgow, Glasgow G12
8LT, United Kingdom
School of Engineering, Cardiff University, Cardiff CF24 3AA,
United Kingdom
Center for Device Thermography and Reliability (CDTR), H.
H. Wills Physics Laboratory, University of Bristol, Bristol BS8
1TL, United Kingdom
Department of Materials Science and Metallurgy, University
of Cambridge, 27 Charles Babbage Road, Cambridge CB3
0FS, United Kingdom
AIP Advances
https://doi.org/10.1063/1.5129229
GaN-on-diamond samples were demonstrated using a
membrane-based technology. This was achieved by
selective area Si substrate removal of areas of up to 1
cm × 1 cm from a GaN-on-Si wafer, followed by direct
growth of a polycrystalline diamond using microwave
plasma chemical vapor deposition on etch exposed N-
polar AlN epitaxial nucleation layers. Atomic force
microscopy and transmission electron microscopy
were used to confirm the formation of high quality,
void-free AlN/diamond interfaces. The bond between
the III-nitride layers and the diamond was validated by
strain measurements of the GaN buffer layer.
Demonstration of this technology platform is an
important step forward for the creation of next
generation high power electronic devices.
The Origin and Influence of Compensatory Current in
AlGaN/GaN HEMT Type Heterostructures with Two
Conducting Channels on the Hall Measurements The Faculty of Microsystem Electronics and Photonics,
Wroclaw University of Science and Technology,
Janiszewskiego 11/17, 50‐372 Wroclaw, Poland
physica status solidi a
https://doi.org/10.1002/pssa.201900661
The second conducting channel was created in
AlGaN/GaN type HEMT (High Electron Mobility
Transistors) heterostructures deposited by the
MOVPE (Metal Organic Vapour Phase Epitaxy) process
in which the pressure was change during the growth
of buffer GaN layer to ensure its high‐resistivity. It was
stated that second, parasitic, conducting channel was
induced as a result of the non‐intentional doping that
occurred at the GaN‐GaN interface. The Hall
measurements in wide range of temperatures, from
77 K to 420 K, was used to obtain the sheet resistivity,
sheet carrier concentration and electron mobility of
the heterostructures. The theoretical model of the
multilayer transport in AlGaN/GaN type HEMT
heterostructures, based on equivalent circuit allow for
estimation of compensatory current. Based on the
theoretical model the correction map for the Hall
measurement of the samples with two conducting
channels was evaluated. The measured electron
mobility μmeas obtained from the Hall measurement
was applied for determination of the 2DEG (two‐
dimensional electron gas) mobility μ1 of the samples
with two conducing channels using the equation μ1 =
αμmeas. It was observed that the appropriate
correction coefficient α depends on second channel
parameters i.e. the sheet resistance and mobility of
the second conducing channel.
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GaN power switches on the rise: Demonstrated
benefits and unrealized potentials Department of Electrical Engineering, The Pennsylvania
State University, University Park, Pennsylvania, 16802, USA
Applied Physics Letters
https://doi.org/10.1063/1.5133718
As a wide bandgap semiconductor with high
breakdown field, GaN is expected to outperform the
incumbent Si technology for power switching
applications. Advances in GaN epitaxial growth, device
technology, and circuit implementations have resulted
in high-performing power switches based on the GaN
high electron mobility transistor (HEMT) structure.
Demonstrated system benefits have validated the real
value of GaN power switching technology. However,
the full potential of GaN power switching technology
is still far from being exploited. Various factors,
including the size of electrodes and wiring, non-
optimal E-field shaping, and substrate capacitive
coupling, are limiting the performance of GaN HEMT
power switches. Emerging device structures, such as,
vertical transistors and multichannel superjunction
transistors, have the potential to overcome some of
those limitations, thereby bringing the performance
benefits of the GaN power switching technology to a
new level. Understanding the underlying physics is
important to the success of the emerging device
structures.
Interface charge engineering in down-scaled AlGaN
(<6 nm)/GaN heterostructure for fabrication of GaN-
based power HEMTs and MIS-HEMTs University of Chinese Academy of Sciences, 100049 Beijing,
China
Institute of Microelectronics of Chinese Academy of
Sciences, 100029 Beijing, China
School of Physics, Peking University, 100871 Beijing, China
Applied Physics Letters
https://doi.org/10.1063/1.5134886
The physical mechanism for recovery of 2D electron
gas (2DEG) in down-scaled AlGaN/GaN
heterostructures with SiNx layers grown by low-
pressure chemical vapor deposition (LPCVD) was
investigated by means of Hall-effect characterization,
scanning Kelvin probe microscopy (SKPM), and self-
consistent Poisson–Schrödinger calculations.
Observations using SKPM show that the surface
potential of the AlGaN/GaN heterostructure remained
nearly unchanged (∼1.08 eV) as the thickness of the
AlGaN barrier was reduced from 18.5 to 5.5 nm and
likely originated from the surface pinning effect. This
led to a significant depletion of 2DEG from 9.60 × 1012
to 1.53 × 1012 cm−2, as determined by Hall
measurements, toward a normally OFF 2DEG channel.
Based on a consistent solution of the Schrödinger–
Poisson equations and analytical simulations,
approximately 3.50 × 1013 cm−2 of positive fixed
charges were confirmed to be induced by a 20-nm
LPCVD-SiNx passivation over the AlGaN/GaN
heterostructures. The interface charge exerted a
strong modulation of band bending in the down-
scaled AlGaN/GaN heterostructure, contributing to
the efficient recovery of 2DEG charge density
(∼1.63 × 1013 cm−2). E-mode ultrathin-barrier
AlGaN/GaN metal–insulator–semiconductor high-
electron-mobility transistors with a low ON-resistance
(RON), high ON/OFF current ratio, and steep
subthreshold slope were implemented using LPCVD-
SiNx passivation.
A unified model for vertical doped and polarized
superjunction GaN devices State Key Laboratory of Electronic Thin Films and Integrated
Devices, University of Electronic Science and Technology of
China, Chengdu 610054, China
The Edward S. Rogers, Sr., Department of Electrical and
Computer Engineering, University of Toronto, Toronto,
Ontario M5S 3G4, Canada
Applied Physics Letters
https://doi.org/10.1063/1.5142855
A unified model is proposed to characterize the
breakdown voltage (BV) and specific on-resistance
(Ron,sp) for vertical doped superjunction (d-SJ) and
polarized superjunction (p-SJ) GaN power devices. This
study is based on the recently published
compensated-pillar superjunction (cp-SJ) structure. A
two-dimensional model for the electric field is
analytically formulated using the Green's function
method. Numerical calculations and TCAD simulations
demonstrate that, for a given pillar depth, the p-SJ
device has a lower BV than the d-SJ device with a wide
pillar width. However, when the pillar width is less
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than 200 nm, both devices demonstrate a maximum
BV that is close to the intrinsic structure. The Ron,sp
unified model for the cp-SJ device, taking into account
the junction field-effect transistor (JFET) effect in the
drift region, also demonstrates that the p-SJ device has
a superior Ron,sp over the d-SJ device. Considering the
recently published impact ionization coefficients, the
BV of the p-SJ device is analytically modeled as a
function of the pillar depth. Finally, by applying the
Lambert W-function, an exact closed-form
relationship between Ron,sp and BV is presented.
Superior growth, yield, repeatability, and switching
performance in GaN-based resonant tunneling
diodes NAS-NRC Postdoctoral Research Fellow Residing, U.S. Naval
Research Laboratory, Washington DC 20375, USA
U.S. Naval Research Laboratory, Washington DC 20375, USA
Department of Electrical and Computer Engineering, The
Ohio State University, Columbus, Ohio 43210, USA
Departments of Physics and Electrical Engineering, Wright
State University, Dayton, Ohio 45435, USA
Jacobs Engineering Group, Hanover, Maryland 21076, USA
Applied Physics Letters
https://doi.org/10.1063/1.5139219
We report the direct measurement of record fast
switching speeds in GaN/AlN resonant tunneling
diodes (RTDs). The devices, grown by plasma-assisted
molecular-beam epitaxy, displayed three repeatable
negative differential resistance (NDR) regions below a
bias of +6 V. A room temperature peak-to-valley
current ratio (PVCR) > 2 was observed, which
represents a marked improvement over recent
reports. Measurements carried out on hundreds of
devices, of varying sizes, revealed a yield of ∼90%.
Repeatability measurements consisting of 3000
sweeps resulted in a standard deviation, relative to
the mean, of < 0.1%. Temperature dependent
measurements combined with non-equilibrium
Green's function based quantum transport
simulations suggest the presence of both three-
dimensional (3D) and two-dimensional (2D) emitters,
giving rise to three NDR regions. Finally, a valley
current density vs perimeter-to-area-ratio study
indicates the presence of a surface leakage current
mechanism, which reduces the PVCR.
Modulation of the two-dimensional electron gas
channel in flexible AlGaN/GaN high-electron-
mobility transistors by mechanical bending Department of Mechanical Engineering, University of
Houston, Houston, Texas 77204-4006, USA
Texas Center for Superconductivity at UH (TcSUH) and
Advanced Manufacturing Institute (AMI), University of
Houston, Houston, Texas 77204, USA
Materials Science and Engineering Program, University of
Houston, Houston, Texas 77204, USA
Department of Mechanical Engineering, The Pennsylvania
State University, University Park, Pennsylvania 16802, USA
Korea Photonics Technology Institute (KOPTI), Gwangju
61007, South Korea
Department of Photonic Engineering, Chosun University,
Gwangju 61452, South Korea
Advanced Semiconductor Laboratory, King Abdullah
University of Science and Technology (KAUST), Thuwal
23955, Saudi Arabia
Applied Physics Letters
https://doi.org/10.1063/1.5142546
We investigate the effect of strain on the two-
dimensional electron gas (2DEG) channel in a flexible
Al0.25Ga0.75N/GaN high-electron-mobility transistor
(HEMT) by mechanical bending to prove the concept
of active polarization engineering to create
multifunctional electronic and photonic devices made
of flexible group III-nitride thin films. The flexible
HEMTs are fabricated by a layer-transfer process and
integrated with a 150-μm-thick Cu film. The strain
values are estimated from high-resolution x-ray
diffraction and Raman spectroscopy in 4-cm bend-
down and −4-cm bend-up test conditions. The strain-
induced piezoelectric polarization can alter the charge
density of the 2DEG in the channel at the AlGaN/GaN
interface and thus modify the output characteristics of
the flexible HEMTs. Accordingly, output characteristics
show an increase in output current by 3.4% in the
bend-down condition and a decrease by 4.3% in the
bend-up condition. Transfer characteristics show a
shift of threshold voltage, which also supports the
2DEG channel modulation during bending.
Computational simulation based on the same
structure confirms the same current modulation effect
and threshold voltage shift. Furthermore, the
electrical characteristics of the flexible HEMTs show a
repeatable dependence on the strain effect, which
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offers potential for electro-mechanical device
applications.
AlGaN/GaN high electron mobility transistors on
diamond substrate obtained through aluminum
nitride bonding technology Institut d’Electronique de Microélectronique et de
Nanotechnologie (IEMN), UMR 8520, Université de Lille,
Avenue Poincaré, BP60069, 59652 Villeneuve d’Ascq Cedex,
France
Laboratoire d’Analyse et d’Architecture des Systèmes
(LAAS), 7 Avenue du Colonel Roche, 31031 Toulouse, France
CRHEA-CNRS, Centre de Recherche sur l'Hétéro-Epitaxie et
ses Applications, Rue Bernard Grégory, 06560 Valbonne,
France
Journal of Vacuum Science & Technology B
https://doi.org/10.1116/1.5143418
Transfer technology is now becoming very attractive
not only for new technologies such as flexible
technology but also for solid state technologies when
performances are limited by technological barriers
that have to be overcome. In this last context, the
transfer of high electron mobility transistors (HEMTs)
on diamond substrates represents an opportunity to
improve the thermal dissipation when the device
operates at high radio frequency power levels. Up to
now, the technological process for the transfer of
these transistors is not detailed in the literature. In this
article, the first demonstration of AlGaN/GaN HEMTs
on diamond substrates by transfer technology
obtained through sputtered aluminum nitride (AlN)
layers bonding at low temperature is reported.
Devices are first fabricated on AlGaN/GaN epilayers
grown on silicon (Si) substrates. Afterward,
AlGaN/GaN thin films with devices are released from
the Si growth substrate and transferred at 160 °C onto
a diamond substrate thanks to an AlN bonding layer. A
full description of the transfer technology and all the
technological limits and risks are presented. The
transferred device provides a maximum DC drain
current density IDS Max of 690 mA mm−1 at VGS = 0 V.
Furthermore, a cutoff frequency fT of 85 GHz and a
maximum oscillation frequency fMAX of 106 GHz are
extracted from S-parameter measurements.
Optimization of Mesa Etch for a Quasi-Vertical GaN
Schottky Barrier Diode (SBD) by Inductively Coupled
Plasma (ICP) and Device Characteristics Shenzhen Institute of Wide-bandgap Semiconductors,
Shenzhen 518000, China
Institute of Microelectronics, Chinese Academy of Sciences,
Beijing 100029, China
Department of Microelectronics, Delft University of
Technology, Delft 2628 CD, The Netherlands
Nanomaterials
https://doi.org/10.3390/nano10040657
The optimization of mesa etch for a quasi-vertical
gallium nitride (GaN) Schottky barrier diode (SBD) by
inductively coupled plasma (ICP) etching was
comprehensively investigated in this work, including
selection of the etching mask, ICP power, radio
frequency (RF) power, ratio of mixed gas, flow rate,
and chamber pressure, etc. In particular, the
microtrench at the bottom corner of the mesa sidewall
was eliminated by a combination of ICP dry etching
and tetramethylammonium hydroxide (TMAH) wet
treatment. Finally, a highly anisotropic profile of the
mesa sidewall was realized by using the optimized
etch recipe, and a quasi-vertical GaN SBD was
demonstrated, achieving a low reverse current density
of 10−8 A/cm2 at −10 V.
Effects of Recessed-Gate Structure on AlGaN/GaN-
on-SiC MIS-HEMTs with Thin AlOxNy MIS Gate School of Electronic and Electrical Engineering, Hongik
University, Seoul 04066, Korea
Department of Electrical and Computer Engineering, Seoul
National University, Seoul 08826, Korea
Metamaterial Electronic Device Research Center, Hongik
University, Seoul 04066, Korea
Materials
https://doi.org/10.3390/ma13071538
This study investigated the effects of a thin aluminum
oxynitride (AlOxNy) gate insulator on the electrical
characteristics of AlGaN/GaN-on-SiC metal-insulator-
semiconductor high electron mobility transistors (MIS-
HEMTs). The fabricated AlGaN/GaN-on-SiC MIS-
HEMTs exhibited a significant reduction in gate
leakage and off-state drain currents in comparison
with the conventional Schottky-gate HEMTs, thus
enhancing the breakdown voltage. The effects of gate
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recess were also investigated while using recessed
MIS-HEMT configuration. The Johnson’s figures of
merit (= fT × BVgd) for the fabricated MIS-HEMTs were
found to be in the range of 5.57 to 10.76 THz·V, which
is the state-of-the-art values for GaN-based HEMTs
without a field plate. Various characterization
methods were used to investigate the quality of the
MIS and the recessed MIS interface.
Role of polarity in SiN on Al/GaN and the pathway to
stable contacts Adroit Materials, Inc., 2054 Kildaire Farm Rd., Cary NC
27518, United States of America
Department of Electrical and Computer Engineering, North
Carolina State University, Raleigh, NC 27695-7911, United
States of America
Department of Materials Science and Engineering, North
Carolina State University, Raleigh, NC 27695-7919, United
States of America
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab7775
Despite being the most widely used dielectric for
passivation of GaN-based lateral devices, amorphous
silicon-nitride still faces many stability challenges,
which arise from its complex bulk electronic and
interface properties on the polar (Al)GaN surfaces. In
this investigation, SiN has been applied as an ultra-thin
interlayer (~3–5 nm) in vertical contact structures on
Ga-polar and N-polar GaN templates to study the
metal–insulator–semiconductor- (MIS-) like system
and better understand the interaction between the
polar surface and its dielectric overlayer. We describe
the role of amphoteric ≡Si centers in SiN in passivating
and providing the polarization countercharge to
Al/GaN of different polarities. The consequent
requirements of the concentration profile of the
amphoteric defects and the corresponding chemical
profile of SiN is discussed. The importance of SiN
surface termination and their influence on the
interface potential on Al/GaN that determines device
performance and reliability is also shown. Finally, a
pathway to highly stable and reliable ohmic contacts
to n-type Ga-polar GaN without instabilities associated
with metal directly alloying with GaN as in the case of
traditional contacts is proposed.
Insight into gate dielectric reliability and stability of
SiO2/GaN MOS devices Graduate School of Engineering, Osaka University, Suita,
Osaka 565-0871, Japan
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab7fe6
Gate dielectric reliability and stability of SiO2/GaN
metal–oxide–semiconductor (MOS) capacitors were
systematically investigated by means of area-
dependent and time-dependent dielectric breakdown
(TDDB) characteristics. It was found that, although
high-temperature post-deposition annealing (PDA)
that causes Ga diffusion in SiO2 gate dielectrics has
only a minor impact on electrical properties of the
SiO2/GaN interfaces, PDA at temperatures above 800
°C severely degrades dielectric reliability and stability
of GaN MOS devices. Area dependences of time-zero
and TDDB characteristics revealed the formation of
local weak spots and generation of uniform charge
trapping sites throughout the gate oxides depending
on the PDA temperatures. Determinant factors for
dielectric reliability of SiO2/GaN gate stacks and
reasonable measures for improving their reliability
and stability are discussed on the basis of the
experimental findings.
Study on the effect of diamond layer on the
performance of double-channel AlGaN/GaN HEMTs Key Lab of Wide Bandgap Semiconductor Materials and
Devices, School of Microelectronics, Xidian University, Xi'an
710071, People's Republic of China
School of Mechano-electric Engineering, Xidian University,
Xi'an, 710071, People's Republic of China
National Key Laboratory of Application Specific Integrated
Circuit (ASIC), Hebei Semiconductor Research Institute,
Shijiazhuang 050051, People's Republic of China
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab7773
The thermal effect is an important reliability issue for
GaN-based devices. The impact of the diamond layer
on double-channel AlGaN/GaN HEMTs (DC-HEMTs) is
first investigated in this paper by Sentaurus TCAD
simulation. By utilizing the diamond layer, the lattice
temperature along the channel can be modulated and
becomes more even. The results show that the peak
lattice temperature can be reduced by 64 K when the
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power dissipation increases to 46 W mm−1 in the DC-
HEMT with a diamond layer. A 1 μm thick diamond
layer is regarded as the optimized thickness when
considering the temperature reduction and cost. With
the help of the diamond layer, the saturated drain
current and transconductance of DC-HEMTs are
increased by 0.21 A mm−1 and 22 mS mm−1,
respectively. Meanwhile, peak f T and f max can be
enhanced by 4.7 GHz and 10.3 GHz, respectively.
These results show that diamond layers have great
potential in lattice temperature reduction and
performance and reliability improvement of DC-
HEMTs.
Delay analysis of high-electron mobility transistors
under high drain bias Infineon Technologies AG, Germany
Institute for Electronics Engineering, Friedrich-Alexander-
Universität Erlangen-Nürnberg, Germany
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab78f5
In this work, we present a new delay analysis of high-
electron-mobility transistors (HEMTs), in which we
show that the total intrinsic delay can be separated
into six distinct contributions. We distinguish between
delays caused by the capacitive coupling between
electrodes, the quasi-static charge distribution within
the device and a dynamic delay originating from on-
state charge flow. An analytical expression for the
dynamic delay is established in the form of a delay
density using a position dependent image charge
analysis. This delay density allows us to show
graphically the position dependence of the delay
contributions of mobile charge throughout the
depletion region. Furthermore, the dynamic delay is
separated into a component dependent on the length
of the gate electrode and a drain delay component
dependent on the drain voltage bias. The influence of
high drain bias on the delay components is
investigated with the aid of GaN HEMT device
simulations and measurements, showing the relative
importance of scaling the gate and the drain regions.
The RF delay analysis reported here is based upon the
definition of small-signal current gain and elucidates
the effect of position dependent mobile charge within
a HEMT, clarifying the requirements for device scaling.
High-frequency AlGaN/GaN T-gate HEMTs on
extreme low resistivity silicon substrates Institute of Electronics Engineering, National Tsing Hua
University, Hsinchu 30013, Taiwan
Innovation Technology Research Center, Global Wafers Co.
Ltd., Hsinchu 30013, Taiwan
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab70a5
The T-gate high frequency AlGaN/GaN high electron
mobility transistors (HEMTs) are demonstrated on an
8 inch extremely-low resistivity (ELR) silicon substrate
with a resistivity of ~2.5 mΩ cm to investigate the
potential of using the ELR Si substrate for RF
applications. The devices are also fabricated on the 60
Ω cm substrate for comparison. The 0.1 μm T-gate is
realized by e-beam lithography to improve the high
frequency characteristics of the devices. The short-
circuit current gain cutoff frequency (f T), the
maximum oscillation frequency (f max), and maximum
transconductance (g m,max) of 27 GHz, 71 GHz and
247 mS mm−1 can be achieved, respectively. The
obtained high frequency performance is among the
best reported to date for the GaN HEMTs on such low
resistivity silicon substrates.
Increasing threshold voltage and reducing leakage of
AlGaN/GaN HEMTs using dual-layer SiN x stressors School of Microelectronics, Southern University of Science
and Technology (SUSTech), Shenzhen 518055, People's
Republic of China
Department of Electronic and Computer Engineering, The
Hong Kong University of Science and Technology (HKUST),
Hong Kong, People's Republic of China
School of Engineering and Computer Science, Washington
State University, Vancouver, WA 98686, United States of
America
Department of Materials Engineering, The University of
British Columbia, Vancouver, BC V6T 1Z4, Canada
GaN Device Engineering Technology Research Center of
Guangdong, Shenzhen 518055, People's Republic of China
The Key Laboratory of the Third Generation Semi-
conductor, Shenzhen 518055, People's Republic of China
Semiconductor Science and Technology
https://doi.org/10.1088/1361-6641/ab73ea
In this work, AlGaN/GaN HEMTs with dual-layer SiN x
stressors (composed of a low-stress layer and a high-
GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 03 | 24
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stress layer) were investigated. The low-stress padding
layer solved the surface damage problem which was
caused during the deposition of the high-stress SiN x
and provided a good passivated interface. The HEMTs
with the dual-layer stressors showed a 1 V increase in
the threshold voltage (V th ) with comparable DC and
RF amplification performance to the baseline devices.
Moreover, the off-current (I off ) was shown to be
reduced by one to three orders of magnitude in the
strained devices. The reduction in the off-currents was
a result of the lower electric field in AlGaN, which
suppressed the gate injection current. These
improvements using the dual-layer stressor scheme
supports strain engineering as an effective approach
in the pursuit of the normally-off operation of
AlGaN/GaN HEMTs.
Analysis of trap and recovery characteristics based on
low-frequency noise for E-mode GaN HEMTs with p-
GaN gate under repetitive short-circuit stress School of Electronic and Information Engineering, South
China University of Technology, Guangzhou 510641,
People's Republic of China
Science and Technology on Reliability Physics and
Application of Electronic Component Laboratory,
Guangzhou 510610, People's Republic of China
Journal of Physics D: Applied Physics
https://doi.org/10.1088/1361-6463/ab713a
In this letter, the degradation and recovery
characteristics of E-mode AlGaN/GaN high-electron
mobility transistors (HEMTs) were investigated under
repetitive short-circuit (SC) stress. Output, transfer,
transconductance and gate-leakage characteristics
were analyzed in detail before and after repetitive SC
stress. After stress, the electrical characteristics of the
devices gradually degraded as the SC pules increased.
Low-frequency noise measurements are performed
over the frequency range of 1 Hz–10 KHz by increasing
SC pulses. Furthermore, the recovery tendency of DC
characteristics and trap density is observed between
repetitive SC measurements, and this physically
confirms that the mechanism of the performance
degradation could be attributed to the trapping and
releasing processes of electrons in the p-GaN layer and
AlGaN barrier layer of AlGaN/GaN HEMTs, which
change the electric field distribution under the gate.
Effect of surface treatment on electrical properties of
GaN metal–insulator–semiconductor devices with
Al2O3 gate dielectric Department of Electrical and Electronic Engineering, Xi'an
Jiaotong–Liverpool University, Suzhou, People's Republic of
China
Department of Electrical Engineering and Electronics,
University of Liverpool, Liverpool, United Kingdom
Department of Electrical and Computer Engineering, the
National University of Singapore, Singapore, Singapore
Department of Chemistry, Xi'an Jiaotong–Liverpool
University, Suzhou, People's Republic of China
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab7863
This research proposes an economical and effective
method of 1-octadecanethiol (ODT) treatment on GaN
surfaces prior to Al2O3 gate dielectric deposition.
GaN-based metal–insulator–semiconductor (MIS)
devices treated by HCl, O2 plasma and ODT are
demonstrated. ODT treatment was found to be
capable of suppressing native oxide and also of
passivating the GaN surface effectively; hence the
interface quality of the device considerably improved.
The interface trap density of Al2O3/GaN was
calculated to be around 3.0 × 1012 cm−2 eV−1 for
devices with ODT treatment, which is a relatively low
value for GaN-based MIS devices with Al2O3 as the
gate dielectric. Moreover, there was an improvement
in the gate control characteristics of MIS-HEMTs
fabricated with ODT treatment.
Suppression of short-channel effects in normally-off
GaN MOSFETs with deep recessed-gate structures Corporate Research & Development Center, Toshiba
Corporation, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki
212-8582, Japan
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab6b7f
We have demonstrated the suppression of short-
channel effects (SCEs) in normally-off GaN metal-
oxide-semiconductor field-effect transistors
(MOSFETs) with deep recessed-gate structures. TCAD
simulation results show that the electric field
concentration is effectively reduced at the recessed
edge of MOSFETs with deeper recessed-gate
structures. To demonstrate suppression of SCEs,
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MOSFET gate structures with recess depths ranging
from 45 to 165 nm were fabricated and evaluated.
Experimental results show that deeper recessed-gate
structures are highly effective for suppressing drain-
induced barrier lowering and improving subthreshold
swing and threshold voltage roll-off.
Balanced-to-Doherty Mode-Reconfigurable Power
Amplifier With High Efficiency and Linearity Against
Load Mismatch Department of Electrical and Computer Engineering,
University of Central Florida, Orlando, FL 32816 USA
Department of Electrical and Computer Engineering,
University of Central Florida, Orlando, FL 32816 USA
IEEE Transactions on Microwave Theory and Techniques
https://doi.org/10.1109/TMTT.2020.2979844
A balanced-to-Doherty (B2D) mode-reconfigurable
power amplifier (PA) is presented in this article, which
is endowed with a unique capability of maintaining
high linearity and high efficiency against load
mismatch. The Doherty operation of this PA is based
on a new Doherty PA (DPA) architecture configured
from an ideal balanced amplifier, named quasi-
balanced DPA (QB-DPA). This article, for the first time,
analytically proves that the QB-DPA is functionally
equivalent to a standard DPA. Most importantly, this
new discovery enables PA reconfiguration between
the Doherty and balanced modes. With the tunability
implemented using a silicon-on-insulator (SOI)-based
single-pole-double-throw (SPDT) switch, a
reconfigurable B2D PA prototype using GaN
technology is demonstrated at 3.5 GHz, exhibiting the
state-of-the-art linear DPA performance in the
nominal 50-Ω load condition. Specifically, the Doherty
mode achieves a continuous-wave measurement
efficiency of 70% and 54.5% at the maximum output
power of 41.9 dBm and 6-dB power back-off,
respectively. In the modulated long-term evolution
(LTE) evaluation, the DPA exhibits -37-dB adjacent
channel power leakage (ACPR) and 2.36% error vector
magnitude (EVM) at the maximum rated power of 34.5
dBm while achieving a 42.4% efficiency. It is
experimentally demonstrated that the Doherty (QB-
DPA) mode is well resistant to load mismatch with high
efficiency across a majority portion of the 2:1 voltage
standing wave ratio (VSWR) circle, while the
combination of Doherty and balanced modes can
ensure a constantly linear performance of the B2D PA
(e.g., 2.2%-5% of EVM) under the entire mismatch
condition.
Threshold voltage control of non-recessed GaN MOS
HEMTs and recessed GaN MOS FETs by Al x Ga1−x N
back barrier Technology Division/Renesas Semiconductor
Manufacturing Co., Ltd., Shiga 520-8555, Japan
Technology Division/Renesas Semiconductor
Manufacturing Co., Ltd., Naka, Ibaraki 312-8504, Japan
Japanese Journal of Applied Physics
https://doi.org/10.35848/1347-4065/ab778a
Threshold voltage (V th) control of a GaN MOS
transistor by Al x Ga1−x N back barrier was
systematically studied. Non-recessed GaN MOS
HEMTs and recessed GaN MOS FETs with an Al x Ga1−x
N (x = 0%, 3%, 5%, 8%) back barrier layer were
fabricated on the same 6-inch GaN-on-Si wafers and
characterized. Al2O3 gate-insulator thickness was
changed from 20 to 100 nm to evaluate the
Al2O3/GaN interface fixed charge. The V th of the GaN
MOS transistor increases with increasing in Al content
x of the Al x Ga1−x N back barrier layer and decreasing
in Al2O3 thickness. The dependences of V th on Al
content x and Al2O3 thickness were different between
non-recessed and recessed transistor. The different
dependences of V th on Al content x and Al2O3
thickness were explained well by the newly introduced
surface donor model, which compensate not only the
surface polarization charge but also the surface
electric field.
Fabrication of AlGaN/GaN MISHEMT with dual-metal
gate electrode and its performances School of Electronics Engineering, Kyungpook National
University, Daegu, 41566, Republic of Korea
Center for BioMicroSystems, Brain Science Institute, Korea
Institute of Science and Technology (KIST), Seoul, 02792,
Republic of Korea
Applied Physics A
https://doi.org/10.1007/s00339-020-3453-4
In this study, we investigated AlGaN/GaN metal–
insulator–semiconductor high-electron-mobility
transistors (MISHEMTs) with single-metal gate (SMG)
and dual-metal gate (DMG) structures through
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experimental measurements and technology
computer-aided design simulation. The DMG structure
consists of nickel (Ni) in the source-side gate and
titanium (Ti) in the drain-side gate metals for the
distribution of an electric field. The measurement
results demonstrate that the fabricated AlGaN/GaN
DMG–MISHEMT produces improved device
performances; this includes higher drain current (ID),
higher transconductance (gm), and higher breakdown
voltage than the SMG–MISHEMT. The improvement is
due to the distribution of an electric field. In addition,
in terms of current collapse characteristics, the DMG–
MISHEMT exhibited a small change rate in ID at
various quiescent bias points. These results mean that
a DMG structure leads to excellent electrical
characteristics.
GaN HEMTs on Si with Regrown Contacts and
Cutoff/Maximum Oscillation Frequencies of 250/204
GHz School of Electrical and Computer Engineering, Cornell
University, Ithaca, NY 14853 USA
Veeco Instruments Inc., Somerset, NJ 08873 USA
Department of Materials Science and Engineering, Cornell
University, Ithaca, NY 14853 USA
Kavli Institute for Nanoscience, Cornell University, Ithaca,
NY 14853 USA
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2984727
This work demonstrates the high-frequency and high-
power performance capacity of GaN high electron
mobility transistors (HEMTs) on Si substrates. Using a
T-gate and n++-GaN source/drain contacts, the
InAlN/GaN HEMT with a gate length of 55 nm and a
source-drain spacing of 175 nm shows a maximum
drain current ID,MAX of 2.8 A/mm and a peak
transconductance gm of 0.66 S/mm. The same HEMT
exhibits a forward-current-gain cutoff frequency fT of
250 GHz and a maximum frequency of oscillation
fMAX of 204 GHz. The ID,MAX, peak gm and fT-fMAX
product are among the best reported for GaN HEMTs
on Si, which are very close to the state-of-the-art
depletion-mode GaN HEMTs on SiC without a back
barrier. Given the low cost of Si and the high
compatibility with CMOS circuits, GaN HEMTs on Si
prove to be particularly attractive for cost-sensitive
applications.
Millimeter-Wave AlGaN/GaN HEMTs with 43.6%
Power-Added-Efficiency at 40 GHz Fabricated by
Atomic Layer Etching Gate Recess Key Laboratory of Microelectronic Devices & Integrated
Technology, Institute of Microelectronics of Chinese
Academy of Sciences, Beijing 100029, China
University of Chinese Academy of Sciences, Beijing 100049,
China
Key Laboratory of Microelectronic Devices & Integrated
Technology, Institute of Microelectronics of Chinese
Academy of Sciences, Beijing 100029, China
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2984663
Low damage atomic layer etching (ALE) gate recess is
developed for fabrication of millimeter-wave
AlGaN/GaN high-electron-mobility transistors
(HEMTs). Plasma ion induced bombardments to the
AlGaN barrier is effectively suppressed by the ALE
recess, contributing to a well-controlled recessed
surface morphology. The suppressed lattice damage
to AlGaN/GaN heterostructure is also reflected by a
significantly reduced gate leakage as well as an
invisible threshold voltage shift associated with
damage induced traps. With a 0.15-μm T-gate
fabrication technology, a high power-gain cutoff
frequency fMAX of 205 GHz has been achieved. The
ALE-recessed AlGaN/GaN HEMTs exhibits a record
high power-added-efficiency (PAE) of 43.6% at 40 GHz
in a continuous-wave mode. The associated gain and
output power density are also remarkably improved
compared with controlled HEMTs with conventional
gate recess process.
PEALDInvestigation of SiNx and AlN Passivation for
AlGaN/GaN High-Electron-Mobility Transistors: Role
of Interface Traps and Polarization Charges Department of Electronic and Computer Engineering, The
Hong Kong University of Science and Technology, Hong
Kong
IEEE Journal of the Electron Devices Society
https://doi.org/10.1109/JEDS.2020.2984016
In this work, we studied the mechanisms and
switching properties of AlGaN/GaN high-electron-
mobilitytransistors (HEMTs) passivated by
amorphous-SiNx and monocrystal-like AlN. The effects
of interface traps and polarization charges on current
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collapse are investigated by TCAD simulations and
experimental characterizations. Surface/interface
deep levels can be compensated by both shallow
donor-like traps (SiNx passivation) and polarization
charges (AlN passivation) at
passivation/heterostructure interface, but with
different levels of effectiveness under fast switching
conditions. SiNx-passivation introduces shallow
donor-like trap states with short time constant that
favors a fast emission of trapped electrons in the
access region and suppressed current collapse, but
nevertheless exhibits more severe time-dependent
recovery of dynamic ON-resistance. For AlN
passivation, interface traps are compensated by the
fixed positive polarization charges and the OFF-state
depletion region (in the 2DEG channel) is formed
predominantly by electric-field effect, leading to an
immediate accumulation of high channel electron
concentration after switching the HEMT devices back
to ON-state and instant response of drain current to
gate and drain bias. The field plate structure is
necessary in SiNx-passivated devices for both current
collapse suppression and electric field alleviation.
With AlN passivation, the field plate can be solely
designed for achieving more uniform electric field
distribution for gate reliability concern without the
concern of current collapse.
Noise performance of an AlGaN/GaN monolithic
microwave integrated circuit (MMIC) low-noise
amplifier under laser exposure University of Messina, Department of Engineering, 98166
Messina, Italy
Scienze Fisiche e Scienze della Terra, University of Messina,
Dipartimento di Scienze Matematiche e Informatiche,
98166 Messina, Italy
IET Microwaves, Antennas & Propagation
https://doi.org/10.1049/iet-map.2019.0776
The aim of this study is to disclose how the
performance of a gallium nitride (GaN)-based X-band
low-noise amplifier is modified by applying a blue-ray
(404 nm) laser beam. The tested amplifier employs an
aluminium gallium nitride/GaN (AlGaN/GaN) high
electron mobility transistor on silicon carbide whose
dc and noise behaviour have been first analysed with
and without optical illumination. Mild improvement of
the gain together with severe degradation of the noise
figure has occurred during light exposure with the
amplifier operating according to the recommended
bias condition. Conversely, pronounced improvement
of the performance has taken place when the
amplifier has been biased close to the transistor pinch-
off point. The results presented in this work follow a
previous intense activity carried out on devices and
amplifiers based on gallium arsenide technology.
Design Strategies for Mesa-Type GaN-Based Schottky
Barrier Diodes for Obtaining High Breakdown Voltage
and Low Leakage Current State Key Laboratory of Reliability and Intelligence of
Electrical Equipment, School of Electronics and Information
Engineering, Hebei University of Technology, Tianjin
300401, China
Key Laboratory of Electronic Materials and Devices of
Tianjin, Hebei University of Technology, Tianjin 300401,
China
Department of Photonics, Institute of Electro-optical
Engineering, National Chiao Tung University, Hsinchu
30010, Taiwan
Department of Electrical Engineering and Computer
Sciences, Tsinghua-Berkeley Shenzhen Institute (TBSI),
University of California at Berkeley, Berkeley, CA 94720 USA
IEEE Transactions on Electron Devices
https://doi.org/10.1109/TED.2020.2978007
In this article, we have systematically investigated the
impact of different structural parameters on the
breakdown voltage for GaN-based trench MIS barrier-
controlled Schottky (TMBS) rectifier. Compared with
the planar Schottky rectifier, the TMBS rectifier has
field plates on the mesa sidewalls so that the drift
region can be depleted in a 2-D manner, which helps
to decrease the electric field at the metal/mesa
interface. However, the adoption of mesas can make
the electric potential lines at the mesa corner dense
and has large curvatures. Therefore, the premature
breakdown can occur when the electric field therein
reaches the critical condition. We find that the electric
field profiles can be affected by insulation layer
thickness, mesa width, trench depth, and different
types of insulation layers. Then, we increase the
breakdown voltage by homogenizing the electric field
distribution in the mesa region, e.g., the electric field
at mesa corners can be decreased by adopting
properly thick sidewall insulator and small trench
depth. Meanwhile, TMBS rectifier using sidewall
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insulating material with a large dielectric constant
more favors a large breakdown voltage.
1.4-kV Quasi-Vertical GaN Schottky Barrier Diode
With Reverse p-n Junction Termination Key Laboratory of Advanced Photonic and Electronic
Materials, School of Electronic Science and Engineering,
Nanjing University, Nanjing, China
IEEE Journal of the Electron Devices Society
https://doi.org/10.1109/JEDS.2020.2980759
In this paper, we demonstrate high-performance
quasi-vertical GaN-on-Sapphire Schottky barrier
diodes (SBD) with a reverse GaN p-n junction
termination (RPN). The SBD has a current output of 1
kA/cm 2 at VF=2.5 V, a low Von of 0.66 V ± 0.017 V, a
low Ron,sp of 1.4 mΩ⋅ cm 2 , current ON/OFF ratio of
over 109 (−3 V~3 V). By introducing the RPN, the
breakdown voltage can boost from 459 V to 1419 V,
and power figure-of-merit (FOM) can reach 1438
MV/cm 2 . It is shown that the presence of the RPN
with a suitable anode recess depth can generate an
electric field (EF) opposite to the built-in EF at the
center of the second top p-n junction, which can
decrease the EF peak intensity and make the electric
field more uniformly distributed inside the device.
Finally, the leakage current of the SBD is inhibited and
the breakdown voltage is increased.
A 177-183 GHz High-Power GaN-based Frequency
Doubler with over 200 mW Output Power National Key Laboratory of ASIC, Hebei Semiconductor
Research Institute, Hebei, Shijiazhuang 050051, China
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2981939
A GaN Schottky barrier diode (SBD) on SiC for
frequency doubler applications was fabricated with a
N-/N+ GaN stack of 200 nm / 1500 nm in thickness and
5×1017 cm-3 / 8×1018 cm-3 in doping densities,
respectively. A cut-off frequency of 459 GHz at zero
bias and reverse breakdown voltage of 15.4 V were
obtained. A quartz glass circuit with flip-chip-mounted
GaN SBDs was inserted between split-waveguide
blocks to form a balanced frequency doubler. When
driven with 2 W input power in pulsed mode,
measured output power was 200-244 mW from 177-
183 GHz with efficiency 9.5-11.8%.
MEMS Chip with Amplifier for 4-Watt Power
Combining up to 100 GHz State Key Laboratory of Millimeter Waves, School of
Information Science and Engineering, Southeast University,
Nanjing 210096, P. R. China
Science and Technology on Monolithic Integrated Circuits
and Modules Laboratroy, Nanjing 210016, P. R. China
IEEE Transactions on Components, Packaging and
Manufacturing Technology
https://doi.org/10.1109/TCPMT.2020.2980958
Millimeter-wave and terahertz bands are very
attractive for high resolution radars and fifth-
generation communication and beyond, nevertheless,
it is very challenging to achieve high output power in
silicon. To address this crucial issue, this paper firstly
presents an in-house developed silicon
micromachining process. Using this process, power
combiner is formed in silicon waveguide, by dry
etching and bonding two 8-inch silicon wafers.
Benefiting from the hollow, symmetrical and
accurately assembled waveguide structure, the power
combiner features a measured low loss of 0.2 dB and
high amplitude/phase balance of ±0.15 dB/±2° from
92 to 96 GHz. Moreover, based on this power
combiner and an in-house fabricated power amplifier
in Gallium nitride (GaN), this paper further
demonstrates a power combing prototype with a
typical output power of 4 W, a power-added efficiency
of higher than 12.9%, and a combining efficiency of
higher than 92%.
High Linearity and High Gain Performance of N-Polar
GaN MIS-HEMT at 30 GHz Electrical and Computer Engineering Department,
University of California – Santa Barbara, Santa Barbara, CA
93106, USA
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2980841
Though GaN HEMTs have primarily been used for
power amplification, they are also well suited for
receiver applications. In the front-end of receivers,
non-linearities, third-order intermodulation products
lead to in-band signal distortion. The intermodulation
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distortion is primarily dominated by transconductance
and its derivatives. In this paper, we report on N-polar
GaN MIS-HEMTs able to simultaneously achieve high
gain (12.7 dB) and excellent linearity performance
(OIP3/PDC of 15 dB) for low-power receiver
application at 30 GHz. With a two-tone load-pull input-
bias sweep, we demonstrate that the linearity of high
performance HEMTs is sensitive to bias, and we
present our measurement methodology to
accommodate this.
Switching Performance Analysis of Vertical GaN
FinFETs: Impact of Inter-Fin Designs College of Electrical Engineering, Zhejiang University,
Hangzhou 310027, China
Center for Power Electronics Systems, Virginia Polytechnic
Institute and State University, Blacksburg, VA 24061 USA
Microsystems Technology Laboratories, Massachusetts
Institute of Technology, Cambridge, MA 02139 USA
IEEE Journal of Emerging and Selected Topics in Power
Electronics
https://doi.org/10.1109/JESTPE.2020.2980445
This work studies the switching performance of
vertical GaN power FinFETs and proposes new inter-
fin designs to improve it. The inter-fin region has been
found to be an important limiting factor for FinFET
switching performance. The time taken to (dis)charge
the dielectric parasitic capacitances and drift layer in
the inter-fin regions severely limits the device turn-
(on)off speed. Three new inter-fin designs are
proposed, based on (a) reduced fin-to-fin spacing, (b)
oxide full-filling and (c) splitgate structures. 1.2 kV, 80
mΩ vertical GaN FinFETs with these designs were
evaluated by a well-calibrated device-circuit
mixedmode TCAD simulation. Both the reduced-fin-
spacing structure and the oxide full-filling reduce the
dielectric parasitic capacitances, but only lead to small
reduction (less than 10%) in switching losses. Much
better improvement is obtained with the split-gate
structure, which removes the gate metal in the inter-
fin region and exposes the drift layer to the field lines
from the source metal. During the turn-(on)off of the
transistor with a split-gate structure, the drift layer
underneath the inter-fin gap region is (dis)charged by
a combination of the drain-to-source and gate
currents, leading to shorter switching times and lower
switching losses. By utilizing the split-gate structure,
simulations predict a 58% improvement in the
switching figure-of-merit and 38% lower switching
losses in 1.2 kV vertical GaN power FinFETs. These
results provide key understanding and design
guidelines for power FinFETs. Finally, an 800 V buck
converter using a 1.2 kV GaN FinFET half-bridge
module is simulated, showing excellent efficiency
when operating at multi-megahertz frequency and
revealing the requirement for device thermal
management. This highlights the great potential of
vertical GaN power FinFETs for future high-frequency
medium-voltage power applications.
Improved DC and RF Performance of Novel MIS p-
GaN-Gated HEMTs by Gate-All-Around Structure Institute of Electronics Engineering, National Tsing Hua
University, Hsinchu 30013, Taiwan
Innovation Technology Research Center, Global Wafers
Company Hsinchu 300, Taiwan
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2980584
In this study, we report a novel structure of
enhancement-mode metal-insulator-semiconductor
high electron mobility transistor (E-mode MIS HEMT)
with p-GaN gate by gate-all-around technology. The
gate-all-around structure is fabricated by depositing
an insulator and gate to surround the p-GaN mesa. The
p-GaN length is smaller than the gate length, which
would easily turn on the two dimensional electron gas
(2DEG) of channel and result in a higher drain current
and thus improve the device performance. The gate-
all-around p-GaN MIS HEMT has better gate control,
better transconductance, and lower gate leakage
current. The device exhibits a threshold voltage (Vth)
of 1.5 V, a maximum transconductance (Gm.max) of
101 mS/mm, and a drain saturation current density
(JDS,max) of 412 mA/mm at a gate bias (Vg) of 5 V. The
most important achievement is that the gate leakage
current at Vg = 5 V is only 10-8 mA/mm. Moreover, the
ratio of drain current density to gate leakage current
density (JDS/JGS) is 108 at Vg = 5 V. Finally, the cut-off
frequency (ft) and maximum oscillation frequency
(fmax) of microwave pe
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Distinct Failure Modes of AlGaN/GaN HEMTs Under
ESD Conditions Department of Electronic Systems Engineering, Indian
Institute of Science, Bangalore, India
Center for Nanoscience and Engineering, Indian Institute of
Science, Bangalore, India
IEEE Transactions on Electron Devices
https://doi.org/10.1109/TED.2020.2974508
This article reports the distinct failure mechanisms and
insights on device degradation of AlGaN/GaN high
electron mobility transistors (HEMTs) under
electrostatic discharge (ESD) stress conditions. The
role of device surface, MESA isolation, and gate
Schottky junction in defining the degradation type is
discovered. Premature breakdown at the MESA
Schottky junction and dislocation induced failure in
the active region and their consequences on ESD
robustness are reported. Physical mechanisms
responsible for snapback instability in transmission
line pulsing (TLP) characteristics are discussed. Change
in device failure from soft to hard with pulsewidth is
revealed. Finally, the role of contact resistivity, surface
diffusion, and channel electric field and its fringing
effect at contacts are analyzed in context to ESD
failure of AlGaN/GaN HEMTs. Various stages of device
degradation during TLP stress are captured on-the-fly
using high-resolution (HR) optical microscopy and
high-speed Si charge-coupled device (CCD) detector.
Postdevice failure, damaged regions are analyzed
using transmission electron microscopy and scanning
electron microscopy together with in situ energy-
dispersive X-ray spectroscopy to probe details of
failure mechanisms involved. Finally, based on the
learning from this article, design guidelines for an ESD
robust HEMT are proposed.
Experimental Study on the Short-Circuit Instability of
Cascode GaN HEMTs Department of Electrical Engineering and Information
Technologies, University of Naples Federico II, Naples, Italy
IEEE Transactions on Electron Devices
https://doi.org/10.1109/TED.2020.2974518
This article presents an experimental investigation on
the short-circuit (SC) instability of several
commercially available cascode gallium nitride (GaN)
high-electron-mobility transistors (HEMTs). In the SC
test, self-sustained oscillation is observed during the
SC transient. The SC oscillation features some unique
characteristics. The gate resistor shows very weak
damping effect on the SC oscillation. The SC oscillation
thereby cannot be suppressed by utilizing a large gate
resistor. With the increase in the dc-bus voltage, the
SC oscillation greatly amplifies and becomes more
unstable. When the dc-bus voltage reaches 200–250
V, catastrophic failure occurs. In the SC test, two
distinct failure modes, which are related to the failure
of low-voltage (LV) MOSFET and depletion-mode
HEMTs (DHEMTs), are identified. Based on the
experimental evidence and simulation study, the root
causes of the failure are clarified in the end.
Identification of Trap States in p-GaN Layer of a p-
GaN/AlGaN/GaN Power HEMT Structure by Deep-
Level Transient Spectroscopy Department of Electronic and Computer Engineering, The
Hong Kong University of Science and Technology, Kowloon,
Hong Kong
Key Laboratory of Microelectronic Devices and Integrated
Technology, Institute of Microelectronics of Chinese
Academy of Sciences, Beijing 100029, China
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2980150
In this work, the deep-level transient spectroscopy
(DLTS) is conducted to investigate the gate stack of the
p-GaN gate HEMT with Schottky gate contact. A
metal/p-GaN/AlGaN/GaN heterojunction capacitor is
prepared for the study. The DLTS characterization
captures the transient capacitance change in the
stack, from which the capacitance of the metal/p-GaN
Schottky junction can be extracted. By proper
selection of the rate window, the impacts of the hole
insufficiency effect are avoided during trap states
evaluation. Thus, the information of deep energy
levels in the p-GaN layer is revealed, which consists of
an electron trap state with activation energy of 0.85
eV and a hole trap state with activation energy of 0.49
eV. The identification of these trap states in the p-GaN
layer provides a physical foundation for understanding
the threshold voltage instability in Schottky-type p-
GaN gate power HEMTs.
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Novel Drain-Connected Field Plate GaN HEMT
Designs for Improved VBD–RON Tradeoff and RF PA
Performance Department of Electronic Systems Engineering, Indian
Institute of Science, Bengaluru, India
IEEE Transactions on Electron Devices
https://doi.org/10.1109/TED.2020.2976636
TCAD studies are performed to develop physical
insights into the breakdown behavior of drain-
connected field plate-based GaN HEMTs. Using the
developed insights, to mitigate the performance
bottleneck caused by the lateral drain-connected field
plate design, we have proposed novel vertical-field-
plate designs. The proposed designs alleviate the
channel electric field by uniformly distributing it
vertically into the GaN buffer region. As a result, the
proposed vertical and dual-field-plate design offer 2×
and 3× improvements in breakdown voltage,
respectively, compared with the design without field
plate. Similarly, compared with a design with a lateral
field plate, a 50% improvement in the breakdown
voltage was seen with dual-field-plate architecture. RF
power amplifier (PA) performance extracted using
load-pull simulations demonstrates an improved RF
PA linearity at higher drain bias, improved output
power, efficiency, and PA gain for HEMTs with dual-
and vertical-field-plate designs.
Al0.65Ga0.35N/Al0.4Ga0.6N Micro-Channel
Heterojunction Field Effect Transistors with Current
Density Over 900 mA/mm Electrical and Computer Engineering Department, The Ohio
State University, Columbus, OH 43210 USA
Electrical Engineering Department, University of South
Carolina, Columbia, SC 29208 USA
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2977997
We report on the demonstration of high current
density in Al0.65Ga0.35N/Al0.4Ga0.6N heterojunction
field effect transistors with micro-channels enabled by
enhanced contact injection. Devices with a gate length
of 100 nm exhibited a maximum current density of 910
mA/mm and a maximum transconductance of 140
mS/mm. A current gain cut off frequency of 20 GHz
and maximum oscillation frequency of 36 GHz were
obtained. Large-signal load-pull characterization of
the transistors showed output power density of 2.7
W/mm at 10 GHz. The current density and output
power density represent the state-of-art performance
for high Al-composition AlGaN channel transistors.
Comprehensive Design of Device Parameters for GaN
Vertical Trench MOSFETs State key Laboratory of Wide Band-Gap Semiconductor
Materials and Devices, School of Microelectronics, Xidian
University, Xi’an 710071, China
Testing center, Sichuan Institute of Solid-State Circuits,
CETC, Chongqing 400060, China
IEEE Access
https://doi.org/10.1109/ACCESS.2020.2977381
In this work, device parameters for GaN vertical trench
MOSFETs have been investigated systematically to
further improve the device characteristics. The n- GaN
drift layer, the p+ GaN layer and the trench gate are
designed and optimized systematically using Silvaco
ATLAS 2-D simulation, in order to get the best trade-
off between VBR and specific on-resistance Ron.
Three-terminal breakdown curves, the electron
concentration, current density and electric field
strength distributions have been presented to analyze
the breakdown characteristics. The correlations
between different parameters and different initial
conditions are considered, and the eight parameters
are optimized comprehensively. After the final
optimization, record high FOM of 4.8 GW/cm2, VBR of
2783 V, average electric field Edrift of 1.98 MV/cm and
a low Ron of 1.6 mΩ·cm2 are obtained for drift layer
thickness of 14 μm. The product of the thickness Lp
and doping density Np of p+ GaN layer can determine
the breakdown mechanism, and punch through
mechanism would occur when Lp·Np is lower than a
certain value. The results indicate there exists large
optimization room for fabricated GaN vertical trench
MOSFETs, and the device characteristics can be
further improved through the methodology in this
paper for high power and high voltage applications.
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Bias-Dependent Electron Velocity Extracted From N-
Polar GaN Deep Recess HEMTs Electrical and Computer Engineering Department,
University of California Santa Barbara, Santa Barbara, CA,
USA
IEEE Transactions on Electron Devices
https://doi.org/10.1109/TED.2020.2973081
This article reports on the extraction of the electron
velocity as a function of gate bias from N-polar GaN
deep recess high-electron-mobility transistors
(HEMTs) designed for mm-wave power amplification.
Bias-dependent small-signal S-parameter
measurements are used to obtain small-signal
equivalent circuit parameters, which are applied to a
transit delay model. The model accounts for fringing
capacitance to arrive at an electron velocity associated
with the transit of the physical gate length. A peak
electron velocity of 1.4×107 cm/s was obtained at a
drain current of 700 mA/mm corresponding to a
channel charge density of 0.3×1013 cm −2 . At higher
current, the velocity slowly decreased with the
electron velocity crossing below 107 cm/s at 1.8
A/mm. This behavior was found to be in good
agreement with a previously proposed model based
on optical phonon scattering at the source injection
point. An analysis of the delay components is used to
provide guidance for the factors influencing the device
performance.
E-Mode p-n Junction/AlGaN/GaN (PNJ) HEMTs Department of Electrical and Electronic Engineering,
Southern University of Science and Technology, Shenzhen,
China
Department of Electronic and Computer Engineering, The
Hong Kong University of Science and Technology, Hong
Kong
IEEE Electron Device Letters
https://doi.org/10.1109/LED.2020.2977143
In this work, we demonstrate a GaN-based p-n
junction gate (PNJ) HEMT featuring an n -GaN/ p -
GaN/AlGaN/GaN gate stack. Compared to the more
conventional p -GaN gate HEMT with a Schottky
junction between the gate metal and p -GaN layer, the
p-n junction can withstand higher reverse bias at the
same peak electric-field as the depletion region
extends to both the n -side and p -side, while
exhibiting lower leakage current. The PNJ-HEMT
shows a positive threshold voltage ( VTH ) of 1.78 V, a
small gate leakage (∼10−3 mA/mm @ VGS=10V ). In
particular, a large forward gate breakdown voltage of
19.35 V at 25 °C and 19.70 V at 200 °C was achieved
with the PNJ-gate HEMT.
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PRESS RELEASE Technical and economic information selected by Knowmade
ELECTRONICS
PI expands range of InnoSwitch3 ICs incorporating robust 750 V GaN transistors PowerElectronicsNews
Power Integrations announced an expansion of its InnoSwitch3 families of offline CV/CC flyback switcher ICs. The
new INN3x78C devices incorporate a smaller “size 8” 750 V PowiGaN transistor, enabling compact, efficient
power supplies delivering between 27 W and 55 W without heatsinks. The ICs are housed in the same high-
creepage, safety-compliant InSOP-24D package as larger members of the GaN-based InnoSwitch3 families, which
target up to 120 W.
Known for exceptional efficiency – up to 94% efficient across line and load, PowiGaN technology is also extremely
robust, making them highly resistant against line surges and swells commonly seen in regions with unstable mains
voltage. This enables OEMs to specify a single power supply design to be used worldwide. Applications for the
new parts include USB PD and high-current chargers/adapters for mobile devices, as well as set-top boxes,
displays, networking and gaming products and appliances – especially those aiming to comply with the planned
European Energy Labeling Regulation.
5G RF Issues Send Soitec Seeking New Wafer Material eetimes
BARCELONA – Despite the Mobile World Congress cancellation, the pursuit of 5G grows fiercer by the hour,
especially among electronics players who are hitting silicon performance limits for 5G RF front-end modules.
Among the candidate materials to supplant silicon are compound materials such as gallium nitride (GaN), gallium
arsenide (GaAs), and silicon carbide (SiC), along with piezoelectrics, which are being used to improve filters. GaAs
has been used for power amplifiers in 4G and 5G handsets. GaN has begun gaining traction for power amplifiers
in 5G mmWave markets.
More and more RF fabless chip companies are seeking “new materials to solve their
problems,” Paul Boudre, CEO of Soitec, told EE Times this week in an interview here.
Together with CEA-Leti, Soitec (Grenoble, France) pioneered silicon-on-insulator (SOI)
substrates. Already very successful with RF SOI wafers (used by RF chip companies to make
switches and antenna tuners for smartphones), Soitec is poised to expand by branching into
the new world of compound materials.
Boudre described a Soitec plan “to develop, generate and offer new materials based on our engineered
substrates” for fabless chip companies. A list of Soitec’s new material adventures includes:
• Piezoelectric-on-insulator (POI) engineered substrates — used to produce high-performance surface
acoustic wave (SAW) filter components for 4G and the 5G New Radio (NR) bands
• GaN-on-Si, GaN-on-SiC epiwafers. Soitec last year acquired Imect’s spinoff EpiGaN in Belgium, which
developed the epiwafers. By integrating EpiGaN into Soitec and bankrolling the necessary tools, Soitec
plans to enter the high-volume manufacturing base for the 5G GaN power amplifier market.
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• Soitec will this year start sampling SiC wafers based on the company’s proprietary technology called Smart
Cut.
Soitec’s Smart Cut process allows Soitec engineers to define materials, grow single-crystalline layers of those
materials, and then transfer those layers from one substrate to another. This makes it possible to create active
layers of a wafer that can be managed independently from the supporting mechanical substrates.
Soitec’s goal, applying Smart Cut to SiC, is to significantly improve SiC at the substrate and device levels both in
cost and quality.
The bulk of Soitec’s products are based on FD-SOI and RF-SOI substrates, both of which leverage Smart Cut
technology. Soitec, similarly by using Smart Cut, has also recently put POI into volume production. Next up are
Smart Cut-based SiC wafers, scheduled for sampling later this year.
Why SiC?
But why SiC now? Even with a boom in demand, SiC faces two big challenges. First, there aren’t enough SiC wafers
to go around. Second, when it comes to yield rate, SiC sucks.
Soitec has engineered new Smart Cut SiC wafers with these problems in mind, first by substantially improving the
quality of the SiC layer on the substrate, and second by transitioning from current 6-inch SiC wafers to 8-inch
wafers in order to reduce the cost. Soitec currently has a SiC-wafer pilot line in Grenoble.
To bolster its efforts, Soitec last fall announced a joint development program with Applied Materials. Applied
joined with Soitec to get engaged in materials engineering innovations for silicon carbide technology.
Thomas Piliszczuk, Soitec’s executive vice-president of global strategy, cited two potentially
large markets for Smart Cut-based SiC. One is for EV inverters, aiming for major battery-life
improvements. Another is to capture “5G base-station demand for high-power efficiency and
stringent linearity in power amplifiers.”
Given the shortage of SiC wafers on the market today, what’s Soitec’s business model? Boudre
said, “It’s a good question. We can be SiC wafer providers ourselves, or we can partner with
others by licensing.” Either way, he said, “Our goal is to reinforce SiC wafer supplies, improve its quality and
transition it to 6-inch wafers. All of this will help make the cost structure of SiC wafers competitive.”
In search of new materials beyond silicon
RF semiconductor designers are scrambling for new materials/designs/architecture for 5G systems. But why?
Because 5G uses more different high-frequency
bands to enable high speed data transmission,
the number of power amplifiers, filters,
switches, LNA, antenna tuners that must go
inside 5G RF front-end modules are multiplying
at a bewildering rate. The sheer volume of parts
and components — many remain discrete — is
a headache for smartphone designers who must
squeeze all those RF modules into a 5G phone.
5G smartphone developers are also worried
about the quality, thermal dissipation and
efficiency of RF components, because they
could bog down RF front-end modules’
performance.
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Moreover, not every RF component uses the same material or same technology. As noted, POI is used to improve
filters. GaAs has been the leading material for power amplifiers (PA). But many PA suppliers today are taking a
hard look at GaN. On another hand, RF SOI, a specialized SOI process, has become the standard for making such
RF chips as switch devices and antenna tuners, for 3G, 4G and 5G smartphones and other products.
As Boudre explained, Soitec’s RF-SOI, available since 2016, has gained a lot of RF component customers. These
customers opened Soitec’s eyes, because every RF fabless company is looking for new materials and substrates
to build chips that meet the stringent requirements of 5G’s RF.
One example is power amplifiers for smartphones and base stations.
PA chips in 5G wireless applications are much different from those employed in 4G networks. Broadband
modulation for 5G transmissions demands high-power efficiency and strict linearity from power amplifiers.
Moreover, 5G networks will employ phased-array antennas to focus and steer multiple beams. With a 4×4 phased-
array antenna, for example, the power amplifier must operate at much lower power than for the single-beam
signals currently common in cellular systems.
The story gets even more complicated with a 5G network transmitting at millimeter wave (mmWave) frequencies.
Compared to a sub-6GHz systems, a mmWave counterpart faces even more complicated RF design challenges.
Multiple-input multiple-output (MIMO) antennas are a 5G necessity, because they must serve many devices in
densely deployed environments. They will require power amplifier chips with high-power efficiency and stringent
linearity. Phased-array MIMO antennas with numerous RF front-end components will also ask for power
amplifiers that offer greater integration at lower cost.
The strict requirements imposed by 5G handsets and base stations for power amplifiers led Soitec to aquire
EpiGaN.
For both 5G infrastructure and handset architectures, mandatory attributes for RF semiconductor devices are
“efficiency, compactness, low cost, high power density and linearity,” according to an article co-written by Markus
Behet, Joff Derluyn, Stefan Degroote and Marianne Germain at Soitec’s GaN business unit. The article said,
“Judged in terms of wideband performance, power density and efficiency, legacy technologies — essentially
silicon LDMOS (laterally-diffused metal-oxide semiconductor) or GaAs — are no match for GaN HEMTs (High-
electron-mobility transistor), regardless of whether they are grown on silicon or SiC.”
In the authors’ opinion, GaN technology is “meeting stringent thermal specifications for 5G, while preserving
valuable PCB space for the tightly clustered massive MIMO antenna arrays. In base stations, discrete designs are
already being replaced by space-saving multi-function GaN MMICs and multi-chip modules.”
What about Qualcomm?
Given the emergence of all these new materials — beyond silicon — supposedly to enable the integration of 5G
mmWave RF front-end modules, what’s Qualcomm’s solution?
Qulacomm examined the available options, but in the end, the company chose silicon-based RF solutions,
observed Claire Troadec, Power & Wireless Division director at Yole Développement.
Most likely this is because it was Qualcomm’s first-generation 5G mmWave RF front-end module, noted Boudre.
He is confident that RF solutions leveraging GaN-on-Si technology, for example, could come into play, maybe in
the company’s third or fourth generation of 5G RF modules.
GaN on SiC vs. GaN on Si
EpiGaN has developed both GaN-on-SiC and GaN-on-Si epiwafers. What are the differences between the two?
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Piliszczuk explained that both target the same market. “Today GaN on SiC has leadership” because it is more
mature, he said. “Multiple device makers are working today on GaN-on-Si solutions also for handsets.”
In applications, GaN on SiC is used today for wireless infrastructure (4G/LTE base stations), defense,
communication satellite applications “where highest performance and reliability is mandatory,” observed
Piliszczuk. “GaN on SiC is also a strong contender for 5G MIMO infrastructure,” he added.
Piliszczuk acknowledged that GaN on Si has similar RF performance as GaN on SiC, but is less mature and has
thermal constraints associated with the use of the silicon substrate.
But Soitec is bullish on GaN on Si, because presumably, it can take advantage of the significant economies of scale
inherent in silicon processing. Piliszczuk believes it can “open up new high-volume and consumer markets.”
According to Soitec, 200mm GaN-on-Si products are available today from EpiGaN/Soitec. He noted that GaN-on-
Si is also a strong contender for 5G infrastructure and handsets.
Yole Développement’s Antoine Bonnabel, technology and market analyst for RF devices and technologies within
the Power & Wireless division, remains more cautious.
He told EE Times, “GaN on Si is not yet mature enough to be used commercially.” Meanwhile, “GaN on SiC is today
used.” He explained that both approaches target the same application: power amplification for high frequencies.
According to Bonnabel, “The issue today is that GaN-on-SiC technologies are too expensive compared to silicon-
based solutions. This is the case especially for low-power power amplifiers for massive MIMO, or for power
amplifiers with less than 3 GHz frequencies. In addition, it cannot be integrated for small power applications like
massive MIMO.”
In his opinion, “GaN on SiC is only used when no other solution exists, such as for high-power power amplification
in frequencies over 3 GHz: typically 20W power amplifiers for band n77 – n79 currently in pilot / deployment
phase.”
On the other hand, Bonnabel said, “GaN-on-Si solutions are not as good as GaN-on-SiC approaches, but they can
potentially be lower cost.”
This means, he explained, that GaN on Si could compete on lower power amplification with Si-based LDMOS
technology, thanks to a low-enough price and its integration capability (which GaN on SiC does not have).
Bonnabel concluded, “If Soitec or other players manage to manufacture good quality GaN on Si at reasonable
prices, it could clearly compete with Silicon-based technology. And therefore, it will penetrate the lower power
amplifiers market for massive MIMO. At the end, it could also replace GaN-on-SiC solutions for higher power
applications.”
Asked about Soitec’s EpiGaN gambit, Yole’s analyst said, “Soitec has a long history in entering new innovative
markets and managing to offer the best-in-class substrates. At Yole, we expect the company to do the same with
GaN technologies.”
Future of alternative materials & structures
Researchers are looking ahead of the future where chip designers can leverage different materials in 3D
integration. Earlier this month, Nadine Collaert, program director at Imec, discussed in a plenary session at the
ISSC: “The industry is moving to higher frequencies and higher efficiency. One option is combining III-V materials
(e.g. GaN and SiC) with CMOS to get the benefits of both materials.” She said, “That can be done with 3D
integration,” showing several examples including an image of a 3D nano-ridge with a III-V material grown on a
silicon-on-insulator (SOI) substrate. However, she cautioned, “There’s a lot of work that needs to go into enabling
this.”
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Soitec CEO Boudre, during the interview in Barcelona, noted that RF chip companies want a variety of options
when it comes to technologies they can use to make their chips. Depending on the design and architecture of
their RF front-end solutions, “We think it’s our job to offer to our customers a broad range of solutions a la carte
— ranging from FD-SOI, RF-SOI to GaN and SiC.” In his mind, there will be opportunities to create a range of a new
kind of engineered substrates.
“We think there will be a day when we can develop GaN-on-SiC on Si, for example. Why not?”
Mission Microwave’s GaN-based BUCs support Envistacom’s SatCom terminal upgrade program SemiconductorToday
Mission Microwave Technologies LLC of Santa Fe Springs, CA, USA, which manufactures gallium nitride (GaN)-
based solid-state power amplifiers (SSPAs) and block up-converters (BUCs), and Envistacom of Atlanta, GA, USA,
a provider of communications, cyber and intelligence operations solutions to the US Department of Defense (DoD)
and coalition partners in the aerospace, defense and intelligence communities, have confirmed the initial orders
of a major satellite ground terminal upgrade program for a US Government customer.
Envistacom teamed with Mission Microwave to create an opportunity for their customer to replace legacy
traveling-wave tube amplifiers (TWTA)-based block up-converters (BUCs) with solid-state BUCs based on gallium
nitride (GaN) technology. The initial upgrade platforms include 200 tactical terminals in support of the US Army’s
Project Manager Mission Network (PM MN).
Mission Microwave is providing Envistacom with 200W Ku-band and 50W Ka-band BUCs to replace legacy TWTA-
based up-converters. Mission Microwave says that its competency in designing compact and highly efficient
amplifiers has enabled Envistacom to offer their customer an upgrade path that will extend the life and utility of
this tactical SatCom terminal fleet of over 600 terminals. If taken to completion, the upgrade program could result
in orders of about $44m for Mission Microwave.
“The end-users of our products rely on proven SatCom system providers like Envistacom to bring the benefits of
solid-state designs to the tactical edge,” says Mission Microwave’s VP of sales & marketing Steve Richeson. “We
worked with Envistacom’s engineering team to navigate the complexities of the upgrade and certification process
for these terminals. Envistacom’s reputation and knowledge of the tactical customers’ expectations has made it
possible for Mission Microwave to bring these benefits to critical field operators,” he adds. “We expect the trend
of replacing high-power TWTAs with SSPAs to be a significant market for the foreseeable future. Envistacom has
been a critical partner in bringing this to market.”
“Our tactical customers demand the reliability, performance and lower total cost of ownership associated with
solid-state amplifiers,” says Russ Coolman, product manager, Envistacom. “Mission Microwave’s innovative
application of GaN technology has enabled the use of solid-state BUCs at power levels that were previously not
practical.”
Room-temperature bonded GaN/diamond interface improves cooling of HEMTs SemiconductorToday
A room-temperature bonding technique for integrating wide-bandgap materials such as gallium nitride (GaN) with
thermally conducting materials such as diamond could boost the cooling effect on GaN devices and facilitate
better performance through higher power levels, longer device lifetime, improved reliability and reduced
manufacturing costs, reports the USA’s Georgia Tech, in collaboration with Japan’s Meisei University and Waseda
University (Zhe Cheng et al, ‘Interfacial Thermal Conductance across Room-Temperature-Bonded GaN/Diamond
Interfaces for GaN-on-Diamond Devices’, ACS Appl. Mater. Interfaces, 2020, 12, 8376−8384). The work was
GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 03 | 38
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supported by a multi-disciplinary university research initiative (MURI) project (grant no. N00014-18-1-2429) from
the US Office of Naval Research (ONR). The technique could have applications for wireless transmitters, radars,
satellite equipment and other high-power and high-frequency electronic devices.
The surface-activated bonding technique uses an ion source in a high-vacuum environment to first clean the
surfaces of the GaN and diamond, which activates the surfaces by creating dangling bonds. Introducing small
amounts of silicon into the ion beams facilitates forming strong atomic bonds at room temperature, allowing the
direct bonding of the GaN and single-crystal diamond that allows the fabrication of high-electron-mobility
transistors (HEMTs).
The resulting interface layer from GaN to single-crystal diamond is just 4nm thick, allowing heat dissipation up to
two times more efficient than in state-of-the-art GaN-on-diamond HEMTs by eliminating the low-quality diamond
left over from nanocrystalline diamond growth. Diamond is currently integrated with GaN using crystalline growth
techniques that produce a thicker interface layer and low-quality nanocrystalline diamond near the interface.
Additionally, the new process can be performed at room temperature using surface-activated bonding
techniques, reducing the thermal stress applied to the devices.
Picture: Cross-section bright-field high-resolution STEM images of GaN-diamond interfaces bonded by
surface-activated bonding technique. (Zhe Cheng, Georgia Tech)
“This technique allows us to place high-thermal-conductivity materials much closer to the active device regions in
gallium nitride,” notes Samuel Graham, the Eugene C. Gwaltney Jr School Chair and Professor in Georgia Tech’s
George W. Woodruff School of Mechanical Engineering. “The performance allows us to maximize the performance
for gallium nitride on diamond systems. This will allow engineers to custom design future semiconductors for
better multi-functional operation.”
For high-power electronic applications using materials such as GaN in miniaturized devices, heat dissipation can
be a limiting factor in power densities imposed on the devices. By adding a layer of diamond, which conducts heat
five times better than copper, engineers have tried to spread and dissipate the thermal energy.
However, when diamond films are grown on GaN, they must be seeded with nanocrystalline particles about 30nm
in diameter, and this layer of nanocrystalline diamond has low thermal conductivity – which adds resistance to
the flow of heat into the bulk diamond film. In addition, the growth takes place at high temperatures, which can
create stress-producing cracks in the resulting transistors.
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“In the currently used growth technique, you don’t really reach the high-thermal-conductivity properties of the
microcrystalline diamond layer until you are a few microns away from the interface,” Graham says. “The materials
near the interface just don’t have good thermal properties. This bonding technique allows us to start with ultra-
high thermal conductivity diamond right at the interface.”
By creating a thinner interface, the surface-activated bonding technique moves the thermal dissipation closer to
the GaN heat source.
“Our bonding technique brings high-thermal-conductivity single-crystal diamond closer to the hotspots in the GaN
devices, which has the potential to reshape the way these devices are cooled,” believes the paper’s first author
Zhe Cheng, a recent Georgia Tech Ph.D. graduate. “And because the bonding takes place near room temperature,
we can avoid thermal stresses that can damage the devices.”
That reduction in thermal stress can be significant, going from as much as 900MPa to less than 100MPa with the
room-temperature technique. “This low-stress bonding allows for thick layers of diamond to be integrated with
the GaN and provides a method for diamond integration with other semiconductor materials,” Graham says.
Beyond GaN and diamond, the technique can be used with other semiconductors, such as gallium oxide, and other
thermal conductors such as silicon carbide. Graham says that the technique has broad applications to bond
electronic materials where thin interfacial layers are advantageous.
“This new pathway gives us the ability to mix and match materials,” he says. “This can provide us with great
electrical properties, but the clear advantage is a vastly superior thermal interface. We believe this will prove to
be the best technology available so far for integrating wide-bandgap materials with thermally conducting
substrates.”
In future work, the researchers plan to study other ion sources and evaluate other materials that could be
integrated using the technique.
“We have the ability to choose processing conditions as well as the substrate and semiconductor material to
engineer heterogenous substrates for wide-bandgap devices,” Graham says. “That allows us to choose the
materials and integrate them to maximize electrical, thermal and mechanical properties.”
VisIC launches 100kW motor inverter reference design for 800V power-bus based on D3GaN SemiconductorToday
VisIC Technologies Ltd of Nes Ziona, Israel – a fabless developer of power conversion devices based on gallium
nitride (GaN) metal-insulator-semiconductor high-electron-mobility transistors (MISHEMTs) for the automotive,
data-center and industrial markets – has cooperated with the University of Texas at Austin to develop a 100kW
inverter reference design that can be used as a base for a 800V power-bus motor inverter in electric vehicle (EV),
industrial, PV and other applications.
Wide-bandgap (WBG) power technology is fast becoming the technology of choice to replace silicon in EV motor
drives to achieve better efficiency. It is commonly viewed that GaN technology will be used primarily in the 400V
power-bus due to its lower cost compared with other WBG technologies, and silicon carbide (SiC) is commonly
used in the high-voltage 800V power-bus for higher-power applications. VisIC says that the new 100kW inverter
reference design proves that GaN technology can also be used in the 800V power-bus applications, producing the
most cost-effective solution for both the 400V and 800V EV power-bus.
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Based on VisIC’s unique D3GaN technology, the 100kW inverter reference design can be adapted to work both
under 800V and 900V power-bus. The firm says that the GaN devices have highly thermally efficient SMD
packaging, high threshold voltage, fast switching and easy paralleling for what is claimed to be most cost-effective,
highly efficient and reliable inverter solution for EVs.
The estimated peak efficiency can reach 99.3% with 40kHz switching frequency, due to the low switching losses
of D3GaN devices. The total dimension is 26.9cm x 21.4cm x3.5cm with liquid cooling heatsink. The power density
is 50kW/liter including the liquid cooling. The total weight is about 2.5kg.
“Previously GaN has demonstrated its superior performance in achieving high power density for chargers,” says
Dr Alex Huang, director of The Semiconductor Power Electronics Center at University of Texas at Austin. “Thanks
to VisIC GaN’s superior packaging concept and low losses, we believe high power density can also be achieved in
very high-power application such as traction inverters,” he comments.
“We are very happy with the cooperation with University of Texas as they’ve shown professional power design
and innovative system solution,” says VisIC’s chief technology officer Gregory Bunin. “This breakthrough will also
enable the 800V EV power-bus to benefit from the GaN low-cost and high-efficiency technology and provide cost-
effective EV cars.”
As the IEEE Applied Power Electronics Conference and Exposition (APEC 2020) in New Orleans (15-19 March) has
been cancelled, the inverter reference design is now planned to be displayed in booth 9-137 at PCIM 2020 (Power
Conversion and Intelligent Motion) in Nuremberg, Germany (28-30 July).
Transphorm’s GaN FETs used in HZZH’s 98%-efficient power module SemiconductorToday
Transphorm Inc of Goleta, near Santa Barbara, CA, USA — which designs and manufactures JEDEC- and AEC-Q101-
qualified high-voltage gallium nitride (GaN) field-effect transistors (FETs) — says that Hangzhou Zhongheng
Electric Co Ltd (HZZH) has developed an ultra-efficient, GaN-based power module. The 3kW ZHR483KS uses
Transphorm’s GaN devices to reach 98% efficiency, making it the telecoms industry’s most efficient GaN-powered
module to date, it is reckoned. Original design manufacturers (ODMs) can swap the ZHR483KS — which offers
standardized output connector configurations — with existing same-wattage power modules to achieve a high-
reliability, higher-performing solution at a lower overall system cost.
Currently in production, the ZHR483KS is HZZH’s first GaN-based power solution and is the flagship product for a
new product line. The module’s input voltage ranges from 85V to 264V, while its output voltage ranges from 42V
to 58V. Transphorm’s TPH3205WS GaN devices are used in an interleaved bridgeless totem-pole PFC to achieve
98% efficiency at half load. The GaN devices lower the power module’s switching and driving losses, leading to
the ZHR483KS outperforming preceding modules that used superjunction silicon MOSFETs.
“We sought a power transistor that would enable us to develop a more efficient yet cost-effective solution for
our customers,” says HZZH’s chief technology officer Dr Guo. “We considered silicon carbide devices but could
not achieve the desired advantages at low voltages,” he adds. “We then vetted several GaN manufacturers’
devices, and ultimately selected Transphorm’s GaN FETs due to their reliability, device cost, and simple
implementation.”
Transphorm’s GaN FETs are two-chip normally-off devices available in standard TO-XXX packages and PQFN
modules that can be driven with common off-the-shelf drivers. The existing Gen III family offers what is claimed
to be the GaN semiconductor industry’s highest threshold voltage at 4V and highest gate robustness at ±20V.
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These features enable customers to easily design in highly reliable GaN solutions to gain the technology’s high-
power density benefits.
“Transphorm develops each generation of its GaN platform with four key factors in mind: reliability, drivability,
designability, and reproducibility,” says Kenny Yim, VP of Asia sales. “We’re proud that HZZH selected us as its
GaN partner as it affirms that those four factors are what our customers need to disrupt their markets. They result
in our GaN being designed into a wide range of multi-kilowatt power systems that are setting industry records,”
he adds. “We anticipate HZZH will continue to innovate as our collaboration continues on future products.”
Eta develops 4” semi-insulating GaN wafers SemiconductorToday
Eta Research of Lingang Free Trade Zone, Shanghai, China, which was founded in 2015 to develop free-standing
gallium nitride (GaN) wafers, has developed semi-insulating 4” GaN. The firm claims to be first to commercially
develop semi-insulating free-standing GaN wafers at this size.
Eta uses the hydride vapor phase epitaxy (HVPE) method to produce GaN wafers. To compensate the
unintentional n-type dopants, a deep-level co-doping strategy was used to achieve high resistivity. Whereas iron
doping has been the most prevalent choice for semi-insulating GaN, Eta uses carbon doping. Secondary-ion mass
spectroscopy (SIMS) data shows the carbon concentration to be in the range of 5E17–3E18/cm3. The
unintentional n-type dopants of oxygen and silicon are below 1E17/cm3. The resistivity has been measured by
Hall measurement and I-V curve, which result in room-temperature resistivity greater than 1E9Ω-cm.
The crystal and wafer quality specifications of the semi-insulating GaN wafers remains the same as the company’s
n-type GaN wafers. XRD rocking curves of both the (002) and (102) are <100 arcsec and typically 50–60 arcsec.
The dislocation density has been measured by cathodo-luminescence (CL) to be 1E6/cm2. The lattice radius of
curvature is greater than 10m. Total thickness variation (TTV) and bow can be controlled within 30μm for 100mm
wafers. The surface has an epi-ready polish with roughness <0.3nm for a 10μm x 10μm atomic force microscope
(AFM) measurement and <1.0nm for 239μm x 318μm optical interferometry measurement.
The market for semi-insulating GaN wafers is for RF HEMT devices. The RF device market is experiencing high
growth due to the implementation of 5G and other wireless communication applications. GaN is a useful
semiconductor material for high power and high frequency RF devices, but the industry is almost exclusively
producing GaN HEMTs on silicon carbide (SiC) substrates. GaN-on-GaN RF devices will have lower dislocation
density device layers and no buffer layer is required, so the firm expects that higher power and better
performance will result from RF devices made on GaN substrates.
“Due to the very limited supply, size and quality of semi-insulating GaN wafers, there has only been a limited body
of research work conducted on GaN RF devices grown homoepitaxially,” says CEO Troy Baker. “We plan to work
with customers to prove the value proposition of GaN wafers for RF devices. We are very optimistic about the
performance gains that could be made using semi-insulating GaN wafers,” he adds. “The wafers are currently
available for sale and the company is building new HVPE reactors with carbon doping capability. In addition, we
are able to provide MOCVD [metal-organic chemical vapor deposition] epi layers on GaN wafers.”
Each wafer will be shipped with a detailed wafer inspection form. Standard products are 2” and 4” wafers, and
customized sizes are available as well.
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EPC launches first product in new ePower Stage IC family SemiconductorToday
Efficient Power Conversion Corp (EPC) of El Segundo, CA, USA – which makes enhancement-mode gallium nitride
on silicon (eGaN) power field-effect transistors (FETs) for power management applications – has launched an 80V,
12.5A power stage integrated circuit designed for 48V DC-DC conversion used in high-density computing
applications and in motor drives for e-mobility.
The EPC2152 is a single-chip driver plus eGaN FET half-bridge power stage using the firm’s proprietary GaN IC
technology. Input logic interface, level shifting, bootstrap charging and gate drive buffer circuits along with eGaN
output FETs configured as a half-bridge are integrated within a monolithic chip. This results in a chip-scale LGA
form-factor device that measures only 3.9mm x 2.6mm x 0.63mm.
When operated in a 48V-to-12V buck converter at 1MHz switching frequency, the EPC2152 ePower Stage achieves
a peak efficiency above 96% with a solution that is 33% smaller in size on the printed circuit board (PCB) compared
with an equivalent multi-chip discrete implementation, it is reckoned.
The EPC2152 is the first offering in what will be a wide-range family of integrated power stages available in chip-
scale package (CSP) as well as multi-chip quad flat modules (QFM). Within a year the family will fill out with
products capable of operating at high frequency up to 3-5MHz range as well as high current from 15A to 30A per
power stage.
The family of products makes it easy for designers to take advantage of the significant performance improvements
made possible with GaN technology, says EPC. Integrated devices in a single chip are easier to design, easier to
layout, easier to assemble, save space on the PCB, and increase efficiency, the firm adds.
“Discrete power transistors are entering their final chapter. Integrated GaN-on-silicon offers higher performance
in a smaller footprint with significantly reduced engineering required,” says CEO & co-founder Alex Lidow. “This
new family of integrated power stages is the next significant stage in the evolution of GaN power conversion, from
integrating discrete devices to more complex solutions that offer in-circuit performance beyond the capabilities
of silicon solutions and enhance the ease of design for power systems engineers.”
The EPC90120 development board is a 80V maximum device voltage, 12.5A maximum output current, half-bridge
featuring the EPC2152 Integrated ePower Stage. This 2” x 2” (50.8mm x 50.8mm) board is designed for optimal
switching performance and contains all critical components for easy evaluation of the EPC2152 Integrated ePower
Stage.
The EPC2152 ePower Stage is priced at $5.03 each in 1000-unit volumes. The EPC90120 development board is
price at $123.75 each.
PiTrans project results in AlScN-based SAW resonators for smartphones SemiconductorToday
The ever-growing mobile data transfers in the wake of 5G require the use of more and higher frequency ranges,
all of which need to be accommodated within a single mobile device. The demands on radio frequency (RF)
components are hence constantly increasing. The Fraunhofer Institute for Applied Solid State Physics IAF of
Freiburg, Germany has developed novel, compact and energy-efficient high-frequency/high-bandwidth RF filters
to meet those needs (‘Enhanced electromechanical coupling in SAW resonators based on sputtered non-polar
Al0.77Sc0.23N (112-0)112-0 thin films’, Appl. Phys. Lett. 116, 101903 (2020)). During the project ‘PiTrans – AlScN
− Development of novel piezoelectric materials’ (running from 2015 to 2020) the researchers managed to grow
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aluminum scandium nitride (AlScN) with the required industrial specifications and to realize novel electroacoustic
devices for smartphones.
The amount of RF components built into a single smartphone has increased significantly over the past years and
there is no end in sight. Predicting this trend in 2015, the PiTrans project set out to develop and produce improved
RF piezo-transducers with ternary AlN-based nitrides as the piezo-active layer. Within the five years of the project,
the researchers succeeded in growing highly crystalline AlScN layers and realizing surface acoustic wave (SAW)
resonators that meet the increasing requirements of the industry.
For growth of the material, which is also promising for other power electronic applications, a modern magnetron-
sputtering infrastructure was established at Fraunhofer IAF. The project was funded by a ‘Fraunhofer Attract’
excellence stipend program and was successfully completed in January under the leadership of Dr Agnė
Žukauskaitė.
Potential and challenges of AlScN
AlScN remains the most promising new material to replace conventional aluminum nitride (AlN) in RF filter
applications inside mobile phones. By introducing scandium (Sc) into AlN, the electromechanical coupling and
piezoelectric coefficient of the material is increased, enabling a more efficient mechanical-to-electric energy
conversion. This allows the production of much more efficient RF devices. However, the instability of the
piezoelectric AlScN crystal phase has so far been a problem for industrial use of the material, as segregation of
wurtzite-type AlN and cubic ScN usually occurs during growth. “Back in 2015, we knew the potential of AlScN, but
we needed to find the right conditions to grow it in a stable and scalable process,” recalls Žukauskaitė.
Successful growth and device development
In the course of the project, the researchers at Fraunhofer IAF managed to grow highly crystalline AlScN layers
with a wide range of compositions up to a Sc content of 41%. Good homogeneity of the layers was achieved across
the entire silicon wafer up to 200mm in diameter, which meets the requirements of industrial productions.
Besides these industry-relevant results, the project team also succeeded in realizing epitaxial growth on lattice-
matched sapphire (Al2O3) substrates through a special magnetron sputter epitaxy (MSE) method of deposition,
which will be useful for future material research.
Picture: Piezoelectric properties of AlScN layers produced at IAF compared with results of other research
institutes. © Fraunhofer IAF
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In addition to the material development, the researchers produced three generations of test structures to
demonstrate the performance of the AlScN thin films. The implementation of MSE to produce AlScN/Al2O3-based
resonators yielded an electromechanical coupling increase of up to 10% at 2GHz frequency. In a collaboration
with the companies Evatec and Qualcomm, a non-polar AlScN thin film was also developed that further improves
the electromechanical coupling of SAW resonators. This technology is currently being further researched, and first
results have recently been published in a scientific paper.
AlScN for other applications
“We see AlScN as a very promising candidate for enabling future applications that capitalize on the piezoelectric
effect, such as sensor technologies and high-electron-mobility transistors [HEMTs],” says Žukauskaitė. The success
of the PiTrans project led to the acquisition of two further projects involving AlScN technology at Fraunhofer IAF.
In the project mAgnes, wide-bandgap current sensors (such as those used in e-cars) are being researched; and in
the project SALSA the research team is developing new types of switchable HEMTs. Both projects benefit from
the developed expertise in AlScN growth and AlScN-based device development as well as the necessary
infrastructure established at Fraunhofer IAF.
Transphorm and Microchip combine GaN and DSP technology SemiconductorToday
Transphorm Inc of Goleta, near Santa Barbara, CA, USA — which designs and manufactures JEDEC- and AEC-Q101-
qualified 650V gallium nitride (GaN) field-effect transistors (FETs) for high-voltage power conversion applications
— has announced a partnership to integrate the dsPIC33CK digital signal controller board of microcontroller
provider Microchip Technology Inc of Chandler, AZ, USA with its 4kW AC-to-DC bridgeless totem pole power factor
correction (PFC) evaluation board, which features the firm’s latest Gen IV GaN technology. Building on
Transphorm’s application support capabilities, Microchip’s worldwide technical support team will also be
available to developers working with the integrated Transphorm solution.
As a result, customers can access an evaluation board offering more than 99% efficiency and pre-programmed
firmware off the shelf, now backed with global support to further simplify AC-to-DC power system designs.
“The control requirements of GaN power systems using the bridgeless totem-pole power factor correction is
different than what is used to control traditional CCM boost PFCs which has long been a new challenge for some
ODMs,” says Philip Zuk, Transphorm’s VP of worldwide technical marketing and North American sales. “Two
industry leaders have partnered to reduce that knowledge gap,” he adds. “We’re giving customers access to a
disruptive GaN solution backed by a world-class global support team.”
Microchip’s dsPIC digital signal controllers (DSCs) are supported by a set of embedded design tools created to
empower developers, even those with limited expertise. These tools provide intuitive graphic user interfaces for
device initialization in Microchip’s free MPLAB X Integrated Development Environment. The software tools are
complemented by a full line of programmer, debugger and emulator accessories.
The DSC-integrated solution is used in Transphorm’s TDTTP4000W066C-KIT, featuring:
• 650V 35mΩ Gen IV GaN FET (TP65H035G4WS);
• input voltage: 85-265VAC, 47-63Hz;
• input current: 18Arms; 2kW at 115VAC, 4kW at 230VAC;
• output voltage: 387VDC ± 5VDC (programmable);
• deadtime: programmable;
• PWM frequency: 66kHz;
• power factor: >0.99.
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The evaluation board is designed around Microchip’s dsPIC33CK digital power plug in module (PIM) to control the
PFC powertrain. The kit includes a pre-programmed PIM that features:
• Microchip’s AEC-Q100-qualified dsPIC33CK256MP506 digital signal controller;
• 100MIPS for faster deterministic performance in time-critical control applications;
• Dual Flash Panels – to enable live update of code while power supply is running;
• High analog integration for reduced BOM costs and minimum system size;
• PWMs with 250ps resolution.
Firmware updates for the dsPIC33CK PIM will be available for download from Microchip’s website.
“Microchip’s dsPIC DSCs are designed to meet the demanding control needs associated with newer digital power
topologies,” says Joe Thomsen, Microchip’s vice president of MCU16. “We are proud to work alongside a
likeminded industry disruptor, Transphorm, to provide our customers this reference design including
Transphorm’s proven GaN devices. Our dsPIC33CK PIMs will offer engineers the flexibility and worldwide support
that many designers need for their high-power solutions.”
The TDTTP4000W066C-KIT is available through Digi-Key and Mouser.
Transphorm customers currently working with the prior-generation evaluation board — the TDTTP4000W066B-
KIT — can still take advantage of the dsPIC33CK PIM integration by contacting Transphorm for a conversion
daughter card.
EPC issues 11th reliability report SemiconductorToday
Efficient Power Conversion Corp (EPC) of El Segundo, CA, USA – which makes enhancement-mode gallium nitride
on silicon (eGaN) power field-effect transistors (FETs) for power management applications – has issued its Phase
Eleven Reliability Report, documenting the strategy used to achieve its field reliability record. This strategy relied
on tests forcing devices to fail under a variety of conditions to create stronger products to serve demanding
applications such as LiDAR for autonomous vehicles (AVs), LTE base stations, vehicle headlamps, and satellites.
Testing devices to the point of failure creates an understanding of the amount of margin between data-sheet
limits and products in application. More importantly, intrinsic failure mechanisms of devices are identified. The
knowledge of these intrinsic failure mechanisms is used to determine the root cause of failures. Knowledge of the
behavior of a device over time, temperature, electrical or mechanical stress can provide users with an accurate
representation of the safe operating life of a product over a more general set of operating conditions.
The report is divided into seven segments, each dealing with a different failure mechanism:
Section 1: Intrinsic failure mechanisms impacting the gate electrode of eGaN devices.
Section 2: Intrinsic mechanisms underlying dynamic RDS(on).
Section 3: Safe operating area (SOA).
Section 4: Testing devices to destruction under short-circuit conditions.
Section 5: Custom test to assess reliability over long-term LiDAR pulse stress conditions.
Section 6: Mechanical force stress testing.
Section 7: Field reliability.
“eGaN devices have been in volume production for over ten years and have demonstrated very high reliability in
both laboratory testing and high-volume customer applications,” says CEO & co-founder Dr Alex Lidow. “The
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release of EPC’s 11th reliability report represents the cumulative experience of millions of devices over a ten-year
period and five generations of technology [amounting to 123 billion device hours]. These reliability tests have
been undertaken to continue our understanding the behavior of GaN devices over a wide range of stress
conditions,” he adds.
“The results of our reliability studies show that GaN is an extremely robust technology that continues to improve
at a rapid pace,” Lidow continues. “EPC is committed to subjecting GaN devices to rigid reliability standards and
sharing the results with the power conversion industry.”
OPTOELECTRONICS
Everlight launches UVC LED series for medical treatment, water and air purification/sterilization SemiconductorToday
Taiwan-based Everlight Electronics Co Ltd has launched its ELUC3535NUB series of UVC LED products, which use
epitaxial and flip-chip technology on a sapphire substrate, for sterilization applications.
Popular markets for UV applications are curing, medical treatment, photocatalyst and counterfeit testing.
Recently, rapid growth of demand in UV markets has been seen, especially in air purification and the sterilization
of standing or running water. Everlight has invested in LED technology for many years and has developed UVA
and UVC products. There are already existing 2016, 3535 and 4545 packages for UVA (UV black light radiation,
360-410nm) including low to high wattages and several kinds of emitting angles for individual customer options.
Packaged in inorganic quartz glass with an emission wavelength of 280nm, the new ELUC3535NUB UVC LED Series
(3.5mm x 3.5mm x 1.4mm) spans three different intensity levels (2mW, 10mW and 30mW), making it suitable for
applications such as medical treatment, water or air purification and sterilization of germs, viruses or mold.
Furthermore, the ELUC3535NUB LEDs can be used for deodorizing and bactericidal treatment, when installed for
example in a modern smart toilet. A similar effect can also be achieved by using the firm’s UVA3535 (1.8W, 120℃)
LEDs in combination with titanium dioxide (TiO2).
Plessey extends Data-Vµ micro-LED product family with passive-matrix micro-display SemiconductorToday
UK-based Plessey, which develops embedded micro-LED technology for augmented-reality and mixed-reality
(AR/MR) display applications, has added passive-matrix micro-LED displays to its Data-Vµ product family.
Following the launch of its Data-Vµ segmented micro-LED display
products in 2019, Plessey has now extended the range with the
introduction of passive-matrix pixelized micro-LED displays, based
on the firm’s proprietary monolithic gallium nitride on silicon (GaN-
on-Si) technology.
These fully addressable micro-displays can provide the high-
brightness/low-power image source demanded by the advanced
compact optical projectors embedded in AR/MR information
systems. The displays can be customized to provide the specific resolution and color that customers require to
present their dynamic content specific to their applications. These applications can take advantage of the high
brightness and contrast inherent in Plessey’s micro-LED technology to produce visual images that can be viewed
under a wide range of environmental conditions and at low power consumption.
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Plessey has demonstrated its first monochrome passive-matrix micro-LED display with a resolution of 48 x 36
monochrome pixels using its native technology capability and a new pixel architecture that improves light
extraction. The roadmap for this platform includes the development of higher-resolution displays up to 128 RGB
x 128 (or 384 x 128 monochrome) by the end of 2020.
“Micro-LED displays are now the go-to technology for next-generation developments requiring power-efficient
and ultra-bright displays,” says senior micro-LED product sales manager Leon Baruah. “With the introduction of
our Data-Vµ passive-matrix displays, applications where dynamic content needs to be displayed in a small form
factor that is outdoor readable without compromising on battery life have become reality.”
The Data-Vµ passive-matrix displays are designed to be driven from a driver IC, requiring no active-matrix
backplane. The drive architecture, along with its small form factor, makes the Data-Vµ passive-matrix displays a
suitable and cost-effective solution for AR smart glasses and head-mounted displays for navigation, sport &
leisure, wearables and optical instruments where dynamic content can be displayed, reckons Plessey.
Bridgelux launches eighth generation of COB LEDs, deliver 185lm/W efficacy at 3000K 80 CRI SemiconductorToday
Bridgelux Inc of Fremont, CA, USA (a vertically integrated manufacturer of solid-state light sources for lighting
applications) has announced its eighth generation of chip-on board (COB) LED products, delivering luminous
efficacy of up to 185lm/W across its V Series, Vero Series and Vero SE Series families at nominal drive current.
This performance is benchmarked at the popular 3000K 80 CRI (color rendering index) point, with efficacies above
200lm/W possible at other color points across the industry’s broadest range bof COB products.
In addition to reclaiming the industry lead in COB efficacy, it is claimed, the products have the following additional
features:
• nominal light output optimized to align with traditional lamp standards;
• standard warranty of up to 10 years;
• efficacy improvements of up to 10% compared with previous product generations;
• up to 3x overdrive capability, delivering a 30% increase in maximum lumens per LES (light-emitting
surface) size;
• increased lumens per dollar, further reducing the cost of solid-state lighting;
• optical and mechanical consistency with previous generations, enabling a seamless upgrade path
leveraging existing ecosystem components;
• broad range of COB size and performance options from LES 8mm to LES 29mm;
• improved alignment with industry-standard drive currents, enabling the use of economical LED drivers to
further reduce costs;
• technologically equivalent with existing Bridgelux seventh-generation COB LM-80 data.
With more efficient light sources available for an entire lighting ecosystem, customers are now better equipped
to meet evolving energy standards and rebate incentive programs without compromises in quality of light, says
the firm.
In addition launching new Gen 8 products, Bridgelux continues to expand its portfolio of human-centric lighting
solutions. New products under development include the new Vesta Thrive COB (said to be the first tunable white
natural-spectrum light source); expansions in the Vesta Flex dual-channel driver and controls family to now
include Casambi and Silvair control modules; and the new Vesta SE (the first dim-to-warm and tunable white COBs
with integrated holders to simplify and standardize mechanical, optical, and electrical connections).
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“The lighting market continues to evolve, with some suppliers reducing their focus on lighting,” says CEO Tim
Lester. “Bridgelux is a technology partner for our customers that remains committed to lighting. Our expanded
portfolio further enhances our ability to support our customers in navigating the market transition toward human-
centric lighting, the right light, in the right place, at the right time,” he adds.
Bridgelux Gen 8 products are available now for sampling and ordering, with production shipments commencing
in April.
Aluminium gallium nitride on silicon carbide for ultraviolet diodes SemiconductorToday
University of California Santa Barbara (UCSB) in the USA has been using silicon carbide (SiC) substrates to grow
aluminium gallium nitride (AlGaN) structures aimed at 278nm deep ultraviolet (UV-C, 100-280nm wavelength)
light-emitting diodes (LEDs) [Burhan K. SaifAddin et al, ACS Photonics, published online 27 January 2020]. The
researchers used surface roughening of thin-film flip-chip devices to boost light-extraction efficiency (LEE) by a
factor of 3 over smooth-faced LEDs.
“The ability to grow AlGaN LEDs on SiC with low TDD [threading dislocation density] opens new ways to fabricate
high-brightness, high-power UV LEDs with high LEE,” the team comments. The 260-280nm wavelength range
enables efficient disinfection by breaking up DNA and RNA molecules of pathogens. The researchers are keen to
combat antibiotic-resistant bacteria such as Clostridium difficile (C. diff.), which is indeed difficult to kill using
chemical methods. By contrast, UV disinfection reduced C. diff. levels by 30%, according to University of North
Carolina researchers in 2010.
Fabricating efficient UV-C LEDs has been challenging due to a number of factors. Material quality can be improved
by using SiC rather than sapphire, due to a closer lattice and thermal expansion match. However, UV-C light is
strongly absorbed in SiC, unlike sapphire, due to its narrower bandgap. Indeed, sapphire is often used for UV-C
LEDs for this reason.
Low-pressure metal-organic chemical vapor deposition was carried out on 2-inch 6H SiC on the silicon face of a c-
plane (0001) crystal orientation. The AlGaN layers began with a 3.2μm AlN buffer grown in steps at 1200°C and
1000°C (Figure 1). The Al content was reduced with an 1100nm Al0.80Ga0.20N interlayer, and then 550nm n-
Al0.60Ga0.40N grown at 1175°C. The multi-quantum well (MQW) region consisted of four pairs of 2.7nm/9nm
Al0.39Ga0.61N/Al0.60Ga0.40N wells/barriers. The structure also included an AlGaN electron-blocking layer (EBL).
Figure 1: (a) Schematic of the UV−C LED structure. (b) APT 3D reconstruction of active layer showing EBL layer
and four MQWs; (c) 1D concentration profile extracted from APT reconstruction along [0001] direction.
Sampling volume dimension 20nmx20nmx50nm from dotted rectangle in (a).
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The AlN buffer was crack-free due to a “novel substrate pretreatment” (annealing in ammonia/hydrogen at
1250°C) and a multi-step 3x(3D/2D) growth process reported by UCSB in 2018. The AlN buffer also achieved a
reduced threading dislocation density of ~109/cm2.
The researchers used atomic probe tomography (APT) to study the material, in what the team claims was its first use on UV-LED structures.
The material was then fabricated into thin-film flip-chip devices in TO-39 headers. The SiC growth substrate was
removed using a sulfur hexafluoride plasma etch. The team used potassium hydroxide solution to roughen the
flipped AlN light-emission surface, increasing light output by reducing reflection back into the LED material. Also,
the p-GaN thickness was reduced as much as possible, since the material is absorbing of UV-C radiation. These
two measures, along with increasing the reflectivity of the p-contact, are estimated to increase the light-extraction
efficiency by a factor of 3 over smooth-surface devices.
Figure 2: (a) EQE as function of current density for different 278nm UV LEDs processed from same epitaxial
sample. (b) Unflipped UV LED on SiC schematic with p-side up. (c,d) Thin-film flip-chip (TFFC) UV LED (area
~0.1mm2), (c) before and (d) after surface roughening.
At 95mA injection current, the roughened UV-C LED had 7.6mW (82mW/mm2) light output power and 1.8%
external quantum efficiency. The slope efficiency was 89μW/mA. The turn-on voltage was 4.3V. The LEE was
estimated at 33%, the highest reported for AlGaN LEDs, the team claims.
Indium tin oxide as cladding for more efficient green laser diodes SemiconductorToday
Researchers based in China have used indium tin oxide (ITO) as an upper cladding component in green laser diodes
(LDs) rather than the more usual aluminium gallium nitride (AlGaN), reducing thresholds to as low as 1.6kA/cm2
[Lei Hu et al, Photonics Research, vol8, p279, 2020]. A conventional AlGaN-clad laser diode with the same
structure otherwise achieved a threshold of 5kA/cm2.
The team from Suzhou Institute of Nano-Tech and Nano-Bionics and University of Science and Technology of China
hope to use their work to fill the ‘green gap’ for efficient laser diodes between the near-infrared to red range, and
the blue to near-ultraviolet. The central range of the gap is 500-550nm wavelength range. At the same time, these
wavelengths are in the center of the visible spectrum, 380-794nm, and hence are key in red-green-blue display
applications.
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The low refractive index of ITO (about 2) should enable better confinement of the light generated in the laser
cavity, compared with higher-index AlGaN. Also, ITO deposition is a relatively low-temperature process (around
300°C), which reduces thermal damage to the indium gallium nitride (InGaN) multiple quantum wells (MQWs)
that generate the green light.
The researchers designed three laser diode structures with varying p-Al0.08Ga0.92N cladding thickness, which
were grown by metal-organic chemical vapor deposition (MOCVD) on c-plane GaN substrates (Figure 1). The
cladding thicknesses were 150nm, 300nm and 500nm. The cladding was actually deposited as a 2.5nm/2.5nm p-
AlGaN/p-GaN superlattice (SL) with 8% average Al content, with the aim of reducing series resistance.
Figure 1: Hybrid laser diode with ITO cladding layer or conventional laser diode with Pd/Pt/Au electrode.
The n-side cladding was designed to consist of Al0.07Ga0.93N. The InGaN waveguide layers had 4% indium
content on the n-side and were unintentionally doped on the p-side. The electron-blocking layer (EBL) contained
15% Al.
The material was processed into ridge-waveguide laser diodes with inductively coupled plasma (ICP) etch, 200nm
silicon dioxide ICP CVD, and 200nm ITO evaporation at 300°C. The p-electrode metal was titanium/gold, while the
n-contact was through titanium/aluminium/titanium/gold deposited on the back of the wafer. A conventional
laser diode without ITO was fabricated on a 500nm p-AlGaN cladding sample, where the p-electrode consisted of
palladium/platinum/gold (Pd/Pt/Au). The laser diode cavities were formed by cleaving the fabricated devices and
coating the facets with dielectric layers.
The devices were subjected to 0.4μs current pulses at a rate of 10kHz with a view to eliminating self-heating
effects. The threshold of the conventional laser diode without ITO came in at 5kA/cm2 current density. The slope
efficiency of the light output power was 0.16W/A.
The ITO device with the thinnest AlGaN cladding of 150nm reduced the threshold to 2.5kA/cm2. The sloped
efficiency increased to 0.20W/A. The intermediate cladding laser diodes also showed reduced thresholds to a
lesser extent. The 300nm-clad laser diode also showed increased slope efficiency of 0.19W/A.
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The light output wavelengths were just above 500nm: 506nm, 512nm and 508nm, for the ITO laser diodes with
500nm, 300nm and 150nm p-AlGaN cladding, respectively. The conventional device wavelength was 505nm. The
researchers attribute the wavelength variation to different MOCVD growth temperatures. These values are
toward the blue end of the 495nm-570nm green range.
Studying the subthreshold light emission suggested increased non-radiative recombination in the samples with
thicker p-AlGaN cladding. The researchers comment; “We believe that the increasing non-radiative recombination
centers result from the increasing thermal budget due to increasing growth time of the p-AlGaN cladding layer.”
AlGaN is generally grown at raised temperature that tends to degrade the InGaN in the light-emitting MQWs and
the waveguide layers. The team points particularly to the extended growth time at high temperature as damaging
to the QW structure.
Simulations suggest that the lower light absorption of the ITO cladding material is not a particularly significant
factor in reducing the threshold, except in so far as it enables a thinner p-AlGaN cladding layer.
The team also carried out simulations that suggested that reducing the Al content in the p-AlGaN cladding to 3.5%
could improve hole concentration and injection efficiency, further reducing thresholds. A laser diode was
fabricated with 300nm 3.5% Al-content p-cladding, and the threshold was reduced to 1.6kA/cm2. This compared
with 2.9kA/cm2 for the 300nm 8%-Al cladding laser diodes. Also, the slope efficiency increased slightly from
0.19W/A to 0.20W/A.
Figure 2: (a) Light output power versus current density curves for ITO laser diodes with 300nm p-AlGaN
cladding layers with 8% and 3.5% Al-content. (b) Current density versus voltage for 3 different laser diodes.
The 3.5%-Al cladding laser diode also showed reduced operating voltage of 0.6V lower than the conventional laser
diode with 4kA/cm2 injection current density. This indicated reduced series resistance from the thinner AlGaN.
The researchers used the improved performance to construct a laser diode with 400mW light output power. The
high performance was enabled by a 15μm-wide, 1200μm-long ridge with the front facet reflectivity reduced to
40%. The threshold current density was 3.9kA/cm2. The slope efficiency was 0.44W/A, and the current injection
at 400mW output was 9kA/cm2.
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KONKA enters micro-LED pilot production with Aixtron AIX G5+ C and AIX 2800G4-TM MOCVD systems SemiconductorToday
Deposition equipment maker Aixtron SE of Herzogenrath, near Aachen, Germany says that China-based KONKA
Group Co Ltd has ordered multiple AIX G5+ C and AIX 2800G4-TM metal-organic chemical vapor deposition
(MOCVD) systems to build its own volume production of gallium nitride (GaN)-based and arsenide-phosphide
(AsP)-based mini- and micro-LEDs. KONKA, which recently announced its plans to enter the North American
consumer electronics market in 2020, established its micro-LED initiative as a joint venture with Chongqing
Liangshan Industrial Investment Co. Most recently, the Chinese electronics manufacturer has launched its Smart
Wall micro-LED TV.
Micro-LED technology is on the verge of superseding existing display technologies for next-generation consumer
products. Since displays made of micro-LEDs consist of micron-sized LED arrays forming individual sub-pixel
elements, they offer the lowest power consumption while simultaneously exhibiting superior pixel density,
contrast ratio and brightness. Compared with existing LCD and OLED technologies, micro-LEDs open new
opportunities for the design of consumer mobile products as well as premium TV displays.
“Aixtron’s market-leading fully automated MOCVD tools AIX G5+ C and AIX 2800G4-TM perfectly meet our
tightened wavelength uniformity requirements for micro-LED manufacturing,” comments Dr Allen Tsai, general
manager & CEO at Chongqing KONKA Optoelectronics Technology Research Institute Co Ltd. “The advanced
Planetary technology stands out due to excellent wavelength uniformity, high yield and efficient high-volume
manufacturing at lowest cost per wafer. Besides our commercial market entry for micro-LED applications,
Chongqing KONKA and Micro Crystal Transfer Group will develop new technologies and applications based on
GaN materials,” he adds.
“Following the recent qualification of our AIX G5+ C tool for micro-LED production means another step forward
in the commercialization of our system technology for micro-LED manufacturing,” says Aixtron president Dr Bernd
Schulte. “We are looking forward to the further cooperation with KONKA,” he adds. “Aixtron will continue to
support the joint effort between Chongqing KONKA and Micro Crystal Transfer Group for their development of
new technologies and applications based on GaN materials.”
Plessey to Work with Facebook on Micro LED Display Technology for AR/VR Applications LEDInside
Plessey, the UK-based Micro LED display developer focusing on AR/MR display
application, announced that it is collaborating with Facebook, providing its
technology to support Facebook building prototype and develop new
technologies for potential use in the AR/VR space. Plessey has been focusing on
Micro LED-based AR display technology and it was rumored that Apple had plan
to acquire Plessey with its interest in AR smart glasses. However, now Plessey
teams up with Facebook and will license its technology to the social media giant
for creating innovative applications based on AR/VR/MR technologies.
Dr Keith Strickland, co-CEO and CTO of Plessey, said, “We are delighted to announce this new commercial
agreement with Facebook. Plessey has been at the forefront of Micro LED display development and this
agreement recognizes the significant advances in our capabilities that we have made in recent years and we very
much look forward to working with Facebook to help bring their vision to life.”
Facebook has been interested in AR technology for long. The company acquired VR headset maker Oculus VR in
2014 and purchased computer vision startup Scape Technologies to set up AR capability. It is said that Facebook
aims to release AR wearable product between 2023 and 2025.
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Bringing Micro LEDs to the Dimensions of the Silicon Industry with ALLOS’ 200 mm and 300 mm GaN-on-Si Epiwafers LEDInside
To address the wafer size mismatch and to tackle the yield challenge in Micro LED production, ALLOS has applied
its unique strain-engineering to show outstanding uniformity and reproducibility for 200 mm GaN-on-Si epiwafers.
Additionally the company reports about its success on the roadmap to 300 mm.
Yield plays a crucial role to make Micro LED displays successful. It has a direct impact on the manufacturing
complexity and cost. To enable the needed cost reductions, large wafer diameters are essential. This is particularly
true for Micro LED applications in which wafers from CMOS-lines are integrated with LED epiwafers, e.g. by
bonding. Here the matching wafer diameter even has an enabling role comparing to the smaller diameters
available from GaN-on-sapphire. The ALLOS team has already used its unique strain-engineering technology to
push the wavelength uniformity further and further, showing 200 mm GaN-on-Si LED epiwafers on Veeco’s Propel
with STDEV of as little as 0.6 nm in February 2019.
With its latest results, ALLOS can now show excellent reproducibility for this technology with a wavelength
uniformity of consistently below 1 nm STDEV for 200 mm. “At the same time we achieve all other production
requirements like bow of < 40 µm and SEMI-standard thickness of 725 µm. These parameters are very important
when bonding CMOS wafers to LED epiwafers,” is added by Alexander Loesing, one of the co-founders of ALLOS,
who continues, “These results are particularly impressive because our technical team is really pushing the
boundaries of GaN technology only with very limited time and resources available for this work.”
Figure 1: (Left) Reproducibility of wavelength uniformity on 200-mm GaN-on-Si epiwafers for Micro LED
application, (Right) 300-mm epiwafers for Micro LED.
Commenting on the achievement, Dr. Atsushi Nishikawa, the CTO of ALLOS pointed out: “Already our predecessor
company AZZURRO had been first in the market with commercial 150 mm and later 200 mm GaN-on-Si epiwafer
products. Making 300 mm was the next natural challenge. When the first reactor designed for such large wafers,
the Veeco ImPulse, became available we proceeded to tackle the challenge.”
ALLOS confirmed that its technologies scale successfully to 300 mm on this new reactor. In particular, ALLOS’
unique technologies for strain-engineering and superior crystal quality work on 300 mm as expected.
“Being among the first to push III/nitride technology to 300 mm is very exciting for us. It proves how robust our
strain-engineering technologies are and we are looking forward to establish this technology for Micro LED
customers” is added by Nishikawa, who is also one of the co-founders of ALLOS.
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Scaling up from 100 mm diameter – the typical wafer dimension for GaN-on-sapphire – has an even bigger
business impact for Micro LEDs than in other parts of the LED industry. Beside the well-known effects of lower
cost per area when using larger diameters, the jump to 200 mm and 300 mm GaN-on-Si for Micro LED production,
enables the usage of CMOS facilities that have a much lower cost and additionally higher production accuracy
than conventional LED lines. A further effect arises because most Micro LED manufacturing concepts either
include mass transfer technologies that are using large area transfer-stamps or monolithically integrated displays:
Figure 2: Scaling wafer dimensions: Additional cost benefit by better area utilization due to matching
rectangular shape of display or transfer stamp to circular shape of wafer.
Summarizing the 300 mm advantages, Loesing concludes, “For Micro LED displays the better area utilization of
larger wafer sizes can easily account for 40 % cost advantage from 300 mm epiwafers for this step alone. Together
with the other cost advantages and the production benefits offered by CMOS lines this results in leading industry
players evaluating Micro LED displays based on 300 mm GaN-on-Si.”
Seoul Viosys and UCSB Find the Characteristics of Green and Blue InGaN Micro LEDs down to 1 μm LEDInside
A team with researchers at Seoul Viosys and University of California Santa Barbara (UCSB) published a study
focuses on features of Micro LEDs as their size goes smaller at 1 to 10 μm.
External quantum efficiency (EQE) of Micro LEDs usually reduces when Micro LEDs get smaller, which becomes an
issue for Micro LED technology builders. To further understand the relation between EQE and chip size, a research
team of Seoul Viosys and UCSB focus on Micro LEDs down to 1 μm to compare the EQE trend for blue and green
InGaN Micro LEDs.
The team published their results on Applied Phyics Letter in February 2020, titled “Comparison of size-dependent
characteristics of blue and green InGaN microLEDs down to 1 μm in diameter.”
The team addressed that they only utilized standard semiconductor processing techniques to develop the down
to 1 μm InGaN Micro LEDs for the study. They compared blue and green InGaN Micro LEDs and found that green
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LEDs were more efficient than blue LEDs when they turn smaller than 10μm, meaning that green LEDs were less
affected by the size in EQEs.
With the results, researchers also proposed that red InGaN Micro LED may be an approach when manufacturing
smaller size full color Micro LED devices.
Based on the study, the team hopes InGaN Micro LEDs with increased brightness and reliability in smaller size can
lead to advanced display applications for smartphones, AR glasses and 4K TVs, according to the report covered by
Semiconductor Today.
The team also claimed that it is the first study of Micro-LED EQE trends for mesa dimensions below 5μm, despite
commercial demands.
China Companies to Order Equipment for Micro LED Production LEDInside
The spreading coronavirus epidemic did not stop industry players from
progressing advanced technology development. Chinese companies
recently reported new orders and subsidies for equipment to push Micro
LED technology development.
The biggest LED wafer and chip producer Sanan Optoelectronic reported
that its subsidiary Sanan Semiconductor has received subsidies from the
Quanzhou government in March for purchasing equipment. The amount
of the subsidies was RMB 143 million (US$ 20.16 million). Sanan
Semiconductor has formed partnership with TCL to establish a joint
laboratory for Micro LED development in the beginning of March.
The other China company, the Konka Group, has also ordered several equipment from Germany’s AIXTRON for
Micro LED pilot production. According to AIXTRON, Konka will use the tools to set up production line of GaN-based
and AsP-based Mini- and Micro LEDs.
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Micro LED + LiDAR, the Key Technologies for Apple to Push AR Products and Applications? LEDInside
AR applications and devices are one of the major focuses of Apple at the moment. The company has shown its
interests in AR technology development and considered that AR wearable glasses may replace smartphones in
the near future. Rumors about Apple to reveal its AR smart glasses soon have been going on as well.
Apple launched the new iPad Pro adopting LiDAR Scanner and releases the latest ARKit 3.5 which enables app
developers to take advantage of the new LiDAR Scanner to capture 3D features of the surrounding environment.
ARKit 3.5 also includes instant AR objects placement, improved motion capture and people occlusion for more
diverse applications.
The LiDAR Scanner adopted iPad Pro is regarded as the first product for Apple to march towards the AR field. It is
also expected that the new iPhone scheduled in September 2020 will equipped with full 3D sensing solution to
further expand Apple’s AR equipment.
Meanwhile, AR smart glasses are considered the target product which Apple has continued the development.
Apple is reportedly progressing its AR smart glasses with optical sensor developers. In addition, the report of
MacRumors noted that the leaked code from an internal version of iOS 14 indicated Apple’s testing on its new
AR/VR headsets.
Based on the recently unveiled patents of Apple, the company is likely
to build their AR smart glasses based on Micro LED technology. Micro
LED with high brightness, high resolution and low power consumption
may enable flexible design and light weight wearable products.
According to Bloomberg’s report in October 21, 2019, Apple might introduce AR headset that pairs with the new
5G iPhone or other portable devices. Since Apple introduced the new iPad Pro with LiDAR and technology is also
anticipated to come with the new iPhone, these devices may be supporting Apple’s smart glasses in the further
to intensify advanced AR applications.
Ecosense Acquires Assets from Soraa LEDInside
U.S.-based LED technology company Ecosense announced that it has acquired assets from Soraa, co-founded by
Nobel Laureate Shuji Nakamura focusing on full-spectrum LED lamps.
Under the terms of the deal, Ecosense acquires the Soraa name, intellectual property and lamps, including the
company's signature VIVID, BRILLIANT™ HL and HEALTHY™ product lines. This move is the first foray into the
professional lamp category for Ecosense.
"This acquisition accelerates our strategy into the next wave of lighting," explained Mark
Reynoso, CEO of Ecosense. "Soraa has an unparalleled reputation for beam and spectral
quality. Their intellectual property and technology portfolio—including ZEROBLUE™, full
spectrum, and healthy lighting—highly complements our own intellectual property and
related technologies. We will prioritize enhancing and accelerating their antibacterial
technology to market."
Nakamura commented, "Soraa is a pioneer in full spectrum and circadian lighting.
Combining with Ecosense, we significantly expand our leadership and intellectual
property rights in these and related fields. We are excited about our next phase of growth together."
To maintain consistency and quality of service, Soraa will continue to operate as its own distinct brand.
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VerLASE Introduces Novel Mass Transfer Technique for Micro LED Displays LEDInside
Micro LED technology builder VerLASE introduced a novel mass transfer technique for Micro LED display
production based on its “Large Area Assembly Platform” (LAAP), which the company revealed in June, 2019. With
similar concept, the company transfer the technology into a simpler, semiconductor-fab compatible solution
based on Photo-Mechanical Actuation (PMA).
According to VerLASE, the solution uses a novel formulation comprising of fab compatible chemistries and transfer
stamp architecture in a unique way to deterministically pick-up a large number of microdies, translate them to
the desired drop-off location on a substrate and then dispense them with very high accuracy and speed. This
microdie dispensing can be done globally or locally by individually addressing microdies, as programmed.
Simplistically, the Transfer Stamp follows a 3-ply construction: a thin transparent substrate, a patterned PMA
formulation, and a stiffer material dubbed “Barrier Ribs” surrounding the patterned PMA formulation as
illustrated below:
The substantially transparent and flexible Transfer stamp allows for accurate alignment with the donor LED source
wafer and the microdies held on it, as well as the receiving target interposer or display backplane.
VerLASE noted that the solution can work with different ways to pick up the microdies while it used a proprietary
method. And the dies dispensing is accomplished by either flood or selective exposure of the PMA material in the
Transfer Stamp to light. The novel photo-reactive chemistry undergoes light induced physical contraction under
illumination by a light source.
As the PMA material contracts under this light illumination pulling the attached microdies with it, the “Barrier
Ribs” act as a hard, physical stop forcing the bonding interface holding the microdies to the PMA material to give
way, thus releasing the microdies. The bonding strength of the microdie / PMA material interface can be varied
as necessary such that it is low enough for detaching the microdie without the microdie structurally failing.
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Existing exposure tools coupled with binary chrome photo masks and scanning low power laser systems allow for
a highly multiplexed, addressable mass release of microdies or local dispensing of microdies as desired.
PMA material formulations being investigated at this time are Photo-Actuated, primarily single use chemistries,
but other options could also be applied with future development.
A full wafer transfer stamp as illustrated above, scalable to 6 inch or larger, can be constructed with existing
tooling with very high precision at low cost. Cost of scaling, replicating and having a variety of SKUs is incremental,
allowing for a wide variety of display patterns and pitches to be serviced.
Furthermore, the Transfer stamp, once constructed, can be mated and used with minimally modifying existing,
semiconductor equipment. The full wafer transfer stamp should allow for the mass transfer of microdies on the
order of less than 5μm.
As a full wafer transfer stamp and at microdie sizes of less than 5 μm, transfer rates in excess of over 10 million
microdies per unit transfer event should be routinely possible, enabling a wide variety of display resolutions and
display sizes to be economically manufactured.
VerLASE expects to produce displays with above 400 ppi for smartphone sizes with the method which achieves
high thruputs and with provisions for in-line metrology and in-process repair.
Global LED Companies Launch UVC LED Products to Meet Growing Demands LEDInside
The coronavirus has now declared a worldwide pandemic by the World Health
Organization and the infected numbers continues to rise all over the world. Products
used for preventing infection thus became bestsellers everywhere. Featuring
disinfecting function, UVC LED embedded products are also drawing attentions in
the market. LED companies who have been progressing UV LED technologies now
leverage their strengths to launch UV LED products for meeting the surging
demands for disinfection applications.
Lextar, the vertical integrated LED company based in Taiwan, debuted new UV LED packages in January 2020.
With proprietary optical design, the products can concentrate power and optimize disinfection efficiency. UVC
LED products with 15mW and below are used in disinfecting water bottle while the PU88 series can be applied in
daily necessities disinfection such as cutleries, tooth brushes or pacifiers.
EVERLIGHT also launched its UVC LED series products in 1Q20. Power range of its 280nm UVC packages covers
2mW/10mW/30mW and can effectively diminish E.coli and Staphylococcus aureus. The UVC LEDs can be
embedded in portable products such as disinfection box or flash light for killing microorganisms on phones, glasses
and other. UVC LEDs integrated with UVA products in smart toilet also enable both disinfection and deodorization.
Another Taiwan-based UV LED expert, High Power Lighting (HPL) continues its
collaboration with clients and will introduce UVC LED equipped air conditioners
this year. In addition, the company developed a flowing water disinfection module
under that brand Bioraytron, the joint brand of HPL and Epileds. With its unique
optical design, the water disinfection module achieves a disinfection rate of
99.99% based on a single 20mW UVC LED chip in 3L/min.
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Lite-On’s UV-C LEDs have a peak wavelength at 275nm with SGS certificated dust and water proof at IP 58 and
99.99% (Log4) disinfection rate to meet the requirements of different sterilization products. The UV LEDs can
effectively prevent the growth of E.coli and staphylococcus aureus while diminish different types of bacteria and
viruses effectively under different radiation and time.
The company has worked on UVC LED technology for many years with a completed product
lines with proprietary packaging technique, providing excellent brightness and life stability.
Lite-On’s UVC LEDs are adopted by leading electronics brands in Europe, the U.S., Japan
and Korea for household sterilization. In response to the current needs of epidemic
prevention, portable sterilization products developed by small and medium manufacturers
such as drinking water sterilization, portable sterilization, car air purifier, has boosted sales
volume three time higher compared to the sales last year. Demand is expected to continue
growing as people all over the world are combating the coronavirus epidemic.
The UV LED subsidiary of Seoul Semiconductor, Seoul Viosy,
recently announced that its inquiries for UV LED products
has increased more than five times compared to previous
month. Lifetime of its Violeds UV LED products was
improved to more than 50,000 hours; and the technology
has been adopted by NASA for disinfection on the
International Space Station. Also some Chinese automotive
companies are evaluating the possibility of using Seoul’s
violeds UV LED technology in sterilization systems for vehicle
interiors.
Violumas, the UV division of Flip Chip Optounder the Cofan Group, focuses on high power UVC LED technology
and aims to double the power of its UVC LED products this year. The company has worked with its clients on a
wide range of disinfection applications covering water disinfection, surface disinfection, food applications and
more.
Japan’s Stanley also targets high power UVC LEDs. Its exclusive AIN UV LED technology enables the company to
build a 265nm UVC LED which was claimed to have better inactivation effects in killing bacteria and viruses.
Stanley has achieved 50mW with its UVC LED products and will be able to achieve 200mW soon. The company
aims to collaborate with Tier-1 automotive OEM in Japan, Asia-Pacific and Europe and has launched 2L/min,
10L/min, and 100L/min UVC LED products for water disinfection.
LEDinside will launch the latest report, "TrendForce 2020 Deep UV LED Application Market and Branding
Strategies" providing cross analyses on applications and sales channels to discuss major trend of deep UV
applications and targed market in 2020 soon. The report will cover application fields including home appliances,
commercial space, automotive field, water purifier, and other potential markets to discuss branding strategies in
those channels.
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Samsung Includes Epistar for Micro LED Chip Supply LEDInside
Samsung has added Epistar, the Taiwan based LED chip provider, as a supplier of Micro LED chips to diversity its
supply chain, reported Korean media, TheElec.
The report said that Samsung included Epistar to its Micro LED
supply chain to secure its promise for launching Micro LED TVs in
the second half of 2020. Samsung revealed its Micro LED TV lineup
earlier this year at CES 2020. The company aims to debut four sizes
Micro LED TVs covering 75 inches, 88 inches 93 inches and 110
inches to the market in Europe, North America and the Middle East
this year.
To achieve the goal, Samsung has to ensure sufficient supply of Micro LED chips. The Korean company currently
work with Taiwan’s PlayNitride and China’s Sanan for chip. Epistar has announced the plan to expand production
capacity for miniaturized LED chips to meet the increasing demands from its clients. The news of Samsung adding
the chip maker into its supply chain also matches Epistar’s expansion in production capacity.
Epistar is reportedly supplying Mini LED chips for Apple’s new products including iPad Pro and MacBook Pro for
2020 and 2021 which are said to be adopting Mini LED technology.
BluGlass reports progress in Laser Diode business and micro-LED and LED programs, and cost saving for 2020 SemiconductorToday
BluGlass Ltd of Silverwater, Australia (which was spun off from the III-nitride department of Macquarie University
in 2005) has presented an operational update to shareholders, detailing recent developments in its direct-to-
market Laser Diode business unit (launched last October), recent progress on its micro-LED and LED programs,
and cost-saving measures for the remainder of the 2020 financial year.
BluGlass is developing and commercializing RPCVD as a low-temperature, ammonia-free alternative to traditional
manufacturing technologies. RPCVD is said to offer electronics manufacturers performance advantages including
higher-performing, lower-cost devices. The firm recently demonstrated patented ‘active as grown’ RPCVD tunnel
junctions for LED wafers, which provide a solution for the challenge of efficiency droop by combining multiple
LEDs in a single vertical LED stack (with the potential to generate greater light output for less power).
Technology update: Laser Diode development progress
BluGlass has engaged with prospective laser diode customers to develop bespoke designs for a range of end-
product applications from industrial cutting and welding to biomedical devices.
Current customer engagement programs include verified optical designs of standard laser diodes that the firm
has successfully modelled and simulated. The technology team has also delivered promising epitaxial results with
the implementation of several design improvements. BluGlass expects to deliver laser diode products to
customers for testing by the end of this calendar year.
The firm has also processed new remote-plasma chemical vapor deposition (RPCVD) tunnel-junction laser diode
test structures demonstrating good initial performance. These novel tunnel-junction laser diode structures
successfully replace the heavily lossy and resistive p-AlGaN cladding layers needed in standard laser diodes, says
BluGlass. By adding an RPCVD-grown tunnel junction, the p-type layers can be replaced by significantly less lossy
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and resistive n-type device layers, paving the way for significant performance improvements with reduced optical
loss in laser diodes.
The initial device structures confirm the viability of these RPCVD-grown n-type layers for tunnel junction laser
diode applications. Further work is ongoing on development of the laser diode tunnel-junction layers’ initial
performance.
RPCVD tunnel junctions offer performance and cost advantages for the manufacture of high-brightness GaN laser
diodes, says BluGlass, including higher-performing devices with reduced optical loss as well as productivity and
cost improvements.
BluGlass has published a technical explainer document on the performance advantages of RPCVD for laser diodes
that can be download from www.bluglass.com.au/laser-diodes.
Laser diode test facilities
The BluGlass US-based Test Facility is on track for completion and full operation in June. It will provide the firm
with the flexibility to test laser diode chip, bar and packaged devices across a variety of product wavelengths. The
capabilities enable initial R&D testing during product development but will ultimately enable fully automated
testing of commercial volumes of the laser diode products.
The laser diode product development roadmap remains on-track to deliver repeat customer revenues anticipated
to commence in early 2021.
Supply-chain qualification
BluGlass says that it continues to develop and strengthen its global supply chain in the current operating
environment by working with and qualifying multiple partners on the fabrication of laser diode devices. Due to
the current issues surrounding COVID-19 quarantine, several of its US fabrication suppliers have been temporarily
closed or are operating on reduced capacity, however a primary supplier remains fully operational. To date, there
has been only minor disruption to BluGlass’ critical product design activities. In preparation for potential impacts,
discussions are underway with several backup suppliers.
Micro-LED update
BluGlass continues to advance its R&D on micro-LEDs, in particular its long-wavelength LEDs for red-green-blue
(RGB) applications. The firm has recently demonstrated progress towards developing RPCVD-grown red LEDs.
Micro-LED foundry customer orders for the quarter have been impacted by COVID 19, with several customers
currently on hold and unable to process and test devices. Despite the facility disruption, communication and
preparation for the next design iterations and orders continue.
Cascade LED update
BluGlass has continued to demonstrate iterative improvements in the light output of cascade LED test structures
using RPCVD tunnel junctions. The firm is waiting to process cascade LED chips to benchmark these latest
developments, currently being fabricated overseas.
A new video showing sequential green and blue light emission from an RPCVD-grown tunnel-junction cascade LED
is available to watch at www.bluglass.com.au/video.
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One of the key limitations for the commercial adoption of the firm’s RPCVD tunnel-junction technology for
traditional LED applications is the challenge of the added voltage from the tunnel-junction layers. BluGlass
remains confident that further reduction of tunnel-junction voltage for traditional LEDs is achievable with
additional development iterations.
However, this challenge is not as critical for cascade LED applications (two LEDs grown in a single stacked chip).
The additional small increase in voltage is potentially negated by the performance improvements offered by
cascade LEDs to address efficiency droop and drive smaller-form-factor, higher-efficiency LEDs.
BluGlass says it has made good progress in optimizing the key mechanisms required to drive individual LED
performance (the top and bottom LEDs) in cascade structures.
Read more
OTHER
Odyssey names former MACOM executive Alex Behfar as executive chairman & acting CEO SemiconductorToday
Odyssey Semiconductor Inc, which is developing high-voltage power switching components and systems based
on proprietary gallium nitride (GaN) processing technology, has appointed Alex Behfar (a member of the board of
directors since June 2019) as executive chairman & acting CEO.
The appointment comes as Odyssey’s GaN foundry in Ithaca, NY, USA is in the final stage of being transformed
into a facility for GaN transistor fabrication and development. The foundry is nearly fully operational.
Former chairman & CEO Dr Richard Brown has been named chief technical officer, and will oversee efforts to
accelerate the development of a prototype of the firm’s technology to produce GaN-based high-voltage switching
power conversion devices and systems that may quickly supplant silicon carbide (SiC) as the dominant premium
power-switching device material, it is believed.
Behfar has over 30 years of experience in the semiconductor industry. He currently serves as a mentor for Cornell
University’s Praxis Center for Venture Development and is president of technical and business consulting firm
Ulexus Consulting. From January 2016 to January 2019, Behfar served as MACOM’s senior VP & chief scientist,
Photonics. From December 2014 to January 2016, he was MACOM’s senior VP & general manager, Photonic
Solutions. In 2000, Behfar founded BinOptics Corp, a supplier of indium phosphide (InP) lasers for data centers,
mobile backhaul, silicon photonics and access networks, and served as its chairman & CEO from inception through
to its $230m acquisition by MACOM in December 2014. Prior to BinOptics, he worked at IBM for more than 10
years in various capacities, including Laser Enterprise, where he designed the first commercially viable high-power
830nm and 980nm gallium arsenide (GaAs)-based lasers. Laser Enterprise was later sold by IBM to Uniphase and
is now part of II-VI Inc. He also served as IBM’s worldwide cross-functional Intellectual Assets Program Manager
for optoelectronics and telecommunications.
Behfar has been awarded over 50 US patents. He holds an M.S. and a Ph.D. in Electrical Engineering from Cornell
University and a B.Sc. in Electrical and Electronic Engineering from King's College, University of London.
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Brown has 18 years of experience in the design and fabrication of semiconductor devices, specializing in GaN and
related materials. Prior to Odyssey, he was a visiting scientist at Cornell University, where he worked on
developing GaN-based transistors for radio-frequency communications applications. He was also a founding
member and device scientist at Avogy Inc, a company funded by Khosla Ventures. Brown holds a B.S., M.S. and
Ph.D. in Electrical and Computer Engineering from Cornell University.
GaN-based systems outperform silicon and SiC-based systems due to the superior material properties of GaN. To
date, GaN devices have proven difficult to process using standard semiconductor processing methods. Odyssey
says that it has developed a novel processing modification that will allow GaN to be processed in a manner that,
for the first time, will make production of high-voltage GaN power switching devices viable.
The premium power switching device market - which is described as applications where silicon-based systems
perform insufficiently - is projected to reach over $3.5bn by 2025 and is currently dominated by silicon carbide.
This growth is driven largely by the rapid adoption of electric vehicles (EV) and hybrid electric vehicles (HEV) and
the growing number of installations of renewables such as solar and wind power as well as increased demand for
more efficient industrial motor drives.
Porous GaN firm Porotech completes £1.5m seed round SemiconductorToday
Gallium nitride (GaN) material technology developer Poro Technologies (Porotech, a recent spin-off from the UK’s
University of Cambridge) has closed a £1.5m seed round investment to develop a pilot plant in Cambridge and its
first major products. The seed round was co-led by the University of Cambridge’s commercialization arm
Cambridge Enterprise and IQ Capital Partners, joined by Martlet Capital and a syndicate of angel investors from
Cambridge Angels and Cambridge Capital Group.
Porotech says that its unique production process allows the controlled creation of a new class of porous GaN
semiconductor materials and structures that provide enhanced functionality. Porous GaN could be regarded as a
semiconductor composite of solid GaN and air. It enables Porotech to engineer a wide range of material properties
(optical, mechanical, thermal and electrical) and consequently offers an entirely new material platform for
semiconductor devices to be built upon.
Porotech’s porous GaN wafers, material technologies and device solutions can also deliver multi-functional wafers
with the material properties and functionalities targeted to the specific final device application for the cost-
effective manufacture of LEDs, lasers, power electronics, quantum light sources, sensors and solar cells.
With its process and product IP portfolio, scale-up and instrumentation solutions, and interdisciplinary expertise
in semiconductor materials and devices and materials chemistry, Porotech’s licensing business model (involving
proving by making) is to commercialize its unique material platform technology and device solutions in
conjunction with its partners and foundry network.
Porotech’s co-founders CEO Dr Tongtong Zhu, CSO professor Rachel Oliver and CTO Dr Yingjun Liu.
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“Gallium nitride is a material poised to have impact across electronics and optoelectronics — from efficient power
transistors to quantum devices — and the introduction of porous architectures can extend its capability in all
these realms,” reckons professor Rachel Oliver, chief scientific officer & co-founder of Porotech and director of
the Cambridge Centre for Gallium Nitride at the University of Cambridge.
“Gallium nitride is the semiconductor material of the future. It is on the rise to revolutionise and transform the
electronics industry,” believes CEO & co-founder Dr Tongtong Zhu. “Porotech is at the forefront of this particular
revolution, where we have developed the first production technique that allows the integration of porous GaN in
tailored forms to significantly increase performance of real-world electronic and optoelectronic devices and
applications,” he adds.
Porotech was the winner of Cambridge Enterprise’s Postdoc Business Plan Competition 2018 and won the golden
award of the 5th China ‘Internet Plus’ Innovation and Entrepreneurship Competition in October 2019.
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PATENT APPLICATIONS
More than 160+ new patent families (inventions) were published in March 2020.
Other patent applicants Airbus Operations, Aisin Aw, Ampleon Netherlands, Analog Devices, Asahi Kasei, Asti Global, China Three Gorges University, Cree, CRRC Zhuzhou Institute, Daegu Gyeongbuk Institute of Science & Technology, Delta Electronics, Electric Power Research Institute of State Grid Shandong Electric Power, Facebook Technologies, Ferric, Furukawa, GaN Systems, Gwangju Institute of Science & Technology, Hefei Irico Epilight Technology, Infineon Technologies, Institute of Semiconductors, Jiangnan University, Jiaxing Super Lighting Electric Appliance, Kim Katherine Ann, Korea Institute of Ceramic Engineering & Technology KICET, Korea Photonics Technology Institute, Korea University Industrial & Academic Collaboration Foundation, Kunshan Govisionox Optoelectronics, Kunshan New Flat Panel Display Technology Center, Lg Electronics, Lin Guan Wei, Lu De Jia, Nanjing Changfeng Aerospace Electronic Equipment, Nanjing Zike Photoelectric Technology, National Taiwan University, Nitride Semiconductors, No 55 Institute of China Electronics Science & Technology, Qualcomm, Samsung Electronics, Semiconductor Components Industries, Shenzhen Third Generation Semiconductor Research Institute, Shenzhen Times Innovation Technology, Shenzhen University, Showa Denko, Siemens, Sino Crystal Semico, Siyang Grande Electronics, SLT Technologies, South China Normal University, South China University of Technology, Stanley Electric, State Grid Corporation of China (SGCC), Sumitomo Heavy Industries, Sun Yat Sen University, Suzhou Huashi Wireless Technology, Suzhou Institute of Nano Technology & Nano Bionics Chinese Academy of Sciences, SZ DJI Technology, Technische Universitaet Darmstadt, Texas Instruments, Tohoku University, Tokuyama, Torex Semiconductor, United Arab Emirates University, University Beijing, University of Electronic Science & Technology of China, University of Texas at Austin, University of Tokushima, University of Xiamen, Velodyne Lidar.
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Notable new patent applications
Method for manufacturing an electronic device Publication Number: WO2020/058256, FR3086097 Patent Applicant: CEA The present application relates to a method for manufacturing an electronic device, more particularly an electroluminescent device made of indium-gallium nitride (InGaN) or aluminium-gallium nitride (AIGaN), comprising the following successive steps: a) performing an ion implantation of indium or aluminium in an upper portion (105a) of a first monocrystalline layer (105) of gallium nitride (GaN), so as to amorphise the upper portion (105a) of the first layer (105) and preserve the crystal structure of a lower portion (105b) of the first layer (105); and b) performing a solid-phase recrystallisation annealing of the upper portion (105a) of the first layer (105), resulting in the upper portion (105a) of the first layer (105) being transformed into a crystalline layer of indium-gallium nitride (InGaN) or aluminium-gallium nitride (AIGaN).
Gallium nitride enhancement mode device Publication Number: WO2020/055984 Patent Applicant: ANALOG DEVICES
An enhancement mode compound semiconductor field-effect transistor (FET) includes a source, a drain, and a gate located therebetween. The transistor further includes a first gallium nitride-based hetero-interface located under the gate and a buried region, located under the first hetero-interface, the buried p-type region configured to determine an enhancement mode FET turn-on threshold voltage to permit current flow between the source and the drain.
Reducing bowing of materials before wafer-to-wafer bonding for led manufacturing Publication Number: US20200083400, WO2020/055889 Patent Applicant: FACEBOOK Disclosed herein are techniques relating to wafer-to-wafer bonding for manufacturing light-emitting diodes (LEDs). In some embodiments, a method includes reducing bowing of a layered structure including a semiconductor material and a substrate on which the semiconductor material is formed by generating breakages, fractures, or at least one region of weakened bonding within the layered structure. The method also includes bonding a base wafer to the semiconductor material, removing the substrate from the semiconductor material, and forming a plurality of trenches through the semiconductor material to produce a plurality of LEDs.
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Semiconductor structure and preparation method thereof Publication Number: WO2020/047814
Patent Applicant: ENKRIS SEMICONDUCTORS
A semiconductor structure, comprising: a substrate (1); a nucleation layer (3) located above the substrate (1); and a metal nitride thin film (2) located between the nucleation layer (3) and the substrate (1). The metal nitride thin film (2) is deposited between the substrate (1) and the nucleation layer (3), suppressing the diffusion of atoms in the material of the substrate (1), significantly reducing the thickness of the nucleation layer (3), and reducing the total thermal resistance of the semiconductor structure.
Method for manufacturing an optoelectronic device comprising a plurality of diodes Publication Number: US20200091224, FR3086100, EP3624192, CN110896084 Patent Applicant: CEA A method of manufacturing an optoelectronic device, including: a) transferring, onto a connection surface of a control circuit, an active diode stack including at least first and second semiconductor layers of opposite conductivity types, so that the second semiconductor layer in the stack faces the connection surface of the control circuit and is separated from the connection surface of the control circuit by at least one insulating layer; b) forming in the active stack trenches delimiting a plurality of diodes, the trenches extending through the insulating layer and emerging onto the connection surface of the control circuit; and c) forming in the trenches metallizations connecting the second semiconductor layer to the connection surface of the control circuit.
Doped buffer layer for group III-V devices on silicon Publication Number: US20200075314, DE102019117018, CN110875387, KR10-2020-0026733 Patent Applicant: TSMC Various embodiments of the present application are directed towards a group III-V device including a seed buffer layer that is doped and that is directly on a silicon substrate. In some embodiments, the group III-V device includes the silicon substrate, the seed buffer layer, a heterojunction structure, a pair of source/drain electrodes, and a gate electrode. The seed buffer layer overlies and directly contacts the silicon substrate. Further, the seed buffer layer includes a group III nitride (e.g., AlN) that is doped with p-type dopants. The heterojunction structure overlies the seed buffer layer. The source/drain electrodes overlie the heterojunction structure. The gate electrode overlies the heterojunction structure, laterally between the source/drain electrodes. The p-type dopants prevent the formation of a two-dimensional hole gas (2DHG) in the silicon substrate, along an interface at which the silicon substrate and the seed buffer layer directly contact.
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UV LED and display Publication Number: US20200098832 Patent Applicant: NITRIDE SEMICONDUCTORS
A UV-LED is disclosed. The UV-LED includes a sapphire substrate, a u-GaN buffer layer formed on the sapphire substrate, an n-GaN contact layer formed on the u-GaN buffer layer, an InGaN light emitting layer formed on the n-GaN contact layer, and a p-GaN layer formed on the InGaN light emitting layer. The UV-LED has a quadrate planar shape with at least one side having a chip size of 50 μm or less.
High-resolution display device Publication Number: KR10-2020-0027792, US20200075665 Patent Applicant: SAMSUNG ELECTRONICS A high-resolution display device is provided. The high-resolution display device includes a light-emitting layer including a first semiconductor layer, an active layer, and a second semiconductor layer, a plurality of transparent electrodes respectively formed on the second semiconductor layer in sub-pixel regions, a first electrode connected to the first semiconductor layer, a plurality of second electrodes connected to the plurality of transparent electrodes, a color-converting layer arranged over the light-emitting layer and configured to emit light of a predetermined color based on light generated by the light-emitting layer, which are sequentially stacked on a substrate including a plurality of sub-pixel regions. One or more ion injection regions corresponding to current injection regions corresponding to the plurality of the sub-pixel regions is formed in the second semiconductor layer.
Method for growth of a merged crystal by bonding at least a 1st and 2nd crystal to an adhesion layer to form a tiled substrate and growing a crystalline composition over said tiled substrate Publication Number: US20200087813 Patent Applicant: SORAA
Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors.
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Semiconductor device Publication Number: US20200091330, CN110911490 Patent Applicant: TOSHIBA
According to one embodiment, a semiconductor device comprises a first nitride semiconductor layer on a substrate and a second nitride semiconductor layer on the first nitride semiconductor layer. The second nitride semiconductor layer has a larger bandgap than the first nitride semiconductor layer. Source and drain electrodes are on the second nitride semiconductor layer. A gate electrode is between the source electrode and the drain electrode. A third nitride semiconductor layer of p-type conductivity is on the second nitride semiconductor layer between the drain electrode and the gate electrode and spaced from the drain electrode.
A III-V semiconductor device and a method for forming a III-V semiconductor device comprising an edge termination structure Publication Number: EP3627559 Patent Applicant: IMEC According to an aspect of the present inventive concept there is provided a method for forming a III-V semiconductor device comprising:forming a III-V semiconductor layer stack comprising in a bottom-up direction: a drain contact layer, a drift layer, a channel layer, a body contact layer and a source contact layer, wherein the drain contact layer, the drift layer and the source contact layer have a first conductivity type and the channel layer and the body contact layer have a second conductivity type opposite the first conductivity type,forming a set of gate structures extending through the source contact layer, the body contact layer and the channel layer,forming a set of source contacts contacting the source contact layer, andforming an edge termination structure, wherein forming the edge termination structure comprises:forming a drain contact extending through the layer stack and contacting the drain contact layer, andforming an insulating region extending vertically through the layer stack, into the channel layer such that a thickness portion of the channel layer remains under a bottom of the insulating region, wherein the remaining thickness portion of the channel layer forms a reduced surface field, RESURF, layer.
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