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Cluster of Excellence (Labex, 2020-2024) GANEXT is a cluster gathering French research teams involved in GaN technology. The objective of GANEXT is to strengthen the position of French academic players in terms of knowledge and visibility, and reinforce the French industrial players in terms of know-how and market share. GANEXT replaces and succeed GANEX Cluster of Excellence (Labex 2012-2019). www.ganex.fr

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GANEXT Newsletter No. 04 May 2020

GaN Technology for Optoelectronics & Electronics

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IMPORTANT NOTE: The end of GaNeX Cluster of Excellence program (Labex 2012-2019) was scheduled on December 2019. However, the French government decided to expand the labex program for five additional years, in order to further strengthen the synergy between French academic research organizations and industrial players in the field of GaN optoelectronics and electronics. Therefore, GANEXT Cluster of Excellence program will replace and succeed GaNeX for the next five years (2020-2024). Accordingly, the GANEXT newsletter will follow and adapt to the new program, focusing on scientific publications, patent applications and press releases related to optoelectronics (LED, µ-LED, laser, photonics, etc.) and electronics (power, RF, advanced electronics, etc.), ruling out publications which are not related to one of these two families of applications. For instance, publications dealing with MEMS, sensors, photovoltaics, nanostructures, semi-polar and non-polar materials, fundamental physics, etc. that do not obviously relate to optoelectronic or electronic applications will not be included in the GANEXT newsletter. Besides, a panel of GANEXT experts will continue to interact with Knowmade team in order to select the most relevant publications of the month, consistently with GANEXT’s ongoing projects.

TABLE OF CONTENTS

METHODOLOGY ........................................................................................................... 3

SCIENTIFIC PUBLICATIONS............................................................................................ 4

OPTOELECTRONICS ....................................................................................................... 4

ELECTRONICS .............................................................................................................. 14

PRESS RELEASE........................................................................................................... 31

PATENT APPLICATIONS .............................................................................................. 68

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METHODOLOGY

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SCIENTIFIC PUBLICATIONS Selection of new scientific articles

OPTOELECTRONICS Group leader: Bruno Gayral (CEA)

Information selected by Julien Brault (CNRS-CRHEA) and Maria Tchernycheva (CNRS-C2N) Improved performance of UVC-LEDs by combination of high-temperature annealing and epitaxially laterally overgrown AlN/sapphire Institute of Solid State Physics, Technische Universität

Berlin, Hardenbergstraße 36, 10623 Berlin, Germany

Ferdinand-Braun-Institut, Leibniz-Institut für

Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, 12489

Berlin, Germany

Leibniz-Institut für Kristallzüchtung, Max-Born-Straße 2,

12489 Berlin, Germany

Photonics Research

https://doi.org/10.1364/PRJ.385275

We report on the performance of AlGaN-based deep

ultraviolet light-emitting diodes (UV-LEDs) emitting at

265 nm grown on stripe-patterned high-temperature

annealed (HTA) epitaxially laterally overgrown (ELO)

aluminium nitride (AlN)/sapphire templates. For this

purpose, the structural and electro-optical properties

of ultraviolet-c light-emitting diodes (UVC-LEDs) on as-

grown and on HTA planar AlN/sapphire as well as ELO

AlN/sapphire with and without HTA are investigated

and compared. Cathodoluminescence measurements

reveal dark spot densities of 3.5×109  cm−2,

1.1×109  cm−2, 1.4×109  cm−2, and 0.9×109  cm−2 in

multiple quantum well samples on as-grown planar

AlN/sapphire, HTA planar AlN/sapphire, ELO

AlN/sapphire, and HTA ELO AlN/sapphire,

respectively, and are consistent with the threading

dislocation densities determined by transmission

electron microscopy (TEM) and high-resolution X-ray

diffraction rocking curve. The UVC-LED performance

improves with the reduction of the threading

dislocation densities (TDDs). The output powers

(measured on-wafer in cw operation at 20 mA) of the

UV-LEDs emitting at 265 nm were 0.03 mW (planar

AlN/sapphire), 0.8 mW (planar HTA AlN/sapphire), 0.9

mW (ELO AlN/sapphire), and 1.1 mW (HTA ELO

AlN/sapphire), respectively. Furthermore, Monte

Carlo ray-tracing simulations showed a 15% increase

in light-extraction efficiency due to the voids formed

in the ELO process. These results demonstrate that

HTA ELO AlN/sapphire templates provide a viable

approach to increase the efficiency of UV-LEDs,

improving both the internal quantum efficiency and

the light-extraction efficiency.

Emission spectrum control in monolithic blue-cyan

dichromatic light-emitting diodes Ioffe Institute, 26 Politekhnicheskaya str., 194021 St.

Petersburg, Russia

STR Group—Soft-Impact, Ltd, 64 Bolshoi Sampsonievskii

ave., Bld. E, 194044 St. Petersburg, Russia

Submicron Heterostructures for Microelectronics,

Research & Engineering Center, RAS, 26 Politekhnicheskaya

str., 194021 St. Petersburg, Russia

Semiconductor Science and Technology

https://doi.org/10.1088/1361-6641/ab74ef

InGaN-based dichromatic light emitting diodes (LEDs)

emitting in the blue and cyan spectral ranges

simultaneously, are investigated both experimentally

and theoretically. Two main approaches to controlling

the ratio of blue-to-cyan components in the emission

spectrum are suggested and analyzed: (i) thickness

variation of the GaN barrier between the blue and

cyan quantum wells and (ii) optimization of the barrier

doping with n- or p-type impurities. Detailed

examination of the approaches is carried out in order

to understand their capabilities for intentional

variation of the blue-to-cyan ratio in a wide range.

Based on numerical simulations, a novel mechanism,

invoking enhanced Shockley–Read–Hall

recombination in the barrier and underlying both

approaches, is suggested and discussed. It is shown

that proposed design of the monolithic blue-cyan LEDs

does not result in substantial decrease of the LED

emission efficiency compared to monochromatic blue

or cyan reference samples.

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Continuous-wave electrically injected GaN-on-Si

microdisk laser diodes University of Science and Technology Beijing, Beijing

100083, China

Key Laboratory of Nano-Devices and Applications, Suzhou

Institute of Nano-Tech and Nano-Bionics, Chinese Academy

of Sciences (CAS), Suzhou 215123, China

Suzhou Institute of Nano-Tech and Nano-Bionics, CAS,

Foshan 528200, China

University of Science and Technology of China, Hefei

230026, China

Department of Electronic Engineering, Tsinghua University,

Beijing 100084, China

Optics Express

https://doi.org/10.1364/OE.391851

Silicon photonics has been calling for an electrically

pumped on-chip light source at room temperature for

decades. A GaN-based microdisk laser diode with

whispering gallery modes grown on Si is a promising

candidate for compact on-chip light source. By

suppressing the unintentional incorporation of carbon

impurity in the p-type AlGaN cladding layer of the

laser, we have significantly reduced the operation

voltage and threshold current of the GaN-on-Si

microdisk laser. Meanwhile the radius of the microdisk

laser was shrunk to 8 µm to lower the thermal power.

The overall junction temperature of the microdisk

laser was effectively reduced. As a result, the first

continuous-wave electrically pumped InGaN-based

microdisk laser grown on Si was achieved at room

temperature.

High-speed integrated micro-LED array for visible

light communication Graduate Institute of Photonics and Optoelectronics,

National Taiwan University, Taipei 106, Taiwan

Research & Development Center, Epistar Corp., Hsinchu

300, Taiwan

Graduate Institute of Electronics Engineering, National

Taiwan University, Taipei 106, Taiwan

Optics Letters

https://doi.org/10.1364/OL.391566

In this Letter, we report high-speed integrated 14 µm

in diameter micro-light-emitting diode (μLED) arrays

with the parallel configuration, including 2×2, 2×3,

2×4, and 2×5 arrays. The small junction area of μLED

(∼191µm2) in each element facilitates the operation

of higher injection current density up to 13kA/cm2,

leading to the highest modulation bandwidth of 615

MHz. The optical power of 2×5 array monotonically

increases (∼10 times higher) as the number of arrays

increases (1 to 10), while retaining the fast modulation

bandwidth. A clear eye diagram up to 1 Gbps without

any equalizer further shows the capability of this high-

speed transmitter for VLC. These results mean that

tailoring the optical power of μLEDs in a parallel-

biased integrated array can further enhance the data

transmission rate without degradation of the

modulation bandwidth.

High-efficiency fiber-to-chip interface for aluminum

nitride quantum photonics Holonyak Micro and Nanotechnology Laboratory and

Department of Electrical and Computer Engineering,

University of Illinois at Urbana-Champaign, Urbana, IL

61801, USA

Illinois Quantum Information Science and Technology

Center, University of Illinois at Urbana-Champaign, Urbana,

IL 61801, USA

OSA Continuum

https://doi.org/10.1364/OSAC.391580

Integrated nonlinear photonic circuits received rapid

development in recent years, providing all-optical

functionalities enabled by cavity-enhanced photon-

photon interaction for classical and quantum

applications. A high-efficiency fiber-to-chip interface is

key to these integrated photonic circuits for quantum

information tasks, as photon-loss is a major source

that weakens quantum protocols. Here, overcoming

material and fabrication limitation of thin-film

aluminum nitride by adopting a stepwise waveguiding

scheme, we demonstrate low-loss adiabatic fiber-

optic couplers in aluminum nitride films with a

substantial thickness (∼600 nm) for optimized

nonlinear photon interaction. For telecom (1550 nm)

and near-visible (780 nm) transverse magnetic-

polarized light, the measured insertion loss of the

fiber-optic coupler is -0.97 dB and -2.6 dB,

respectively. Our results will facilitate the use of

aluminum nitride integrated photonic circuits as

efficient quantum resources for generation of

entangled photons and squeezed light on microchips.

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GaN Films Deposited on Sapphire Substrates Sputter-

Coated with AlN Followed by Monolayer Graphene

for Solid-State Lighting The State Key Discipline Laboratory of Wide Band Gap

Semiconductor Technology, Xidian University, 710071, P.R.

China

Shaanxi Joint Key Laboratory of Graphene, Xidian

University, 710071, P.R. China

ACS Appl. Nano Mater.

https://doi.org/10.1021/acsanm.0c00221

GaN-based light-emitting diodes (LEDs) are extremely

promising and highly efficient solid-state light sources

with long lifetimes. In this study, a stress-free GaN film

with optimal quality and a low density of dislocations

was obtained on sapphire by embedding a sputtered

AlN (S-AlN)/graphene composite buffer layer. The

growth of a nucleation-enhanced dislocation-

annihilation (NEDA) structure via S-AlN/graphene-

assisted quasi-van der waals epitaxy was proposed

here. Sapphire was first sputter-coated with AlN. After

transferring a monolayer graphene on to the 25nm S-

AlN surface, a 1.9um-GaN thin film was grown by

metal-organic chemical vapor deposition. Theoretical

first-principle density functional theory calculations

were performed to determine the electrostatic

potential on the surface of the composite substrate.

We also fabricated an ultraviolet LED that delivered

stable performance using a high-quality GaN film.

Finally, the present work may provide insights into the

epitaxial growth of III-N films and demonstrates that

fabricating stress-free, high-quality, and transferable

III-N films for solid-state lighting is achievable.

Large Wavelength Response to Pressure Enabled in

InGaN/GaN Microcrystal LEDs with 3D Architectures Division of Materials Science and Engineering, HYU-

HPSTAR-CIS High Pressure Research Center, Hanyang

University, Seoul 133-791,Republic of Korea

Department of Physics and Astronomy, Institute of Applied

Physics and Research Institute of Advanced Materials

(RIAM), Seoul National University, Seoul 151-747, Republic

of Korea

ACS Photonics

https://doi.org/10.1021/acsphotonics.0c00251

Optical detection of pressure has the advantage of

direct and dynamic indication of the pressure

distribution with a high spatial resolution. In this

study, microcrystal (µ-crystal) light-emitting diodes

(LEDs) that can exhibit an unprecedented large

wavelength response to pressure are demonstrated.

As a key strategy, three-dimensional InGaN/GaN µ-

crystals are engineered to have a hollow core and

multiple facets with different multiple quantum well

(MQW) structures. The unique structure allows

pressure-sensitive modulation of the dominantly

emitting MQWs, resulting in an anomalously large

change of ~50 nm in the ultimate emission wavelength

under an external stress of 8 MPa. The underlying

mechanism is elucidated via finite-element analysis of

the strain development in the µ-crystals and the

corresponding piezo-potentials. The results of the

study suggest a new capability for dynamic color

mapping of the pressure distribution with a high

spatial resolution.

Investigation of Electrical Properties and Reliability

of GaN-Based Micro-LEDs Department of Electrical and Electronic Engineering, The

Southern University of Science and Technology, Shenzhen

518000, China

Department of Electronic and Computer Engineering, Hong

Kong University of Science and Technology, Hong Kong SAR

999077, China

Nanomaterials

https://doi.org/10.3390/nano10040689

In this paper, we report high-performance Micro-LEDs

on sapphire substrates, with pixel size scaling to 20 µm

and an ultra-high current density of 9902 A/cm2. The

forward voltages (VF) of the devices ranged from 2.32

V to 2.39 V under an injection current density of 10

A/cm2. The size and structure-dependent effects were

subsequently investigated to optimize the device

design. The reliability of Micro-LED devices was

evaluated under long-aging, high-temperature, and

high-humidity conditions. It was found that Micro-LED

devices can maintain comparable performance with

an emission wavelength of about 445 nm and a full

width at half maximum (FWHM) of 22 nm under

extreme environments. Following this, specific

analysis with four detailed factors of forward voltage,

forward current, slope, and leakage current was

carried out in order to show the influence of the

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different environments on different aspects of the

devices.

Suppression of efficiency droop in AlGaN based deep

UV LEDs using double side graded electron blocking

layer Optoelectronics and MOEMS Group, CSIR- CEERI, Pilani,

Rajasthan-333031, India

Academy of Scientific and Innovative Research (AcSIR),

CSIR-CEERI Campus, Pilani, Rajasthan-333031, India

Semiconductor Science and Technology

https://doi.org/10.1088/1361-6641/ab7ce6

We have envisaged and designed a novel III-V nitride

based deep ultraviolet light emitting diode (LED) with

reasonably high efficiency at higher current density

using a double-side grading in electron blocking layer

(EBL). Double-side step- and linear-grading in EBL yield

better performance attributable to improved hole

injection, stifled electron overflow and diminished

electrostatic field in the active region. The

performance curves indicate that double sided linear

grading in EBL has 5.63 times enhancement in power

compared to the conventional LED and the efficiency

droop is as low as 15% at the current density of 200 A

cm−2 for the emission wavelength of ~273 nm.

Full-color micro-LED display with high color stability

using semipolar (20-21) InGaN LEDs and quantum-

dot photoresist Department of Photonics & Graduate Institute of Electro-

Optical Engineering, College of Electrical and Computer

Engineering, National Chiao Tung University, Hsinchu

30010, Taiwan

Institute of Photonic System, National Chiao Tung

University, Tainan 71150, Taiwan

Saphlux Inc., Branford, Connecticut 06405, USA

Department of Electronic Science, Fujian Engineering

Research Center for Solid-State Lighting, Xiamen University,

Xiamen 361005, China

Department of Electrical Engineering, Yale University, New

Haven, Connecticut 06520, USA

Photonics Research

https://doi.org/10.1364/PRJ.388958

Red-green-blue (RGB) full-color micro light-emitting

diodes (μ-LEDs) fabricated from semipolar (20-21)

wafers, with a quantum-dot photoresist color-

conversion layer, were demonstrated. The semipolar

(20-21) InGaN/GaN μ-LEDs were fabricated on large (4

in.) patterned sapphire substrates by orientation-

controlled epitaxy. The semipolar μ-LEDs showed a 3.2

nm peak wavelength shift and a 14.7% efficiency

droop under 200  A/cm2 injected current density,

indicating significant amelioration of the quantum-

confined Stark effect. Because of the semipolar μ-

LEDs’ emission-wavelength stability, the RGB pixel

showed little color shift with current density and

achieved a wide color gamut (114.4% NTSC space and

85.4% Rec. 2020).

Optical and frequency degradation behavior of GaN-

based micro-LEDs for visible light communication State Key Laboratory of Integrated Optoelectronics,

Institute of Semiconductors, Chinese Academy of Sciences,

No. A35, Qinghua East Road, Haidian District, Beijing

100083, China

Center of Materials Science and Optoelectronic

Engineering, University of Chinese Academy of Sciences,

Beijing 100049, China

Optics Express

https://doi.org/10.1364/OE.383867

In this study, optical power and frequency response

degradation behavior of GaN-based micro-LEDs with

bandwidth up to 800MHz were investigated under

different modes, including direct current (DC) mode,

alternating current (AC) mode and DC plus AC small

signal mode at room temperature. The

electroluminescence (EL), current-voltage (I-V)

characteristics and small signal frequency response

were measured during the stress. The results show

that micro-LEDs under AC mode have better reliability

because of the decreased junction temperature, but

the high current density would still generate some

defects within or around the active region, which can

increase the trap-assisted tunneling (TAT) current and

non-radiative recombination. The electrical stress-

related defects not only reduce the effective carrier

concentration injected into QWs but also increase the

carrier lifetime for radiative recombination and Auger

recombination and decrease the modulation

bandwidth. These results will help to understand and

improve the reliability of micro-LEDs operated under

high current density and promote the application of

micro-LEDs for visible light communication.

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Electrically driven, polarized, phosphor-free white

semipolar (20-21) InGaN light-emitting diodes grown

on semipolar bulk GaN substrate Materials Department, University of California, Santa

Barbara, CA 93106, USA

Department of Electrical and Computer Engineering,

University of California, Santa Barbara, CA 93106, USA

Optics Express

https://doi.org/10.1364/OE.384139

We demonstrate a simple method to fabricate

efficient, electrically driven, polarized, and phosphor-

free white semipolar (20-21) InGaN light-emitting

diodes (LEDs) by adopting a top blue quantum well

(QW) and a bottom yellow QW directly grown on (20-

21) semipolar bulk GaN substrate. At an injection

current of 20 mA, the fabricated 0.1 mm2 size regular

LEDs show an output power of 0.9 mW tested on

wafer without any backside roughing, a forward

voltage of 3.1 V and two emission peaks located at 427

and 560 nm. A high polarization ratio of 0.40 was

measured in the semipolar monolithic white LEDs,

making them promising candidates for backlighting

sources in liquid crystal displays (LCDs). Furthermore,

a 3dB modulation bandwidth of 410 MHz in visible

light communication (VLC) was obtained in the micro-

size LEDs (µLEDs) with a size of 20×20 µm2 and 40×40

µm2, which could overcome the limitation of slow

frequency response of yellow phosphor in commercial

white LEDs combing blue LEDs and yellow phosphor.

Effects of size on the electrical and optical properties

of InGaN-based red light-emitting diodes Computer, Electrical and Mathematical Sciences and

Engineering (CEMSE) Division, King Abdullah University of

Science and Technology (KAUST), Thuwal 23955-6900,

Saudi Arabia

Applied Physics Letters

https://doi.org/10.1063/5.0006910

We investigated the effects of size on electrical and

optical properties of InGaN-based red light-emitting

diodes (LEDs) by designing rectangular chips with

different mesa lengths. Larger chips exhibited lower

forward voltages because of their lower series

resistances. A larger chip helped to realize a longer

emission wavelength, narrower full-width at half

maximum, and higher external quantum efficiency.

However, temperature-dependent

electroluminescence measurements indicated that

larger chips are detrimental to applications where high

temperature tolerance is required. In contrast, a

smaller red LED chip achieved a high characteristic

temperature of 399 K and a small redshift tendency of

0.066 nm K−1, thus showing potential for temperature

tolerant lighting applications.

Structural and electrical properties of Pd/p-GaN

contacts for GaN-based laser diodes Ferdinand-Braun-Institut, Leibniz-Institut für

Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, 12489

Berlin, Germany

Wroclaw Research Center EIT+, Department of

Semiconductor Nanostructures, ul. Stabłowicka 147, 54-066

Wrocław, Poland

Journal of Vacuum Science & Technology B

https://doi.org/10.1116/1.5143139

In this paper, the properties of Pd-based p-contacts on

GaN-based laser diodes are discussed. Pd is often the

metal of choice for ohmic contacts on p-GaN.

However, for Pd/p-GaN ohmic contacts, nanovoids

observed at the metal/semiconductor interface can

have a negative impact on reliability and also

reproducibility. The authors present a thorough

analysis of the microstructure of the Pd/p-GaN

interface by x-ray photoelectron spectroscopy (XPS)

and scanning transmission electron microscopy

(STEM). STEM data show that the microvoids at the p-

GaN/Pd interface form during rapid thermal

annealing. A combination of the following effects is

suggested to support the void formation: (1) the

differences in thermal expansion coefficients of the

materials; (2) excess matrix or impurity atoms in the

semiconductor, at the interface, and in the metals,

which are released as gases; and (3) the strong

antisurfactant effect of Pd on Ga-rich p-GaN surfaces.

A slow temperature ramp during contact annealing

reduces the formation of voids likely by suppressing

the accumulation of gases at the interface. XPS data

show that the Ga/N ratio can be reduced by suitable

cleaning of the p-GaN surface, which enhances Pd

adhesion. As a result, the quality of the contact system

is improved by the systematic optimization of the

surface cleanliness as well as the annealing

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parameters, leading to void-free and clean Pd/p-GaN

interfaces. The specific contact resistance, extracted

from linear transmission line method measurements,

is reduced by an order of magnitude to 2 × 10−3 Ω cm²

at 1 mA for the same epitaxial layer stack.

633-nm InGaN-based red LEDs grown on thick

underlying GaN layers with reduced in-plane residual

stress Computer, Electrical and Mathematical Sciences and

Engineering (CEMSE) Division, King Abdullah University of

Science and Technology (KAUST), Thuwal 23955-6900,

Kingdom of Saudi Arabia

Applied Physics Letters

https://doi.org/10.1063/1.5142538

This work investigates the influence of residual stress

on the performance of InGaN-based red light-emitting

diodes (LEDs) by changing the thickness of the

underlying n-GaN layers. The residual in-plane stress

in the LED structure depends on the thickness of the

underlying layer. Decreased residual in-plane stress

resulting from the increased thickness of the

underlying n-GaN layers improves the crystalline

quality of the InGaN active region by allowing for a

higher growth temperature. The electroluminescence

intensity of the InGaN-based red LEDs is increased by

a factor of 1.3 when the thickness of the underlying n-

GaN layer is increased from 2 to 8 μm. Using 8-μm-

thick underlying n-GaN layers, 633-nm-wavelength

red LEDs are realized with a light-output power of 0.64

mW and an external quantum efficiency of 1.6% at

20 mA. The improved external quantum efficiency of

the LEDs can be attributed to the lower residual in-

plane stress in the underlying GaN layers.

Effect of Strains and V-Shaped Pit Structures on the

Performance of GaN-Based Light-Emitting Diodes Department of Photonics, College of Electrical and

Computer Engineering, National Chiao Tung University,

Hsinchu 300, Taiwan

Epistar Corporation, Hsinchu 300, Taiwan

Crystals

https://doi.org/10.3390/cryst10040311

Strains and V-shaped pits are essential factors for

determining the efficiency of GaN-based light-

emitting diodes (LEDs). In this study, we systematically

analyzed GaN LED structures on patterned sapphire

substrates (PSSs) with two types of growth

temperature employed for prestrained layers and

three different thickness of n-type GaN layers by using

cathodoluminescence (CL), microphotoluminescence

(PL), and depth-resolved confocal Raman

spectroscopy. The results indicated that V-pits

formation situation can be analyzed using CL. From the

emission peak intensity ratio of prestrained layers and

multiple quantum wells (MQWs) in the CL spectrum,

information regarding strain relaxation between

prestrained layers and MQWs was determined.

Furthermore, micro-PL and depth-resolved confocal

Raman spectroscopy were employed to validate the

results obtained from CL measurements. The growth

conditions of prestrained layers played a dominant

role in the determination of LED performance. The

benefit of the thick layer of n-GaN was the strain

reduction, which was counteracted by an increase in

light absorption in thick n-type doped layers.

Consequently, the most satisfactory LED performance

was observed in a structure with relatively lower

growth temperature of prestrained layers that

exhibited larger V-pits, leading to higher strain

relaxation and thinner n-type GaN layers, which

prevent light absorption caused by n-type GaN layers.

Optical polarization properties of (11–22) semi-polar

InGaN LEDs with a wide spectral range Department of Electronic and Electrical Engineering,

University of Sheffield, Mappin Street, Sheffield, S1 3JD,

United Kingdom

Scientific Reports

https://doi.org/10.1038/s41598-020-64196-w

Electroluminescence polarization measurements have

been performed on a series of semi-polar InGaN light

emitting diodes (LEDs) grown on semi-polar (11–22)

templates with a high crystal quality. The emission

wavelengths of these LEDs cover a wide spectral

region from 443 to 555 nm. A systematic study has

been carried out in order to investigate the influence

of both indium content and injection current on

polarization properties, where a clear polarization

switching at approximately 470 nm has been

observed. The shortest wavelength LED (443 nm)

exhibits a positive 0.15 polarization degree, while the

longest wavelength LED (555 nm) shows a negative

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−0.33 polarization degree. All the longer wavelength

LEDs with an emission wavelength above 470 nm

exhibit negative polarization degrees, and they further

demonstrate that the dependence of polarization

degree on injection current enhances with increasing

emission wavelength. Moreover, the absolute value of

the polarization degree decreases with increasing

injection current. In contrast, the polarization degree

of the 443 nm blue LED remains constant with

changing injection current. This discrepancy can be

attributed to a significant difference in the density of

states (DOS) of the valence subbands.

Graphene-assisted molecular beam epitaxy of AlN for

AlGaN deep-ultraviolet light-emitting diodes Department of Electrical Engineering and Computer

Science, University of Michigan, Ann Arbor, Michigan

48109, USA

Department of Materials Science and Engineering,

University of Michigan, Ann Arbor, Michigan 48109, USA

Applied Physics Letters

https://doi.org/10.1063/1.5144906

We report on the van der Waals epitaxy of high-quality

single-crystalline AlN and the demonstration of AlGaN

tunnel junction deep-ultraviolet light-emitting diodes

directly on graphene, which were achieved by using

plasma-assisted molecular beam epitaxy. It is

observed that the substrate/template beneath

graphene plays a critical role in governing the initial

AlN nucleation. In situ reflection high energy electron

diffraction and detailed scanning transmission

electron microscopy studies confirm the epitaxial

registry of the AlN epilayer with the underlying

template. Detailed studies further suggest that the

large-scale parallel epitaxial relationship for the AlN

epilayer grown on graphene with the underlying

template is driven by the strong surface electrostatic

potential of AlN. The realization of high-quality AlN by

van der Waals epitaxy is further confirmed through

the demonstration of AlGaN deep-ultraviolet light-

emitting diodes operating at ∼260 nm, which exhibit a

maximum external quantum efficiency of 4% for an

unpackaged device. This work provides a viable path

for the van der Waals epitaxy of ultra-wide bandgap

semiconductors, providing a path to achieve high

performance deep-ultraviolet photonic and

optoelectronic devices that were previously difficult.

Recent progress in nanoplasmonics-based integrated

optical micro/nano-systems Department of Electrical and Computer Engineering,

National University of Singapore, Singapore, Singapore

Center for Intelligent Sensors and MEMS (CISM), National

University of Singapore, Singapore, Singapore

Graduate School for Integrative Science and Engineering,

National University of Singapore, Singapore, Singapore

Journal of Physics D: Applied Physics

https://doi.org/10.1088/1361-6463/ab77db

Nanoplasmonics deals with the collective oscillation of

electrons at the surface of metallic structures at the

nanometer scale. It possesses advantages including

nanofocusing of electromagnetic waves beyond the

optical diffraction limit to enhance local electric field

intensity and femtosecond-level relaxation times.

With the advances in the fundamental understanding

of nanoplasmonics in the past two decades as well as

the development of nanofabrication technology,

nanoplasmonics has found significant practical

applications in life sciences, optical manipulations, and

high-speed telecommunications. Many structures for

nanoplasmonic optical antennas are demonstrated

with a focus on improving electric field intensity and

extending working wavelength range. The integration

of microelectromechanical systems (MEMS) with

nanoplasmonics enables dynamically tunable

nanoplasmonic metasurfaces. Meanwhile, the

introduction of nanoplasmonic metasurfaces into

MEMS systems enhances the performance of MEMS

photothermal devices, absorbers, emitters, and

equips MEMS photonic device with selectivity. The

accurate excitation of, and nanofocusing in

nanoplasmonics structures are realized by using

photonic waveguide input, while photonic waveguides

equipped with nanoplasmonic features present higher

modulation speed and perform

photodetection/sensing functions in a much smaller

footprint. Future developments will mainly involve

further enhancements in concentrating the electric

field, miniaturization of the well-defined

nanoplasmonic structures, and realizing the full

integration of nanoplasmonics, MEMS, photonic

waveguides, and the advanced electronic system using

the standard CMOS fabrication technology toward

compact micro/nano-systems. With these

developments, handheld portable sensors, compact

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 11

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tunable optical manipulation devices, ultra-high-

speed chip-scale modulators with high production

volume and low-cost are envisaged for healthcare,

Internet-of-Things, and data center applications.

In situ wafer curvature measurement and strain

control of AlInN/GaN distributed Bragg reflectors Department of Materials Science and Engineering, Meijo

University, 1-501 Shiogamaguchi, Tempaku-ku, Nagoya

468-8502, Japan

Graduate School of Engineering and Akasaki Research

Center, Nagoya University, Furo-cho, Chikusa-ku, Nagoya

464-8603, Japan

Applied Physics Express

https://doi.org/10.35848/1882-0786/ab88c6

We measured in situ wafer curvature evolutions of 25-

pair AlInN/GaN DBRs on sapphire substrates and

found that strains in the DBRs were gradually

increased in a compressive direction as the epitaxial

growth progressed. The increase of the strain was

originated in the AlInN layers of the DBRs, suggesting

a possibility that the InN mole fraction was increased

with 0.03%–0.05%/pair. In order to compensate the

increase of the strain in the AlInN layers, we grew the

DBR by gradually increasing AlInN growth

temperatures with 1°C/5 pairs, resulting in narrower

satellite peaks of an X-ray diffraction pattern.

Enhanced optical gain characteristics of InAlN/δ-

GaN/InAlN nanoscale-heterostructure for D-UV

applications Department of Physics, Banasthali Vidyapith, Banasthali,

304022, Rajasthan, India

Superlattices and Microstructures

https://doi.org/10.1016/j.spmi.2020.106436

Most of the III-nitride heterostructures have exhibited

type-I band alignment producing low optical gain due

to which there is a serious restriction on the device

design flexibility; hence further studies are required to

investigate the technique for improvement of the

optical gain characteristics. Here, this paper reports

the enhancement of optical gain of III-nitride

heterostructure, particularly, InAlN/InAlN nano-scale

heterostructure by introducing an ultra-thin layer of

GaN material in the central region of the

heterostructure. The introduction of GaN layer causes

the electron-hole wave functions to be localized

strongly in the central part of the QW (quantum well)

due to which a very large optical gain is achieved in, so

called, InAlN/δ-GaN/InAlN nanoscale-heterostructure.

According to the simulation results, for modified

InAlN/δ-GaN/InAlN nano-scale heterostructure the TE

(Transverse Electric) optical gain achieved in the D-UV

(deep-ultra-violet) region is more than three times

greater than the optical gain of the conventional III-

nitride heterostructures. Moreover, the achieved gain

has further been observed to be enhanced

significantly by the application of DC (direct current)

electric field on the proposed heterostructure. Due to

very high UV optical gain, the InAlN/δ-GaN/InAlN

nano-scale heterostructure can be a promising

heterostructure functioning in D-UV optical laser

diodes.

Increased radiative recombination of AlGaN-based

deep ultraviolet laser diodes with convex quantum

wells National Joint Research Center for Electronic Materials and

Systems, Zhengzhou University, Zhengzhou, 450001, China

International Joint Laboratory of Electronic Materials and

Systems, Zhengzhou University, Zhengzhou, 450001, China

School of Information Engineering, Zhengzhou University,

Zhengzhou, 450001, China

School of Physics and Electronic Engineering, Xinyang

Normal University, Xinyang, 464000, China

Optoelectronics Letters

https://doi.org/10.1007/s11801-020-9093-2

An AlGaN-based deep ultraviolet laser diode with

convex quantum wells structure is proposed. The

advantage of using a convex quantum wells structure

is that the radiation recombination is significantly

improved. The improvement is attributed to the

increase of the effective barrier height for electrons

and the reduction of the effective barrier height for

holes, which results in an increased hole injection

efficiency and a decreased electron leakage into the p-

type region. Particularly, comparisons with the convex

quantum barriers structure and the reference

structure show that the convex quantum wells

structure has the best performance in all respects.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 12

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Novel patterned sapphire substrates for enhancing

the efficiency of GaN-based light-emitting diodes

Department of Chemical and Materials Engineering,

Tamkang University, New Taipei City, Taiwan

Department of Chemical Engineering, National Taiwan

University of Science and Technology, Taipei 10607, Taiwan

Superalloys and High Temperature Materials Group,

National Institute for Materials Science, Tsukuba, Ibaraki,

Japan

Water Treatment Science and Technology Research Center,

Tamkang University, New Taipei City, Taiwan

RSC Advances

https://doi.org/10.1039/D0RA01900C

In this study, a novel patterned sapphire substrate

(PSS) was used to obtain mesa-type light-emitting

diodes (LED), which can efficiently reduce the

threading dislocation densities. Silicon nitride (Si3N4)

was used as a barrier to form the PSS, replacing the

commonly used silicon dioxide (SiO2). The refractive

index of Si3N4 is 2.02, which falls between those of

sapphire (1.78) and GaN (2.4), so it can be used as a

gradient refractive index (GRI) material, enhancing the

light extraction efficiency (LEE) of light-emitting

diodes. The simulation and experimental results

obtained indicate that the LEE is enhanced compared

with the conventional PSS-LED. After re-growing, we

observed that an air void exists on the top of the

textured Si3N4 layer due to GaN epitaxial lateral

overgrowth (ELOG). Temperature-dependent PL was

used to estimate the internal quantum efficiency (IQE)

of the PSS-LED and that of the PSS-LED with the Si3N4

embedded air void (PSA-LED). The IQE of the PSA-LED

is 4.56 times higher than that of the PSS-LED. Then, a

TracePro optical simulation was used to prove that the

air voids will affect the final luminous efficiency. The

luminous efficiency of the four different structures

considered is ranked as Si3N4 (PSN-LED) > PSA-LED >

PSS-LED with SiO2 (PSO-LED) > PSS-LED. Finally, we

fabricated LED devices with different thickness of the

Si3N4 barrier. The device shows the best luminance–

current–voltage (LIV) performance when the Si3N4

thickness is 220 nm.

Polar (In,Ga)N/GaN Quantum Wells: Revisiting the

Impact of Carrier Localization on the “Green Gap”

Problem Photonics Theory Group, Tyndall National Institute,

University College Cork, Cork T12 R5CP, Ireland

School of Physics and Astronomy, University of Manchester,

Manchester M13 9PL, United Kingdom

Department of Materials Science and Metallurgy, University

of Cambridge, 27 Charles Babbage Road, Cambridge CB3

0FS, United Kingdom

PHYSICAL REVIEW APPLIED

https://doi.org/10.1103/PhysRevApplied.13.044068

We present a detailed theoretical analysis of the

electronic and optical properties of c-plane

InGaN/GaN quantum-well structures with In contents

ranging from 5% to 25%. Special attention is paid to

the relevance of alloy-induced carrier-localization

effects to the “green gap” problem. Studying the

localization length and electron-hole overlaps at low

and elevated temperatures, we find alloy-induced

localization effects are crucial for the accurate

description of (In,Ga)N quantum wells across the

range of In content studied. However, our calculations

show very little change in the localization effects when

moving from the blue to the green spectral regime;

that is, when the internal quantum efficiency and wall-

plug efficiencies reduce sharply, for instance, the in-

plane carrier separation due to alloy-induced

localization effects changes weakly. We conclude that

other effects, such as increased defect densities, are

more likely to be the main reason for the green-gap

problem. This conclusion is further supported by our

finding that the electron localization length is large,

when compared with that of holes, and changes little

in the In composition range of interest for the green-

gap problem. Thus, electrons may become

increasingly susceptible to an increased (point) defect

density in green emitters and as a consequence the

nonradiative-recombination rate may increase.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 13

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Demonstration of ohmic contact using MoOx/Al on

p-GaN and the proposal of a reflective electrode for

AlGaN-based DUV-LEDs Laboratory for Microstructures, School of Materials Science

and Engineering, Shanghai University, Shanghai 200444,

China

Ningbo Institute of Materials Technology and Engineering,

Chinese Academy of Sciences, Ningbo, 315201 Zhejiang,

China

University of Chinese Academy of Sciences, Beijing 100049,

China

Hebei University of Technology, Institute of Micro-Nano

Photoelectron and Electromagnetic Technology Innovation,

School of Electronics and Information Engineering, Tianjin

300401, China

Advanced Micro-Fabrication Equipment Inc., Shanghai

201201, China

Zhe Jiang Bright Semiconductor Technology Co., Ltd.,

Jinhua, China

Optics Letters

https://doi.org/10.1364/OL.387275

The MoOx/Al electrode was designed and fabricated

on p-GaN and sapphire with good ohmic behavior and

decent deep ultraviolet (DUV) reflectivity,

respectively. The influences of MoOx thickness and

annealing condition on the electrical and optical

behaviors of the MoOx/Al structure were investigated.

Surface morphology of MoOx with different

thicknesses reveals a 3D growth mode. Partial

decomposition of MoOx was discovered, which helps

in the formation of ohmic contact between MoOx and

Al. The potential for application in deep ultraviolet

light-emitting-diodes (DUV-LEDs) has also been

demonstrated.

Low-efficiency-droop InGaN quantum dot light-

emitting diodes operating in the “green gap” Department of Electronic and Computer Engineering, Hong

Kong University of Science and Technology, Clear Water

Bay, Kowloon, Hong Kong, China

Department of Physics, Hong Kong University of Science and

Technology, Clear Water Bay, Kowloon, Hong Kong, China

Photonics Research

https://doi.org/10.1364/PRJ.380158

Gallium nitride (GaN)-based light-emitting diodes

(LEDs) are important for lighting and display

applications. In this paper, we demonstrate green-

emission (512 nm) InGaN quantum dot (QD) LEDs

grown on a c-plane sapphire substrate by metal-

organic chemical vapor deposition. A radiative lifetime

of 707 ps for the uniform InGaN self-assembled QDs is

obtained by time-resolved photoluminescence

measurement at 18 K. The screening of the built-in

fields in the QDs effectively improves the performance

of QD LEDs. These high quantum efficiency and high

temperature stability green QD LEDs are able to

operate with negligible efficiency droop and with

current density up to 106  A/cm2. Our results show

that InGaN QDs may be a viable option as the active

medium for stable LEDs.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 14

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ELECTRONICS Group leader: Farid Medjoub (CNRS-IEMN)

Information selected by Farid Medjoub (CNRS-IEMN), Jean-Claude Dejaeger (CNRS-IEMN) and Yvon Cordier (CNRS-CRHEA)

A Parametric Technique for Trap Characterization in

AlGaN/GaN HEMTs Department of Electronics and Electrical Engineering,

Liverpool John Moores University, Liverpool L3 3AF, U.K.

Cardiff School of Technologies, Cardiff Metropolitan

University, Cardiff CF5 2YB, U.K.

Nanoelectronic Devices Computational Group, College of

Engineering, Swansea University, Swansea SA1 8EN, U.K.

Institute of Electronics, Microelectronics and

Nanotechnology, Université de Lille 1, 59650 Villeneuve

d'Ascq, France

Département de Physique, Université Saad Dahleb, Blida

09000, Algeria

Laboratoire Nanotechnologies Nanosystèmes, Université

de Sherbrooke, Sherbrooke, QC J1K 0A5, Canada

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2980329

A new parametric and cost-effective technique is

developed to decouple the mechanisms behind

current degradation in AlGaN/GaN high-electron

mobility transistors (HEMTs) under a normal device

operation: self-heating and charge trapping. Our

unique approach investigates charge trapping using

both source (IS) and drain (ID) transient currents for

the first time. Two types of charge-trapping

mechanisms are identified: 1) bulk charge trapping

occurring on a timescale of less than 1 ms and 2)

surface charge trapping with a time constant larger

than a millisecond. Through monitoring the difference

between IS and ID, a bulk charge-trapping time

constant is found to be independent of both drain

(VDS) and gate (VGS) biases. Surface charge trapping

is found to have a much greater impact on slow

degradation than bulk trapping and self-heating. At a

short timescale (<1 ms), the RF performance is mainly

restricted by both bulk charge-trapping and self-

heating effects. However, at a longer time (>1 ms), the

dynamic on-resistance degradation is predominantly

limited by surface charge trapping.

High linearity and high power performance with barrier layer of sandwich structure and Al0.05GaN back barrier for X-band application State Key Discipline Laboratory of Wide Band-gap

Semiconductor Technology, School of advanced materials

and nanotechnology, Xidian University, Xi'an 710071,

People's Republic of China

School of Microelectronics, Xidian University, Xi'an 710071,

People's Republic of China

Journal of Physics D: Applied Physics

https://doi.org/10.1088/1361-6463/ab678f

The high power and linearity performance of GaN-

based HEMT for X-band application was achieved

using the barrier layer of sandwich structure and

Al0.05GaN back barrier. The AlGaN-sandwich-barrier

can modulate polarization-graded field for more flat

transconductance profile under the high drain bias.

Only about 7.5% current collapse (CC) occurs for drain

quiescent bias of 40 V. Due to the Al0.05GaN back

barrier, the three-terminal off-state breakdown

voltage (BVDS) of 260 V and a very small drain-induced

barrier lowering (DIBL) of 2.7 mV V−1 is achieved. The

AlGaN sandwich barrier combined with Al0.05GaN

back barrier device exhibits a high current-gain cutoff

frequency f T of 42 GHz@V DS  =  10 V, and a high

power-gain cutoff frequency f MAX of 130 GHz@V

DS  =  60 V. Load-pull measurement at 10 GHz revealed

a saturated power density of 7.3 W mm−1 was

achieved with an associated PAE of 29.2% and Gain of

10.6 dB. Two-tone measurement at 10 GHz showed an

OIP3 of 38 dBm and a corresponding linearity figure-

of-merit OIP3/P DC of 4.5 dB. These results

demonstrate the great potential of AlGaN-sandwich -

barrier/GaN/Al0.05GaN HEMTs as a very promising

alternative to high power and high linearity X-band

power amplifier.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 15

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Fin-Gated Nanochannel Array Gate-Recessed

AlGaN/GaN Metal-Oxide-Semiconductor High-

Electron-Mobility Transistors Department of Electrical Engineering, Yuan Ze University,

Taoyuan 320, Taiwan

Department of Electrical Engineering, Institute of

Microelectronics, National Cheng Kung University, Tainan

701, Taiwan

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2981138

In this article, fin-gated nanochannel array gate-

recessed AlGaN/GaN metal-oxide-semiconductor

high-electron-mobility transistors (MOSHEMTs) were

fabricated, in which the gate oxide layer was directly

grown using the photoelectrochemical (PEC) oxidation

method, the gate-recessed structure was formed

using the PEC etching method, and the nanochannel

array was patterned using the electron-beam

lithography system. The improved gate controllability

was obtained in devices with a narrower channel

width due to the lateral field effect in comparison with

those of the conventional planar AlGaN/GaN

MOSHEMTs. A threshold voltage of -0.30, -0.35, and -

2.3 V, and a subthreshold swing of 95, 109, and 372

mV/dec, were respectively obtained for the

AlGaN/GaN MOSHEMTs with a channel width of 80

and 100 nm, and with a planar channel. Furthermore,

the associated extrinsic transconductance of 269, 253,

and 93 mS/mm was obtained to verify the improved

performance of AlGaN/GaN MOSHEMTs using a

narrower channel array. Besides, the low-noise and

high-frequency performances were also enhanced

using a narrower channel width in the fin-gated

nanochannel array gate-recessed AlGaN/GaN

MOSHEMTs.

A Robust on-Wafer Large Signal Transistor

Characterization Method at mm-Wave Frequency Key Laboratory of RF Circuits and Systems, Ministry of

Education, Hangzhou 310018, China

Chinese Journal of Electronics

https://doi.org/10.1049/cje.2019.05.013

Accurate on-wafer large signal characterization of RF

transistor is crucial for the optimum design of wireless

communication circuits. We report a novel and

systematic measurement method for the accurate

acquisition of input and output power of on-wafer

transistors up to 40GHz. This method employs

external couplers to extract the travelling waves,

combined with a novel large signal calibration

algorithm to calculate the power at on-wafer probe

tip. The accuracy of this method was bench marked

versus conventional approaches in a real

measurement bench, and further been verified by

characterizing the large signal response of a 0.25μm

GaN HEMT device. It is concluded that the

measurement uncertainty has been greatly decreased

with this new method, especially at mm-wave

frequencies.

Worst-Case Bias for High Voltage, Elevat-ed-

Temperature Stress of AlGaN/GaN HEMTs Department of Electrical Engineering and Computer

Science, Vanderbilt University, Nashville, TN 37235 USA

Air Force Research Laboratory, Wright-Patterson Air Force

Base, OH 45433 USA

IEEE Transactions on Device and Materials Reliability

https://doi.org/10.1109/TDMR.2020.2986401

The effects of high-field stress are evaluated for

industrial-quality AlGaN/GaN HEMTs as a function of

bias and temperature. Positive and negative threshold

voltage shifts are observed, depending on stress

conditions, indicating the presence of acceptor-like

and donor-like traps in these devices. Worst-case

transconductance degradation under rated device

operating con-ditions is observed for devices

subjected to high-voltage stress in the ON bias

condition at elevated temperature. This contrasts with

results on earlier-generation devices, which often

show worst-case response under semi-ON bias

conditions, emphasizing that each technology requires

characterization under multiple bias-stress conditions.

Neutral and charged oxygen donor-like DX centers and

substitutional acceptor-like NGa centers are the

dominant defects contributing to low-frequency noise

in these devices. Dehydrogenation of ON-H complexes

during ON-bias stress and the resulting increases in

densities of ON-related donor-like defects are

evidently the reliability-limiting mechanism in these

devices.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 16

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Test Setup for Dynamic On-State Resistance

Measurement of High- and Low-Voltage GaN-HEMTs

under Hard and Soft Switching Operation Department of Electromagnetic Fields, Faculty of

Engineering, Friedrich-Alexander University of Erlangen-

N|rnberg (FAU), 91058 Erlangen, Germany

Siemens AG, Smart Infrastructure, 90459 N|rnberg,

Germany

IEEE Transactions on Instrumentation and Measurement

https://doi.org/10.1109/TIM.2020.2985186

GaN-HEMTs impress with excellent properties and

therefore power electronics engineers pay a lot of

attention to it. However, during switching operation

some devices show increased on-state resistance.

Since for switch mode power supply designers, the

internal device structure is not apparent, measuring

the on-state resistance under the targeted operating

conditions is the only method to gain this information.

In order to characterize the dynamic on-state

resistance, this paper proposes clamping circuits for

accurate measurement. Using a high resolution

digitizer card ensures precise results. The presented

measurement setup allows to measure the on-state

resistance under hard and soft switching conditions

with parameters of the intended application. In

inverter applications, each switch works under hard as

well as soft switching. Therefore, the transition

between these two operating modes must also be

studied in detail. Finally, an extension of the clamping

circuit is presented allowing measurements with high-

voltage GaN-HEMTs as well. First results verify this

improved setup.

Enhancement-mode AlGaN/GaN MIS-HEMTs with

high VTH and high IDmax using recessedstructure

with regrown AlGaN barrier Graduate School of Engineering, University of Fukui, Fukui

910-8507, Japan

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2985091

We report on an Al2O3/AlGaN/GaN metal-

insulatorsemiconductor high-electron-mobility

transistor (MIS-HEMT) with recessed-gate structure

and regrown AlGaN barrier. After analyzing the

possibility of obtaining high threshold voltage (Vth)

within the framework of Tapajna and Kuzmik model

from preliminary experiments using MIS-diode

structures, we fabricated a MIS-HEMT with the same

materials and structures. The transistor exhibited a

high Vth value of +2.3 V determined at the drain

current criterion of 10 μA/mm together with a

maximum drain current density (IDmax) of 425

mA/mm. We believe that the adoption of a

technology, i. e., AlGaN regrowth on dry-etched GaN

surface, previously demonstrated by our group in

planar device, is the main key for achieving such

desirable performance.

Super Field Plate Technique That Can Provide Charge

Balance Effect for Lateral Power Devices Without

Occupying Drift Region Shandong Provincial Key Laboratory of Network-Based

Intelligent Computing, School of Information Science and

Engineering, University of Jinan, Jinan 250022, China

National ASIC System Engineering Research Center,

Southeast University, Nanjing 210096, China

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2981264

The super junction has been the most important

concept for the design of power devices. However,

there are still two problems when the conventional

super-junction techniques are applied on lateral

power devices: a large portion of the drift region is

occupied by a p-type region, and the super junction

techniques are not suitable for the gallium nitride-

based high electron mobility transistor (GaN-HEMT).

To solve the problems, a super field plate (SuFP)

technique is proposed as a charge balance principle.

Our analyses proved that the SuFP can provide a

charge balance effect for a lateral double diffused

MOS (LDMOS) without occupying the drift region. As a

result, the LDMOS with SuFP has a better performance

than the LDMOS with other charge balance realization

techniques. Moreover, as a kind of field plate, the SuFP

is also suitable for GaN-HEMT. Thereby, the proposed

SuFP technique overcomes the two problems in

conventional super-junction techniques and is

significant for lateral power devices.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 17

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Impact of Traps on the Adjacent Channel Power

Ratios of GaN HEMTs Electrical and Computer Engineering Department, Ohio

State University, Columbus, OH 43210 USA

Qorvo Inc., Richardson, TX 75080, USA

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2986445

In this work, the impact of traps on a system level

parameter, ACPR (adjacent channel power ratio), of

commercial RF AlGaN/GaN HEMTs were studied. ACPR

usually depends on the transistor linearity and

stability, and in this study it was measured in two

different signal duplexing schemes: time division

duplexing (TDD) and frequency division duplexing

(FDD) after using digital predistortion to minimize

static nonlinearities. It is theorized traps lead to time-

dependent nonlinearity due to the devices changing

operating points, which degrades ACPR. Constant

drain current deep level transient spectroscopy (CID-

DLTS) measurements were performed to

quantitatively characterize the trap energies and

concentration and correlate with the different time

sensitivities of the TDD and FDD schemes. Linked by

the trap concentration and time constant, the EC-0.57

eV trap was correlated to the FDD ACPR, and the EC-

0.72 eV trap was correlated to the TDD ACPR. Finally,

it is shown that both traps have been widely reported,

suggesting that many GaN systems’ ACPR can be

potentially improved by reducing the trap

concentration.

Aluminum nitride two-dimensional-resonant-rods Department of Electrical and Computer Engineering,

Northeastern University, Boston, Massachusetts 02115,

USA

Applied Physics Letters

https://doi.org/10.1063/5.0005203

In the last few decades, bulk-acoustic-wave filters

have been essential components of 3G-to-4G radios.

These devices rely on the high electromechanical

coupling coefficient (kt2 ∼ 7%), attained by aluminum

nitride (AlN) film-bulk-acoustic-resonators (FBARs), to

achieve a wideband and low-loss frequency response.

As the resonance frequency of FBARs is set by their

thickness, the integration of multiple FBARs, to form

filters, can only be attained through the adoption of

frequency tuning fabrication steps, such as mass

loading or trimming. However, as the ability to reliably

control these steps significantly decays for thinner (or

higher frequency) FBARs, manufacturing FBAR-based

filters, addressing the needs of emerging IoT and 5G

applications, is becoming more and more challenging.

Consequently, there is a quest for new acoustic

resonant components, simultaneously exhibiting high-

kt2 and a lithographic frequency tunability. In this

work, a novel class of AlN resonators is presented.

These radio frequency devices, labeled as two-

dimensional-resonant-rods (2DRRs), exploit, for the

first time, the unconventional acoustic behavior

exhibited by a forest of locally resonant rods, built in

the body of a profiled AlN layer that is sandwiched

between a bottom un-patterned metal plate and a top

metallic grating. 2DRRs exhibit unexplored modal

features that make them able to achieve high-kt2, a

significant lithographic frequency tunability, and a

relaxed lithographic resolution, while relying on an

optimal AlN crystalline orientation. The operation of

2DRRs is discussed, in this work, by means of analytical

and finite-element-methods. The measured

performance of the first fabricated 2DRR, operating

around 2.4 GHz and showing a kt2 in excess of 7.4%, is

also reported.

Energy transport analysis in a Ga0.84In0.16N/GaN

heterostructure using microscopic Raman images

employing simultaneous coaxial irradiation of two

lasers Graduate School of Electrical and Electronic Engineering,

Chiba University 1-33 Yayoicho, Inage-ku, Chiba 263-8522,

Japan

Computer, Electrical and Mathematical Sciences and

Engineering Division, King Abdullah University of Science

and Technology, Thuwal 23955-6900, Saudi Arabia

Applied Physics Letters

https://doi.org/10.1063/5.0003491

Anisotropic heat transport in a Ga0.84In0.16N/GaN-

heterostructure on a sapphire substrate is observed

from microscopic Raman images obtained by utilizing

coaxial irradiation of two laser beams, one for heating

(325 nm) in the GaInN layer and the other for signal

probing (325 nm or 532 nm). The increase in

temperatures of the GaInN layer and the underlying

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GaN layer is probed by the 325-nm and 532-nm lasers,

respectively, by analyzing the shift in the Raman peak

energy of the higher energy branch of E2 modes. The

result reveals that energy diffuses across a

considerable length in the GaInN layer, whereas the

energy transport in the perpendicular direction to the

GaN layer is blocked in the vicinity of misfit

dislocations on the heterointerface. This simultaneous

irradiation of two lasers for heat generation and

probing is effective in the microscopic analysis of

energy transport through heterointerfaces.

High temperature operation to 500 °C of AlGaN

graded polarization-doped field-effect transistors Department of Chemical Engineering, University of Florida,

Gainesville, Florida 32608

Sandia National Laboratories, Albuquerque, New Mexico

87185

Department of Material Science and Engineering, University

of Florida, Gainesville, Florida 32608

Journal of Vacuum Science & Technology B

https://doi.org/10.1116/1.5135590

AlGaN polarization-doped field-effect transistors were

characterized by DC and pulsed measurements from

room temperature to 500 °C in ambient. DC current-

voltage characteristics demonstrated only a 70%

reduction in on-state current from 25 to 500 °C and full

gate modulation, regardless of the operating

temperature. Near ideal gate lag measurement was

realized across the temperature range that is

indicative of a high-quality substrate and sufficient

surface passivation. The ability for operation at high

temperature is enabled by the high Schottky barrier

height from the Ni/Au gate contact, with values of 2.05

and 2.76 eV at 25 and 500 °C, respectively. The high

barrier height due to the insulatorlike aluminum

nitride layer leads to an ION/IOFF ratio of 1.5 × 109

and 6 × 103 at room temperature and 500 °C,

respectively. Transmission electron microscopy was

used to confirm the stability of the heterostructure

even after an extended high-temperature operation

with only minor interdiffusion of the Ni/Au Schottky

contact. The use of refractory metals in all contacts

will be key to ensure a stable extended high-

temperature operation.

Au-free recessed Ohmic contacts to AlGaN/GaN high

electron mobility transistor: Study of etch chemistry

and metal scheme Centre for Nano Science and Engineering, Indian Institute of

Science, Bangalore 560012, India

Paragraf, West Newlands Industrial Park, Somersham PE28

3EB, United Kingdom

School of Engineering and Materials Science, Queen Mary

University of London, London E1 4NS, United Kingdom

Journal of Vacuum Science & Technology B

https://doi.org/10.1116/1.5144509

The authors study the effect of etch chemistry and

metallization scheme on recessed Au-free Ohmic

contacts to AlGaN/GaN heterostructures on silicon.

The effect of variation in the recess etch chemistry on

the uniformity of Ohmic contact resistance has been

studied using two different etch chemistries (BCl3/O2

and BCl3/Cl2). Experiments to determine the optimum

recess etch depth for obtaining a low value of contact

resistance have been carried out, and it is shown that

near-complete etching of the AlGaN barrier layer

before metallization leads to the lowest value of

contact resistance. Furthermore, two metal schemes,

namely, Ti/Al and Ti/Al/Ti/W, are investigated, and it

is found that the Ti/W cap layer on Ti/Al leads to low

contact resistance with a smooth contact surface

morphology. The effect of maintaining unequal mesa

and contact pad widths on the extracted values of

contact resistance and sheet resistance using the

linear transfer length method (LTLM) has been

studied. This is important as LTLM structures are used

as monitors for process control during various steps of

fabrication. It is shown that the extracted contact

resistance and sheet resistance values are reliable

when the mesa width is equal to the contact pad

width. Finally, a possible mechanism for carrier

transport in the Ohmic contacts formed using this

process has been discussed, based on temperature

dependent electrical characterization, and the field

emission mechanism is found to be the dominant

mechanism of carrier transport. A low Ohmic contact

resistance of 0.56 Ω mm, which is one of the lowest

reported values for identical metal schemes, and good

contact surface morphology has been obtained with

moderate post-metal annealing conditions of 600°C.

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A GaN HEMT Amplifier Design for Phased Array

Radars and 5G New Radios Institute of Radioelectronics and Multimedia Technology,

Warsaw University of Technology, Nowowiejska 15/19, 00-

662 Warsaw, Poland

Micromachines

https://doi.org/10.3390/mi11040398

Power amplifiers applied in modern active

electronically scanned array (AESA) radars and 5G

radios should have similar features, especially in terms

of phase distortion, which dramatically affects the

spectral regrowth and, moreover, they are difficult to

be compensated by predistortion algorithms. This

paper presents a GaN-based power amplifier design

with a reduced level of transmittance distortions,

varying in time, without significantly worsening other

key features such as output power, efficiency and gain.

The test amplifier with GaN-on-Si high electron

mobility transistors (HEMT) NPT2018 from MACOM

provides more than 17 W of output power at the 62%

PAE over a 1.0 GHz to 1.1 GHz frequency range. By

applying a proposed design approach, it was possible

to decrease phase changes on test pulses from 0.5° to

0.2° and amplitude variation from 0.8 dB to 0.2 dB

during the pulse width of 40 µs and 40% duty cycle.

Bonding GaN on high thermal conductivity graphite

composite with adequate interfacial thermal

conductance for high power electronics applications Department of Electrical and Mechanical Engineering,

Nagoya Institute of Technology, Gokiso-cho, Showa-ku,

Nagoya 466-8555, Japan

Applied Physics Letters

https://doi.org/10.1063/1.5144024

We demonstrate an efficient heat transport hybrid

structure by means of bonding GaN on a high thermal

conductivity graphite composite (GC). The

heterogeneous GaN/GC of the fine bonding interface,

without air voids and cracks, is confirmed. More

interestingly, GaN bonded on GC is stress-free and

quite beneficial for device performance, the

degradation of which is partially subject to the stress

induced by the fabrication and packaging processes.

Moreover, the thermal boundary conductance (TBC)

across the GaN/GC interface is accurately estimated to

be approximately 67 MW/m2K, based on the

measured TBC between Ti and GC, in excellent

agreement with the prediction using the corrected

diffuse mismatch model. According to the finite

element modeling results, the GaN-on-GC power

transistor shows superiority and possesses greatly

improved thermal performance due to the high

thermal conductivity of GC and adequate TBC across

the GaN/GC interface, compared to the commercially

available GaN-on-SiC and GaN-on-Si transistors. Our

findings highlight the potential of GC as a promising

alternative heat spreading substrate candidate for

thermal management applications in GaN-based next-

generation high power electronics, including radio

frequency amplifiers, high voltage power switches,

and high breakdown voltage diodes.

Compact 20-W GaN Internally Matched Power

Amplifier for 2.5 GHz to 6 GHz Jammer Systems Department of Radio and Information Communications

Engineering, Chungnam National University, Daejeon

34134, Korea

Micromachines

https://doi.org/10.3390/mi11040375

In this paper, we demonstrate a compact 20-W GaN

internally matched power amplifier for 2.5 to 6 GHz

jammer systems which uses a high dielectric constant

substrate, single-layer capacitors, and shunt/series

resistors for low-Q matching and low-frequency

stabilization. A GaN high-electron-mobility transistor

(HEMT) CGH60030D bare die from Wolfspeed was

used as an active device, and input/output matching

circuits were implemented on two different substrates

using a thin-film process, relative dielectric constants

of which were 9.8 and 40, respectively. A series

resistor of 2.1 Ω was chosen to minimize the high-

frequency loss and obtain a flat gain response. For the

output matching circuit, double λ/4 shorted stubs

were used to supply the drain current and reduce the

output impedance variation of the transistor between

the low-frequency and high-frequency regions, which

also made wideband matching feasible. Single-layer

capacitors effectively helped reduce the size of the

matching circuit. The fabricated GaN internally

matched power amplifier showed a linear gain of

about 10.2 dB, and had an output power of 43.3–43.9

dBm (21.4–24.5 W), a power-added efficiency of

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33.4%–49.7% and a power gain of 6.2–8.3 dB at the

continuous-wave output power condition, from 2.5 to

6 GHz.

Low capacitance AlGaN/GaN based air-bridge

structure planar Schottky diode with a half through-

hole School of Electronics and Information Technology, Sun Yat-

sen University, 510006 Guangzhou, China

State Key Laboratory of Optoelectronic Materials and

Technologies, Sun Yat-sen University, 510275 Guangzhou,

China

AIP Advances

https://doi.org/10.1063/5.0004470

The capacitance and the series resistance are two

main factors which determine the cut-off frequency of

Schottky barrier diodes (SBDs) for their application in

millimeter-wave and terahertz regions. The junction

capacitance is closely related to the anode dimension

of a SBD. Reducing the anode size can effectively

decrease the junction capacitance, but it will increase

the series resistance and the difficulty of the device

manufacturing process is also increased. In this paper,

an AlGaN/GaN based air-bridge structure planar SBD

with a half through-hole is investigated. The half

through-hole was formed on the center of a circular

anode by inductively coupled plasma etching to the

unintentional doping-GaN channel layer. The

capacitance formed by the anode metal and the two-

dimensional electron gas at the AlGaN/GaN interface

is effectively reduced under the condition of holding

the metal area of anode. The total capacitance of the

20 μm-radius anode SBD with a 19.95 μm-radius half

through-hole dramatically decreases from 2.32 pF of

the device without the half through-hole to 21.5 fF. In

addition, since the current is mainly distributed at the

edge of the circular anode, the series resistance is only

slightly increased. The cut-off frequency of the air-

bridge planar SBD with a 20 μm-radius anode and a

19.95 μm-radius half through-hole was 114.1 GHz. To

reduce the size of the anode and optimize the ohmic

contact, the cut-off frequency could be further

improved.

Transferrable AlGaN/GaN HEMTs to Arbitrary

Substrates via a Two-dimensional Boron Nitride

Release Layer Materials and Manufacturing Directorate, Air Force

Research Laboratory, Wright-Patterson AFB, Ohio 45433,

United States

UES Inc., Beavercreek, Ohio 45432, United States

KBR, 2601 Mission Point Blvd, Beavercreek Ohio 45431,

United States

Materials and Manufacturing Directorate, Air Force

Research Laboratory, Wright-Patterson AFB, Ohio 45433,

United States

Sensors Directorate, Air Force Research Laboratory, Wright-

Patterson AFB, Ohio 45433, United States

ACS Appl. Mater. Interfaces

https://doi.org/10.1021/acsami.0c02818

Mechanical transfer of high-performing thin-film

devices onto arbitrary substrates represents an

exciting opportunity to improve device performance,

explore nontraditional manufacturing approaches,

and paves the way for soft, conformal, and flexible

electronics. Using a two-dimensional boron nitride

release layer, we demonstrate the transfer of

AlGaN/GaN high-electron mobility transistors

(HEMTs) to arbitrary substrates through both direct

van der Waals bonding and with a polymer adhesive

interlayer. No device degradation was observed

because of the transfer process, and a significant

reduction in device temperature (327–132 °C at 600

mW) was observed when directly bonded to a silicon

carbide (SiC) wafer relative to the starting wafer. With

the use of a benzocyclobutene (BCB) adhesion

interlayer, devices were easily transferred and

characterized on Kapton and ceramic films,

representing an exciting opportunity for integration

onto arbitrary substrates. Upon reduction of this

polymer adhesive layer thickness, the AlGaN/GaN

HEMTs transferred onto a BCB/SiC substrate resulted

in comparable peak temperatures during operation at

powers as high as 600 mW to the as-grown wafer,

revealing that by optimizing interlayer characteristics

such as thickness and thermal conductivity,

transferrable devices on polymer layers can still

improve performance outputs.

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Interplay between C-doping, threading dislocations,

breakdown, and leakage in GaN on Si HEMT

structures Fraunhofer Institute for Integrated Systems and Device

Technology IISB, Schottkystr. 10, 91058 Erlangen, Germany

Chair of Electron Devices, University of Erlangen-Nürnberg,

Cauerstr. 6, 91058 Erlangen, Germany

Compound Semiconductor Technology, RWTH Aachen

University, 52074 Aachen, Germany

AIXTRON SE, 52134 Herzogenrath, Germany

AIP Advances

https://doi.org/10.1063/1.5141905

This work describes electrical characteristics and the

correlation to material properties of high electron

mobility transistor structures with a C-doped GaN

current blocking layer, grown either by an extrinsic or

auto-doping process with different doping levels.

Increasing degradation of crystalline quality in terms

of threading dislocation density for increasing C-

doping levels was observed for all samples. Different

growth conditions used for the auto-doped samples

played no role for overall degradation, but a higher

fraction of threading screw dislocations was observed.

Independent of the doping process, 90% of all TSDs

were noted to act as strong leakage current paths

through the AlGaN barrier. This was found statistically

and was directly verified by conductive atomic force

microscopy in direct correlation with defect selective

etching. Vertical breakdown was observed to increase

with increasing C-concentration and saturated for C-

concentrations above around 1019 cm−3. This was

attributed to an increasing compensation of free

charge carriers until self-compensation takes place. A

progressive influence of TDs for high C-concentrations

might also play a role but could not be explicitly

revealed for our material.

Current Status and Future Trends of GaN HEMTs in

Electrified Transportation McMaster Institute for Automotive Research and

Technology, McMaster University, Hamilton, ON L8P 0A6,

Canada

IEEE Access

https://doi.org/10.1109/ACCESS.2020.2986972

Gallium Nitride High Electron Mobility Transistors

(GaN HEMTs) enable higher efficiency, higher power

density, and smaller passive components resulting in

lighter, smaller and more efficient electrical systems

as opposed to conventional Silicon (Si) based devices.

This paper investigates the detailed benefits of using

GaN devices in transportation electrification

applications. The material properties of GaN including

the applications of GaN HEMTs at different switch

ratings are presented. The challenges currently facing

the transportation industry are introduced and

possible solutions are presented. A detailed review of

the use of GaN in the Electric Vehicle (EV) powertrain

is discussed. The implementation of GaN devices in

aircraft, ships, rail vehicles and heavy-duty vehicles is

briefly covered. Future trends of GaN devices in terms

of cost, voltage level, gate driver design, thermal

management and packaging are investigated.

Microwave Performance of ‘Buffer-Free’ GaN-on-SiC

High Electron Mobility Transistors SweGaN AB, Teknikringen 8D, SE-583 30 Linkvping, Sweden

Department of Microtechnology and Nanoscience,

Chalmers University of Technology, SE-412 96 Gothenburg,

Sweden

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2988074

High performance microwave GaN-on-SiC HEMTs are

demonstrated on a heterostructure without a

conventional thick doped buffer. The HEMT is

fabricated on a high-quality 0.25 μm unintentional

doped GaN layer grown directly on a transmorphic

epitaxially grown AlN nucleation layer. This approach

allows the AlN-nucleation layer to act as a back-

barrier, limiting short channel effects and removing

buffer leakage. The devices with the ‘buffer-free’

heterostructure show competitive DC and RF

characteristics, as benchmarked against the devices

made on a commercial Fe-doped epi-wafer. Peak

transconductances of 500 mS/mm and a maximum

saturated drain current of ~1 A/mm are obtained. An

extrinsic fT of 70 GHz and fmax of 130 GHz are

achieved for transistors with a gate length of 100 nm.

Pulsed-IV measurements reveal a lower current slump

and a smaller knee walkout. The dynamic IV

performance translates to an output power of 4.1

W/mm, as measured with active load-pull at 3 GHz.

These devices suggest that the ‘bufferfree’ concept

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may offer an alternative route for high frequency GaN

HEMTs with less electron trapping effects.

Electric-Based Thermal Characterization of GaN

Technologies Affected by Trapping Effects Microwave Electronics Laboratory, Department of

Microtechnology and Nanoscience, Chalmers University of

Technology, 41296 Gothenburg, Sweden

SweGaN, 58330 Linköping, Sweden

United Monolithic Semiconductors GmbH, 89081 Ulm,

Germany

Saab AB, 41276 Gothenburg, Sweden

Ericsson AB, 41756 Gothenburg, Sweden

Mechanical Engineering Department, Southern Methodist

University, Dallas, TX 75205 USA

TMX Scientific Inc., Richardson, TX 75081 USA

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2983277

This article presents an electric-based methodology

for thermal characterization of semiconductor

technologies. It is shown that for technologies such as

gallium nitride (GaN) high electron mobility

transistors, which exhibit several field induced

electron trapping effects, the thermal characterization

has to be performed under specific conditions. The

electric field is limited to low levels to avoid activation

of trap states. At the same time, the dissipated power

needs to be high enough to change the operating

temperature of the device. The method is

demonstrated on a test structure implemented as a

GaN resistor with large contact separation. It is used

to evaluate the thermal properties of samples with

different silicon carbide suppliers and buffer thickness.

Performance Limits of Vertical Unipolar Power

Devices in GaN and 4H-SiC Sonrisa Research, Inc., Santa Fe, NM 87506 USA

School of Electrical and Computer Engineering and Birck

Nanotechnology Center, Purdue University, West Lafayette,

IN 47907 USA

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2987282

GaN and 4H-SiC are emerging wide-bandgap

semiconductors that have unipolar power-device

figures-of-merit 350–400× higher than silicon, but

precise design and performance information on GaN

has been unavailable due to lack of ionization rate

data in that material. In this paper we calculate

performance limits of unipolar vertical drift regions in

GaN using recently published impact ionization data,

and compare these limits to those of silicon and 4H-

SiC. To assist in the design of power devices, we

include equations for the doping and thickness of

optimum unipolar drift regions in both materials.

Fabrication and Performance of Ti/Al/Ni/TiN Au-Free

Ohmic Contacts for Undoped AlGaN/GaN HEMT Engineering Research Center for Optoelectronic of

Guangdong Province, School of Physics and

Optoelectronics, South China University of Technology,

Guangzhou 510640, China

Zhongshan Institute of Modern Industrial Technology,

South China University of Technology, Zhongshan 528437,

China

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2982665

We proposed a preparation method of a TiN capping

layer compatible with the ohmic contacts process, and

demonstrated the Au-free ohmic contacts of an

undoped AlGaN/GaN high-electron-mobility transistor

(HEMT) with a Ti/Al/Ni/TiN metal structure. TiN was

prepared through depositing Ti thin film by a

sputtering system and then annealing in N₂ ambient by

the rapid thermal annealing process. The thickness of

Ti/Al, annealing temperature, and annealing time

were investigated systematically. Using the

Ti/Al/Ni/TiN structure, a low contact resistance (3.47 x

10⁻⁵,,Ω cm², 1.1 Ω · mm) was obtained when annealed

at 900 °C for 30 s in N₂ ambient, which was comparable

with conventional Au-based ohmic contacts (3.12 x

10⁻⁵ Ω · cm², 1.05 Ω · mm). In addition, the Ti/Al/Ni/TiN

ohmic contacts showed smooth surface morphology

with a surface roughness of 5.89 nm. AlGaN/GaN

HEMT, based on Ti/Al/Ni/TiN Au-free ohmic contacts,

was also fabricated and exhibited good dc

characteristics. The reported Au-free AlGaN/GaN

HEMT fabrication process can be used in standard Si

fabs without the risk of contamination.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 23

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Regrowth-free GaN-based Complementary Logic on a

Si Substrate Microsystems Technology Laboratories, Massachusetts

Institute of Technology, Cambridge, MA 02139, U.S.A.

Enkris Semiconductor, Inc., Suzhou, Jiangsu 215123, China

Intel Corporation, Components Research, Technology

Development Group, Hillsboro, OR 97124, U.S.A.

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2987003

This paper demonstrates a complimentary logic circuit

(an inverter) on a GaN-on-Si platform without the use

of regrowth technology. Both n-channel and p-

channel GaN transistors are monolithically integrated

on a GaN/AlGaN/GaN double heterostructure. N-

channel FETs show enhancement-mode (Emode)

operation with a threshold voltage around 0.2 V, ON-

OFF current ratio of 107 and RON of 6 Ω·mm, while the

p-channel FETs show E-mode operation with Vth of −1

V, ON-OFF current ratio of 104 and RON of 2.3 kΩ·mm.

Complementary logic inverters fabricated with this

technology yield a record maximum voltage gain of ~

27 V/V at an input voltage of 0.59 V with VDD=5 V.

Excellent transfer characteristics have been obtained

up to 300 °C operating temperatures, which

demonstrates the suitability of this technology for

low-power high-temperature electronic applications.

High fmax × LG Product of AlGaN/GaN HEMTs on

Silicon with Thick Rectangular Gate Department of Graduate Institute of Electronics

Engineering, National Taiwan University, Taipei City 10617,

Taiwan (R. O. C)

IEEE Journal of the Electron Devices Society

https://doi.org/10.1109/JEDS.2020.2987597

In this letter, we successfully demonstrated a

AlGaN/GaN high-electron mobility transistor on silicon

substrate with high product of maximum oscillation

frequency (fmax) and gate length (LG) by reducing the

gate resistance (Rg) using a thick, high aspect ratio

rectangular gate (R-gate) structure with an LG of 265

nm and thickness of 315 nm which was fabricated

using a thick polymethyl methacrylate lift-off process.

The maximum drain current is over 1 A/mm, and the

peak transconductance is 291 mS/mm. The values of

cutoff frequency and fmax are 43.7 GHz and 126.5 GHz

at a drain voltage (Vd) of 12 V, respectively. Rg is

extracted through the small-signal model, and the

value is given as 0.21 Ω-mm which is comparable to

devices with the T-gate structure. This low Rg results

in a high fmax and high fmax × LG product of 33.52

GHz-μm, comparable to previously reported GaN-on-

Si transistors for both R-gate and T-gate structures.

Study of Charge Trapping Effects on AlGaN/GaN

HEMTs under UV Illumination with Pulsed I-V

Measurement Department of Materials Science and Engineering, National

Chiao Tung University, Hsinchu 300, Taiwan

Taiwan Semiconductor Research Institute, Hsinchu 30078,

Taiwan

International College of Semiconductor Technology,

National Chiao Tung University, Hsinchu 300, Taiwan

IEEE Transactions on Device and Materials Reliability

https://doi.org/10.1109/TDMR.2020.2987394

The charge trapping effects on AlGaN/GaN HEMTs

under UV illumination are investigated using the

pulsed current-voltage (I-V) measurement method.

The test samples are unpassivated Schottky-gate

HEMTs and metal-insulator-semiconductor HEMTs

(MIS-HEMTs) with SiN gate dielectric. For HEMTs, the

dominant charge trapping sources are the surface trap

states, whereas, for MIS-HEMTs, they are trap states

in the SiN gate dielectric and GaN buffer. When these

devices are shined with the UV light, the drain current

increases apparently in both samples owing to the

generated photocurrent. By combining the UV

illumination and pulsed I-V measurement, we find out

the UV light has less effect on the surface charge

trapping in the unpassivated HEMTs. Moreover, in

MIS-HEMTs, we observe the charge trapping in the SiN

gate dielectric becomes more serious under UV

illumination, whereas the charge trapping in the GaN

buffer is suppressed significantly. These findings are

important for designing a GaN-based HEMT for

photonic applications. In addition, the different

responses of the surface-, buffer-, and gate-dielectric-

related charge trapping to the UV light suggest that it

would be easier to distinguish the trap types by

introducing the UV illumination during the pulse

measurement.

GANEXT | GaN Technology for Optoelectronics & Electronics Newsletter No. 04 | 24

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Development of High Power 220 GHz Frequency

Triplers Based on Schottky Diodes School of Electric Science and Engineering, University of

Electronic Science and Technology of China, Chengdu,

Sichuan, 611731 China

IEEE Access

https://doi.org/10.1109/ACCESS.2020.2988454

In this paper, the development of two high power 220

GHz frequency triplers is proposed. The GaAs Schottky

diodes with six nodes are applied to realize high

efficiency 220 GHz tripler, while the application of GaN

Schottky diodes with eight nodes is another attempt

to improve power handling of the 220 GHz tripler. To

reduce thermal effect of high power multipliers, the

AlN substrates with high thermal conductivity are

applied to provide better heat dissipation at the diode

areas. A combination of electrical and thermal model

of the Schottky diodes is established while the

optimization of 220 GHz triplers are realized with 3D

electromagnetic (EM) simulation and harmonic

balanced simulation. Good agreement is achieved

between the simulated results based on electro-

thermal model and measured performances of the

triplers. At room temperature, peak efficiency of the

tripler based on GaAs Schottky diodes is 17.8%, while

the maximum output of the tripler is 38.2 mW with

300 mW input power. As for the 220 GHz GaN Schottky

diode tripler, measured results show that the

maximum power handling is beyond 400 mW. The

peak efficiency and maximum output are 4.7% and

18.4 mW, respectively. The proposed methods of

developing high power multipliers can be applied in

higher frequency band in the future.

Single Pulse Unclamped-Inductive-Switching Induced

Failure and Analysis for 650V p-GaN HEMT National ASIC System Engineering Research Center,

Southeast University, 12579 Nanjing, Jiangsu China

IEEE Transactions on Power Electronics

https://doi.org/10.1109/TPEL.2020.2988976

This letter firstly reveals the single pulse unclamped-

inductive-switching (UIS) withstanding physics and

failure mechanism for p-GaN high electron mobility

transistor (HEMT) with Schottky type gate contact.

Unlike Si/SiC-based devices, the p-GaN HEMT

withstands the surge current from load inductor by

storing the energy into the output capacitance of the

device, rather than dissipating the energy by

avalanche process. To describe the UIS process,

physics-based models are proposed. Also, by the

simulations and de-cap/de-layer experiments, the

failure mechanism is presented as a different manner

compared with Si/SiC-based devices. The high voltage

during the UIS process introduces high electric field

near the drain contact, which leads to the inverse-

piezoelectric effect, then bringing the rise-up of the

leakage current and high power dissipation. As a

result, the region near drain contact is burned by

thermal runaway. Moreover, it is demonstrated that

higher bus voltage and larger load inductance will

increase the UIS-induced failure risk, while the gate

resistance, turn-off gate voltage and ambient

temperature exhibit little influences upon the UIS

withstanding capability of the device.

Input-Harmonic-Controlled Broadband Continuous

Class-F Power Amplifiers for Sub-6-GHz 5G

Applications Department of Electrical and Computer Engineering,

University of Calgary, Calgary, AB T2N 1N4, Canada

Department of Electrical and Computer Engineering,

Princeton University, Princeton, NJ 08544 USA

NXP Semiconductors, Chandler, AZ 85224 USA

Ericsson Canada Inc., Ottawa, ON K2K 2V6, Canada

Focus Microwaves, Montreal, QC H9B 3H7, Canada

IEEE Transactions on Microwave Theory and Techniques

https://doi.org/10.1109/TMTT.2020.2984603

A comprehensive analysis is presented for

investigating the effects of input nonlinearity on

performance and broadband design of continuous-

mode class-F power amplifiers (PAs). New time-

domain waveforms are derived considering input and

output harmonic terminations for continuous-mode

class-F operation. The derived design equations show

that the typical fundamental load design space of a

continuous class-F PA must be reengineered in the

presence of second-harmonic input nonlinearity to

new design space in order to achieve optimum class-F

PA performance versus varying second-harmonic load

impedance. For the practical validation, the impacts of

input nonlinearity on the performance of continuous-

mode class-F PAs are first confirmed with pulsed

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vector load-pull (VLP) measurements on a low-power

GaN 2-mm device. Second, a broadband high-power

GaN 24-mm part is designed following the proposed

theory with in-package input second-harmonic

terminations targeting 1.75-2.3-GHz frequency band

for the sub-6 GHz 5G high-power applications.

Efficiency higher than 65% with peak power more than

53.2 dBm was maintained over the target frequency

band, with excellent flatness. Third, a Doherty PA is

implemented based on the designed GaN 24-mm part

to evaluate the broadband performance with

modulated stimuli. Using a multicarrier signal having

an instantaneous bandwidth of 395 MHz, the average

drain efficiency of the Doherty PA at 8-dB output back-

off is higher than 44%, and the linearized adjacent

channel power ratio (ACPR) is better than -52 dBc.

III-nitrides based resonant tunneling diodes State Key Laboratory of Artificial Microstructure and

Mesoscopic Physics, School of Physics, Peking University,

Beijing 100871, People's Republic of China

Collaborative Innovation Center of Quantum Matter, Beijing

100871, People's Republic of China

Nano-Optoelectronics Frontier Center of Ministry of

Education (NFC-MOE), Peking University, People's Republic

of China

Journal of Physics D: Applied Physics

https://doi.org/10.1088/1361-6463/ab7f71

Resonant tunneling diodes are nano-devices which

have characteristics of negative differential resistance.

They are widely used in digital and analog circuits to

reduce components and decrease power

consumption. In recent years, resonant tunneling

diodes have been found to be an important choice for

implementing terahertz device. GaN-based resonant

tunneling diodes have inherited the advantages of III-

nitride, such as high operating frequency, high power,

high temperature resistance, etc, which has become a

research hotspot. This paper introduces the basic

situation of resonant tunneling diodes, reviews the

progress of simulation and experiment, analyzes the

influence of polarization field, and presents the

challenges. The analysis provided in this paper may

help the audience to become more familiar with

current research efforts, as well as to provide

inspiration for future III-nitride quantum device

designs.

High-Power Wire Bonded GaN Rectifier for Wireless

Power Transmission Department of Electrical and Electronics, University of

Liverpool, Liverpool L69 3GJ, U.K.

IEEE Access

https://doi.org/10.1109/ACCESS.2020.2991102

A novel wire bonded GaN rectifier for high-power

wireless power transfer (WPT) applications is

proposed. The low breakdown voltage in silicon

Schottky diodes limits the high-power operations of

microwave rectifier. The proposed microwave rectifier

consists of a high breakdown voltage GaN rectifying

element for high-power operation and a novel low loss

impedance matching technique for high efficiency

performance. Wire bonding method is adopted to

provide electrical connection between GaN chip and

board which induces undesirable inductance. In order

to realize high efficiency performance, an impedance

matching network is proposed to exploit the

unavoidable inductance along with a single shunt

capacitor, resulting in a low loss matching circuit to

achieve a compact high-power rectifier. The

fabricated GaN rectifier exhibits a good performance

in the high-power region and can withstand up to 39

dBm input power before reaching the breakdown limit

at the operating frequency of 0.915 GHz and load

resistance of 100 Ω. It has a compact size and exhibits

high efficiency performance in high-power region

(achieved a maximum efficiency of 61.2% at 39 dBm),

making it suitable for high-power applications like

future unmanned intelligent devices and WPT in space

applications.

Pseudo-Doherty Load-Modulated Balanced Amplifier

With Wide Bandwidth and Extended Power Back-Off

Range Department of Electrical and Computer Engineering,

University of Central Florida, Orlando, FL 32816 USA

IEEE Transactions on Microwave Theory and Techniques

https://doi.org/10.1109/TMTT.2020.2983925

This article presents a novel architecture of load-

modulated balanced amplifier (LMBA) with a unique

load-modulation characteristic different from any

existing LMBAs and Doherty power amplifiers (DPAs),

which is named pseudo-Doherty LMBA (PD-LMBA).

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Based on a special combination of control amplifier

(carrier) and balanced amplifier (peaking) together

with proper phase and amplitude controls, an optimal

load-modulation behavior can be achieved for PD-

LMBA, leading to maximized efficiency over extended

power back-off range. More importantly, the

efficiency optimization can be achieved with only a

static setting of phase offset at a given frequency,

which greatly simplifies the complexity for phase

control. Furthermore, the cooperations of the carrier

and peaking amplifiers in PD-LMBA are fully

decoupled, thus lifting the fundamental bandwidth

barrier imposed on the Doherty-based active load

modulation. Upon theoretical proof of these

discoveries, a wideband RF-input PD-LMBA is

physically developed using the GaN technology for

experimental demonstration. The prototype achieves

a highly efficient performance from 1.5 to 2.7 GHz,

e.g., 58%-72% of efficiency at 42.5-dBm peak power

and 47%-58% at 10-dB output back-off (OBO). When

stimulated by a 10-MHz long term evolution (LTE)

signal with a 9.5-dB peak-to-average power ratio

(PAPR), the developed PD-LMBA achieves an efficiency

of 44%-53% over the entire bandwidth at an average

output power of around 33 dBm.

Reliable GaN-based THz Gunn diodes with side-

contact and field-plate technologies Technical University of Darmstadt, Department of Electrical

Engineering and Information Technology, Institute for

Microwave Engineering and Photonics (IMP), Germany

Otto von Guericke University Magdeburg, Faculty of Natural

Sciences, Institute of Physics, Germany

IEEE Access

https://doi.org/10.1109/ACCESS.2020.2991309

For the first time, Gallium Nitride(GaN)-based Gunn

diodes with side-contact and field-plate technologies

were fabricated and measured with reliable

characteristics. A high negative differential resistance

(NDR) region was characterised for the GaN Gunn

effect using side-contact technology. The I-V

measurement of the THz diode showed the ohmic and

the Gunn effect region with high forward current of

0.65 A and high current drop of approximately 100 mA

for a small ring diode width wd of 1.5 μm with 600 nm

effective diode height hd at a small threshold voltage

of 8.5 V. This THz diode worked stable due to good

passivation as protection from electro-migration and

ionisation between the electrodes as well as a better

heat sink to the GaN substrate and large side-contacts.

The diodes can provide for this thickness a

fundamental frequency in the range of 0.3 - 0.4 THz

with reliable characteristics.

Impact of AlGaN/GaN Interface and Passivation on

the Robustness of Low-Noise Amplifiers Nanjing University of Science and Technology, Nanjing,

China

Microwave Electronics Laboratory, Department of

Microtechnology and Nanoscience, Chalmers University of

Technology, 412 96 Gothenburg, Sweden

Saab AB, Electronic Defence Systems, 412 89 Göteborg,

Sweden

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2986806

Poststress dc characteristics of AlGaN/GaN HEMTs can

be used to study the effect of high-power stress on the

noise figure (NF) and gain of low-noise amplifiers

(LNAs) subjected to large input overdrives. This

enables a shift from circuit- to transistor-level

measurements to investigate the impact of variations

in HEMT design parameters on the robustness

(including both recovery time and survivability) by

mimicking LNA operation. Using this method, a

tradeoff between survivability and recovery time is

demonstrated for different AlGaN/GaN interface

profiles (sharp interface, standard interface, and AlN

interlayer). Furthermore, the impact of different

surface passivation schemes (Si-rich, Si-poor, and

bilayer SiNₓ) on robustness is investigated. The bilayer

passivation, which features low leakage current and

small gain compression under overdrive stress,

exhibits relatively weak survivability. The mechanisms

influencing the robustness are analyzed based on

transistor physics. The short recovery time is mainly

due to impeding the injection of hot electrons into

surface traps and high reverse current, whereas the

survivability is dependent on the local or global peak

electrical fields around the gate under high power

stress.

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Effect of Gate Structure on the Trapping Behavior of

GaN Junctionless FinFETs Advanced Material Research Center, Kumoh National

Institute of Technology, Gumi, 39177, South Korea

Department of Advanced Materials Science and

Engineering, Kumoh National Institute of Technology, Gumi,

39177, South Korea

Institute of Microelectronics, Electromagnetism, and

Photonics, Grenoble Institute of Technology, 38016,

Grenoble, France

School of Electronics Engineering, Kyungpook National

University, Daegu, 41566, South Korea

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2991164

We investigated the performances of GaN junctionless

fin-shaped field-effect transistors (FinFETs) with two

different types of gate structures; overlapped-and

partially covered-gate. DC, low-frequency noise (LFN),

and pulsed I-V characterization measurements were

performed and analyzed together in order to identify

the conduction mechanism and examine both the

interface and buffer traps in the devices. The

fabricated GaN junctionless device with overlapped-

gate structure exhibits improved DC and noise

performance compared to the device with partially

covered-gate, even though its gate length is much

larger. The LFN behavior was found to be dominated

by carrier number fluctuations (CNF). At off-state, the

device with partially covered-gate exhibits generation-

recombination (g-r) noise on top of 1/f noise. This

superposition is correlated with the severe current

collapse revealed by pulsed I-V measurements. In

contrast, the device with overlapped-gate shows clear

1/f behavior without g-r noise.

Time Resolved Hyperspectral Quantum Rod

Thermography of Microelectronic Devices:

Temperature Transients in a GaN HEMT Centre for Device Thermography and Reliability, University

of Bristol, Bristol BS8 1TH, U.K.

IEEE Electron Device Letters

https://doi.org/10.1109/LED.2020.2989919

The trend of miniaturization and rapid progress in the

cost-competitive microelectronic industry require

high resolution, fast, accurate and cost-effective

thermal characterization techniques. These

techniques aid the assessment of reliability and

performance benchmarking of new device designs for

the realistic operation conditions. We present a time

resolved, surface sensitive, sub-micron resolution

wide field thermal imaging technique, exploiting fast

radiative recombination rates of quantum rod

photoluminescence to probe temperature transients

in semiconductor devices. We demonstrate a time

resolution of 20 μs on a single finger AlGaN/GaN

HEMT. This technique provides an image of the

surface temperature transients regardless of the

device design/material system under test. The results

were verified with transient thermo-reflectance

measurements.

Comparison of Wide-band-gap Technologies for Soft-

Switching Losses at High Frequencies Electrical Engineering, Ecole Polytechnique Federale de

Lausanne, 27218 Lausanne, VD Switzerland 1015

Electrical and Electronics Engineering, Middle East Technical

University, 52984 Ankara, Cankaya Turkey 06800

IEEE Transactions on Power Electronics

https://doi.org/10.1109/TPEL.2020.2990628

Soft-switching power converters based on wide-band-

gap (WBG) transistors offer superior efficiency and

power density advantages. However, at high

frequencies, loss behavior varies significantly between

different WBG technologies. This includes losses

related to conduction and dynamic ON-resistance (R

DS(ON) ) degradation, also charging/discharging of

input capacitance (C ISS ) and output capacitance (C

OSS ). As datasheets lack such important information,

we present measurement techniques and evaluation

methods for soft-switching losses in WBG transistors

which enable a detailed loss-breakdown analysis. We

estimate the gate loss under soft-switching conditions

using a simple small-signal measurement. Next, we

use Sawyer-Tower (ST) and Nonlinear Resonance (NR)

methods to measure large-signal C OSS energy losses

up to 40 MHz. Finally, we investigate the dependence

of dynamic R DS(ON) degradation on OFF-state voltage

using pulsed-IV measurements. We demonstrate an

insightful comparison of soft-switching losses for

various normally-OFF Gallium-Nitride (GaN) and

Silicon-Carbide (SiC) devices. A p-GaN-gated device

exhibits the most severe R DS(ON) degradation and

the lowest gate loss. Cascode arrangement increases

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threshold voltage for GaN devices and reduces gate

losses in SiC transistors; however, it leads to higher C

OSS losses. The study facilitates the evaluation of

system losses and selection of efficient WBG devices

based on the trade-offs between various sources of

losses at high frequencies.

Power Characteristics of GaN Microwave Transistors

on Silicon Substrates National Research Centre “Kurchatov Institute”, 123182,

Moscow, Russia

Joint-Stock Company “Scientific and Production Enterprise

Pulsar”, 105187, Moscow, Russia

Technical Physics Letters

https://doi.org/10.1134/S1063785020030050

GaN heterostructures on silicon substrates have been

grown by metalorganic chemical vapor deposition.

Transistors with the gate periphery of 1.32 mm are

designed. The saturation power of the package die at

a frequency of 1 GHz was 4 and 6.3 W at supply

voltages of 30 and 60 V, respectively. The maximum

drain efficiency is 57%.

Modeling the Influence of the Acceptor-Type Trap on

the 2DEG Density for GaN MIS-HEMTs State Key Laboratory of Electronic Thin Films and Integrated

Devices, University of Electronic Science and Technology of

China, Chengdu 610054, China

Science and Technology on Monolithic Integrated Circuits

and Modules Laboratory, Nanjing Electronic Devices

Institute, Nanjing 210016, China

IEEE Transactions on Electron Devices

https://doi.org/10.1109/TED.2020.2986241

In this article, an analytical model on the influence of

the acceptor-type trap on the 2-dimensional electron

gas (2DEG) density is proposed for GaN metal-

insulator-semiconductor high electron mobility

transistors (MIS-HEMTs). Based on the charge-control

method, a numerical analysis of the 2DEG in both the

subthreshold and above-threshold regions is carried

out with the deep-level and band-tail acceptor-type

traps at the AlGaN/insulator interface and the

AlGaN/GaN interface. In particular, the influence of

the acceptor-type trap on the 2DEG density and the

gate-control capability in the subthreshold region is

modeled for the first time. The results have shown

that the acceptor-type trap plays an important role in

weakening the gate-control capability of the 2DEG

density in the subthreshold region. The experimental

results, together with the modeling and numerical

calculations, have shown consistent 2DEG density

values under various gate voltages, which verify the

proposed model.

Ohmic Contacts to Gallium Nitride-Based Structures PC “OKB-Planeta”, 173004, Velikii Novgorod, Russia

Yaroslav-the-Wise Novgorod State University, 173004,

Velikii Novgorod, Russia

Semiconductors

https://doi.org/10.1134/S1063782620030197

Studies of the characteristics of ohmic contacts to

epitaxial and ion-doped gallium-nitride layers, based

on the Cr/Pt/Au metallization system, are reported.

The possibility of forming low-resistance contacts

without the application of high-temperature

treatment is shown. It is demonstrated, for

AlGaN/GaN-based heterostructures, that the

characteristics of Ti/Al/Ni/Au ohmic contacts are

improved upon using ion implantation through a

silicon-dioxide mask.

Enhancement of electron transport properties of

InAlGaN/AlN/GaN HEMTs on silicon substrate with

GaN insertion layer Department of Materials Science and Engineering, National

Chiao Tung University, Hsinchu 30010, Taiwan

Institute of Lighting and Energy Photonics, College of

Photonics, National Chiao Tung University, Tainan 71150,

Taiwan

International College of Semiconductor Technology,

National Chiao Tung University, Hsinchu 30010, Taiwan

Department of Electronics Engineering, National Chiao Tung

University, Hsinchu 30010, Taiwan

Applied Physics Express

https://doi.org/10.35848/1882-0786/ab8b51

InAlGaN/AlN/GaN high electron mobility transistors

(HEMTs) on a silicon substrate with high electron

mobility is demonstrated for the first time. The

InAlGaN/AlN/GaN heterostructures has a high

electron mobility of 1540 cm2 V−1 s−1 and low sheet

resistance of 228.2 Ω sq−1 by inserting a thin GaN

interlayer (IL) between InAlGaN and AlN layers. The

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experimental results demonstrate that an optimized

GaN IL contributes to a better atomic arrangement of

the InAlGaN barrier layer in the InAlGaN/GaN HEMTs

and results in better electron transport properties for

the device. The InAlGaN/GaN device with 170 nm gate

and 2 μm source-to-drain distance shows a high

maximum current density (Imax) of 1490 mA mm−1

and high transconductance (gm) of 401 mS mm−1.

Such results demonstrate the potential of adopting

InAlGaN/GaN heterostructure on silicon for low cost

mm-wave applications in the future.

Switching Transient Analysis and Characterization of

an E-Mode B-Doped GaN-Capped AlGaN DH-HEMT

with a Freewheeling Schottky Barrier Diode (SBD) S.K.P Engineering College, Tiruvannamalai, India

Karpagam College of Engineering, Coimbatore, India

Anil Neerukonda Institute of Technology and Sciences,

Visakhapatnam, India

Lovely Professional University, Jalandar, India

Bannari Amman Institute of Technology, Sathyamangalam,

India

Motilal Nehru National Institute of Technology, Allahabad,

UP, India

Journal of Electronic Materials

https://doi.org/10.1007/s11664-020-08113-x

This paper presents a systematic study of

Al0.23Ga0.77N/GaN/AlxGa1−xN double-

heterojunction high-electron-mobility transistors (DH-

HEMTs) with a boron-doped P+ GaN cap layer under

the gate. The boron-doped GaN cap layer shows great

potential to form a high-bandgap Schottky gate in DH-

HEMT devices to increase the resistivity of the GaN cap

with excellent structural characteristics. Thus, the

polarization-induced field in the GaN cap layer can be

used to raise the conductive band of the device in the

normally OFF operation. In this paper, these

AlGaN/GaN power-switching devices with

freewheeling Schottky barrier diodes are examined in

their working states. In comparison with conventional

HEMT power devices, the HEMT with a B-doped GaN

cap offers the lowest switching charges, area-specific

ON-state resistance, and energy losses. Therefore, this

study clearly shows the advantage of GaN transistors

for power electronics applications.

Interfacial N Vacancies in GaN/(Al,Ga)N/GaN

Heterostructures Department of Applied Physics, Aalto University, P.O. Box

15100, FI-00076 Aalto, Finland

Department of Physics and Helsinki Institute of Physics,

University of Helsinki, P.O. Box 43, FI-00014 Helsinki,

Finland

Electrical and Computer Engineering Department,

University of California, Santa Barbara, California, USA

PHYSICAL REVIEW APPLIED

https://doi.org/10.1103/PhysRevApplied.13.044034

We show that N-polar GaN/(Al,Ga)N/GaN

heterostructures exhibit significant N deficiency at the

bottom (Al,Ga)N/GaN interface, and that these N

vacancies are responsible for the trapping of holes

observed in unoptimized N-polar GaN/(Al,Ga)N/GaN

high electron mobility transistors. We arrive at this

conclusion by performing positron annihilation

experiments on GaN/(Al,Ga)N/GaN heterostructures

of both N and Ga polarity, as well as state-of-the-art

theoretical calculations of the positron states and

positron-electron annihilation signals. We suggest that

the occurrence of high interfacial N vacancy

concentrations is a universal property of nitride

semiconductor heterostructures at net negative

polarization interfaces.

Design and Analysis of AlGaN/GaN Based DG

MOSHEMT for High-Frequency Application Department of Electronics and Communication

Engineering, National Institute of Technology, Kurukshetra,

Haryana, India

Transactions on Electrical and Electronic Materials

https://doi.org/10.1007/s42341-020-00196-x

In this work, AlGaN/GaN based DG MOSHEMT is

designed at 0.8 µm gate length with Al2O3 gate

dielectric. The key device performance parameter

such as gm, AV, fT, and fmax has been investigated

using 2D Mixed-Mode Sentaurus TCAD device

simulation. The use of the double heterostructure

helps to achieve higher on-current. We observe a

double hump type feature in transconductance which

is attributed to occurrence of the double 2-DEG,

resulting in better device linearity. Further, the double

gate structure is responsible for nearly ideal

subthreshold slope (~ 59.94 mV/dec) and higher

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Ion/Ioff ratio (> 1016). Moreover, the device offers

comparable cut-off frequency (19.25 GHz) and

maximum-oscillation frequency (66.95 GHz) to the

existing Al2O3/AlGaN/GaN based SG MOSHEMT

alongwith tremendous improvement in terms of

intrinsic gain (~ 76 dB). Furthermore, enhancement of

the device performance (fT = 122.44 GHz and

fmax = 163.07 GHz) is achieved by scaling down the

gate length from 0.8 µm to 100 nm. These results

indicate that Al2O3/AlGaN/GaN based DG MOSHEMT

can be possible alternative for millimeter and

microwave frequency applications.

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PRESS RELEASE Technical and economic information selected by Knowmade

ELECTRONICS

Boosting output power in aluminium gallium nitride channel transistors SemiconductorToday

Ohio State University and University of South Carolina in

the USA claim the highest radio frequency (RF) output

power density ever reported for aluminium-rich aluminium

gallium nitride (AlGaN)-channel transistors [Hao Xue et al,

IEEE Electron Device Letters, published 3 March 2020]. The

power density was 2.7W/mm at 10GHz.

AlGaN is a natural progression from the GaN transistors

being developed for high-voltage/high-power/high-

frequency switching and amplification deployment. As the

Al-content of the AlGaN alloy increases, the bandgap

increases, along with the correlated critical electrical

breakdown field.

The researchers used a ‘micro-channel’ heterostructure

field-effect transistor (HFET) architecture to enhance

electron injection by the source contact. The researchers

comment: “Here we show the challenges of high contact

resistance can be mitigated to a significant extent by

increasing the relative periphery of contacts through the

use of multi-constriction channels.”

The researchers used metal-organic chemical vapor

deposition (MOCVD) to prepare an epitaxial sample on

sapphire (Figure 1). The 50nm Al0.65Ga0.35N barrier was

doped with silicon (Si) at a nominal concentration of

2x1018/cm3.

Fabrication began with ohmic contact formation: surface

oxide removal using hydrochloric acid solution, electron-

beam evaporation deposition of

zirconium/aluminium/molybdenum/gold, and 900°C

annealing for 45 seconds in nitrogen.

Next, the team performed plasma etch to create the mesa

device isolation. A hard mask to protect the micro-channel

regions, consisting of 50nm silicon dioxide, was deposited

Figure 1: (a) Device scheme. (b) Cross-

sectional view. (c) Top-view scanning

electron micrograph before SiN passivation

showing device geometry of 1:6 (active/non-

active region) and device dimensions.

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using plasma-enhanced CVD (PECVD). Further plasma etch removed the AlGaN barrier layer except for the micro-

channel. After etch, the hard mask was removed with a buffered oxide etch.

The T-gate of the device consisted of nickel/gold patterned and formed using electron-beam lithography and lift-

off processing. Device passivation was supplied by a 200nm layer of silicon nitride (SiN) deposited using PECVD.

The gate-source, gate-drain and source-drain spacings were 0.5μm, 1μm and 1.6μm, respectively. The gate length

(Lg) was 100nm. The width of the individual micro-channels was 1μm. The effective channel width of the complete

device was 15.6μm. The device width, including non-active regions, was 100μm.

A 900mA/mm maximum drain current density, normalized to the effective width, was achieved at 10V drain bias

and 2V gate potential. Comparison planar HFETs achieved 480mA/mm, normalized to the total width. The on-

resistance was 6.35Ω-mm for the micro-channel devices, while the conventional HFETs registered 11.9Ω-mm with

the gate at 2V.

The 140mS/mm peak transconductance of the micro-channel transistors was an 80% improvement over the

conventional devices. The team credits superior source electron injection for the enhanced performance.

The breakdown voltages with a 10mA/mm threshold were 80V and 33V for the micro-channel and conventional

HFETs, respectively. The gate was set at -15V. The drain current varied over a wider range in the conventional

HFET, starting from around 10-3mA/mm and progressing up to 10mA/mm. By contrast, the micro-channel device

varied just an order of magnitude before reaching the breakdown threshold.

The researchers comment: “Clearly, the breakdown of planar devices is dominated by the drain-induced barrier

lowering (DIBL) effect with an onset bias of ~3.5V that is suppressed in micro-channel devices. Therefore, we

attribute this to the improvement of short-channel effect in micro-channel HFETs.”

The micro-channel HFET suffered from a high gate leakage over that range to breakdown, attributed to surface

states at the plasma-etch fin sidewalls.

Figure 2: RF output power (Pout), associated gain, and PAE at 10GHz of (a) micro-channel and (b) planar

HFETs.

Small-signal RF measurements gave cut-off (fT) and maximum oscillation (fmax) values of 20GHz and 36GHz,

respectively, for the micro-channel HFET. The corresponding values for the conventional HFET were 25GHz and

30GHz. The bias point was -2V on the gate and 13V on the drain. The team suspects that parasitic capacitance is

responsible for the lower fT of the micro-channel device. The low fTxLg product for both devices is blamed on the

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high sheet resistance of AlGaN and the large source-drain distance of 1.6μm. Scaling would improve the RF

performance, it is suggested.

Large-signal continuous-wave load-pull measurements gave a power density of 2.7W/mm for the micro-channel

HFET at -1.5V gate and 30V drain bias. The conventional device achieved 0.85W/mm at -1.5V gate and 15V drain

bias.

The team reports: “The RF output power of Al0.65Ga0.35N/Al0.4Ga0.6N micro-channel HFETs reported here is

the highest value ever reported of Al-rich AlGaN channel transistors.”

The micro-channel power-added efficiency (PAE), however, was only 4%. This is attributed to low power gain and

gain compression effects. The researchers point to a trade-off between current density and device peripheral

dimensions.

The team writes: “For practical applications, depending on the target current and power level, the chip size may

be larger. However, these questions can be better answered down the road as the device technology becomes

more mature.”

Transphorm introduces SuperGaN power FETs with launch of Gen IV GaN platform SemiconductorToday

Transphorm Inc of Goleta, near Santa Barbara, CA, USA — which designs and

manufactures JEDEC- and AEC-Q101-qualified 650V gallium nitride (GaN) field-effect

transistors (FETs) — has announced availability of its Gen IV GaN platform.

Transphorm’s latest technology offers advances in performance, designability and

cost compared with its previous GaN generations. Transphorm has also announced

that Gen IV and future platform generations will be called SuperGaN technologies.

The first JEDEC-qualified SuperGaN device will be the TP65H300G4LSG, a 240mΩ 650V GaN FET in a PQFN88

package. The second SuperGaN device is the TP65H035G4WS, a 35mΩ 650V GaN FET in a TO-247 package. These

devices are currently sampling and will be available in second-quarter and third-quarter 2020, respectively. Target

applications include adapters, servers, telecoms, broad industrial and renewables. System designers can assess

the technology in Transphorm’s TDTTP4000W066C-KIT 4kW bridgeless totem pole AC-DC evaluation board.

SuperGaN technology

When designing Gen IV, Transphorm’s engineering team drew on learnings from production ramps of previous

products, coupled with a drive for performance, manufacturability and cost reduction to design a new product

with simplicity and substantial improvements. The new platform’s patented technology delivers benefits that

augment Transphorm’s intrinsic GaN performance and simplicity both in assembly and applications, which is the

catalyst for the SuperGaN brand, the firm says.

Driven by its patented technology, SuperGaN Gen IV benefits are said to include:

• increased performance: Gen IV provides a flatter and higher efficiency curve with an improved figure of

merit (RON*QOSS) of about 10%.

• easier designability: Gen IV offers increased simplicity of design-in by removing the need for a switching

node snubber at high operation currents;

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• enhanced inrush current capability (di/dt): Gen IV removes the switching current limits for the built-in

freewheeling diode function in half bridges;

• reduced device cost: Gen IV’s design innovations and patented technology simplify device assembly too -

the resulting cost adjustments continue to bring Transphorm’s GaN closer to silicon transistor pricing;

• proven robustness/reliability: Gen IV’s 35mΩ FET offers the same gate robustness of +/-20Vmax and noise

immunity of 4V that is currently delivered by Transphorm’s Gen III devices.

“We expect Transphorm’s SuperGaN FETs to continue to impact next-gen power electronics as the evolution of

silicon superjunction MOSFETs did,” says Philip Zuk, the firm’s VP of worldwide technical marketing and NA sales.

“Our Gen IV GaN platform is creating new design opportunities in other power stages through better performance

while increasing customers’ overall ROI,” he adds. “Our ability to reduce losses and bring the initial device

investment down closer to what customers are used to with silicon without sacrificing reliability is another

indicator that GaN’s position in the marketplace is strengthening.”

Empower RF Systems launches 10kW pulsed S-band GaN-on-SiC solid-state amplifier for radar and jamming SemiconductorToday

Empower RF Systems Inc of Inglewood, CA and Holbrook, NY, USA (which produces RF and

microwave power amplifiers for defense, commercial and industrial applications) has launched

the Model 2213, a compact solid-state gallium nitride on silicon carbide (GaN-on-SiC) amplifier

delivering 10kW of peak pulsed power (with 6% duty cycle).

Bringing sophisticated monitoring, protection and control functions to mission-critical applications, the air-cooled

intelligent amplifier system has flexible software and embedded firmware that can be customized to add mission

support capabilities specific to the user’s integrated system. Remote control and monitoring is included.

The 2213 is based on Empower’s established and field-proven next-generation architecture that is tactically

deployed and operating on multiple levels in support of a variety of critical US Department of Defense (DOD)

missions.

The 2213 comes complete with internal directional coupler, external forward and reverse sample ports, and an

easy-to-use web graphical user interface (GUI). In-depth health monitoring with alarms visible on the front panel

are also pushed out via the LAN port. For critical ‘on air’ applications, the 2213 provides ‘Graceful Output Power

Degradation’, backing down power to a safe operating level in the event of component failure or excessive load

VSWR (voltage standing wave ratio) condition.

Magnesium thermal diffusion for normally-on gallium nitride transistors SemiconductorToday

South China University of Technology has developed a simplified fabrication process for normally-off aluminium

gallium nitride (AlGaN)-barrier GaN-channel high-electron-mobility transistors (HEMTs) with p-type gate stack

[Lijun Wan et al, Appl. Phys. Lett., vol116, p023504, 2020]. The p-type doping under the gate electrode was

achieved by magnesium (Mg) thermal diffusion rather than the more usual inclusion as a precursor in the epitaxial

material growth process.

The team comments: “The presented technique is commercially promising in the manufacturing of normally-off

HEMTs with outstanding low gate leakage performance.”

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The method successfully increased the threshold voltage into positive values, creating a normally-off device, as

desired for decreased power consumption and fail-safe operation in high-voltage power switching circuits. Also,

the normally-off mode simplifies gate-driver circuit design.

Without special measures, the two-dimensional electron gas (2-DEG) channel that forms near the AlGaN/GaN

interface conducts when the gate potential is 0V, giving a normally-on mode

The device was based on epitaxial material with 4.7μm buffer, 300nm undoped GaN channel, 15nm

Al0.15Ga0.85N barrier, and 2nm GaN cap layers on silicon.

The transistor fabrication began with 5s inductively coupled plasma (ICP) etch in the gate region, before depositing

a 50nm layer of Mg with electron-beam evaporation. The underlying AlGaN was p-type doped with the Mg by

rapid thermal annealing at 600°C for a minute. Further annealing in air at 250°C for a minute created a magnesium

oxide (MgO) passivation layer.

The source-drain ohmic contacts consisted of annealed titanium/aluminium/nickel/gold. Mesa etching with ICP

formed the electrical isolation of the devices. A nickel/gold gate electrode on the MgO completed the transistor.

The rapid ICP etch before Mg deposition roughens the surface and introduces defects, allowing the metal atoms

to penetrate/diffuse more deeply into the AlGaN barrier layer in the gate region during the thermal anneal.

Atomic force microscopy suggested that the etch depth was around 6nm, removing the GaN cap and partially

etching the AlGaN.

Three device types were tested (Figure 1): A was a conventional HEMT without ICP etch or Mg diffusion; B was a

HEMT with ICP etch, recessing the gate, but no Mg in the gate region; and, finally, C had the full gate stack with

ICP etch and Mg diffusion.

Figure 1: Schematics of (a) bare-bones as-grown device A, (b) device B with etched recessed gate, and (c)

device C with Mg diffused gate stack after etching treatment.

The threshold voltages for transistors A-C, in order, were -1.5V, -0.4V, and +1.4V. The corresponding peak

transconductances were 68, 105, and 97mS/mm. In short, the gate stack process transformed the normally-on A

transistor into a normally-off device, as desired. Although the gate control, as represented by the peak

transconductance, fell back somewhat for device C, the value was still higher than for the bare-bones HEMT A.

The process did hit the drain saturation current from 275mA/mm and 300mA/mm for devices A and B,

respectively, with C only managing 173mA/mm. The gate potential in these measurements was +3V. The

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researchers comment: “The lower saturation current may be caused by the decrease in 2-DEG which is depleted

by the holes injected from the Mg-diffused layer.”

Figure 2: Gate current density (IGS) as function of voltage (VGS) for devices A-C.

The gate leakage currents with 0V gate were 3.7x10-5mA/mm and 2x10-7mA/mm for devices B and C, respectively

(Figure 2). Transistor C still had only 6.5x10-4mA/mm gate leakage with the gate at +0.4V. The researchers credit

the passivating effect of MgO on surface traps states from the etch processing for the good performance.

Power Integrations adds new PowiGaN devices to InnoSwitch3-MX isolated switcher IC family, increasing output of display PSUs to 75W SemiconductorToday

Power Integrations of San Jose, CA, USA, which provides high-voltage integrated circuits

for energy-efficient power conversion, says that its InnoSwitch3-MX isolated switcher IC

family has been expanded with the addition of three new PowiGaN devices. As part of a

chipset with its InnoMux controller IC, the new switcher ICs now support display and

appliance power supply unit (PSU) applications with a continuous output power of up to 75W without a heatsink.

The InnoMux chipset employs a unique single-stage power architecture that reduces losses in display applications

by 50% compared with conventional designs, increasing overall efficiency to 91% in constant-voltage and

constant-current LED backlight driver designs. Additionally, by eliminating the need for post-regulation (i.e. buck

and boost) stages, TV and monitor designers can halve component count, improving reliability and reducing

manufacturing cost. With a high breakdown voltage of 750V, the PowiGaN InnoSwitch3-MX parts are also

extremely robust and highly resistant to the line surges and swells commonly seen in regions with unstable mains

voltages.

InnoSwitch3-MX flyback switcher ICs combine the primary switch, the primary-side controller, a secondary-side

synchronous rectification controller, and the firm’s FluxLink high-speed communications link. The InnoSwitch3-

MX receives control instructions from its chipset partner InnoMux IC, which independently measures the load

requirements of each output and directs the switcher IC to deliver the right amount of power to each output,

maintaining accurate regulation of current or voltage.

“By using our PowiGaN technology we are able to address higher-output applications in TVs, monitors and

appliances that employ LED displays,” says product marketing manager Edward Ong. “The chipset increases

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efficiency beyond the requirements of all mandatory regulations and improves manufacturers’ scores in EU

efficiency labeling programs.”

Samples of the INN3478C, INN3479C and INN3470C InnoSwitch3-MX ICs are available now with prices starting at

$2.52, $3.14 and $3.71 respectively in 10,000-piece quantities. Technical support for the chipset is available from

the Power Integrations website at https://ac-dc.power.com/products/innomux-family.

Sanan IC enhances foundry platform for wide-bandgap power semiconductors SemiconductorToday

Sanan Integrated Circuit Co Ltd (Sanan IC) of Xiamen City, Fujian province (China’s

first 6-inch pure-play compound semiconductor wafer foundry) has announced

worldwide access to its growing portfolio of wide-bandgap power electronics

foundry services for 650V and 1200V silicon carbide (SiC) devices, and 650V gallium nitride (GaN) power high-

electron-mobility transistors (HEMTs).

“Sanan IC’s parent company Sanan Optoelectronics Co Ltd has extensive high-volume compound semiconductor

manufacturing experience, which inspired us to start building our own line of wide-bandgap semiconductor

technologies for power electronics,” says Sanan IC’s CEO Raymond Cai. “The power industry needs access to

cutting edge foundry services,” he adds. “Sanan IC’s capabilities provide high-growth power markets with a

comprehensive platform for product prototyping, combining reduced entry barrier and mass production with

unmatched service, security and quality control.”

The power GaN market is rising at a compound annual growth rate (CAGR) of 55% between 2017 and 2023,

forecasts analysts firm Yole Développement in its November 2019 report ‘Power GaN 2019: Epitaxy, Devices,

Applications & Technology Trends’. Also, the power SiC market is growing at a CAGR of 29% over 2018-2024,

according to Yole’s July 2019 report ‘Power SiC 2019: Materials, Devices and Applications’.

Initiated by the adoption of GaN solutions by top smartphone vendors and SiC in big-data markets, both

technologies are recognized by the power device industry for reshaping system design. Sanan IC therefore aims

to bolster GaN and SiC technology evolution. With comprehensive power electronics foundry services, extensive

experience in mass production, and compliance with quality and security standards, Sanan IC aims to partner on

applications including:

• electric vehicles (EV) and hybrid electric vehicles (HEV);

• uninterruptible power supplies (UPS) with power factor correction (PFC);

• power adapters and battery charging;

• photovoltaic inverters and energy storage;

• motor drives.

In June 2019, Sanan IC released G06P111, a standard JEDEC-qualified 650V enhancement-mode HEMT (E-HEMT)

GaN process technology. Since then, Sanan IC has developed several multi-project wafer (MPW) shuttle runs for

GaN process. Using Sanan IC’s process design kits (PDKs) and e-foundry services, designers can take advantage of

GaN device design and performance that ensures first-time-right designs before mass production, says the firm.

This year Sanan IC plans to provide MPW runs for a much wider selection of technologies, including services for

200V and 100V low-voltage E-HEMT process, and the M3 process for large-current design. There are plans to

develop additional technologies such as GaN integrated circuits and highly reliable depletion-mode (D-mode)

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metal-insulator-semiconductor field-effect transistors (D-MISFETs), scheduled to be added to Sanan IC’s power

portfolio later this year.

Dual-layer silicon nitride for threshold engineering gallium nitride transistors SemiconductorToday

Researchers from China, USA and Canada have used two silicon nitride (SiNx) layers on gallium nitride (GaN) high-

electron-mobility transistors (HEMTs) to push the threshold 1V in the positive direction, while reducing off-state

leakage and maintaining on-current [Wei-Chih Cheng et al, Semicond. Sci. Technol., vol35, p045010, 2020]. The

dual-layer SiNx acts as a stressor, depleting the two-dimensional electron gas (2-DEG) channel under the gate,

and as passivation to reduce off-state leakage through the aluminium gallium nitride (AlGaN) barrier layer.

GaN HEMTs are being developed for high-voltage, high-density, high-frequency power switching and radio-

frequency (RF) wireless transmission amplification. Although the presented devices were all normally-on

(depletion-mode), more positive threshold voltages could eventually lead to normally-off (enhancement-mode)

transistors, which reduce power consumption and allow fail-safe high-voltage operation.

The team involved researchers from Southern University of Science and Technology (SUSTech) in China, Hong

Kong University of Science and Technology (HKUST) in Hong Kong, China, Washington State University in the USA,

University of British Columbia in Canada, GaN Device Engineering Technology Research Center of Guangdong in

China, and Key Laboratory of the Third Generation Semi-conductor in China.

The researchers comment: “This Vth increase without recess etching processes or any observable compromises

of the gate leakage, DC and RF amplification performance supports strain engineering as an effective approach in

pursuing enhancement-mode AlGaN/GaN HEMTs for RF applications.”

Figure 1: Device structure of AlGaN/GaN HEMT showing gate (Lg), source-to-gate (Lsg), and gate-to-drain (Lgd)

lengths/spacings. Channel consisted of unintentionally doped GaN (i-GaN).

The epitaxial material used for the transistors was grown by metal-organic chemical vapor deposition (MOCVD)

on 6-inch-diameter <111> silicon at Enkris Semiconductor. The devices (Figure 1) were electrically isolated using

inductively couple plasma mesa etching. Annealed titanium/aluminium/titanium/gold formed the ohmic source-

drain contacts. The gate consisted of patterned nickel/gold.

The two layers of silicon nitride (SiNx) were deposited using dual-frequency plasma-enhanced chemical vapor

deposition (PECVD). The low-stress passivation layer has an unintentional tensile stress of 0.3GPa. The layer used

a process avoiding the low-frequency plasma excitation step, to reduce surface damage from nitrogen ion

bombardment. The addition of low-frequency plasma excitation for the second layer produced a high-

compressive-stress -1GPa film.

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The presence of 200nm stressed SiNx enabled the threshold voltage (Vth) to be pushed 1V in the positive

direction. Combining the stressor with a 14nm passivation layer increased the on-current to the level of a baseline

(BSL) device, which had a 200nm SiNx passivation layer without stressor.

Simulations suggested that the increased threshold derived from electron depletion under the gate caused by the

applied compressive stress counteracting the piezoelectric effects of the AlGaN barrier. The tensile stress of the

passivation layer only added a negligible amount of electron accumulation, according to the model.

The combined 200nm/14nm stressor/passivation transistor achieved a maximum on-current of 1A/mm (Figure

2). The peak transconductance was 280mS/mm with 7V drain bias, putting the device in the saturation region.

The drain current was comparable with the BSL transistor, while the transconductance was higher by around

30mS/mm.

Figure 2: (a) Transfer characteristics of BSL and strained devices at 7V drain bias. (b) H21 current gain of BSL

and strained devices biased to 7V drain and 1V above gate threshold.

RF measurements gave a cut-off (fT) of 36GHz, while the stressed device without passivation only achieved 20GHz.

The BSL component had a comparable fT of around 36GHz.

The researchers attribute the good performance of the combined stressor/passivation HEMT process to the

avoidance of surface damage in the first PECVD step. Surface damage also adversely affected the off-current (Ioff)

in the stressed devices without passivation. Adding passivation thicker than 7nm reduced the off-current leakage

even below that of the BSL device.

The team summarizes: “From the above data, the devices with 14nm interlayers had the best performance

(comparable DC and RF amplification performance, one to three orders of magnitude lower Ioff and 1V higher Vth

compared with the baseline devices).”

The researchers also produced micron-scale devices, with 2μm gate and 10μm gate-drain, that were expected to

have less effective stressing, which was confirmed by the performance being similar with respect to the BSL

architecture in terms of off-current leakage.

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AI-based soft-switching controller enables more efficient power converters EETimes

Reliable power converters can reduce the costs of an entire system. New digital control

techniques help engineers and device manufacturers improve conversion efficiency,

reduce power loss, weight, and costs. Pre-Switch, Inc., has developed what it claims is

the first AI-based DC/AC, AC/DC soft-switching controller to deliver that reliability and

efficiency.

Pre-Switch uses artificial intelligence to constantly adjust the relative timing of

elements within the switching system required to force a resonance to offset the

current and voltage waveforms — thereby minimizing switching losses.

Over time, the focus for power devices has been directed towards leakage removal, and using higher performance

semiconductor materials than silicon, such as SiC and GaN.

The need for power converters is only growing. For example, according to the latest Global Solar Demand Monitor

published by GTM Research, annual solar system installations will remain above 100 GW by 2022. The growth in

electricity production from solar PV is accelerating to meet the global demand for clean energy. All that power

must be processed, controlled and distributed, and converted by power electronics and power semiconductors.

In Pre-Switch’s case, its capability is bringing soft-switching to DC/AC and AC/DC inverters which significantly

increases switching frequencies while reducing transistor cost. The technology has reduced the size, weight and

system costs for industrial applications.

Hard and soft switching

When the transistor is on or off, the transition time needed to reach the next working state is very short, but it is

not instantaneous and produces waste energy (switching losses). Switching losses are responsible for a large

percentage of power converter losses.

Hard-switching is simply forcing the transistor to turn on and off by adding current or voltage to enable the

modified states. Hard switching stresses transistors and shortens their life span.

Power converters using hard-switching must balance the increase in switching frequencies with the need for

losses to meet desired system efficiencies. In practice, this means that systems that require high efficiencies have

to switch slowly to gain efficiency. Designers must employ larger energy storage solutions to maintain power for

a longer period of time between transistor switching cycles.

The reduction of the switching frequency implies an increase in harmonic distortion, resulting in the use of output

filters.

In practice, hard-switching limits the maximum working switching frequency of transistors. Transistors have a

maximum in terms of heat to dissipate which must be managed effectively between the various losses involved.

Increasing the switching frequencies to reduce the size of a system means that the transistor must carry less

working current to withstand the higher switching losses. This can be solved by adding a larger transistor with

additional costs to the system. Without the switching losses the transistors would be free to switch much faster

or handle more current for high-power applications (figure 1).

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The concept of soft-switching, on the other hand, is to use an external circuit to avoid the overlapping of voltage

and current waveforms when switching transistors. There are two types: self-resonant and forced resonance. In

the first case, there is a self-oscillating circuit and this results in a reduction in switching losses, an increase in

efficiency and a reduction in electromagnetic interference. The application disadvantage limits it in the power

converter market for DC/DC converters.

Forced resonance soft switching topologies have the same advantages as the previous one, but are

computationally demanding, cumbersome and with limited adaptability to different input conditions and load

ranges.

Figure 1: hard-switching architecture [Source: Pre-Switch Inc.]

AI for the switching technique

In recent years, many AC/DC, DC/DC, DC/AC solutions have focused on the development of faster switching

devices with lower conduction losses and the development of new switching topologies. IGBTs are still a standard

used in various converter solutions, with SiC and GaN becoming more and more prevalent as costs are reduced.

There are many available layout technologies, and engineers can optimize their solutions according to the

application.

Field stop trench IGBTs offer a significant improvement in terms of loss reduction. Most of the latest generation

IGBTs from leading manufacturers use combinations of structure geometry to allow for optimized energy

concentration.

However, material limitations and additional implementation costs for newer and more sophisticated

manufacturing processes still represent a challenging barrier to optimal system efficiency improvement with

traditional components.

In high-voltage applications, the use of GaN and SiC solutions is growing in popularity, because they offer reduced

switching losses and therefore the option of increased switching frequencies. The immediate impact of the

increase in operating frequency would have a tangible effect on the solar inverter market, for example, with what

could be a drastic reduction in output inductor size, weight, and cost.

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Increasing the frequency implies the need to contain noise and its transients. Large-scale use of new power

switches could remain out of reach if the operation of power converters remains tied to traditional switching

architectures.

“By reducing the frequency, we enter the soft-switching market. Soft-switching is still only used in self-resonating

DC/DC power converters. Isolated soft-switching DC/AC power converters have never been perfected, which is

why energy engineers call soft switching for high power AC/DC the “Holy Grail” of power electronics,” said Bruce

Renouard, CEO at Pre-Switch. However, simply increasing the transistor transition times with faster devices results

in intolerable levels of dV/dt and EMI.

Pre-Switch has solved the problems of soft-switching by employing built-in AI circuitry (called Pre-Flex) that

precisely controls and adjusts the timing of a very small, low-cost resonant circuit to ensure minimal overlapping

of the current and voltage waveforms of the switching devices.

Soft-switching with built-in AI enables a 70-95% reduction in switching losses and solves dV/dt problems

associated with faster transistors.

“Pre-Switch guarantees accurate soft-switching and reduced EMI, at higher switching frequencies than ever

before,” said Bruce Renouard

The Pre-Flex integrated circuit learns and adapts to the changing system inputs and device conditions on a cycle

by cycle basis to ensure optimal soft switching. In practice, it locks each transistor into reliable forced resonant

soft-switching despite variations in input voltages, output loads, system temperatures, and manufacturing

tolerances (Figure 2).

Figure 2: Pre-Switch architecture [Source: Pre-Switch Inc.]

The technology has been used to switch 600V IGBT transistors at more than 100kHz and 900V silicon carbide

transistors at 1 MHz. The addition of this device has insignificant costs savings when compared at the system-

level. Additionally, Pre-Switch technology can be used to upgrade existing hard-switch systems in the field. Pre-

Flex has been integrated into a standard driver board for a 1200V 225A EconoDUAL in a half-bridge configuration.

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“Pre-Flex is designed to work with either a half-bridge, full-bridge or three-phase configuration power converters.

Each IC includes a built-in serial communications port to communicate fault conditions and also includes Pre-

Switch Blink™, which ensure maximum safety features on a cycle-by-cycle basis. The Pre-Flex IGBT family is

frequency-limited to 100 kHz and typically eliminates 70-85% of system switching losses. The Pre-Flex SiC/GaN

family is frequency-limited to 1Mhz and typically eliminates 90-95% of total switching losses in the system

including the overhead of the extra devices. Additionally, the architecture has a built-in lossless dV/dt filter,” said

Bruce Renouard.

The use of Pre-Flex has shown a clear improvement in the main parameters, as shown in Table 1. X-Factor is a

normalized coefficient that Indicates how many times faster a device can be switched using Pre-Switch AI control

algorithm technology for the same losses when compared to the same device being hard-switched. This factor

provides an indication of improved performance in terms of both current and switching frequency.

Table 1: Data analysis with consequent improvements in the Pre-switching technique [Source: Pre-Switch Inc.]

“Pre-Switch is enabling customers to build systems with switching frequencies 4X-5X faster than their hard-

switched IGBT systems and 35X faster than their hard-switched SiC and GaN systems: this is achieved with half

the transistor count. In the case of a SiC-based EV inverter, increasing the switching frequency from the ubiquitous

10kHz up to 100kHz or 300kHz creates a near-perfect sine wave without any output filter. The result is the

elimination of unnecessary motor iron losses and increased motor efficiency at low torque and low RPM. Higher

switching frequencies also enable higher RPM motors that are lighter and lower cost,” said Bruce Renouard.

The CleanWave 200kW silicon carbide (SiC) automotive inverter evaluation system enables power design

engineers to investigate the accuracy of the company’s soft switching architecture and platform over varying load,

temperature, device tolerance, and degradation conditions. The platform includes the Pre-Drive3 controller

board, powered by the Pre-Flex FPGA, and the RPG gate driver board, together which virtually eliminates

switching losses, enabling fast switching at 100kHz. Double pulse test data demonstrated that the Pre-Switch

soft-switching platform reduces total system switching losses by 90% or more (figure 3).

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Figure 3: Signal Analysis and AI Control Behavior [Source: Pre-Switch Inc.]

At the first switching cycle 0 (corresponding when the “T” in the preview screen at the top left of figure 4), the AI

Pre-Switch controller evaluates multiple inputs and decides which mode the system is in and then makes a safe

but not optimized estimate of the resonance period needed for soft switching. All inputs and outputs are

accurately measured and stored for future learning. The AI will finely optimize the entire system after the

completion of another teach cycle.

In switching cycle 1, all AI inputs and outputs resulting from switching cycle 0 are again accurately measured and

analyzed. The IA will again output the second period of conservative resonance time similar to switching cycle 0

to ensure safe but not optimized soft-switching.

Subsequently, the AI algorithm predicts the optimized resonance time to ensure complete soft-switching with

minimal loss in all aspects of the system. In subsequent stages, the system compares system inputs and the results

of previous switching cycles and adjusts the resonance time to fully optimize soft-switching with the increasing

load current (blue line).

System temperature changes, device degradation, and sharp current fluctuations are all considered and optimized

within the Pre-Switch AI algorithm.

“Compared to traditional topologies, Pre-Flex has demonstrated a drastic reduction in switching losses (70-95%),

a reduction in EMI, and a reduction in dV/dt. The technology allows low-cost IGBTs to compete favorably with

more expensive technologies such as SiC MOSFETs and allows SiC technologies to switch up to 20 times faster

than they do today, all while solving dV/dt and EMI problems generated as a by-product of hard-switching

architectures,” said Bruce Renouard.

The topology and Pre-Switch control algorithm can provide broad-spectrum performance, offering an overall

envelope for power loss reduction depending on the different operating points in each type of application.

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Eta demos GaN-on-GaN epitaxy of vertical power device structures SemiconductorToday

Vertical gallium nitride (GaN) power devices hold the potential to revolutionize the power

device industry, notes Eta Research of Shanghai, China, which was founded in 2015 to develop

free-standing GaN wafers. There is particular interest for higher-voltage applications (such as

600V and above) for vertical GaN devices. According to the physical properties of the materials,

GaN devices have a lower specific on-resistance for a given breakdown voltage compared with

traditional silicon power devices and newer native silicon carbide (SiC) power devices. As proof

of the material benefits, horizontal GaN power devices – namely GaN-on-Si HEMTs – have seen success in

competing with silicon in the low-voltage market.

It is expected that vertical GaN power devices will compete with native SiC power devices for the high-voltage

market. In the last two years, SiC devices have been gaining market share for high-voltage applications and several

companies have expanded the production of 6” and 8” SiC wafers. In contrast, vertical GaN power devices are not

yet sold commercially, and GaN wafers are available in 4” diameter from only a handful of suppliers. The expanded

supply and reliable quality of GaN wafers will be important for the development of vertical GaN power devices.

There are three potential advantages of GaN compared with SiC for high-voltage power devices. Firstly, for a given

breakdown voltage, the theoretical specific on-resistance is about an order of magnitude less. Therefore, the

power losses during forward bias could be reduced and the efficiency would be higher. Secondly, for a given

breakdown voltage and on-resistance, the device size will be smaller. The smaller size means that many more

devices can be made on a wafer, reducing the cost. Additionally, a smaller form factor is more desirable for most

applications. Lastly, GaN holds an advantage in the maximum frequency at which a power device can operate,

which is determined by both the materials properties and device design. Generally, for SiC the maximum

frequency may be about 1MHz or less. GaN power devices will be able to operate at much higher frequencies, at

least tens of MHz, which is a frequency range that is inaccessible to SiC. Higher-frequency operation is beneficial

to reduce the size of passive components, and thereby reduce the size, weight and cost of the power conversion

system.

Vertical GaN power devices are still in the R&D phase of development. There is no consensus within the GaN

research community regarding the optimal device structure for GaN vertical power devices. The three leading

potential device structures include the current-aperture vertical electron transistor, trench FET, and fin FET. All of

the device structures include a lightly doped N-layer as the drift layer. This layer is important because the thickness

of the drift layer determines the breakdown voltage of the device and the electron concentration has an important

role in achieving the theoretical lowest specific on-resistance.

Eta manufactures and sells 4” free-standing GaN wafers, which are available in both n-type conductivity and semi-

insulating form. The company also offers metal-organic chemical vapor deposition (MOCVD) epitaxy of GaN

structures on GaN wafers. Customers developing vertical GaN power devices have similar requirements for their

device structures, especially concerning the thickness and doping of the drift layer. First, the drift layer should

have a thickness of about 10μm or more, which is required to ensure that the breakdown voltage is sufficient to

meet the device design criteria. Next, the surface of the drift layer should be smooth enough to create planar

interfaces for the subsequent device layers. Last, the drift layer must have a low electron concentration, typically

in the range of 1E16–5E16/cm3.

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Figure 1: X-ray diffraction data.

The company has performed experiments for GaN-on-GaN epitaxy in the range of 10–20μm thickness. Figures 1

and 2 show the x-ray diffraction (XRD) data and wafer pictures for 20μm of GaN grown by MOCVD on a 2” GaN

wafer. A 9-point pattern was used for XRD measurement of the rocking curve FWHMs of the 002 and 102 peaks.

The average values of the rocking curve FWHMs before epitaxy were 49 arcsec and 69 arcsec for the 002 and 102

peaks, respectively. After the 20μm epitaxy, the rocking curve FWHMs were nearly identical, with average values

of 50 arcsec and 69 arcsec for the same two peaks. The bow of the wafer was slightly improved after epitaxy,

starting at –5.0μm before epitaxy and resulting in –1.3μm after epitaxy.

Figure 2: 2” GaN wafer before and after 20μm GaN epitaxy.

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A relatively smooth surface can be achieved by appropriate selection of the offcut. An offcut of 0.4° toward the

m-plane was selected. For 10μm film growth on the 0.4°-offcut GaN wafer, the average surface roughness was 8–

16nm, measured by Bruker optical interferometry over an area of 239μm x 318μm. Figure 3a shows an optical

Nomarski image of a featureless surface and Figure 3b shows the optical interferometry image.

Figure 3: (a) Nomarski optical microscope image, showing a relatively featureless surface. (b) Bruker optical

interferometer image of the epitaxy surface.

The low electron concentration of the drift layer may not be readily achievable under the typical MOCVD growth

conditions used for LEDs. The drift layer must also have a growth rate that is sufficiently high to obtain a thick

MOCVD layer within a reasonable time frame. The company has undertaken studies to achieve a low-electron-

concentration drift layer. The lowest electron concentration achieved has been 2E15/cm3, measured using the

capacitance–voltage (C–V) method. Additional silicon dopant can be added to the MOCVD growth to achieve

higher electron concentrations.

Eta is now able to offer GaN-on-GaN MOCVD epitaxy layers suitable for vertical GaN power devices. The GaN

homoepitaxy drift layers can be grown over 10μm thick with a relatively smooth surface and electron

concentration in the 1015–1016/cm3 range. Device structures can also be grown with multiple layers including

InGaN, AlGaN, n-type doping, and p-type doping. Other potential device structures include LEDs and lasers diodes

grown on n-type GaN wafers and HEMTs grown on semi-insulating GaN wafers.

The Year of the GaN Adapter and 5G’s Dirty Little Secret eedesignit

GaN is changing the way we power things, and that’s becoming increasingly evident

whether you look at consumer, automotive, 5G, or industrial power applications.

Take 5G — It’s high bandwidth and low latency. From the consumer standpoint, that means

fast video downloads with no lag.

But as Jim Witham, CEO of GaN Systems, says, “The dirty little secret with 5G is that big data is done at high

frequency at approximately 28 gigahertz, and 28 gigahertz doesn’t go through the wall. It doesn’t go through

windows that have low emissivity glass because there’s metal in it. It bounces and goes right back out. We use

our computers inside, we use our phones inside. They’re supposed to work on a problem that the industry has to

solve, and we’re helping solve that.”

The sense of being on a problem-solving mission is obvious for GaN Systems this year.

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“2020 is the year of the GaN adapter,” he proclaims (more than once). Whether it’s a tiny 65-watt USB-C charger

with retractable prongs that can charge a phone, a tablet and a computer and slip easily into a purse or a 170-

watt adapter for a gaming computer that’s a third the size of its silicon equivalent, “it’s the way the world should

have been for years and years and years. And now you can actually do it.”

On the 5G front, Witham acknowledges there are two schools of thought about how best to boost the 5G signal.

“Both of them involve having a box on the side of the house, and a box on the inside of the house. It’s basically a

repeater. You receive the signal from the outside, you rebroadcast it inside. When you’re in the house, when

you’re sending something to the network, it goes to the inside box and then gets retransmitted out to the outside

world,” says Witham.“One group of people is doing it through the window, another group is doing it through the

wall.”

Usually outside power isn’t readily available, and the box has to be positioned optimally to ensure a line of sight

with the 5G network. GaN has come up with through-window and through-wall GaN solutions. “We’re the power

guys, so we’re getting the power through the wall.”

They’ve accomplished this by teaming with Micro Linear, a Los Angeles-based semiconductor company “that does

data the best,” according to Witham.

Interior and exterior coils transmit power back and forth through a wall. GaN is able to create devices that

measure 20 millimeters by 20 millimeters (8 inches by 8 inches). With the GaN setup, “[W]e can get 65 watts on

through the wall. That’s an eight-inch [200-millimeter] wall. And we can do it at very high efficiencies. So these

are record breaking power levels and efficiency levels and distance levels” that have networking companies

“drooling,” he adds.

The through-window GaN Systems solutions are a quarter the size of low frequency options, while their through-

wall solutions have twice the power of other options currently available on the market.

(Image Credit: GaN Systems)

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What else?

On the industrial front, GaN has worked with Phihong to create a 170-watt AC/DC adapter that’s high efficiency,

lightweight, and one third customary size. GaN’s also worked with CUI to create a line of industrial equipment and

medical power supplies and with ON Semiconductor to create a 300-watt power supply that makes controllers

and drivers smaller, more integrated, less expensive, and provides high power density rarely seen in 300-watt

power supplies.

Audio Class D amplifiers, which tend to be used as either pro audio or outdoor audio for boats, skidoos, and other

outdoor venues, are getting rave reviews from music industry professionals. “Audio has special requirements so

you don’t get noise from the power supply onto that audio system and compromise your music. And this is such

high performance and quality that some customers are just taking this and actually putting it in their plastic box

or their amplifier box and putting their logo on it. Others are taking the reference design and customizing it to do

their own thing. But once you’ve heard GaN audio versus silicon audio, you just don’t want to go back.”

GaN is also supplying GaN transistors for the traction inverter onboard chargers for EV start-up Canoo, led by

former BMW executives. Canoo’s designed a skateboard platform whose onboard charger includes GaN

transistors mounted on an insulated metal substrate board with a printed circuit board on top and metal on the

back, which Witham says is a “very inexpensive, easy way to get the heat out of the transistors. And so you end

up using less transistors and minimizing your dollars per watt on your system costs.” In February 2020, Hyundai

announced it would be using the Canoo platform for its Canadian-produced TK EVs. “Canoo looks like a real winner

in the EV platforms. And we’re pretty happy with that as they use our devices…. Now we’ve got Hyundai, Toyota,

BMW — a pretty strong lineup of GaN supporters in the automotive industry,” said Witham.

All of which makes 2020 the year of the GaN adapter.

High Power with SiC and GaN EETimes

The wide-bandgap (WBG) semiconductor materials silicon carbide (SiC) and gallium nitride (GaN) offer better

thermal conductivity, higher switching speeds, and physically smaller devices than traditional silicon. The poor

parasitic-diode characteristics of silicon MOSFETs produce high current peaks and high electromagnetic

interference (EMI). The WBG materials have about 10× better conduction and switching properties than Si.

Consequently, WBG technology is a natural fit for power electronics, particularly for electric cars, because the SiC

and GaN components are smaller, faster, and more efficient than their silicon counterparts.

Increasingly powerful components

Among the positive aspects and improvements of SiC and GaN semiconductors over Si-based MOSFETs and IGBTs,

the materials ensure lower losses, work with higher switching frequencies, endure much higher operating

temperatures, are more robust in difficult environments, and offer higher breakdown voltages. The electronics

sector is moving toward larger high-voltage batteries with shorter charging times and reduced losses. The new

materials are therefore very useful.

SiC, GaN, or silicon?

Wide-bandgap power devices (Figure 1) are expensive, and in some designs, the cost/performance considerations

will not work in WBG’s favor. Designers must weigh cost and performance compromises and, in some cases,

evaluate substrates against each other. The first SiC devices to be made available were simple diodes, but the

material technology has since improved to allow the production of JFETs, MOSFETs, and bipolar transistors. GaN

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came after SiC and, in theory, is faster than SiC and allows higher switching speeds. But GaN adoption has been

slow because of the material’s high cost and reliability problems.

Figure 1: Half-bridge SiC (left) and GaN devices (Image: Wolfspeed)

GaN voltages are currently limited to about 650 V. SiC voltages are commonly from about 650 V to 1,200 V but

can range higher. SiC is widely used in the production of components and is cheaper, stronger, and more reliable

than GaN. From a packaging point of view, SiC devices are available in TO-247 and TO-220 formats. This allows a

quick and simple replacement of components, even in existing projects, with many immediate advantages. GaN

devices use surface-mount packages, with consequential limits of use. One factor that gives SiC an advantage in

industrial systems is its high reliability in overvoltage conditions. Conversely, the maximum voltage should not be

exceeded for GaN devices.

Applications

Wide-bandgap devices work smoothly at high temperatures, high switching speeds, and low losses. For this

reason, they are ideal for military and industrial applications. Their main use is with bridge circuits for high power,

used in inverters (Figure 2), Class D audio amplifiers, and more. For high-power applications, robustness against

short-circuit transients and surges is a critical consideration.

Figure 2: A silicon carbide inverter (Image: PED-Board)

The inverter that controls the motor in an electric vehicle (EV) is an example of a system that can take advantage

of WBG devices. The main function of the inverter is to convert a DC voltage to a three-phase AC waveform in

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order to operate the car engine. Because the inverter converts battery energy into alternating current, the lower

the losses during this conversion, the more efficient the system will be. The higher conductivity and higher

switching frequency of SiC devices compared with silicon reduce power loss because less energy is dissipated as

heat. Ultimately, the increased efficiency of SiC-based inverters will result in greater EV autonomy.

A key element that acts as an interface between the controller and the power device is the gate driver. Gate driver

design is always problematic for electronics designers who adopt new devices, and it is important to understand

how to drive SiC and GaN power devices.

The SiC MOSFET transistor must be operated with a higher gate voltage and must exhibit efficient voltage

derivation over time (dV/dt) to achieve fast switching times. DC/DC converters also need to be designed to

accommodate new components, such as SiC MOSFETs. They must have asymmetrical outputs for controlling SiC

drivers. Insulation and parasitic capacitance are also important factors to consider in the design.

SPICE models

Electronic components with SiC and GaN technology are increasingly popular, on both an industrial and a

commercial level. For this reason, SPICE models for electronic simulations are proliferating on the internet.

Figure 3: Test circuit for the UF3C065080T3S, a MOSFET SiC JFET (Image: UnitedSiC)

Figure 3 presents a schematic of a test circuit for the UF3C065080T3S SiC FET, produced by UnitedSiC. The

electrical characteristics of this component are truly stunning: drain-source voltage (VDS) of 650 V; gate-source

voltage (VGS) of –25 V to 25 V; continuous drain current (ID) of 31 A at TC = 25°C, 23 A at TC = 100°C; pulsed drain

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current (IDM) of 65 A; power dissipation (PTOT) of 190 W; maximum junction temperature (TJmax) of 175°C;

drain-source on-resistance (RDS(on)) of 80 mΩ; and gate resistance (RG) of 4.5 Ω. Typical applications are EV

charging, photovoltaic (PV) inverters, switched-mode power supplies, power-factor correction (PFC) modules,

motor drives, and induction heating.

Figure 4: Plots of the SPICE simulation at different points of the circuit (Image: UnitedSiC)

The SPICE test is very intensive. As shown in the plots of Figure 4, the component switches its state at 100 kHz.

The dissipated power is very high, but it works without any problem. You can easily find the SPICE model on the

internet, enclosed in the statements “.subckt UF3C065080T3S nd ng ns” and “.ENDS”. As SiC and GaN technologies

become increasingly popular, the products and devices available on the market are rising in number and

performance. Let’s examine some of them.

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GaN-on-Diamond For Next Power Devices PowerElectronicsNews

A team led by the School of Mechanical Engineering at Georgia Institute of Technology has implemented a series

of results based on room-temperature surface-activated bonding (SAB) to bond GaN and single-crystal diamond

with different interlayer thicknesses. The newly developed technique maximizes gallium nitride performance for

higher power operations.

Integrating GaN with other materials is technically challenging. It is very difficult to bond Diamond and GaN with

thermally conductive interfaces and low stress at the interfaces. The modelling allows GaN devices to take full

advantage of the high thermal conductivity of single-crystal diamond and thus achieve an excellent cooling effect

for high-power solutions. The ambient temperature process does not induce physic stress problems due to the

different coefficient of thermal expansion in other standard processes.

Introduction

The power electronics industry has seen the theoretical limit reached by silicon MOSFETs and now needs to move

to a new element. Gallium Nitride (or GaN) is a wide bandgap, high electron mobility semiconductor that has

proven to be a real added value in meeting new applications. High-electron–mobility transistor (HEMT) devices

based on GaN offer superior electrical characteristics and are a valid alternative to MOSFETs and IGBTs in high-

voltage and high-switching–frequency motor control applications.

GaN is a wide bandgap (WBG) material. As such, its forbidden band (corresponding to the energy required for an

electron to pass from the valence band to the conduction band) is much wider than the one in silicon: it is, in fact,

about 3.4 electron-volts, compared to 1.12 eV for silicon. Because of this high required energy, 10 times thinner

materials are needed for GaN to block a certain voltage than Silicon, resulting in much more compact device sizes.

The higher electron mobility of a GaN HEMT leads to a greater switching speed since the charges that normally

accumulate in the joints can be dispersed more quickly. The faster rise times, lower drain-to-source on-resistance

(RDS(on)) values, and reduced gate and output capacitance achievable with GaN all contribute to its low switching

losses and ability to operate at switching frequencies up to 10 times higher than silicon. Reducing power losses

brings additional benefits, such as more efficient power distribution, less heat generation, and simpler cooling

systems.

GaN performance and reliability are related to temperature and joule heating effect on the channel. Substrates

such as SiC and diamond integrated into GaN can improve heat management. This makes it possible to lower the

operating temperature of the device. For GaN-on-SiC devices, 25 degree decrease in channel temperature would

lead to about ten times increase in device lifetime. GaN devices have had a widespread deployment in

optoelectronics, RF, and automotive.

The thermal conductivity of diamonds is 14 times greater than the one of silicon, and electrical field resistance is

30 times greater. High thermal conductivity allows the spreading of heat. Diamond has a bandgap of 5.47 eV,

Breakdown field of 10 MV/cm, electron mobility of 2200 cm2Ns and a thermal conductivity of about 21 W/cmK.

The new technique developed presented by the team from Georgia Tech, Meisei University, and Waseda

University allows the placement of high thermal conductivity materials much closer to the regions of the active

devices in gallium nitride, thus maximizing gallium nitride performance for higher power operations. The market

about GaN-on-diamond is for defense radar and satellite communications, for now, massive production for 5G

base station is ongoing as well.

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Figure 1: GaN-On-Diamond applications overview [Source Yole Développement (Yole)]

“GaN-on-Diamond offers key parameters of high thermal conductivity, high electrical resistivity and small form

factor at both device and system level. These benefits make GaN-on-Diamond power amplifier devices very

attractive for high power RF applications, such as commercial base stations, military radar applications as well as

satellite communication and weather radars,” explained Ezgi Dogmus, technology & market analyst from Yole

Développement. “This innovative device technology, in development for over a decade, is expected to be

launched commercially by leading industrial actors such as RFHIC, Akash Systems and Mitsubishi Electric in the

next years,” he added.

GaN and Diamond Features

The maximum output power of GaN-based HEMTs is limited by the high temperature of the channel substrate,

which degrades system performance and reliability. Diamond is currently the material with the highest thermal

conductivity, and through its integration with GaN, it helps to dissipate the heat generated near the channel.

“During the HEMT device working, a large voltage drop near the gate induces localized Joule-heating. The heating

area is located within tens of nanometers, which results in super-high local heat flux. The local heat flux value of

GaN-based HEMTs could reach more than ten times larger than that of the sun surface. Proper heat spreading

technique, such as putting diamond as close as possible to the hot-spots, could decrease the channel temperature

effectively, facilitating the device stability and lifetime,” said Zhe Cheng, a recent Georgia Tech Ph.D. graduate

who is the paper’s first author and now is a postdoc in UIUC.

The techniques currently used involve the direct growth of diamond deposited by chemical vapor (CVD) on GaN

with a dielectric layer as a protective layer because the plasmon during diamond growth would damage GaN. The

combination of the thermal resistances of the materials and the interfaces prove to play a pivotal role in heat flow

management, especially for high-frequency applications for switching power supplies. The growth temperature

of the CVD diamond is above 700 °C. When the devices cool down to room temperature, the stress at the

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interfaces would crack the wafers. Additionally, the adhesion layer increases the thermal resistance of the GaN-

diamond interface, which offsets for the benefit of the diamond substrates high thermal conductivity.

The research presented by the team from the Georgia Tech, Meisei University, and Waseda University used two

modified SAB techniques to bond GaN with diamond substrates with different interlayers at room temperature.

The two to-be-bonded surfaces are cleaned and activated by Ar ion beams, which generate dangling bonds at the

surfaces. Then the two surfaces are pressed together at room temperature. The dangling bonds would form

covalent bonds at the interfaces. In their work, some silicon atoms are added at the interface to enhance the

interfacial bonding. “The bonding is finished at Meisei University and Waseda University (Fengwen Mu and

Tadatomo Suga). Then the bonded interfaces are measured by time-domain thermoreflectance (TDTR) at Georgia

Tech (Zhe Cheng, Luke Yates, and Samuel Graham). Related thermal modeling is also performed at Georgia Tech

to evaluate the impact of the bonded interface on GaN devices”, said Zhe Cheng

TDTR is used to measure thermal properties. Material characterization can be performed by high-resolution

scanning electron microscopy (HR-STEM) and electron energy loss spectroscopy (EELS).

Time-domain thermoreflectance (TDTR)

Time Domain Thermoreflectance (TDTR) is a pump-probe technique with an ultrafast femtosecond laser, which

measures the thermal boundary conductance of the GaN-diamond interface. This technique uses an ultrafast laser

modulated between 1 and 12 MHz to control the thermal penetration depth. The probe pulse is delayed between

0.1 and 7 ns compared to the pump pulse to allow the decay of the relative surface temperature to be measured

through this time. A Lock-in amplifier allows extracting the read signal picked up by a photodetector. The

temperature variation is measured by the reflectivity variations of a thin metal transducer (50-100 nm). The

system is capable of measuring thermal conductivity between 0.1 and 1000 W/m-K and thermal boundary

resistance between 2 and 500 m2-K/G. A Ti-sapphire femtosecond laser is used.

Figure 2: (a) TDTR measurements on the diamond and bonded GaN-diamond samples. (b) TDTR sensitivity of

the three unknown parameters. (c) TDTR data fitting of Samp2 with a modulation frequency of 2.2 MHz at

room temperature

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Fabrication and test

In this research presented by the Georgia Tech and Meisei University, GaN was bonded to diamond by adding

some Silicon atoms at the interfaces to help chemical adhesion of the interface and lowering thermal contact

conductance. Thermal boundary conductance (or TBC) describes the heat conduction between solid-solid

interfaces. The related coefficient is a property indicating the ability to conduct heat across interfaces.

Two samples were used by the team. The first sample consisted of a thin layer of GaN (~700 nm) bound on a

commercial single-crystal diamond substrate (grown by CVD) with a Si interlayer of ~10 nm thickness. The other

sample had a GaN of ~1.88-μm thickness bonded on a commercial single-crystal diamond substrate grown by a

high-pressure high-temperature method (HPHT). The thickness of GaN is polished to be thin enough for TDTR

measurements (Figures 2-3).

With the following sample structures, the thermal conductivity of the individual crystalline diamond substrates

on the GaN-free area was measured. Then TDTR measurements were performed on the area with the GaN layer

to measure the TBC of the GaN-diamond structure.

“The measured thermal conductivity of the diamond substrates was used as a known parameter in the adaptation

of the TDTR data to extract the TBC when measuring above the GaN layer. Overall, there are three unknown

parameters: Al-GaN TBC, GaN thermal conductivity, and GaN-diamond TBC. TDTR is a technique to measure the

thermal properties of both nanostructured and bulk materials. A modulated laser beam heats the surface of the

sample while another delayed beam detects the change in surface temperature through thermoreflectance and

captured by a photodetector”, said Zhe Cheng.

Figure 3: (a-b) Cross-section images of GaN-diamond interfaces of Sample 1. (c-d) Cross-section images of

GaN-diamond interfaces of Sample 2. [Source: Scientific Article]

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Navitas Drives the GaN Power IC Patent Landscape PRWEB

Navitas Semiconductor announced today that it has been issued over 100 patents in gallium nitride (GaN), a new

power semiconductor material that runs up to 20x faster than old, slow silicon (Si) chips, delivering up to 3x more

power conversion and half the size and weight, and creating a multi-$B market.

Navitas’ GaNFast™ Power ICs use its proprietary AllGaN™ monolithically-integrated 650V process design kit (PDK)

platform to combine GaN power FETs with GaN analog drive and GaN digital logic circuits onto a single chip. As

presented at the CPSS conference in 2019, The AllGaN PDK has proven to be extremely accurate comparing

modelled results to actual device performance. The patents span a broad innovation range from semiconductor

functional blocks (integrated gate drive, half-bridge, level-shifting, autonomous protection, etc.) and advanced

low-inductance packaging, to high-frequency systems and application use cases.

“This is a tremendous milestone in the GaN power industry, and demonstrates our focus on innovation at the

chip-level plus consistent drive to ensure the performance benefits can be exploited at the system-level by our

customers,” said Dan Kinzer, Navitas CTO & COO, adding “Of course, a major additional factor is in the form of

trade secrets and the proprietary AllGaN PDK which unlocks the high-speed capabilities of GaN and provides a

robust, ‘digital-in, power-out’ system building block.”

Navitas first pioneered GaN power ICs by demonstrating monolithically-integrated single and half-bridge products

at the world-leading Applied Power Electronics Conference (APEC) in 2015, going on to introduce details of the

proprietary AllGaN PDK in an invited keynote at APEC 2016. A series of advanced, high-speed, high-performance

reference designs and fully-qualified production release followed, leading to the world’s first commercially-

released GaN-based mobile fast-charger in 2017. More than 50 GaNFast customer projects are now in mass

production - including the world’s smallest 65W USB-C laptop and smartphone fast-charger by Xiaomi - and

Navitas production continues to ramp steeply with excellent quality and reliability.

“Navitas began with an experienced, strong and creative technical team with an impressive record of invention

and we’ve expanded that team to accelerate the growth in the patent portfolio” said Gene Sheridan, Navitas CEO,

continuing “It’s a formidable IP platform and delivers leading-edge, next-generation solutions across all markets

from mobile fast-chargers for laptops and smartphones to wireless power transfer, high-power IT infrastructure,

autonomous vehicles, motor drives for industry, drones and robotics, plus new energy applications.”

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OPTOELECTRONICS

Seoul Viosys’ Violeds technology adopted for automotive indoor sterilization SemiconductorToday

Ultraviolet LED product maker Seoul Viosys Co Ltd (a subsidiary of South Korean LED

maker Seoul Semiconductor Co Ltd) says that its Violeds clean sterilization technology

has been adopted by global automotive supplier Yanfeng.

Yanfeng’s in-vehicle UV sanitizer, with Violeds technology, will detect the absence of occupants before activating

lamps for a period of 10 minutes that can sterilize the cabin including cockpit, seating and steering wheel. The

sterilization lamp is embedded in the ceiling for maximum coverage and allows sterilization of the harmful bacteria

and viruses inside.

Seoul Viosys and fellow Seoul Semiconductor division Sensor Electronics Technology Inc (SETi) of Columbia, SC,

USA – which makes UV-A, UV-B and UV-C deep-ultraviolet LEDs (emitting at wavelengths of 200-430nm) – are

also launching (in April) portable clean products for 99.9% sterilization of all kinds of viruses and bacteria in air

and surfaces that target COVID-19. While global electronics customer demands and inquiries for Violeds products

have increased dramatically, and Seoul Viosys and SETi are ready for mass production, it typically takes more than

6 months to offer products to market due to a customer’s long-term product merchandiing processes (including

design, mold and certification). Accordingly, Seoul Viosys and SETi will take the lead in product promotion to

provide consumers with quicker access to sterilization solutions until the urgent situation from the global spread

of COVID-19 is stabilized. The goal for now is to help people control the spread quickly, although the company will

continue to sell the products in cooperation with potential global partners in the future.

“To reduce the spread of COVID-19, we decided to temporarily launch the product by drastically reducing the

process of merchandizing such as molds and customer delivery”, says Seoul Viosys’ CEO Young Joo Lee. “We will

look for global partners to promote sales and marketing in full scale,” he adds.

Germany’s Fraunhofer Institute Develops Mobile Device Disinfecting Solution with UVC LEDs LEDInside

Worldwide technology builders are accelerating UVC LED developments for disinfecting applications aiming to

prevent the spread of coronavirus. Lately we have seen many new products and technologies debuted and here

comes a new UVC LED innovation from the German research center, Fraunhofer Institute for Optronics, System

Technology and Image Evaluation, which is part of the Applied System Technology AST branch (IOSB-AST).

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Researchers built a microwave-like equipment which include two separate UVC LED modules with 10 UVC LEDs

embedded respectively. Each UVC LED has a power of 100 mW, making the total UVC radiation 2W and achieving

a radiation dose of 800 J / m² in just a few seconds. The amount of radiation dose can effectively inactivate bacteria

and viruses.

(Image: Thomas Westerhoff/Fraunhofer IOSB-AST)

According to Fraunhofer IOSB-AST, the device is designed to disinfect smartphones, tablets and similar mobile

companions as they are touched countless times a day and are often put in different places. It is thus essential to

thoroughly disinfection these devices to prevent the transmission of pathogens.

The solution not only simply disinfects smartphones with light, but also identifies them using an NFC reader, and

the dose applied is recorded and recorded by a sensor. Each disinfection process can thus be validated and clearly

assigned to the respective device. An LCD display informs the user about the most important functions.

Downstream IT systems can also be integrated via W-LAN and web interface.

Fraunhofer IOSB-AST engineer Thomas Westerhoff said, “For many years we have been working on very different

applications for UVC technologies in the field of disinfection as part of the BMBF program ‘Advanced UV for Life.’

LEDs offer great advantages, which we can demonstrate using the example of smartphone disinfection.”

Prototype of the product is expected to be presented in September 2020 at the IFAT, the world's leading trade

fair for water, sewage, waste and raw materials management in Munich, Germany. And The Fraunhofer IOSB-AST

is still looking for commercial partners for commercial use.

HPO Successfully Develops a New Si Substrate LED Chip for Horticulture Lighting Application with 70% WPE LEDInside

High Power Optoelectronics (HPO) is the world's one and only professional manufacturer of full gamut (from 365

nm UV to 940 nm IR light), vertical-structure LED chips, holding the world's oldest LED-single crystal substrate

wafer bonding patent. This wafer bonding process turns the original substrate into a silicon substrate after

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MOCVD epitaxial growth, giving LED chips exceptional thermal conductivity, and allowing them to provide even

better luminous efficacy under high current and increased component reliability.

HPO uses silicon substrates as a base for all of its products, and has hence named its technology platform “SiliLED.”

With this platform, HPO has developed products with differently colored lights, numbered 5, 8 and 9. Phosphide

SiliLED5 visible light emitters a wavelength range of 580 nm to 730 nm; arsenide SiliLED8 Infrared light emitters a

wavelength range of 750 nm to 950 nm; and nitride SiliLED9 products with a wavelength range of 365 nm

ultraviolet light to 540 nm green light. These three product series have SiliLED5, SiliLED8 and SiliLED9 as their

registered trademarks in Taiwan, China, the U.S., EU, Korea and Japan, and have become logos standing for HPO's

high-power, Si substrate LEDs. HPO also provides related technical support and aftermarket service for these

products.

Red and yellow SiliLED5 phosphide products have been widely applied to the automotive market, with 14mil 0.2W

PLCC red emitters and 24mil 0.5W PLCC red emitters giving off a light intensity over 3500 mcd and 9500 mcd

respectively after packaging. These products have been used in brake lights, tail lights and turn signal lights. The

recently developed new high power horticultural LED chip at 660 nm wavelength can give a light output power of

440 mW under a current of 350 mA, and can achieve a WPE of 70% after packaging.

HPO has more than 20 years of experience with using state-of-the-art vertical structure LED technology in epitaxial

material preparation, chip structure design, and process engineering. It owns a complete patent portfolio, and

has earned the recognition and support of its customers.

HPO's chairman Dr. Chih-Sung Chang says that HPO has braved the highly competitive optoelectronics market

thanks to years of technological expertise in visible-spectrum products. He hopes that with the introduction of

new products developed with MOCVD-epitaxy, such as 1310 nm LEDs, InGaAs PINs and VCSELs, HPO may go on

to become the top brand and provider of highly stable and reliable optoelectronic components.

HPO’s customers have validated its high-end products for automotive and horticulture lighting. The company aims

to demonstrate its craftsmanship in the competitive red ocean market of LEDs. With a focus on increased quality

and performance, HPO strives to create new blue oceans and promote green energy industries.

Kobe University and Ushio Find 222nm UVC Radiation Safe for Human Skin LEDInside

A joint research conducted by Japan’s Kobe University and Ushio, the Japan-based LED component maker, has

provided proof for the first time in the world that direct and repetitive illumination from 222nm UVC radiation,

which is a powerful sterilizer, does not cause skin cancer. This suggests that 222nm UVC is also safe for human

eyes and skin. This technology is expected to have a wide range of antibacterial and antiviral applications in

medical facilities and daily life.

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These research results were published online

in Photochemistry & Photobiology, titled

“Long-term effects of 222nm ultraviolet

radiation C sterilizing lamps on mice

susceptible to ultraviolet radiation” on March

29 and will be presented at the ‘American

Society of Photobiology 2020 meeting’ in

Chicago on June 28.

UVC wavelength of 200-280nm is germicidal

and has been widely used for disinfection. But

UVC radiation is also harmful to human skin

with its penetrative power. Researchers at

Kobe University and Ushio, however, found

that a smaller wavelength of 222nm is

comparable to 254nm in terms of ability to

eradicate bacteria on human skin and it does

not cause skin cancer.

The team exposed mice to UV radiation in

different groups, one group under a 222nm

germicide lamp and the other to UVB (280-

315nm). The mice exposed to UVB developed

skin cancer and displayed adverse effects but

mice in the 222nm germicide lamp group did

not develop skin cancer at all. The effect on

their eyes was also investigated and showed

no abnormalities, even under a microscope.

It is thus concluded that 222nm produced no adverse effects due to the level of skin penetration. 222nm UVC

does not damage the DNA of skin cells because it only travels as far as the stratum corneum, the outermost layer

of the skin.

Since UVC radiation with a wavelength of 222nm is powerful enough for disinfection and does no harm to human

skin, it is expected that this technology may enable a wide range of antiviral and antibacterial applications.

AquiSense launches UV-C LED surface disinfection device for healthcare applications, targeting COVID-19 SemiconductorToday

Nikkiso Group company AquiSense Technologies LLC of Erlanger, KY, USA (which

designs and manufactures water, air and surface disinfection systems based on UV-

C LEDs) has launched the PearlSurface 24G9, one of the first UV-C LED surface

disinfection products designed for healthcare applications such as reuse of N95 face

mask and other personal protection equipment (PPE).

The PearlSurface 24G9 offers benefits specific to LEDs, including mercury-free lamps, instant-on operation and

low cost of ownership, while providing high-power-density, homogeneous disinfection of target objects.

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The PearlSurface 24G9 offers simple operation, an integrated timer, low-voltage power supply and compact

footprint, suitable for point-of-use hospital settings, care homes, ambulances, police/fire departments, factories,

food preparation, etc. AquiSense will offer this product under the current US FDA enforcement relief to deal with

immediate COVID-19 emergency use and will simultaneously submit a pre-market approval application.

“We accelerated our product development pipeline in response to immediate global needs for reliable reuse

disinfection products,” says CEO Oliver Lawal. “We are fortunate to be able to leverage an existing high-output

UV-C LED module from our water treatment products and draw on our experience in rapid hardware design and

optical modeling to ensure a high-level disinfection efficacy,” he adds. AquiSense is currently interested in talking

to potential partners and distributors for the PearlSurface 24G9.

Semipolar InGaN LED Combines Quantum Dot Photoresist to Achieve Full Color Micro LED Display LEDInside

Micro LED as the innovative display technology is expected to replace TFT-LCD and OLED display in the near future

with its high performance including high resolution, high contrast, self-emission, low power consumption and long

life.

However, the technology still encounter several bottlenecks. The most challenging one for researchers and

manufacturers is the notorious mass transfer process which requires bonding RGB LED chips to display backplane

accurately and efficiently. The task also needs to tackle the issues caused by different chip materials such as

breakable red Micro LED. Until now, barely any proposed mass transfer technology has made it way to mass

production phase.

Dr. Kuo Hao-Chung at Taiwan’s National Chiao Tung University in collaboration with Saphlux from the U.S., and

researchers at Yale University and Xiamen University have achieved the production of full color Micro LED display

with high color stability using semipolar InGaN LED and quantum dot photoresist. Their results will be published

soon on Photonics Research.

Dr. Kuo addressed that the team continues to focus on color conversion based on quantum dot technology which

requires only blue or UV LEDs as a light source and quantum dots in different color to achieve full color display.

The method not only simply the mass transfer process but also deliver good performance in color rendering.

(Image: Chen et al. 2020)

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Apart from the difficulties in mass transfer process, many obstacles also occur in LED chips. Blue and green colored

LED chips usually change color as the operating current alters. So if the brightness of display needs to be adjusted

to fit into the environment, the colors presented by the display may shift, which is adverse to display applications.

Thus, overcoming the color shifting problems of Micro LED chips is critical.

The team used semipolar wafer to produce Micro LED chips to stabilize emission wavelength and tackled the issue

of wavelength shift and color shift. In the research, quantum dot photoresist was adopted to manufacture color

pixels. The approach can largely reduce the difficulty of mass transfer process as it does not need to transfer RGB

chips separately.

Based on the methods, the team successfully achieved a full color Micro LED array with high color stability which

can be applied to patterning large-area device, pushing the development of Micro LED display technology.

LCD to Step Down, Display Makers Turn to Mini LED Technology LEDInside

Korean electronics giants Samsung and LG are cutting down their LCD production and aim to exit the LCD panel

manufacturing business in the near future. Japan’s JDI is also suffered from weak business and sold its LCD

production equipment to Apple reportedly. According to the latest investigations by the WitsView research

division of TrendForce, these measures taken by the Korean and Japanese companies will led to declines in large

size LCD production. Meanwhile, market share of Korean manufacturers in large-size panel capacity will shrink to

below 10%.

Display makers worldwide are turning their focus from LCD to new technologies, first OLED, then Mini LED, as

more and more products debuted. After introducing several OLED-based products including iPhone, Apple was

said to unveil Mini LED-based iPad Pro later this year. While MSI is launching the Mini LED laptop this week.

(Image: Lextar)

Taiwan based display makers have been engaged in Mini LED based displays for a while and entered mass

production phase. Major display maker in Taiwan such as AUO and Innolux have formed their supply chains with

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LED chip suppliers in Taiwan. AUO collaborated with Lextar, who makes the Mini LED backlight module for MSI’s

new laptop. Meanwhile, Innolux gets LED chips from AOT and Epileds, both under the Foxconn Group. Innolux

targets large sized TVs with its Mini LED technology.

2020 was expected to be a prospering year for Mini LED technology. However, due to COVID-19 pandemic, many

scheduled production plans and projects are now delayed.

LayTec’s EpiCurve TT used in AlInN composition control for III-nitride VCSELs SemiconductorToday

In-situ metrology system maker LayTec AG of Berlin, Germany notes that high-effiicency and high-power

operation have been recently demonstrated for blue gallium nitride (GaN)-based vertical-cavity surface-emitting

lasers (VCSELs) with AlInN/GaN distributed Bragg reflectors (DBRs) [Kuramoto et al, Appl. Sci. 2019, 9, 416;

doi:10.3390/app9030416].

These AlInN/GaN DBRs are used at the front (emitting) side of the VCSEL that emits through the GaN substrate

and is completed by a second, dielectric DBR at the VCSEL’s back-side. Hence, perfect lattice match of the AlInN

in the front DBR is essential for enabling extremely low-defect InGaN layers in the active zone of the device that

is grown on top of the AlInN/GaN DBRs.

Figures: (Left)Measured in-situ wafer bow of GaN/AlInN DBRs on GaN substrate as measured (red line) and

simulated for several InN mole fractions (blue lines). Shown is a magnified view to the low-temperature

(825°C) AlInN wafer curvature sequence. (Right) InN mole fraction values estimated from the in-situ curvature

measurements and the ex-situ XRD measurements.

A recent paper by Meijo University (Hiraiwa et al., Journal of Crystal Growth 531 (2020) 125357) demonstrated

that LayTec’s EpiCurve TT metrology tool is powerful for revealing and controling the AlInN strain and alloy

compositions at the accuracy levels of x-ray diffraction (XRD) already during growth of the epitaxial layers.

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HexaTech launches DUV-transparent 2-inch AlN substrates SemiconductorToday

HexaTech Inc of Morrisville, NC, USA – which makes single-crystal aluminium nitride

(AlN) substrates for long-life UV-C LEDs in disinfection applications, deep UV lasers in

biological threat detection, and high-voltage power switching devices in efficient power

conversion as well as RF components in satellite communications – has launched its

deep-UV transparent 2”-diameter, single-crystal aluminum nitride (AlN) substrate

product line (available now with standard lead times).

This capability is targeted at directly supporting commercial production of high-performance ultraviolet C (UV-C)-

wavelength light-emitting diodes, and follows the announcement of HexaTech’s 2”-diameter, defect-free AlN

substrate capability in May 2019. As a commercial supplier of single-crystal AlN substrates, HexaTech developed

this application-specific product to satisfy the technology needs of its strategic business partners and the actively

growing UV-C LED market.

“This deep-UV transparency capability, especially when coupled with HexaTech’s market-leading crystal quality,

continues to demonstrate both the wide-ranging potential of the AlN platform, and the outstanding technical

abilities of our development team,” says CEO John Goehrke.

“Our customers now have a no-compromise solution to produce deep-UV LEDs at 265nm, which have been shown

to exceed the operational performance of any sapphire-based part at this wavelength,” says Gregory Mills, VP of

business development.

Luminus Breaks the $0.10 per mW Barrier for UVC LEDs LEDInside

Luminus Devices launched its newest UVC LED, the XBT-3535, with performance

ranging from 50 mW to 80 mW in the 275-285 nm range. With the global need

for disinfection and sterilization devices increasing, the price-performance

combination of the XBT-3535 will allow companies to quickly bring novel and

affordable solutions to market.

(Image: Luminus)

The germicidal effectiveness of UVC LEDs against E-coli, MRSA and a variety of pathogens has been well

documented. UVC LEDs with wavelengths less than 280 nm are shown to be as or more effective than mercury

lamps for disinfection and sterilization. However, performance, cost, and lifetime have been, in some

combination, the factors slowing adoption of UVC LEDs.

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Luminus addressed that the new products have median lifetime of over 10,000 hours under normal operation.

Featuring increased power output, these UVC LED devices minimize the number of LEDs used in disinfection

systems, and pricing in volume has been reduced to a level below US$0.10/mW. These factors make the large-

scale deployment of UVC LEDs practical and accelerates the phase out of mercury lamps.

High-index-contrast gratings for III-nitride vertical-cavity surface-emitting laser diodes SemiconductorToday

Researchers based in Taiwan and Sweden claim the first demonstration of high-index-contrast grating (HCG) as

the top mirror for III-nitride (III-N) vertical-cavity surface-emitting laser (VCSEL) diodes [Tsu-Chi Chang et al, ACS

Photonics, published online 26 February 2020]. The team from National Chiao Tung University and Chalmers

University of Technology hope that the development will lead to “substantial thickness reduction, polarization-

pinning, and setting of the resonance wavelength by the grating parameters”.

The VCSEL used epitaxial III-N material flipped onto a silicon substrate. The epitaxial source material consisted of

patterned sapphire substrate (PSS), gallium nitride (GaN) nucleation,2μm undoped GaN, 5μm n-GaN contact, 10

pairs of indium gallium nitride (In0.1Ga0.9N)/GaN (3nm/8nm) multiple quantum well (MQWs) for an active

region, a 10nm p-type aluminium gallium nitride (Al0.2Ga0.8N) electron-blocking layer, and a 170nm p-GaN

contact layer.

Figure 1: (a) Three-dimensional illustration of GaN VCSELs. (b) Top-view scanning electron microscope (SEM)

image of TiO2 HCG. Top-view (c) optical microscopy and (d) SEM images of VCSELs.

VCSEL fabrication began with atomic layer deposition (ALD) of 30nm silicon dioxide (SiO2) on the p-GaN. A 10μm-

diameter current aperture was opened before applying 10nm sputtered indium tin oxide (ITO) transparent

conductor. The final part of the p-side of the device consisted of electron-beam evaporation of a distributed Bragg

reflector (DBR) composed of 12-pairs of SiO2 and tantalum oxide (Ta2O5) dielectric layers. Typical GaN-based

VCSELs use top and bottom DBRs.

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The next stage of processing consisted of thermocompressive flip-chip bonding to a silicon substrate. Laser lift-off

removed the sapphire substrate and further GaN material was also removed using chemical-mechanical polishing

(CMP), giving a 5μm thickness with an n-GaN surface.

The HCG grating was fabricated using sputtering of titanium dioxide (TiO2) and SiO2, followed by lift-off

patterning, using the SiO2 and nickel as hard masks. The etching used inductively coupled plasma reactive ions.

The grating consisted of strips of TiO2 with 344.5nm pitch. The strip height and base width were 112.3nm and

177.8nm, respectively.

The device was completed with electrical isolation and deposition of the n- and p-contact metals.

The VCSEL was tested in pulsed mode with 0.1μs width and 0.3% duty cycle (Figure 2). The lasing threshold was

25mA, equivalent to 31.8kA/cm2 density. The turn-on voltage came at 6.9V. The researchers report: “Compared

to our previously reported VCSELs with two dielectric DBRs, the HCG VCSEL (which has one of the DBRs replaced

by an HCG) has a higher threshold current density, lower optical output power, and higher turn-on voltage.”

Figure 2: (a) Pulsed optical output power−current−voltage (L−I−V) characteristics of HCG GaN-based VCSEL.

Inset: current-dependent line width. (b) Optical emission spectra in two orthogonal polarization directions

with electric field parallel to grating bars (TE) and perpendicular to grating bars (TM) below and above

threshold.

The team explains the worse performance of the HCG by the thicker n-GaN layer (~5μm) in the final device,

compared with that of the previous DBR-only VCSEL (~940nm). The researchers believe that some unintentionally

doped GaN may have remained after the CMP, further increasing the contact and series resistance. The thicker n-

GaN also absorbs more photons, increasing the threshold current and reducing optical output power.

The laser output was strongly polarized transverse electric, parallel to the grating bars above threshold. The

highest peak came at 404.2nm. From the spacings between the multi-mode peaks (~4.2nm), the researchers

estimated the effective cavity length to be 5.1μm. The line-width of the modes reduced from 2.5nm to 0.5nm as

the current passed through threshold.

The beam divergence with 60mA drive current was 10° full-width at half-maximum (FWHM).

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PATENT APPLICATIONS More than 340 new patent families (inventions) related to GaN technology were published in April 2020.

Other patent applicants Actron Technology, Delta Electronics, Enkris Semiconductor, Heyuan Choicore Photoelectric Technology, Institute of Microelectronics Chinese Academy of Sciences, Lattice Power, Nanjing University of Posts & Telecommunications, Nichia, Rohm, Shenzhen Third Generation Semiconductor Research Institute, Sony, Suzhou Institute of Nano Technology & Nano Bionics Chinese Academy of Sciences, TCL, University of Electronic Science & Technology of China, Xiangneng Hualei Optoelectronic Corporation, Akoustis, Aledia, Cea - Commissariat à L’Energie Atomique & Aux Energies Alternatives, China Building Material Bengbu Glass Industrial Design Research Institute, Disco, Dongguk University, Efficient Power Conversion, GLC Semiconductor, Henan Shijia Photons Technology, Koito Manufacturing, Korea University Industrial & Academic Collaboration Foundation, Nanjing Changfeng Aerospace Electronic Equipment, Nitto Denko, No 55 Institute of China Electronics Science & Technology, Panasonic Intellectual Property Management, Samsung Electronics, Seoul Viosys, Tokyo Electron, Toshiba, Toyota Motor, Transphorm Technology, University Beijing, Yangzhou Zhongke Semiconductor Lighting, 13th Research Institute of China Electronics Technology, 58th Research Institute of CETC, Amec Semiconductor Equipment, Andrew Wireless Systems, AOTI Photoelectric Technology Hangzhou, ASTEC International, ASTI Global, Beijing Guolian Wanzhong Semiconductor Technology, Beijing Zhongke Youwei Technology, Bench Walk Lighting, Carl Zeiss SMT, Carsem Semiconductor, CEC Guoji Nanfang, Changxing Kedi LED, China Electronic Technology, Chip Foundation Technology, Chongqing University, Chung Ang University Industry Academic Cooperation Foundation, Comba Telecom Systems Holdings, Dalian University of Technology, Delta Electronic Enterprise Management, Denka, Denso, Dongguan Dongyang Guangke R&D, Dongguan Institute of Opto Electronics Peking University, Dynax Semiconductor, Electro Scientific Industries, Fudan University, Fujitsu, Furukawa, Fuyang Electronic Information Research Institute, glo, Globalwafers, GREE Electric Appliances, Guangdong Deli Photoelectric, Guangdong Zhineng Technology, Hangzhou Sappland Microelectronics Technology, Hangzhou Zhongheng Electric, Hefei Yuanxu Chuangsin Semiconductor Technology, Hitachi, Huainan Normal University, Huaiyin Teachers College.

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Notable new patent applications

Light-emitting element and method for manufacturing same Publication Number: WO2020/084942 Patent Applicant: Sony

In the present invention, a semiconductor device comprises: a layered structure 20 in which a first compound semiconductor layer 21, an active layer 23 and a second compound semiconductor layer 22 are layered; a substrate 11; a first light-reflecting layer 41 disposed on a first surface side of the first compound semiconductor layer 21; and a second light-reflecting layer 42 disposed on a second surface side of the second semiconductor layer 22. The second light-reflecting layer 42 has a flat shape. A recessed surface section 12 is formed on a substrate surface 11b. The first light-reflecting layer 41 is formed at least on the recessed surface section 12. The first compound semiconductor layer 21 is formed over the recessed surface section 12 extending from the substrate surface 11b. A cavity is formed, above the recessed surface section 12, between the first light-reflecting layer 41 and the first compound semiconductor layer 21.

Semiconductor light-emitting element Publication Number: WO2020/080159 Patent Applicant: Stanley Electric

This semiconductor light-emitting element has: an n-type semiconductor layer that has an AlGaN or AlInGaN composition; an active layer that comprises an AlGaN-based semiconductor or an AlInGaN-based semiconductor and that is formed on an n-type semiconductor layer; a p-type semiconductor layer that has an AlN, AlGaN, or AlInGaN composition and that is formed on the active layer; and a p-electrode that is formed on the p-type semiconductor layer, wherein the p-type semiconductor layer has a contact layer that is formed on the p-electrode and that comprises an AlGaN layer or an AlInGaN layer with a band gap becoming smaller toward an interface with the p-electrode, and the contact layer has a tunnel contact layer that is in contact with the p-electrode and is connected to the p-electrode through a tunnel junction.

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Vertical stacks of light emitting diodes and control transistors and method of making thereof Publication Number: WO2020/076452, US20200119085

Patent Applicant: glo

A light emitting device includes a vertical stack of a light emitting diode and a field effect transistor that controls the light emitting diode. An isolation layer is present between the light emitting diode and the field effect transistor, and an electrically conductive path electrically shorts a node of the light emitting diode to a node of the field effect transistor. The field effect transistor may include an indium gallium zinc oxide (IGZO) channel and may be located over the isolation layer. Alternatively, the field effect transistor may be a high-electron-mobility transistor (HEMT) including an epitaxial semiconductor channel layer and the light emitting diode may be located over the HEMT.

Lateral III-nitride devices including a vertical gate module Publication Number: WO2020/077243, US20200119179

Patent Applicant: Transphorm

A lateral III-N device has a vertical gate module with III-N material orientated in an N-polar or a group-III polar orientation. A III-N material structure has a III-N buffer layer, a III-N barrier layer, and a III-N channel layer. A compositional difference between the III-N barrier layer and the III-N channel layer causes a 2DEG channel to be induced in the III-N channel layer. A p-type III-N body layer is disposed over the III-N channel layer in a source side access region but not over a drain side access region. A n-type III-N capping layer over the p-type III-N body layer. A source electrode that contacts the n-type III-N capping layer is electrically connected to the p-type III-N body layer and is electrically isolated from the 2DEG channel when the gate electrode is biased relative to the source electrode at a voltage that is below a threshold voltage.

Nanowire light emitting diodes with high extraction efficiency for micro led displays Publication Number: US20200105970 Patent Applicant: Intel

Embodiments described herein comprise micro light emitting diodes (LEDs) and methods of forming such micro LEDs. In an embodiment, a nanowire LED comprises a nanowire core that includes GaN, an active layer shell around the nanowire core, where the active layer shell includes InGaN, a cladding layer shell around the active layer shell, where the cladding layer comprises p-type GaN, a conductive layer over the cladding layer, and a spacer surrounding the conductive layer. In an embodiment, a refractive index of the spacer is less than a refractive index of the cladding layer shell.

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Multi-color light-emitting device and method of manufacturing such a device Publication Number: US20200135976 Patent Applicant: Cea

A light-emitting device including first, second, and third pixels, wherein: the first pixel includes a two-dimensional light-emitting cell including a vertical stack of a first semiconductor layer of a first conductivity type, of an active layer, and of a second semiconductor layer of the second conductivity type; each of the second and third pixels includes a three-dimensional light-emitting cell including a plurality of nanostructures of same dimensions regularly distributed across the surface of the pixel, each nanostructure including a doped pyramidal semiconductor core of the first conductivity type, an active layer coating the lateral walls of the core, and a doped semiconductor layer of the second conductivity type coating the active layer; and the nanostructures of the second and third pixels have different dimensions and/or a different spacing.

Semiconductor devices, radio frequency devices and methods for forming semiconductor devices Publication Number: US20200135865 Patent Applicant: Intel

A semiconductor device is proposed. The semiconductor device includes a group III-N semiconductor layer, an electrically insulating material layer located on the group III-N semiconductor layer, and a metal contact structure located on the electrically insulating material layer. An electrical resistance between the metal contact structure and the group III-N semiconductor layer through the electrically insulating material layer is smaller than 1*10−7Ω for an area of 1 mm2. Further, semiconductor devices including a low resistance contact structure, radio frequency devices, and methods for forming semiconductor devices are proposed.

Semiconductor light emitting element Publication Number: JP2020053628, US20200105967 Patent Applicant: Nichia

A light emitting element includes: a first conductivity type semiconductor layer; a second conductivity type semiconductor layer disposed over the first conductivity type semiconductor layer; a first electrode and a second electrode disposed over the second conductivity type semiconductor layer and spaced apart from each other; and a light emitting layer disposed over the second conductivity type semiconductor layer and, in a top view, positioned between the first electrode and the second electrode.

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Nitride semiconductor device and method for manufacturing same Publication Number: US20200105917, JP2020053585 Patent Applicant: Panasonic

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer having a greater band gap than the first nitride semiconductor layer; a source electrode and a drain electrode on the second nitride semiconductor layer apart from each other; a third nitride semiconductor layer, between the source electrode and the drain electrode, containing a p-type first impurity and serving as a gate; and a fourth nitride semiconductor layer, between the third nitride semiconductor layer and the drain electrode, containing a p-type second impurity, wherein the average carrier concentration of the fourth nitride semiconductor layer is lower than the average carrier concentration of the third nitride semiconductor layer.

Apparatus and circuits with dual threshold voltage transistors and manufacturing methods Publication Number: US20200135733 Patent Applicant: tsmc

Apparatus and circuits with dual threshold voltage transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first layer comprising a first III-V semiconductor material formed over the substrate; a first transistor formed over the first layer, and a second transistor formed over the first layer. The first transistor comprises a first gate structure comprising a first material, a first source region and a first drain region. The second transistor comprises a second gate structure comprising a second material, a second source region and a second drain region. The first material is different from the second material.

Electronic circuit comprising diodes Publication Number: FR3086797, US20200105749 Patent Applicant: STMicroelectronics

The present description concerns an electronic device comprising a stack of a Schottky diode and of a bipolar diode, connected in parallel by a first electrode located in a first cavity and a second electrode located in a second cavity.

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