glast large area telescope: electronics, data acquisition & flight software electronics
DESCRIPTION
Gamma-ray Large Area Space Telescope. GLAST Large Area Telescope: Electronics, Data Acquisition & Flight Software Electronics Gunther Haller Stanford Linear Accelerator Center Manager, Electronics, DAQ & FSW LAT Chief Electronics Engineer [email protected] (650) 926-4257. - PowerPoint PPT PresentationTRANSCRIPT
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 1
GLAST Large Area Telescope:GLAST Large Area Telescope:
Electronics, Data Acquisition & Flight Software Electronics
Gunther HallerStanford Linear Accelerator CenterManager, Electronics, DAQ & FSWLAT Chief Electronics Engineer
[email protected](650) 926-4257
Gamma-ray Large Gamma-ray Large Area Space Area Space TelescopeTelescope
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 2
Electronics OutlineElectronics Outline
• Overview• Team• Front-End Electronics• Tower Electronics Module
– GLAST Calorimeter Cable Controller ASIC (GCCC)– GLAST Tracker Cable Controller ASIC (GTCC)
• GAS Unit• GLAST Global Trigger Controller (GLTC)• SIU/EPU Crate
– LAT Communication Board– Spacecraft Interface Board– Processor
• Spacecraft Interface• Verification & Test• Testbed • Summary
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 3
LAT Electronics (Signals)LAT Electronics (Signals)
ACD
ACD
ACD
GASBoard P
EPUP0
To SC PScience Data
0 1 11
EPUP1
EPUR
SIUR
SIUP
TEM 0
CAL
TKR
Command Response UnitGlobal TriggerEvent Builder
ACD Electronics Module
GASBoard R
TEM 15
CAL
TKR
TEM 7
CAL
TKR
TEM 8
CAL
TKR
To SC RScience Data
Filtering Software
Command Response UnitGlobal TriggerEvent Builder
ACD Electronics Module
Command/Control/Monitor
Software
To SC P/RMIL1553/Discretes
From SC P/R1 PPS/GRB
Alert
GAS UnitPrimeRedundant
• TKR: Tracker
• CAL: Calorimeter
• ACD: Anti-Coincidence Detector
• TEM: Tower Electronics Module
• EPU: Event Processor Unit
• SIU: Spacecraft Interface Unit
• GAS Unit: Global Trigger-ACD-Signal Distribution Unit
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 4
LAT Electronics (Power)LAT Electronics (Power)
ACD
ACD
ACD
PDUBoard P
EPUP0
SC MainFeed P
0 1 11
EPUP1
EPUR
SIUR
SIUP
TEM 0
CAL
TKR
Monitoring and PowerDitribution
PDUBoard R
TEM 15
CAL
TKR
TEM 7
CAL
TKR
TEM 8
CAL
TKR
Monitoring and PowerDistribution
SC SIU RFeed
PDUPrimeRedundant
SC SIU PFeed
SC MainFeed R
GASUDAQ P
GASUDAQ R
ACD PSP
ACD PSR
GASU
• TKR: Tracker
• CAL: Calorimeter
• ACD: Anti-Coincidence Detector
• TEM: Tower Electronics Module
• EPU: Event Processor Unit
• SIU: Spacecraft Interface Unit
• GAS Unit: Global Trigger-ACD-Signal Distribution Unit
• PDU: Power Distribution Unit*
* PDU is presented separate in Power System presentation
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 5
TeamTeam
• Manager– Gunther Haller, SLAC
• Flight Software Lead– JJ Russell, SLAC
• DAQ System Lead– Mike Huffer, SLAC
• Mechanical-Thermal Lead– Dave Nelson, SLAC
• Power-EMI Lead– Dave Nelson, SLAC
• EGSE Lead– Mike Huffer, SLAC
• I&T Lead– Dave Nelson, SLAC
• Mission Assurance Lead– Darren Marsh, Nick
Virmani (SLAC, Swales)• Manufacturing Lead
– Jerry Clinton, SLAC
• Flight-Software Team: see FSW presentation
• Front-End Simulator– Mark McDougald,
SLAC• Parts
– Mark Freytag, SLAC• Harness
– Dave Nelson, Mark Freytag, SLAC
• Packaging – Jobe Noriel, SLAC
• ASIC & Board Analysis– Dieter Freytag, Oren
Milgrome, SLAC
• TKR sub-system electronics– Manager: Robert
Johnson, UCSC– EE: Dave Nelson,
SLAC• CAL sub-system electronics
– System Manager: Neil Johnson, NRL
– EE: Jim Ampe, NRL• ACD sub-system electronics
– Manager: Dave Thompson, GSFC
– EE: Glenn Unger, GSFC
• Power Distribution Unit– Patrick Young, SLAC
• GAS Unit– Joszef Ludvig, SLAC
• TEM DAQ Module– Leonid Sapozhnikov, SLAC
• Tower Power Supply– Vendor (Oversight: Dave Nelson,
SLAC)• Spacecraft Interface Board
– Michael Lovellette, Greg Clifford, Dennis Silver (NRL & Silver Engineering)
– Software: Dan Wood (NRL)• Crate Backplane
– Robert O’Leary, SLAC• Crate Power Supply Board
– Robert O’Leary, SLAC• LAT Communication Board
– Sandra Frazier, SLAC• GLAST Tracker Cable Controller ASIC
– Leonid Sapozhnikov, Noman Ahmed, SLAC
• GLAST Calorimeter Cable Controller ASIC
– Leonid Sapozhnikov, Noman Ahmed, SLAC
• GLAST Global Trigger ASIC– Joszef Ludvig, Noman Ahmed,
SLAC
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 6
Tracker ElectronicsTracker Electronics
• TKR sub-system electronics • Si-Strip Detectors• 24 GTFE (GLAST Tracker Front-End) ASIC (1,536 signal channels)• 2 GTRC (GLAST Tracker Readout Controller) ASIC• MCM (Multi-Chip Module) • Flex-cables
• Presented in tracker sub-system CDR
GTFE ASIC
GTRC ASIC
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 7
Calorimeter ElectronicsCalorimeter Electronics
• CAL sub-system electronics• Diodes• 48 GCFE (GLAST Calorimeter Front-End) ASIC• 4 GCRC (GLAST Calorimeter Readout Controller) ASIC• AFEE (Analog Front-End Electronics) board
• Presented in calorimeter sub-system CDR
GCFE ASIC
GCRC ASIC
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 8
ACD ElectronicsACD Electronics
• ACD sub-system electronics• PMT’s• 18 GAFE (GLAST ACD Front-End) ASIC• 1 GARC (GLAST ACD Readout Controller) ASIC• FREE (Front-End Electronics) board• High-Voltage Supply board (not shown)
• Presented in ACD sub-system CDR
GAFE ASIC GARC ASIC
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 9
Tower Electronics DAQ ModuleTower Electronics DAQ Module
• Main DAQ module, one on each tower– Controls and reads out data from
TKR MCM and CAL AFEE front-end electronics
– Zero-suppresses CAL event data– Buffers events in cable ASIC FIFO’s– Assembles CAL and TKR event
fragments to tower event – Transmits data to GASU– Contains monitoring and low-rate
science circuits– LVDS interface to front-end
electronics and GASU– Hardware with software controlled
configuration and mode registers• CAL ICD: LAT-SS-00238• TKR ICD: LAT-SS-00176• TEM ICD: LAT-SS-00363
Trigger Controller
Control, Event & HSK SignalsPower
Power from TEM PS Module
TKR (8 cables)
Trigger
TKR Cable ASIC
CAL Cable ASIC
CAL (4 cables)
Common Controller
Power to TEM Elex
Trigger signals to/from Global
Trigger on GAS Unit
Control & HSK signals from/to SIU, Event data to EPU,
all via GAS Unit
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 10
Tower Electronics DAQ Module (Con’t)Tower Electronics DAQ Module (Con’t)
• Engineering Model with full functionality and interfaces as flight has been used extensively in 18 copies in the field, controlled and readout with real-time software from the FSW group, and I&T software from the I&T group
• Not just tested in TEM test-setup at SLAC, but more importantly fully integrated in set-ups with real sub-system electronics
– at NRL and at SLAC with CAL electronics– In Italy and at SLAC with TKR electronics– At SLAC, NRL with DAQ electronics
• Flight Model with 8 GTCC and 4 GCCC ASIC, plus 2 ACTEL’s: design finished, ready for layout/fabrication
• LAT-TD-00605
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 11
Tower Electronics Module GCCC ASICTower Electronics Module GCCC ASIC• GLAST Calorimeter Cable Controller (GCCC) ASIC
– TEM interface to calorimeter AFEE• Configuration and readback data• Trigger and event data handling• Log suppression algorithm• Event buffers
– Contains • Two 64x16 FIFO’s• Three 128x16 FIFO’s• Core Logic• LVDS drivers/receivers
– VHDL code compiled into XILINX FPGA, is used on TEM’s which are operating with CAL electronics
– ASIC in fabrication, expected April 25– LAT-TD-01549
LVDS IO
CORE
FIFO
GCCC
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 12
Tower Electronics Module GTCC ASICTower Electronics Module GTCC ASIC• GLAST Tracker Cable Controller (GTCC) ASIC
– TEM interface to tracker MCM’s• Configuration and readback data• Trigger and event data handling• Data reformatting• Event buffers
– Contains • Two 64x16 FIFO’s• Three 128x16 FIFO’s• Core Logic• LVDS drivers/receivers
– VHDL code compiled into XILINX FPGA, is used on TEM’s which are operating with CAL electronics
– ASIC in fabrication, expected April 25– LAT-TD-01550
LVDS IO
CORE
FIFO
GTCC
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 13
Design & Verification for GCCC/GTCCDesign & Verification for GCCC/GTCC
VHDL
Simulation
Netlist
Automatic: Layout, Place&Route
CompareLayout: Add IO and LVDS. Result: Complete Chip Layout
Automatic: Generate Schematic
Manual: Schematic of IO, LVDS
Simulation: Spice
Full Chip Schematic
Netlist
Netlist w/o Parasitics Netlist with Parasitics
Full-Chip Simulation with Synopsys
Full-Chip Simulation with Synopsys
Full-Chip Compare/Verification
Fabrication
Test
Stress & Timing Analysis
Flight-Model Status 3/03
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 14
GAS Unit (Signal Distribution and Trigger)GAS Unit (Signal Distribution and Trigger)
EventBuilder
P
GlobalTrigger
P
CMD-Resp.Unit P
ACD
ACD
ACD
ACD EMP
GASBoard P
EPUP0
0 1 11
EPUP1
EPUR
SIUR
SIUP
ACD EMR
TEM 0
CAL
TKR
EventBuilder
R
GlobalTrigger
R
CMD-Resp.Unit R
GASBoard R
TEM 15
CAL
TKR
TEM 7
CAL
TKR
TEM 8
CAL
TKR
GAS Unit
Control,Commanding
Command-ResponseTrigger
• Uses GLTC ASIC to receive LVDS signals and to logically mask and combine 228 ACD trigger signals
• Global Trigger controller– Combines trigger inputs from
TKR, CAL, ACD and makes trigger decision
– Distributes trigger message with target CPU for event, time-stamp, event-number, and trigger type to sub-systems
– Total time from particle in detector to receipt of trigger accept signal: 2 sec
• Command Response Unit– Distributes control from SIU to
TEM’s, GLT, ACD EM, EB– Transmits readback data from
TEM’s, GLT, ACD, EB to EPU’s• Hardware with software controllable
configuration & mode registers– GLT ICD: LAT-TD-01545– CMD-Response ICD: LAT-SS-
00461; LAT-TD-00606• One prime and one redundant DAQ
board
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 15
GAS Unit (ACD EM & Event Data)GAS Unit (ACD EM & Event Data)
EventBuilder
P
GlobalTrigger
P
CMD-Resp.Unit P
ACD
ACD
ACD
ACD EMP
GASBoard P
EPUP0
To SC PScience
Data
0 1 11
EPUP1
EPUR
SIUR
SIUP
ACD EMR
TEM 0
CAL
TKR
EventBuilder
R
GlobalTrigger
R
CMD-Resp.Unit R
GASBoard R
TEM 15
CAL
TKR
TEM 7
CAL
TKR
TEM 8
CAL
TKR
GAS Unit
To SC RScience
Data
Filtering Software
PrimeRedundant
• Uses GLTC ASIC to convert LVDS to CMOS signals and to logically mask and combine 228 ACD trigger signals
• ACD EM– Controls and reads out data
from ACD front-end electronics– Buffers events– Assembles 12 ACD event
fragments to ACD event – Transmits data to EB– Contains monitoring circuits
• Event Builder– Receives event fragments from
TEM’s, AEM, and GLT at up to 10 KHz rate
– Builds LAT event and transmits to EPU’s/SIU’s at up to 10 KHz rate
– Receives CPU data, forwards to other CPU’ s or to SC (science data interface)
• Hardware with software controllable configuration & mode registers
– ACD ICD: LAT-SS-00363– AEM ICD: LAT-TD-00639– EB ICD: LAT-TD-01546
• One prime and one redundant DAQ board
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 16
GAS Unit (Con’t)GAS Unit (Con’t)
• GLAST Global Trigger Controller (GLTC) ASIC– LVDS receivers for ACD veto and CNO trigger
signals– Maskable logical-OR function of ACD trigger
signal– Handles 18 input signal channels– Contains
• Core Logic• LVDS receivers
– First version ASIC was received in Dec 02– Fully working, is flight design– Flight quantity is on shared LAT wafer-run
expected back end of March 03
– LAT-TD-0148
• Engineering Model with partial functionality and interfaces as flight has been used in several copies in the field, controlled and readout with real-time software from the FSW group, and I&T software from the I&T group
• ACD EM at SLAC and GSFC, with real ACD front-end electronics• Trigger input signal received and trigger accept message generated via SLAC COM-
module (either CAL, TKR, and ACD programmed) • Flight Model with 14 GLTC and 9 ACTEL’s: design finished, in layout/fabrication
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 17
SIU/EPU CrateSIU/EPU Crate
PCIInterface
SIB
MIL1553*
PowerControl*
EEPROM
BackPlaneHeater
Control*
PCIInterface
Event Data
Command-Response
FIFO
LCB
28-V DC/DC
Power-OnReset
LVDS ConvertionPSB
3.3V/5V
CPU
PCIInterface
Power PC
Discrete I/O
VCHPHeater Box
PDU
SpacecraftMIL1553
GASU
SpacecraftPower
GASU
SpacecraftDiscretes
SystemClock
GASU
• Spacecraft Interface Board (SIB)– EEPROM– MIL1553 Communication with
spacecraft*– Power Control of PDU/GASU power
switches in PDU*– Power Control of VCHP switches in
heater box*• LAT Communication Board (LCB)
– Communication with GASU• Commanding• Read-back Data• Housekeeping Data• Event Data
• Power Supply Board (PSB)– 28V to 3.3V/5V conversion– Power-On Reset– LVDS-CMOS conversion of
spacecraft discretes*– System clock to GASU
• CPU Board– Processor– IO of level-converted SC discretes
• Backplane– passive
* Only used in SIU crate
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 18
LAT Communication BoardLAT Communication Board
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 19
LAT Communication Board (Con’t)LAT Communication Board (Con’t)
• PCI-interface engineering model in operation since early 03 (has PMC connector)
• Flight Model has cPCI connector: design finished, scheduled to be in layout/fabrication 4/03
• ICD: LAT-TD-00860
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 20
Spacecraft Interface BoardSpacecraft Interface Board
• Designed/implemented by Silver Engineering (Dennis Silver, Greg Clifford) under contract by NRL
– Driver by Dan Wood/NRL
• Engineering model is in test since mid 02
– 6U cPCI PCB Format
– Uses J1 of cPCI
– 12 Layer Polyimide Construction
– 4 Chassis GND Planes
– 3 Power and Ground Planes
– 5 Routing Layers
– 65 Ohm Controlled Impedance Signals
• Flight Model adds npn transistors for heater control
– Schematic updated
– Waiting for layout modification
• ICD: LAT-SS-01539
cPC
I
cPCI SHARED ADDRESS/DATA/CTRL
SRAM32K x 16
FPGA
SµMMITUT69151DXE
1553 A BUS
1553 B BUS 48MHZ
ACTEL RT54SX32S(208PIN)
PCI CoreTarget Only
VR +3.3V +2.5V
33MHZ32bit3.3V
SUMMIT CTRL/STAT/SEL/ARB
47
64
44
4MBEEPROM
/224MHZ
+5VPOR
+5VPOR
LOCAL BUS
4MBEEPROM
(12)
(12)
(4)
(4)
HeaterRegister
10TO PRIMARYPDU/GASU
TO REDUNDANTPDU/GASU
TO LEFT HEATERCONTROL BOX
TO RIGHT HEATERCONTROL BOX
EXT_POR_L
(4)PDU SPARE
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 21
ProcessorProcessor
• BAe750 compact PCI board• 750 class Power-PC• 240 MIPS at 133 Mhz, • Less Than 12W• 128 Mbytes main memory• 256 Kbytes SUROM • Total Dose > 100 kRad (Si),
Latchup Immune, SEU Rate < 1E-5 Upsets/processor-day @ 90% GEO
• VxWorks real-time operating system
– LAT ordered prototype, was received Spring 02
– Since then used for software development at NRL
• Boot-code• Bench-mark for LAT filtering
code• Test with SIB MIL1553 prototype
– Same board selected by GLAST spacecraft contractor
• To be ordered April 03
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 22
LAT Spacecraft InterfaceLAT Spacecraft Interface
Power
SPACECRAFT
MIL1553
LAT
1 PPS
GBM GRBCandidate
DiscretesDigital
Analogs
Science Data
• Power
– 28V regulated and unregulated
• MIL1553
– Commanding
• Science Interface (LVDS)
– Transport of science data to spacecraft solid-state recorder
• 1-PPS timing signal (LVDS)
– Timing pulse
• GBM GRB Candidate signal (LVDS)
– Notification of candidate Gamma-Ray Burst (GRB), from GBM routed through SC
• Discretes (LVDS)
– Pulsed and level digital signals from and to spacecraft
• Analog Monitoring
– Temperature and voltage monitoring by SC without having LAT powered
• Two power/signal sets: Prime and redundant
• All agreed to: Spectrum Astro SC-LAT Interface Document
LVDS: Low-Voltage-Differential-Swing signaling
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 23
Power Interface to SpacecraftPower Interface to Spacecraft
toUnregulatedVoltagePrimary
to
to
to
GRID or Anti-Freeze
Heaters,several
zones, eachzone has itsown set of
thermostats/heaters
VCHPsurvival/
operationalheaters
RegulatedVCHP Voltage
Primary
Turn on control fromSIU P and SIU R
RegulatedVCHP Voltage
Redundant
Prime
Prime
Redundant
RegulatedSIU-Prime
Voltage
SIUPrime
Regulated SIU-Redundant
Voltage
SIURedundant
Regulated MainDAQ Prime
Voltage
PDUPrime
Regulated MainDAQ Redundant
Voltage
PDURedundant
Spacecraft LAT
To other thermostats/heater zones
toUnregulatedVoltagePrimary
to
to
to
Redundant
To other thermostats/heater zones
Turn on control fromSIU P and SIU Rl
Cross-connected:either PDU
can useeither feed
All switches arecontrolled by
spacecraft
Power to restof LAT
To other switches(12 total)
To other switches(12 total)
• All power feeds from spacecraft can be turned off/on via ground
• Spacecraft turns off SIU/DAQ feeds when going to survival mode
• LAT start-up ICD: LAT-TD-01536
– Describes process of cold and warm boot (bring-up) of LAT
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 24
Spacecraft 1-PPS and GRB Candidate SignalSpacecraft 1-PPS and GRB Candidate Signal
S1S2
D
C
ENB
Multiplexer
1-PPS P
1-PPS RS1S2
D
C
ENB
Multiplexer
GASU DAQ BoardRedundant
GASU DAQ Board Prime
S1S2
D
C
ENB
MultiplexerFan-Out
E.g SIU P
Spacecraft LAT
To other crates
• 1-PPS signal from spacecraft prime and redundant are connected to both GASU DAQ boards (prime and redundant)
• GASU DAQ selects which SC signal to use
• Result is fanned out to all processor crates (SIU’s as well as EPU’s)
• Crate DAQ selects which GASU signal to use
• SC-LAT components are fully cross-connected
• Same for GBM GRB candidate signal
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 25
Spacecraft Discrete SignalSpacecraft Discrete Signal
Discretes P
Discretes R
SIU Crate Redundant
SIU Crate Prime
CPU
Spacecraft LAT
• Discrete Signals from SC to LAT:– Discrete LVDS-signals from spacecraft prime and redundant are connected to
both SIU crates (prime and redundant)– Reset discrete: P and R SC signal is logically Or’ed and used as CPU reset– Spare discretes: CPU selects whether to use P or R input and result is routed to
CPU discrete inputs (3 prime and 3 redundant)• Discrete Signals from LAT to SC (not shown)
– Discrete LVDS-signals from LAT SIU P and SIU R are driven to both, prime and redundant, spacecraft C&DH (Control & Data Handling) systems
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 26
LAT-SC Science InterfaceLAT-SC Science Interface
• GASU event builder
– Directs data from TEM’s to any of the CPU’s (not shown)
– Directs data from CPU to CPU
– Directs data from CPU to spacecraft
• Any CPU can direct data via either GASU DAQ (P or R) to SC
• Data is driven to both SC sections (P and R)
– SC needs to select which GASU to listen to
– GASU needs to know from which SC (P or R) the flow-control line is valid
– All configured via ground commanding
Receiver P
Receiver R
GASU DAQ BoardRedundant
GASU DAQ Board Prime
Switch
SIU P
Spacecraft LAT
S1S2
D
C
ENB
Multiplexer
S1S2
D
C
ENB
Multiplexer
To other LAT CPU’s
To other LAT CPU’s
EPU R
2 SIU’s,3 EPU’s
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 27
HarnessHarness
• Almost exclusively point-to-point cables (not harness)• Connectors are Micro-D and Sub-D• Cables are shielded-twisted pair, 24 AWG• Installation in layers; assembly drawings close to complete• Designed an fitted on 1:1 LAT model
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 28
Example: Connections LAT/Spacecraft and to Example: Connections LAT/Spacecraft and to LAT EMI ShieldLAT EMI Shield
+Y
Ra
dia
tor
Bra
cke
t-Y
Ra
dia
tor
Bra
cke
t
ACDElectronics
Box(x 24)
SIURdnt
SIUPrim
PDUBox
SC PRUPrim2.8A
regulated
+Y HeaterControl Box
JL-126
-Y HeaterControl Box
JL-139
SC PRURdnt2.8 A
regulated
JL-1
13
JL-1
12
JL-146
SC PDUPrim
unregulated
SC PDURdnt
unregulated
12 c + 6 gnd
12 c + 6 gnd
12 c + 6 gnd
12 c + 6 gnd
JL-1
07
JL-3
JL-4
JL-1
JL-2
4 pr tm +4 pr vm
JL-34
4 pr pwr +4 pr vm
4 pr pwr +4 pr vm
4 pr pwr
4 pr pwr
JL-141
6 -Y VCHP Heater Rdnt
6 -Y VCHP Heater Prim2 -Y Rad Antifreeze Heater Prim
2 -Y Grid Make Up Heater Rdnt
2 -Y Grid Make Up Heater Prim
2 -Y Rad Antifreeze Heater RdntJL-143
JL-147
JL-150
4 pr pwr
4 pr pwr
4 pr pwr
12 pr pwr
4 pr pwr
4 pr pwr
4 pr pwr12 pr pwr
48 pr tm
Grid (12 tm)Cal baseplate (16 tm)
JL-105 JL-37
JL-106
JL-149
2 pr pwr (AWG18)
2 pr pwr (AWG18)
2 pr pwr (AWG18)
JL-33JL-31
4 pr pwr
4 pr pwr
2 pr vm
2 pr tm
1 pr mil1553
1 pr mil1553
12 pr discrete
12 pr discrete
1 pr mil1553
1 pr mil1553
12 pr discrete
12 pr discrete
SCC&DHPrim
SCC&DHRdnt
SC AnalogMonitor Rdnt
SC AnalogMonitor Prim
4 pr pwr
4 pr pwr
12 pr pwr
12 pr pwr
XLAT plateJL
-12
3
JL-142
JL-140
JL-144
[ FROM ACD TO SC ]ACD Tiles (10 tm)ACD PMT Rail (8 tm)ACD Shell (10 tm)
2 pr pwr + 2 pr vm (-Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
2 pr pwr + 2 pr vm (-Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
2 pr pwr + 2 pr vm (+Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
2 pr pwr + 2 pr vm (+Y VCHP, sum of 6 Prim sw & sum of 6 Rdnt sw)
4 pr tm
4 pr tm
32 pr tm
16 pr tm
16 pr tm
32 pr tm
16 pr tm
16 pr tm
2 pr pwr (AWG18)
-Y VCHP-XLHP Intf (4 tm)
Grid (12 tm)Cal baseplate (16 tm)
Timing Prim/Rdnt
GRBM Prim/Rdnt
JL-1
10
JL-1
09
GASUBox
JL-5
JL-7
JL-8
JL-4
4JL
-45
JL-4
1JL
-40 16 pr LATP +
8 pr pwr +2 pr tm + 2 pr vm
16 pr LATP +8 pr pwr +
2 pr tm + 2 pr vm
-Y VCHP Heaters (24 tm)-Y VCHP-XLHP Intf (12 tm)-Y VCHP-DSHP Intf (12 tm)
48 pr tm
SC PRUPrim25A
regulated
SC PRURdnt25A
regulated
16 pr pwr
16 pr pwr
4 pr tm + 4 pr vm
4 pr tm + 4 pr vm
(2 pr tm + 2 pr vm, pdu Prim & rdnt) + (2 pr tm + 2 pr vm, gasu Prim & rdnt)
(2 pr tm + 2 pr vm, pdu Prim & rdnt) + (2 pr tm + 2 pr vm, gasu Prim & rdnt)
16 pr pwr
4 pr tm +4 pr vm
16 pr pwr
4 pr vm
4 pr vm
28 pr tm
28 pr tm
JL-9,10,11
JL-13 … 28
JL-6
JL-1
08
8 pr tm
(8 c)*2 + 8 gnd
(8 c)*2 + 8 gnd
EPUBox(x 3)
TEMBox
(x 16)
JL-7
0,7
1,7
2
x 3
4 pr pwr + 2 pr tm + 2 pr vm
x 16
JL-8
9-1
04
4 pr pwr + 4 pr tm + 2 pr vm
JL-6
6,6
7,6
8
JL-46,47,48
JL-50 … 65
JL-7
3-8
8
x 3
x 16
100
51
JL-1
17
JL-230
JL-1
16
JL-1
19
JL-232
JL-1
22
JL-1
20
100
100
EPUBox
(test only)JL-1
55
JL-1
54
6 +Y VCHP Heater Rdnt
6 +Y VCHP Heater Prim
+Y Grid Rad Intf (4 tm)2 +Y Grid Make Up Heater (4 tm)+Y Radiator (8 tm)
[ FROM ACD TO PDU ]ACD BEA-Grid Intf (4 tm)ACD PMT Rail (8 tm)ACD Shell (4 tm)
Grid Rad Intf (8 tm)Radiator (20 tm)Radiator Antifreeze Heaters (8 tm)
JL-12
4 pr pwr +2 pr tm +2 pr vm
JL-49
100JL-29
JL-43JL-42
22 pr science +2 pr 1PPS +2 pr GRBM 22 pr science +
2 pr 1PPS +2 pr GRBM
JL-125
2 pr 1PPS +2 pr GRBM
2 pr 1PPS +2 pr GRBM
JL-1
24
11 pr science
11 pr science
11 pr science
11 pr science
NOTE: ONLY FIXED POSITION CONNECTORS ARESHOWN. CABLE CONNECTORS ARE NOT SHOWN.SC CONNECTORS NOT SHOWN. ACD NOT SHOWN.
JL-1
11
JL-1
14
JL-130
JL-131
JL-127
JL-129
JL-137JL-136
JL-134JL-133
2 +Y Rad Antifreeze Heater Prim
2 +Y Rad Antifreeze Heater Rdnt
2 +Y Grid Make Up Heater Prim
32 pr tm
JL-128
2 +Y Grid Make Up Heater Rdnt
AC
D T
em
pS
en
sor
Bra
cke
t
+Y VCHP Heaters (24 tm)+Y VCHP-XLHP Intf (12 tm)+Y VCHP-DSHP Intf (12 tm)
JL-69 JL-39 JL-35
16 pr tm
28 pr tm
JL-38
JL-32JL-30
JL-36
36 pr tm
-Y Grid Rad Intf (4 tm)2 -Y Grid Make Up Heater (4 tm)-Y Radiator (8 tm)
32 pr tm
14 prtm
14 prtm
JL-228
JL-1
21
JL-1
18
JL-234
JL-156 … 179
??
JL-180 … 203
x 24
GLAST LAT WIRINGDIAGRAM
REV 06
FEB 27, 2003 PY
JL-153
JL-2
04
… 2
27
8 pr tm + 40 pr vm
4 pr tm +20 pr vm
SPAREANALOGS
4 pr tm +20 pr vm
2 pr vm
2 pr vm 2 pr vm
2 pr vm
vm
vm
vm
vm
1 pr im
1 pr im
1 pr im
1 pr im
JL-1
15
2 pr tm
2 pr vm
JL-229JL-233
JL-235 JL-231
6 -Y VCHP Heater (12 tm)
6 +Y VCHP Heater (12 tm)+Y VCHP-XLHP Intf (4 tm)
JL-?
JL-151JL-148JL-145
JL-138JL-135JL-132
NOT USED CONNECTORNUMBERS
KEY:pr pairc controlgnd groundpwr powervm voltage monitorim current monitortm temp monitor
emi shieldspacecraftlocated +X sidelocated -X sidelocated +Y sidelocated -Y side
HDS high density D socketHDP high density D plugUDS micro D socketUDP micro D plugCIRC1S circular series I socketCIRC1P circular series I plugCIRC2S circular series II socketCIRC2P circular series II plug
JL-152
Reference TypeJL-1 55-CIRC1PJL-2 55-CIRC1PJL-3 55-CIRC1PJL-4 55-CIRC1PJL-5 26-HDPJL-6 26-HDPJL-7 78-HDSJL-8 78-HDSJL-9...12 26-HDSJL-13…28 26-HDSJL-29 37-UDSJL-30 100-UDSJL-31 100-UDSJL-32 100-UDSJL-33 100-UDSJL-34 100-UDSJL-35 37-CIRC2?JL-36 79-CIRC1SJL-37 100-CIRC1SJL-38 100-CIRC1SJL-39 26-HDSJL-40 78-HDPJL-41 78-HDPJL-42 62-HDSJL-43 62-HDSJL-44 100-UDSJL-45 100-UDSJL-46…49 100-UDSJL-50…65 51-UDPJL-66…68 100-UDPJL-69 100-UDSJL-70…72 26-HDPJL-73…88 51-UDPJL-89…104 26-HDPJL-105JL-106JL-107 26-HDSJL-108 26-HDSJL-109 100-UDSJL-110 100-UDSJL-111…114 26-HDPJL-115 13-CIRC1PJL-116 13-CIRC1PJL-117 66-CIRC1PJL-118 66-CIRC1PJL-119 13-CIRC1PJL-120 13-CIRC1PJL-121 66-CIRC1PJL-122 66-CIRC1PJL-123 22-CIRC1PJL-124 66-CIRC1SJL-125 66-CIRC1SJL-126JL-127JL-128JL-129JL-130JL-131JL-132 NOT USEDJL-133JL-134JL-135 NOT USEDJL-136JL-137JL-138 NOT USEDJL-139JL-140JL-141JL-142JL-143JL-144JL-145 NOT USEDJL-146JL-147JL-148 NOT USEDJL-149JL-150JL-151 NOT USEDJL-152 66-CIRC2?JL-153 51-UDPJL-154 26-HDPJL-155 100-UDPJL-156…179 100-UDPJL-180…203 79-CIRC2?JL-204…227 79-CIRC2?JL-228…235 MIL1553
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 29
Connections LAT/Spacecraft and to LAT EMI Connections LAT/Spacecraft and to LAT EMI Shield (focus)Shield (focus)
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 30
Verification & Test: Example TEM & FSWVerification & Test: Example TEM & FSW
• Processor: Motorola Power-PC• Flight Software• PMCIA LAT Communication Board for
– LAT Communication• Transition Board
– Trigger• TEM DAQ Assembly• TEM Power-Supply Assembly• 28-V Supply• LAT-TD-00861
Tower Power Supply Assembly
(1.5V/2.5V/3.3V/ 0-100V/0-150V)
TEM DAQ Assembly
LCB: LAT Communication Module
Transistion-card: Trigger Module
28-V Power Supply
Power-PC Processor
Flight Software
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 31
Verification & Test: RAD750/SIBVerification & Test: RAD750/SIB
• 3u-cPCI BAE RAD750 processor prototype
• 6u-cPCI Spacecraft Interface Board (Silver Engineering)
– MIL1553 interface
• Flight Software– Boot code development– SIB board code
driver/interface
Courtesy of Dan Wood, NRL
SIB
CPU
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 32
Verification & Test: Front-End Data SimulatorVerification & Test: Front-End Data Simulator
PC (one for 2 TEM’s)
CAL Front-End DataSimulator
PCI Bridge Card
High-SpeedSerial
Connection
PCI Bridge Card
0
7
PCI Bridge Card
PCI Bridge Card
TKR Front-End DataSimulator
PCI
PCI
TEM
Data into TEMlike CAL and
TKR sub-system
electronics
TCP-IP
Hard-Disk
One of 16Towers
• System uses 9 PC’s
– 8 PC’s for 16 TEM’s
– 1 PC for ACD
• Data transported to towers via high-speed data link; PCI bridge to local bus on simulator
• Data Simulators interface to TEM like CAL and TKR sub-system electronics
– CAL and TKR simulator board identical except code in FPGA’s
– Patch cable connect simulator to CAL and TKR TEM connectors
• Can operate TEM or LAT with data generated from simulations
• Data simulator board in layout
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 33
Verification & Test: TestbedVerification & Test: Testbed
spare
EPU-3
EPU-2EPU-1
spare spare
Pwr Dist. Box
GASU
spare
spare
ACD
SCsimulator
LAT EGSE
SIU P SIU R
TEM DAQ Modules TEM Power Supplies
TKR and CAL Electronics Simulators
12 ACD Electronics Cards
• Full DAQ set with EM2 hardware (each with identical interfaces and functionality as flight)
• Incremental built according to plan (complete testbed Feb04)
• All DAQ modules including 16 TEM’s
• Harness like flight
• TKR and CAL front-end electronics for 1 tower, front-end simulator boards for other 15 towers
• Full set of ACD EM2 electronics
• Spectrum Astro SC simulator
• Excellent hardware and software testbed
Spectrum Astro Simulator
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 34
Verification & Test: Spacecraft InterfaceVerification & Test: Spacecraft Interface
Power
SIIS
MIL1553
LAT
1 PPS
GBM GRBCandidate
DiscretesDigital
Analogs
Science Data
• Use Spectro-Astro provided Spacecraft Instrument Interface Simulator (SIIS)
• Power – Manual off-on switch
• Control & Data Handling (C&DH)– MIL1553– Science Interface (LVDS)– 1-PPS timing signal (LVDS)– GBM GRB Candidate signal (LVDS)– Discretes (CMOS)– Analog Monitoring
• Present plan is for SIIS to only provide– Primary interface
• can’t test prim-redundant interface response
– Timing accuracy of 1 PPS interface not sufficient to test timing interface performance
• Work in progress
LVDS: Low-Voltage-Differential-Swing signaling
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 35
SummarySummary
• Flight designs for electronics components well advanced• Engineering models in use in EGSE test-stands• Flight-designs of DAQ ASIC’s submitted to fabrication • Component verification and test plans described• To be worked on:
– Worst-case & timing analysis plus test-procedures for several modules still need to be completed
– EM2 tests (multi-tower with GASU) scheduled to be started end of April 03
– Documents still need to be completed• The electronics is ready to purchase flight
components/hardware
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 36
BackupBackup
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 37
Trigger PathTrigger Path
• TKR, CAL, and ACD produce fast (< 700 ns) trigger input signals from their front-end comparators
– CAL, LO and HI discriminator signals• LO is used as monitor trigger for TKR• HI is used for very high energy (>10GeV)
events– TKR, Layer OR– ACD, LO and HI discriminator signals
• LO is efficient for minimum ionizing particles
• HI selects CNO events • TEM produces sub-system specific trigger
primitives for CAL & TKR (e.g. 3-in-a-row)• Global Trigger in GASU receives trigger inputs
from ACD and TEM’s and decides whether to trigger the instrument
• If instrument is triggered, Trigger Accept signal is distributed back to front-ends -> Event data is generated
• Total time from particle in detector to receipt of trigger accept signal: < 2 usec
GASU
( includes Global Trigger)
Trigger Inputs
TEM
Trigger Accept
TKR CAL
ACD
16 Towers
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 38
Event Data PathEvent Data Path
• Event data from CAL & TKR are acquired by TEM’s, reformatted, buffered, and transmitted via GASU to all Processor Units (for ACD the TEM function is included in the GASU)
• EPU’s assemble LAT events and filter the data to reduce the event rate of ~6 KHz down to ~30 Hz
• Events arriving at EPU’s have target EPU ID in header, so each EPU only processes sub-set of events and forwards filtered events via GASU to other processors or spacecraft solid-state recorder
• All pipe-line stages subject to flow-control
• Dead-time is monitored on an event-by-event basis
GASU
Event Data
EPU/SIUTEM
Data to Spacecraft
TKR CAL
ACD
Towers
GLAST LAT Project DOE/NASA Peer Critical Design Review, March 19-20, 2003
G. Haller 4.1.7 Electronics V5 39
Assemble TEM Event
Datapath & Building EventsDatapath & Building Events
Front-End TEM
CAL-TRG FIFO
CAL ADC Data
With 3 Events
Digitize on
trigger
TKR FIFOWith 1 Event
~50,000 TKR GTFE MEM Cells
With 2 Events
Latch on
trigger
FIFO for each Tower
Event Builder
Cable
Event Processing Unit (EPU)
Trigger Data
Accept/Reject
From other TEM’s
Assemble LAT Event
Processor
SW Filter
Tower
Spacecraft