growing impact of wearable technology in health & …
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NXP, THE NXP LOGO AND NXP SECURE CONNECTIONS FOR A SMARTER WORLD ARE TRADEMARKS OF NXP B.V.
ALL OTHER PRODUCT OR SERVICE NAMES ARE THE PROPERTY OF THEIR RES PECTIVE OWNERS. © 2021 NXP B.V.
M A R C H 2 0 2 1
Eduardo Montanez
IoT Marketing Manager for Personal Device & Wearables
Edge Processing Business
GROWING IMPACT OF
WEARABLE
TECHNOLOGY IN
HEALTH & WELL-BEING
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TRENDS IN THE WEARABLES MARKET
• Longer Battery Life
− 2+ weeks – trackers, 1+ week – fitness watches, and ½ week – smart watch
• Always Connected
− BLE to smartphone
− Wi-Fi/LTE for cloud/streaming services
• Intuitive User Experience
− Smartphone-like display (OLED) and UX (vivid graphics/animations)
• Trending Features
− Voice/Audio, Location/Positioning, Sensing, etc.
• Reduced Form Factor
− More functionality in less space
Growing Impact of Wearable Technology
in Health & Wellbeing
Wearables are expanding beyond the common activity
tracking and fitness use cases that already claim almost
1-billion connected devices today. The evolution of
wearable technology can be attributed to improving
processor performance, sensors, wireless connectivity and
tracking capabilities, contactless payment/access,
extended battery life and the demand for richer user
experiences. All of this creates the ideal foundation for new
health and wellbeing use cases.
NXP’s broad portfolio of MCUs, applications processors,
Wi-Fi/BLE/NFC/UWB-enabled devices, as well as power
management ICs are driving new wearable applications
within the IoT, including SOS emergency calling, safe
zone alerts, contact tracing/social distancing and vitals
reporting (HR, SPO2, Body Temp, Sleep Patterns, etc.)
for elderly, cognitively impaired and high-risk patients.
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THE EVOLUTION OF SMART WEARABLE APPLICATIONS
Longer battery life, improved compute acquisition and continuous wireless communication support the evolution of wearable
technology – expanding beyond the common activity and fitness use cases and shifting into IoT Health & Wellbeing space.
This shift has created applications including SOS emergency calling, safe zone alerts, contact tracing/social distancing and
vitals reporting (HR, SPO2, Body Temp, Sleep Patterns, etc.) for elderly, cognitively impaired and high-risk patients.
Longer
battery life
Improved
compute/data
acquisition
Continuous wireless
communication
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EMERGING WEARABLE USE CASES & TECHNOLOGY
• Vitals, Motion and Sleep Monitoring
− Machine Learning
− Sensors
• SOS Emergency Calling
− LTE/CAT-M
− Voice & Audio
• Social Distancing, Contact Tracing & Tracking
− UWB
− Wi-Fi & BLE
− GNSS
• Hearing Enhancement
− DSP
• Contactless Access/Payment
− NFC
HearingSleepVitals Monitoring
Body T
em
pera
ture
Respira
tory
Monito
ring
Movem
ent, F
all D
ete
ctio
n
Card
iac M
onito
r (H
R, H
RV
, BP
, EC
G, S
pO
2)
Sle
ep
Monito
r
Hearin
g A
ids
Heara
ble
s
Sle
ep
Thera
py
HEALTH SERVICES
WEARABLE DEVELOPERS
4’6’
min
6’
min
6’
min
4’
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WEARABLES IN LOCALIZATION
• Highly Accurate UWB Localization
− Door Access (w/secure element)
− Activity Monitoring
− Indoor Geofencing
− Wake GNSS Upon Indoor Exit
NEW TARGETED USERS
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Functional Integration
Pe
rfo
rma
nce
Purpose-built, scalable
Compute platforms
NXP’S SCALABLE EDGE COMPUTING CONTINUUM
MARKET NEED FOR DIFFERENTIATED PLATFORMS TO ADDRESS BROAD RANGE
OF REQUIREMENTS
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Amplify market deployment with
comprehensive software, solutions
and product enablement
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• Arm Cortex-A class
and Cortex-M cores
• DSP & Co-processors
• Performance up to
GHz
• Rich HMI (3D GPU)
• Full open-source OS
platforms
APPLICATIONS PROCESSORSi.MX ULP
MCUsi.MX RT
• Arm Cortex-M cores
• DSP & Co-processors
• Performance
up to 300 MHz
• Rich HMI (2D GPU)
• Embedded memory
• Easy to use tools
• RTOS support
i.MX
CROSSOVER
PROCESSORS
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i .MX RT600 MCU FAMILY | H IGHLIGHTS
• High Performance, Real-time Processing
− Arm Cortex-M33 running up to 300 MHz with ultra-fast real-time
responsiveness
− Cadence® Tensilica® HiFi 4 DSP running up to 600 MHz with Quad
32x32 MAC
− Cryptography and Math Accelerators for security and complex
algorithms
− Up to 4.5 MB on-chip SRAM with zero wait-state access for critical
code and data
• Low Power
− 28nm FD-SOI process optimized for both active and leakage power
• Rich Integration
− Quad/Octal SPI Flash & PSRAM memory interface with on-the-fly
memory decryption
− USB 2.0 High-speed Host & Device interface with PHY
− Up to 8x FlexComms – configurable to SPI, I2C, UART and/or I2S
interfaces
− Up to 2x SD/eMMC memory card interfaces
− Digital microphone interface supporting up to 8 channels
• Advanced Security
− Secure boot with immutable hardware ‘root-of-trust
− SRAM Physically Unclonable Function (PUF) based unique key
storage
− Acceleration for symmetric (AES-256 & SHA2-256) and asymmetric
cryptography (ECC & RSA)
− Optional fuse-based root key storage mechanism
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i .MX RT500 MCU FAMILY | H IGHLIGHTS
• Energy Efficient, Real-time Processing− Arm Cortex-M33 running up to 200 MHz with ultra-fast real-time
responsiveness− Cadence® Tensilica® Fusion F1 DSP running up to 200MHz with a
32x32 MAC− Cryptography and Math Accelerators for security and complex
algorithms− Up to 5 MB on-chip SRAM with zero wait-state access for critical
code and data
• Low Power− 28nm FD-SOI process optimized for both active and leakage power− Low leakage SRAM for extended battery life
• Rich Integration− 2D GPU with Display LCD Controller and MIPI DSI support− Quad/Octal SPI Flash & PSRAM memory interface with on-the-fly
memory decryption− USB 2.0 High-speed Host & Device interface with PHY− Up to 14x Flexcomms – configurable to SPI, I2C, UART and/or I2S
interfaces− 1x SD/eMMC memory card interfaces− Digital microphone interface supporting up to 8 channels
• Advanced Security− Secure boot with immutable hardware ‘root-of-trust− SRAM Physically Unclonable Function (PUF) based unique key
storage− Acceleration for symmetric (AES-256 & SHA2-256) and asymmetric
cryptography (ECC & RSA)− Optional fuse-based root key storage mechanism
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WEARABLE SYSTEM BLOCK DIAGRAM
COMPUTE – LOW POWER – CONNECTED – SECURITY
POWER
ADAPTED CONNECTIVITY
MEMORYPOSITIONING
SENSORS INTERFACES
PAYMENT & SECURITY
WIRELESS CHARGING
UWB: NXP SR040
GNSS: SONY CXD5605AGF
PMIC: NXP PCA9420
NXP RT595SMART LOW POWER
DISPLAY
BLE: NXP QN9090OR
WLAN+BLE: NXP IW416 NFC/SE/eSIM: NXP SN110U
SERVICES
NXP: EdgeLock 2GO
NXP: mWallet 2GO
LTE M: SONY ALT1250
AUDIO
Accel/Mag: NXP FXOS8700
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i .MX 7ULP APPLICATIONS PROCESSOR
Specifications:• CPU:
− Cortex-A7 @ 720MHz− Cortex-M4 @200MHz
• Process: 28nm FD-SOI• Package:
− 14x14 393BGA, 0.5mm pitch: Consumer & Industrial− 10x10 361BGA, 0.5mm pitch: Consumer Only
• Temp Range (junction): − Industrial: -40C to +105C− Consumer: 0C to +95C
Key Features:• Graphics
− GC7000 nanoULTRA GPU: OpenGL 2.0 / OpenVG− GC320 Composition Engine
• Ultra Low Power− Independent Real-time domain− Ultra Low Run Current
• Memory Options− QSPI (on the fly decryption)− 32-bit LPDDR2/3 @400MHz− eMMC 5.0 /SD3.0
• Connectivity− USB HS OTG with PHY− USB HS HOST HSIC − I2C X 8, SPI X 4, UART X 8, SDIO X 2, I2S X 2
• Security− High Assurance Boot− Crypto Acceleration: AES-128/256, SHA-1, SHA-224, SHA-256− RNG and Tamper Detection
Application Domain
Real Time Domain
i.MX 7ULP
A7 Connectivity
Security
Secure JTAG
Internal Memory
256K RAM
UART x 4
I2C x4
3.3V/1.8V GPIO
USB2.0 HOST (w/ HSIC)
Analog
2x 12-bit ADC
HAB – Secure Boot
Graphics
3D GPUNanoULTRA
External Memory
MMC5.0/SDIO x 2
16/32b LPDDR(2/3)
Power Manager
SPI x 2
ARM Cortex-A7
NEON
Trust Zone
32KB I-cache 32KB D-cache
FPU
ETM
256KB L2 cache
Analog Comparators
External Memory
QSPI (OTFAD/XIP)
Timers
Watch Dog
32 bit Timer x4
System timers
Crypto / TRNG
FPUMPU
M4 ConnectivityUART x 4
I2C x4
3.3V/1.8V GPIO
SPI x2
FlexIO
2x 12-bit DAC
256K RAM (TCM)
Timers
Watch Dog
32 bit Timer x4
System timers
CLK /RST
ARM Cortex-M4
DAP
DSP Extensions
USB2.0 OTG(w/ PHY)
8KB Cache
MIPI DSI – 2 lane
DisplaySecure Fuse
FlexBUS
I2S x 2
eFuses / OTP
SEMA4 / Msg Unit
DMA
Parallel I/F
Camera
FlexIO
2D GPU GC320
SecurityuHAB – Secure Boot
Clock & Power Management
Secure RTC
Tamper Detection
Security – Batt Domain
Secure Storage
Crypto / TRNG
Resource Domain CtlAccess & IPC
PLL/OSC
*Application and Real Time Domain separately shown with respective peripherals
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HETEROGENEOUS LOW POWER USE CASE | BUILT FOR WEARABLE DEVICES
8:51
Power
time
Deep Sleep
Sensors
GPU: RUN
DSP: RUN
CPU: RUN
GPU: Periodic Refresh
DSP: Gated
CPU: RUNGPU: Gated
DSP: Gated
CPU: Gated
User Interaction
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Longer Battery Life | Support 24/7 wristband operation for >1 week without the need for charging
• 28nm FD-SOI process optimized for active and leakage power supporting DVFS
• Ultra low-leakage SRAM with zero wait state access
Intuitive User Experience | Smartphone-like display (OLED) and UX (vivid graphics/animations)
• 2D GPU and MIPI-DSI for vivid graphics
• Integrated DSP to accelerate AI/ML/voice/audio processing
• Quad/Octal serial memory interface for expansion
• HS interfaces to attach wireless connectivity (UWB, BLE, Wi-Fi, etc.)
Advanced Security | Identity and Personal Data Protection
• Built-in secure boot, unique key storage and cryptographic engine
Reduced Form Factor | Critical Design Requirement of Small ‘Smart’ Devices
• Fan-out Wafer Level Package (FOWLP) for more functionality in small footprint
• Wafer Level Chip Scale Package (WLCSP) for tiny package option
NXP EDGE PROCESSING SOLUTIONS – BUILT FOR WEARABLES
i.MX 7ULP Applications
Processors
i.MX RT600 Crossover MCUs
i.MX RT500 Crossover MCUs
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ENERGY EFFICIENT EDGE COMPUTE WITH ENERGY FLEX ARCHITECTURE
Heterogeneous Processing + Hierarchical fine-grained power partitioning and management
ENERGY FLEX IN APPS PROCESSORSMCUs ADVANCED ENERGY FLEX IN APPS PROCESSORS
Real Time
Domain
Application DomainReal Time
Domain
Application Domain Real Time
DomainFlex Domain
INCREASING INTEGRATION, PERFORMANCE, FUNCTIONALITY, AND ENERGY MANAGEMENT
Responder
DevicesGPUDDR
Cortex®-MCortex®-ACortex®-MCortex®-M Cortex®-A
Responder
Devices
Responder
Devices
Cortex®-A Cortex®-MCortex®-A
GPU DSP
VideoAudio
DDRResponder
Devices
1 4PUBLIC*Compared to Predecessor
Cadence® Tensilica®
Fusion DSP
*
*
Cadence® Tensilica® HiFi4® DSP
Power Management with
UNDER EMBARGO UNTIL MARCH 1, 2021
& ML
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ENERGY EFFICIENT EDGE COMPUTE WITH
HETEROGENEOUS PROCESSING
Hierarchical fine-grained power partitioning and management
Power Management with
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