GSM BASED AUTOMATIC TELLAR MACHINE OPERATION

There s a lot of requirement to automate the security to ensure the security of the

ATM’s, according to this project whenever if a person forget his ATM card can also access

the ATM’s by using their security passwords by sending an SMS to the ATM.

The security system will use GSM interface to inform the authorized person. The

GSM modem which is provided inside the tellar machine is installed with an SIM reader and

is given a number. By sending the message to the number we can access our account. The

remaining process continues so that in case of ATM card damage or misplace this solution

works better.

The system can work standalone and can also be integrated to a computer using RS232

port. The complete code for the embedded system is going to be developed using c-language.

INTRODUCTION

Firstly, let us know about Embedded System—

What is Embedded System?

An embedded system is a special-purpose computer system designed to perform one or a few dedicated functions, sometimes with real-time computing constraints. It is usually embedded as part of a complete device including hardware and mechanical parts. In contrast, a general-purpose computer, such as a personal computer, can do many different tasks depending on programming.

Embedded systems have become very important today as they control many of the common devices we use. Since the embedded system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product, or increasing the reliability and performance. Some embedded systems are mass-produced, benefiting from economies of scale.

According into performance and functionalities embedded system is classified into 4 types:

Standalone embedded system Networking embedded system Real time embedded system Mobile embedded system

STANDALONE EMBEDDED SYSTEM

The standalone word tells that giving the inputs and getting the results/outputs. Here examples for input are pressing a switch, transducer

Examples for output are LCD, buzzer, monitor and printers

NETWORKING EMBEDDED SYSTEM

A set of nodes which are connected through either wired or wireless are called networking embedded system

Examples for wired n/w are LAN in colleges, internet

Examples for wireless n/w are wifi, zigbee in coming sections

REAL TIME EMBEDDED SYSTEM

The most powerful and popular embedded system is real time embedded system.

They are 2 types:

Soft real time Hard real time

MOBILE EMBEDDED SYSTEM

It is not a pure embedded system. It is a combination of both embedded system and VLSI. In this designing part will comes under VLSI and fabrication and coding part will comes under embedded system

An embedded system is some combination of computer hardware and software, either

fixed in capability or programmable, that is specifically designed for a particular kind of

application device. Industrial machines, automobiles, medical equipment, cameras, household

appliances, airplanes, vending machines, and toys (as well as the more obvious cellular phone

and PDA) are among the myriad possible hosts of an embedded system. Embedded systems

that are programmable are provided with a programming interface, and embedded systems

programming is a specialized occupation.

Certain operating systems or language platforms are tailored for the embedded market, such

as Embedded Java and Windows XP Embedded. However, some low-end consumer products

use very inexpensive microprocessors and limited storage, with the application and operating

system both part of a single program. The program is written permanently into the system's

memory in this case, rather than being loaded into RAM (random access memory), as

programs on a personal computer.

IMPLEMENTATION OF PROJECT

This project is implemented using--

8051 based AT89S52 developed board

Interface with IR sensor

GSM modem

Keypad

Buzzer and

LCD for display

Purpose of sms in atm

Now, let us know the basic need of ATM—

Automatic Teller Machines (ATMs) are self service banking machines that allows

customers to access their bank account without the aid of a bank teller or bank clerk They are

use for financial transactions, they operate 24 hour a day helping customers to withdraw cash,

deposit cash, transfer funds, check account balance, and print statement of account . They are

placed in convenient locations such as the retail outlets, banking premises, grocery stores,

shopping malls and gas stations. They make banking transaction easier, by helping banks to

meet the demands of their customers; customers do not need to go to the banking hall or even

in some cases they do not need to queue in banks just to make basic banking transactions.

Some ATM machines allow customers of different banks to perform basic banking

transactions without going to their bank or their banks ATM machine. Despite all these

advantages, it has been reported in that customers and banks are faced with a lot of ATM

fraud and other ATM security related problems. Therefore, there is a need to provide a means

of securing ATM transaction against frauds and crimes. This study presents how Short

Message Service (SMS) encrypted message can help make ATMs more secured. The

proposed technology includes the use of existing Personal Identification Number (PIN) to

provide authentication of the card to card issuer host system and the use of SMS encrypted

message to authenticate customers before any transaction can take place at the ATM

machine.

How does it works

ATMs have a small display and either touch screen or input devices for entering inputs. To access their bank account, customers insert a plastic card into the magnetic stride reader. The plastic cards are issued by the holder’s bank. The magnetic stride card contains an identification code that is transmitted to the banks central computer through a host computer. This identification code identifies the holder of the ATM card. The ATM asks for a PIN which is use to authenticate the user. If the user is authenticated, the ATM permits the transaction with the banking computer.

“So, through the password entry from the mobile phone

the customer can access his account. The details of

account and the customer are verified through the host

computer and the transaction is done through the bank

computer”

AT89S52 MICROCONTROLLER

INTRODUCTION:

Micro controller is a true computer on a chip the design incorporates all of the

features found in a microprocessor CPU: arithmetic and logic unit, stack pointer, program

counter and registers. It has also had added additional features like RAM, ROM, serial

I/O, counters and clock circuit.

Like the microprocessor, a microcontroller is a general purpose device, but one

that is meant to read data, perform limited calculations on that data and control it’s

environment based on those calculations. The prime use of a microcontroller is to control

the operation of a machine using a fixed program that is stored in ROM and that does not

change over the lifetime of the system. The design approach of a microcontroller

uses a more limited set of single byte and double byte instructions that are used to move

code and data from internal memory to ALU. Many instructions are coupled with pins on

the IC package; the pins are capable of having several different functions depending on

the wishes of the programmer. The microcontroller is concerned with getting the data

from and on to its own pins.

DESCRIPTION

The AT89S52 is a low power, high-performance CMOS 8-bit microcontroller with

8K bytes of in system programmable Flash memory. The device is manufactured using

Atmel’s high-density nonvolatile memory technology and is compatible with the

industry- standard 80C51 instruction set and pin out. The on-chip Flash allows the

program memory to be reprogrammed in-system or by a conventional nonvolatile

memory programmer. By combining a versatile 8-bit CPU with in-system programmable

Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller, which

provides a highly flexible and cost-effective solution to many embedded control

applications. The AT89S52 provides the following standard features.

Compatible with MCS-51® Products

8K Bytes of In-System Programmable (ISP) Flash Memory

Endurance: 1000 Write/Erase Cycles

4.0V to 5.5V Operating Range

Fully Static Operation: 0 Hz to 33 MHz

Three-level Program Memory Lock

256 x 8-bit Internal RAM

32 Programmable I/O Lines

Three 16-bit Timer/Counters

Eight Interrupt Sources

Full Duplex UART Serial Channel

Low-power Idle and Power-down Modes

Interrupt Recovery from Power-down Mode

Watchdog Timer

Dual Data Pointer

Power-off Flag

Fast Programming Time

Flexible ISP Programming (Byte and Page Mode)

In addition, the AT89S52 is designed with static logic for operation down to zero frequency

and supports two software selectable power saving modes. The Idle Mode stops the CPU

while allowing the RAM, timer/counters, serial port, and interrupt system to continue

functioning. The Power-down mode saves the RAM contents but freezes the oscillator,

disabling all other chip functions until the next interrupt or hardware reset.

DATA MEMORY

The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a

parallel address space to the Special Function Registers. That means the upper 128 bytes have

the same addresses as the SFR space but are physically separate from SFR space. When an

instruction accesses an internal location above address 7FH, the address mode used in the

instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR

space. Instructions that use direct addressing access SFR space.

SPECIAL FUNCTION REGISTERS

A map of the on-chip memory area called the Special Function Register (SFR) space

is present in 89c52. All of the addresses are occupied, and unoccupied addresses may not be

implemented on the chip. Read accesses to these addresses will in general return random

data, and write accesses will have an indeterminate effect. User software should not write 1s

to these unlisted locations, since they may be used in future products to invoke new features.

In that case, the reset or inactive values of the new bits will always be 0F.

PIN DESCRIPTION

VCC : Supply +5v voltage

VSS : Circuit ground potential.

XTAL1 : Input to the inverting oscillator amplifier and input to the internal clock operating

circuit

XTAL 2: : Output from the inverting oscillator amplifier

RST : Reset input. A high on this pin for two machine cycles while the oscillator is running

resets the device. This pin drives high for 98 oscillator periods after the Watchdog timeout.

The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the

default state of bit DISRTO, the RESET HIGH out feature is enabled.

Figure 3.1: pin description of AT89S52.

ALE/PROG :

Address Latch Enable (ALE) is an output pulse for latching the low byte of

the address during accesses to external memory. This pin is also the program

pulse input (PROG) during Flash programming. In normal operation, ALE is

emitted at a constant rate of 1/6 the oscillator frequency and may be used for

external timing or clocking purposes. Note, however, that one ALE pulse is

skipped during each access to external data memory. If desired, ALE operation

A

T

8

9

S

52

can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is

active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly

pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in

external execution mode.

PSEN :

Program Store Enable (PSEN) is the read strobe to external program

memory. When the AT89S52 is executing code from external program memory,

PSEN is activated twice each machine cycle, except that two PSEN activations

are skipped during each access to external data memory.

EA/VPP :

External Access Enable. EA must be strapped to GND in order to enable

the device tram memory locations starting at 0000H up to FFFFH .Note, however,

that if lock bit 1 is programmed, EA will be internally latched on reset .EA should

be strapped to VCC for internal program executions. This pin also receives the

12-volt programming enable voltage (VPP) during Flash programming.

Port 0 :

Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each

pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be

used as high impedance inputs. Port 0 can also be configured to be the

multiplexed low-order address/data bus during accesses to external program and

data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the

code bytes during Flash programming and outputs the code bytes during

program verification. External pull-ups are required during program verification.

Port 0 pins Alternate function

P0.0-P0.7 Port 0 is an 8-bit open drain bidirectional I/O

port.

Table:3.1 Port 0 pin explanation

Port 1 :

Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1

output buffers can sink/source four TTL inputs. When 1s are written to Port 1

pins, they are pulled high by the internal pull-ups and can be used as inputs. As

inputs, Port 1 pins that are externally being pulled low will source current (IIL)

because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to

be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2

trigger input (P1.1/T2EX), respectively, as shown in the following table. Port 1

also receives the low-order address bytes during Flash programming and

Verification

Table 3.2: Port 1 pin explanation

Port 2 :

Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can

sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal

pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will

source current (IIL) because of the internal pull-ups .Port 2 emits the high-order address byte during

fetches from external program memory and during accesses to external data memory that use 16-bit

addresses (MOVX @DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s.

During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the

contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and

some control signals during Flash programming and verification.

Port 2 pins Alternate functions

P2.0-P2.7 Port 2 is an 8-bit bidirectional I/O port with

internal pull-ups.

Table: 3.3 Port 2 pin explanation

Port 3:

Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3

output buffers can sink/source four TTL inputs. When 1s are written to Port 3

pins, they are pulled high by the internal pull-ups and can be used as inputs. As

inputs, Port 3 pins that are externally being pulled low will source current (IIL)

because of the pull-ups. Port 3 receives some control signals for Flash

programming and verification. Port 3 also serves the functions of various special

features of the AT89S52, as shown in the following table.

Table 3.4: Port 3 pin explanation.

SPECIAL FUNCTION REGISTERS:

A map of the on-chip memory area called the Special Function Register

(SFR) space is shown in Table 1.Note that not all of the addresses are occupied,

and unoccupied addresses may not be implemented on the chip. Read accesses

to these addresses will in general return random data, and write accesses will

have an indeterminate effect.User software should not write1s to these unlisted

locations, since they may be used in future products to invoke new features. In

that case, the reset orinactive values of the new bits will always be 0.

TIMER 2 REGISTERS:

Control and status bits are contained in registers T2CON (shown in Table

2) and T2MOD (shown in Table 6) for Timer 2. The register pair (RCAP2H,

RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or

16-bitauto-reload mode.

INTERRUPT REGISTERS:

The individual interrupt enable bits are in the IE register. Two priorities can

be set for each of the six-interrupt sources in the IP register.

Table 3.5: AT89S52 SFR map and reset values

UART

The UART in the AT89S52 operates the same way as the UART in the

AT89C51 andAT89C52. For further information on the UART operation, refer to

the ATMEL Web site. From the home page, select “Products”, then “8051-

ArchitectureFlash Microcontroller”, then “Product Overview”.

TIMER 0 AND 1

Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and

Timer 1 in the AT89C51 and AT89C52. For further information on the timers”

operation, refer to the ATMEL Web site. From the home page, select “Products”,

then“8051-Architecture Flash Microcontroller”, then “Product Overview”.

INTERRUPTS

The AT89S52 has six interrupt vectors: two external interrupts (INT0 and

INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt.

These interrupts are all shown in Figure 6. Each of these interrupt sources can be

individually enabled or disabled by setting or clearing a bit in Special Function

Register IE. IE also contains a global disable bit, EA, which disables all interrupts

at once. Note that Table 5 shows that bit position IE.6 is unimplemented.

User software should not write a 1s to this bit position, since it may be

used in future AT89 products. Timer 2 interrupt is generated by the logical OR of

bits TF2 and EXF2 in registerT2CON. Neither of these flags is cleared by

hardware when the service routine is vectored to. In fact, the service routine

may have to determine whether it was TF2 or EXF2 that generated the interrupt,

and that bit will have to be cleared in software The Timer 0 and Timer 1 flags,

TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The

values are then polled by the circuitry in the next cycle. However, the Timer 2

flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer

overflows.

Figure 3.5: interrupt source

Table 3.9 Interrupt enables register

OSCILLATOR CHARACTERISTICS

XTAL1 and XTAL2 are the input and output, respectively, of an inverting

amplifier that can be configured for use as an on-chip oscillator, as shown in

Figure 7. Either a quartz crystal or ceramic resonator may be used. To drive the

device from an external clock source, XTAL2 should be left unconnected while

XTAL1 is driven, as shown in Figure 8.There are no requirements on the duty

cycle of the external clock signal, since the input to the internal clocking circuitry

is through a divide-by-two flip-flop, but minimum and maximum voltage high and

low time specifications must be observed.

IDLE MODE

In idle mode, the CPU puts itself to sleep while all the on-chip peripherals

remain active. The mode is invoked by software. The content of the on-chip RAM

and all the special functions registers remain unchanged during this mode. The

idle mode can be terminated by any enabled interrupt or by a hardware reset.

Note that when idle mode is terminated by a hardware reset, the device normally

resumes program execution from where it left off, up to two machine cycles

before the internal reset algorithm takes control. On-chip hardware inhibits

access to internal RAM in this event, but access to the port pins is not inhibited.

To eliminate the possibility of an unexpected write to a port pin when idle mode

is terminated by a reset, the instruction following the one that invokes idle mode

should not write to a port pin or to external memory.

Figure 3.6: Oscillator connection

Figure 3.7 External clock drive configuration.

Table 3.10: Status of external pins during idle and power down model

PROGRAM MEMORY LOCK BITS

The AT89S52 has three lock bits that can be left un programmed (U) or

can be programmed(P) to obtain the additional features listed in the following

table.

Table 3.11: lock bit protection modes.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and

latched during reset. If the device is powered up without a reset, the latch

initializes to a random value and holds that value until reset is activated. The

latched value of EA must agree with the current logic level at that pin in order for

the device to function properly.

INTERFACING DEVICES

EEPROM

Description

The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of

serial electrically erasable and programmable read-only memory (EEPROM) organized as

128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many

industrial and commercial applications where low-power and low-voltage operation are

essential. The AT24C01A/02/04/08/16 is available in space-saving 8-lead PDIP, 8-lead

JEDEC SOIC, 8-lead MAP, 5-lead SOT23 (AT24C01A/AT24C02/AT24C04), 8- lead

TSSOP and 8-ball dBGA2 packages and is accessed via a 2-wire serial interface.

Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge

clock data into each EEPROM device and negative edge clock data out of each device.

SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is

open-drain driven and may be wire-ORed with any number of other open-drain or open

collector devices.

DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1 and A0 pins are device address

inputs that are hard wired for the AT24C01A and the AT24C02. As many as eight 1K/2K

devices may be addressed on a single bus system (device addressing is discussed in detail

under the Device Addressing section).

The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K

devices may be addressed on a single bus system. The A0 pin is a no connect.

The AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K

devices may be addressed on a single bus system. The A0 and A1 pins are no connects.

The AT24C16 does not use the device address pins, which limits the number of

devices on a single bus to one. The A0, A1 and A2 pins are no connects.

WRITE PROTECT (WP): The AT24C01A/02/04/16 has a Write Protect pin that provides

hardware data protection. The Write Protect pin allows normal read/write operations when

connected to ground (GND). When the Write Protect pin is connected to VCC, the write

protection feature is enabled and operates as shown in the following table.

Memory Organization AT24C01A, 1K SERIAL EEPROM: Internally organized with 16

pages of 8 bytes each, the 1K requires a 7-bit data word address for random word addressing.

AT24C02, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the

2K requires an 8-bit data word address for random word addressing.

AT24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the

4K requires a 9-bit data word address for random word addressing.

AT24C08, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the

8K requires a 10-bit data word address for random word addressing

AT24C16, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each,

the 16K requires an 11-bit data word address for random word addressing.

LIQUID CRYSTAL DISPLAY

LCD (liquid crystal display) projectors usually contain three separate LCD glass

panels, one each for the red, green, and blue components of the video signal being fed into

the projector. As light passes through the LCD panels, individual pixels ("picture elements")

can be opened to allow light to pass or closed to block the light, as if each little pixel were

fitted with a Venetian blind. This activity modulates the light and produces the image that is

projected onto the screen.

DLP ("Digital Light Processing") is a proprietary technology developed by Texas

Instruments. It works quite differently than LCD. Instead of having glass panels through

which light is passed, the DLP chip is a reflective surface made up of thousands of tiny

mirrors. Each mirror represents a single pixel.

In a DLP projector, light from the projector's lamp is directed onto the surface of the

DLP chip. The mirrors wobble back and forth, directing light either into the lens path to turn

the pixel on, or away from the lens path to turn it off.

In very expensive DLP projectors, there are three separate DLP chips, one each for

the red, green, and blue channels. However, in most DLP projectors under $20,000 there is

only one chip. In order to define color, there is a color wheel that consists of red, green, blue,

and sometimes white (clear) filters. This wheel spins in the light path between the lamp and

the DLP chip and alternates the color of the light hitting the chip from red to green to blue.

The mirrors tilt away from or into the lens path based upon how much of each color is

required for each pixel at any given moment in time. This activity modulates the light and

produces the image that is projected onto the screen. (In addition to red, green, blue, and

white segments, some color wheels now use dark green or yellow segments as well.)

PIN DESCRIPTION OF THE LCD

table:8 Pin description of LCD

INTERFACING LCD TO MICROCONTROLLER:

Fig:15 Interfacing LCD to microcontroller

A typical LCD write operation takes place as shown in the following timing

waveform:

8051

ER/WWRS

DB7–DB0

LCD control

communications bus

Microcontroller

8

Fig:16 LCD Data waveform

The interface is either a 4-bit or 8-bit parallel bus that allows fast reading/writing of

data to and from the LCD. This waveform will write an ASCII Byte out to the LCD's screen.

The ASCII code to be displayed is eight bits long and is sent to the LCD either four or eight

bits at a time. If 4-bit mode is used, two nibbles of data (First high four bits and then low four

bits with an E Clock pulse with each nibble) are sent to complete a full eight-bit transfer. The

E Clock is used to initiate the data transfer within the LCD.8-bit mode is best used when

speed is required in an application and at least ten I/O pins are available. 4-bit mode requires

a minimum of six bits. In 4-bit mode, only the top 4 data bits (DB4-7) are used. The R/S pin

is used to select whether data or an instruction is being transferred between the

microcontroller and the LCD. If the pin is high, then the byte at the current LCD Cursor

Position can be read or written. If the pin is low, either an instruction is being sent to the LCD

or the execution status of the last instruction is read back (whether or not it has completed).

Table: 9 LCD commands

keypad

A keypad is a set of buttons arranged in a block which usually bear digits and other

symbols but not a complete set of alphabetical letters. If it mostly contains numbers then it

can also be called a numeric keypad. Keypads are found on many alphanumeric keyboards

and on other devices such as calculators, combination locks and telephones which require

largely numeric input.

A telephone keypad

A computer keyboard usually contains a small numeric keypad with a calculator-style

arrangement of buttons duplicating the numeric and arithmetic keys on the main keyboard to

allow efficient entry of numerical data. This number pad (commonly abbreviated to

"numpad") is usually positioned on the right side of the keyboard because most people are

right-handed.

Many laptop computers have special function keys which turn part of the alphabetical

keyboard into a numerical keypad as there is insufficient space to allow a separate keypad to

be built into the laptop's chassis. Separate plug-in keypads can be purchased.

A calculator

By convention, the keys on calculator-style keypads are arranged such that 123 is on

the bottom row. In contrast, a telephone keypad has the 123 keys at the top. It also has

buttons labelled * (star) and # (octothorpe, number sign, "pound" or "hash") either side of the

zero. Most of the keys also bear letters which have had several auxiliary uses, such as

remembering area codes or whole telephone numbers.

The keypad of a calculator contains the digits 0 through 9, together with the four

arithmetic operations, the decimal point and other more advanced functions.

Keypads are a part of mobile phones that are replaceable and sit on a sensor board.

Some multimedia mobile phones have a small joystick which has a cap to match the keypad.

Keypads are also a feature of some combination locks. This type of lock is often used

on doors, such as that found at the main entrance to some offices.

A telephone keypad

REGULATED POWER SUPPLY

A variable regulated power supply, also called a variable bench power supply, is one

where you can continuously adjust the output voltage to your requirements. Varying the

output of the power supply is the recommended way to test a project after having double

checked parts placement against circuit drawings and the parts placement guide.

This type of regulation is ideal for having a simple variable bench power supply.

Actually this is quite important because one of the first projects a hobbyist should undertake

is the construction of a variable regulated power supply. While a dedicated supply is quite

handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for

testing.

Most digital logic circuits and processors need a 5 volt power supply. To use these

parts we need to build a regulated 5 volt source. Usually you start with an unregulated power

To make a 5 volt power supply, we use a LM7805 voltage regulator IC (Integrated Circuit).

The IC is shown below.

The LM7805 is simple to use. You simply connect the positive lead of your

unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the

negative lead to the Common pin and then when you turn on the power, you get a 5 volt

supply from the Output pin.

CIRCUIT FEATURES

Brief description of operation: Gives out well regulated +5V output, output current capability of 100 mA

Circuit protection: Built-in overheating protection shuts down output when regulator IC gets too hot

Circuit complexity: Very simple and easy to build

Circuit performance: Very stable +5V output voltage, reliable operation

Availability of components: Easy to get, uses only very common basic components

Design testing: Based on datasheet example circuit, I have used this circuit succesfully as part of many electronics projects

Applications: Part of electronics devices, small laboratory power supply

Power supply voltage: Unreglated DC 8-18V power supply

Power supply current: Needed output current + 5 mA

Component costs: Few dollars for the electronics components + the input transformer cost

BLOCK DIAGRAM

EXAMPLE CIRCUIT DIAGRAM:

RIDE and ISP 3.0

Ride

Please note that in this page RIDE will reference to RIDE6 software which supports

8051, XA and other derivates. For ARM, ST7 and STM8 family thesoftwareisRIDE7.

RIDE is a fully featured Integrated Development Environment (IDE) that provides

seamless integration and easy access to all the development tools. From editing to compiling,

linking, debugging and back to the start, with a Simulator, ICE, Rom Monitor or other

debugging tools, RIDE conveniently manages all aspects of the Embedded Systems

development with a single user interface.

Multi-file Editor

RIDE is based on a fast multi-document editor designed to meet the specific needs of

programming. The various methods, menus, commands, and shortcuts are all fully compliant

with the Microsoft® specifications for Windows 2000, XP and NT. Classic commands, such

as string search and block action are integrated. Advanced features such as Matching

Delimiter (parenthesis, brackets), Grep (multi-file search) and Indenter are integrated as well.

The customizable color-highlighting feature is very useful to indicate specific syntactic

elements as they appear in the source file: keywords, comments, identifiers, operators, and so

on. The color-highlighting feature is automatically keyed to the intrinsic file type (which

means, it works differently for C and assembler)

This permits the user to identify quickly and easily those parts of the code responsible for

syntax errors.

Project Manager

The project manager creates links between the various files that includes a project and

the tools necessary to create that project. A project is dedicated to a particular target: 8051,

XA, or other microcontrollers. The linker manages object and library files, and output format

conversion as necessary.

Tree-structured projects ease the management of the most complex applications (bank

switching, flash, multi-processor, multi-module...). The 'Project | Make' command directs the

integrated "make" utility to build or rebuild the target programs for the current project.

To avoid wasting time, each source file will be translated by its associated tool only if any of

its dependencies are found to be out of date. Dependency analysis, even directly or indirectly

included files, are automatic.

Options can be defined as global (for all the files) or as local (for a specific node or file).

Individual attributes can be set for any file in the project. Similarities between the different

tools make migration from one processor family to another immediate and easy, permitting

multi-processorprojects.

The Message Window and the On-line Help

The message window displays all warning, error, and progress messages generated

during the processing of files associated with each project.

Clicking on an error string in the message window automatically positions the cursor at the

point of that error in the source code window.

The Online help system is context-sensitive and provides information on nearly all

aspects of RIDE. A specific help file is supplied with each tool driven by the IDE ('C'

Compiler, Assembler, Linker, RTOS). Online menu hints appear on the status line whenever

you select a menu command.

The Script Language

Most RIDE commands can be run from a script file. Scripts are written in a C-like

language, and are interpreted at execution time. With the script language, most repetitive

tasks can be done automatically thus speeding up operations and reducing the probability of

errors. Scripts are very useful for Hardware Testing (board, emulator) and to initialize the

system to a known status, but can also be conveniently used for other tasks such as creating

very complex breakpoints or redirecting some output to a file to run a 'batch' debug session.

Context Saving

When a project is closed, the whole associated context is saved (open file list, window

size and position etc..). Settings associated with the debugger are also saves such as

breakpoints,watchesetc...

Integrated High-level Debug

RIDE provides a fully integrated source-level debugging environment. All

information necessary is derived from the translators used to accomplish each step of the

process. This includes mundane aspects such as "path names", and source code specific

information such as details of complex data types.

With the simple click of a mouse button, the user can select among several powerful

capabilities: simulate, monitor, or emulate. The fast smooth integration given by RIDE

promotes a feeling of familiarity and ease of use, while providing a level of comfort and

efficiency that reduces the most difficult and complex applications to tasks that are easily

managed. This seamless progression of the "code-translate-link-debug-test" cycle is the result

of perfect communication between the programming tools and the debugger. This is the heart

of RIDE.

Integral Simulation

RIDE includes simulation engines for most 8051, and XA derivatives. The

simulator/debugger is cleanly integrated into the presentation Windows. A wide range of

'views' can be selected to provide flexible direct examination of all memory spaces as well

the all internal peripherals. The simulation engines perform detailed and faithful simulations

(including IDLE or Power down modes), of all peripherals (including interrupt and watchdog

events) present on the selected component.

Advanced Features

RIDE provides a rich variety of 'views' into an application. These views or windows

are associated with control commands like complex breakpoints or high level trace recording.

ISP 3.0

Introduction

This ISP Programmer can be used either for  in-system 

programming  or  as a  stand-alone spi programmer for  Atmel   ISP  

programmable   devices.  The   programming   interface   is   compatible  

to   STK200   ISP programmer hardware so  the users of STK200 can also

use the software which can program both the 8051 and AVR series

devices.

Hardware

The  power to  the  interface  is provided by the target system. The

74HCT541 ic isolate and buffer the parallel port signals. It is necessary to

use the HCT type ic in order to make sure the programmer should also

work with 3V type parallel port.

The printer  port  buffer interface is same  as shown in figure 1.For

the u-controllera40pinZIFsocketcanbe used.

This  programmer  circuit  can be use to program the 89S series  devices

and the AVR series device switches are  pin  compatible  to  8051, like 

90S8515.  For other AVR  series devices the user can make an adapter

board  for 20, 28  and 40  pin devices. The  pin numbers shown in 

brackets  correspond to PC parallel port connector.

Software

The ISP-30a.zip  file contains the main program and the i/o port driver. Place all

files in the same folder. The main screen view of the program is shown in figure 3.

Also   make   sure   do   not   program    the    RSTDISBL    fuse   in   ATmega8,  

ATtiny26  and  ATtiny2313 otherwise  further  spi  programming  is  disable  and  you  will 

need  a  parallel  programmer  to  enable  the

spi  programming.  For the fuses setting consult the datasheet of  the respective device.

For the auto hardware detection  it  is  necessary  to short pin 2 and 12 of

DB25connector,otherwisethe software uses the default parallel port i.e. LPT1.

Following are the main features of this software,

Read and write the Intel Hex file

Read signature, lock and fuse bits

Clear and Fill memory buffer

Verify with memory buffer

Reload current Hex file

Display buffer checksum

Program selected lock bits & fuses

Autodetectionofhardware

 

Note: The memory buffer contains both the code data and the eeprom data

for the devices which have eeprom memory. The eeprom memory address

in buffer is started after he code memory, so it is necessary the hex file should contains the

eeprom start address after the end of code memory last address i.e. for 90S2313 the start address

for eeprom memory is 0x800.

The  software   does   not    provide    the     erase    command     because   

this   function   is   performed automatically  during  device programming.  If  you are 

required to erase the controller,  first  use  the  clear

buffer command then program the controller, this will erase the controller and also set the

AVR device fuses to default setting.

Figure 3:   Main screen of the program ISP-Pgm  Ver 3.0a

GSM(Global System For Mobile

Communication)

Introduction

GSM is a digital mobile telephone system that is widely used in Europe and

other parts of the world. GSM uses a variation of Time Division Multiple Access (TDMA)

and is the most widely used of the three digital wireless telephone technologies (TDMA,

GSM, and CDMA). GSM digitizes and compresses data, then sends it down a channel with

two other streams of user data, each in its own time slot. It operates at either the 900 MHz or

1,800 MHz frequency band.

GSM is the de facto wireless telephone standard in Europe. GSM has over one billion

users worldwide and is available in 190 countries. Since many GSM network operators have

roaming agreements with foreign operators, users can often continue to use their mobile

phones when they travel to other countries.

HISTORY OF GSM

GSM is a cellular network, which means that mobile phones connect to it by

searching for cells in the immediate vicinity. GSM networks operate in four different

frequency ranges. Most GSM networks operate in the 900 MHz or 1800 MHz bands. Some

countries in the Americas (including Canada and the United States) use the 850 MHz and

1900 MHz bands because the 900 and 1800 MHz frequency bands were already allocated.

The rarer 400 and 450 MHz frequency bands are assigned in some countries, notably

Scandinavia, where these frequencies were previously used for first-generation systems.

In the 900 MHz band the uplink frequency band is 890–915 MHz, and the downlink

frequency band is 935–960 MHz. This 25 MHz bandwidth is subdivided into 124 carrier

frequency channels, each spaced 200 kHz apart. Time division multiplexing is used to allow

eight full-rate or sixteen half-rate speech channels per radio frequency channel. There are

eight radio timeslots (giving eight burst periods) grouped into what is called a TDMA frame.

Half rate channels use alternate frames in the same timeslot. The channel data rate is

270.833 kbit/s, and the frame duration is 4.615 ms.

The transmission power in the handset is limited to a maximum of 2 watts in

GSM850/900 and 1 watt in GSM1800/1900.

GSM has used a variety of voice codecs to squeeze 3.1 kHz audio into between 5.6

and 13 kbit/s. Originally, two codecs, named after the types of data channel they were

allocated, were used, called Half Rate (5.6 kbit/s) and Full Rate (13 kbit/s). These used a

system based upon linear predictive coding (LPC). In addition to being efficient with bitrates,

these codecs also made it easier to identify more important parts of the audio, allowing the air

interface layer to prioritize and better protect these parts of the signal.

GSM was further enhanced in 1997[10] with the Enhanced Full Rate (EFR) codec, a

12.2 kbit/s codec that uses a full rate channel. Finally, with the development of UMTS, EFR

was refactored into a variable-rate codec called AMR-Narrowband, which is high quality and

robust against interference when used on full rate channels, and less robust but still relatively

high quality when used in good radio conditions on half-rate channels.

There are four different cell sizes in a GSM network—macro, micro, pico and

umbrella cells. The coverage area of each cell varies according to the implementation

environment. Macro cells can be regarded as cells where the base station antenna is installed

on a mast or a building above average roof top level. Micro cells are cells whose antenna

height is under average roof top level; they are typically used in urban areas. Picocells are

small cells whose coverage diameter is a few dozen meters; they are mainly used indoors.

Umbrella cells are used to cover shadowed regions of smaller cells and fill in gaps in

coverage between those cells.

Cell horizontal radius varies depending on antenna height, antenna gain and

propagation conditions from a couple of hundred meters to several tens of kilometers. The

longest distance the GSM specification supports in practical use is 35 kilometres (22 mi).

There are also several implementations of the concept of an extended cell, where the cell

radius could be double or even more, depending on the antenna system, the type of terrain

and the timing advance.

Indoor coverage is also supported by GSM and may be achieved by using an indoor

picocell base station, or an indoor repeater with distributed indoor antennas fed through

power splitters, to deliver the radio signals from an antenna outdoors to the separate indoor

distributed antenna system. These are typically deployed when a lot of call capacity is needed

indoors, for example in shopping centers or airports. However, this is not a prerequisite, since

indoor coverage is also provided by in-building penetration of the radio signals from nearby

cells.

The modulation used in GSM is Gaussian minimum-shift keying (GMSK), a kind of

continuous-phase frequency shift keying. In GMSK, the signal to be modulated onto the

carrier is first smoothed with a Gaussian low-pass filter prior to being fed to a frequency

modulator, which greatly reduces the interference to neighboring channels (adjacent channel

interference).

(GSM: originally from Groupe Spécial Mobile) is the most popular standard for mobile phones in the

world. Its promoter, the GSM Association, estimates that 82% of the global mobile market uses the

standard.[1] GSM is used by over 2 billion people across more than 212 countries and territories.[2][3] Its

ubiquity makes international roaming very common between mobile phone operators, enabling

subscribers to use their phones in many parts of the world. GSM differs from its predecessors in that

both signalling and speech channels are digital call quality, and thus is considered a second

generation (2G) mobile phone system. This has also meant that data communication were built into

the system using the 3rd Generation Partnership Project (3GPP).

The ubiquity of the GSM standard has been advantageous to both consumers (who benefit

from the ability to roam and switch carriers without switching phones) and also to network operators

(who can choose equipment from any of the many vendors implementing GSM [4]). GSM also

pioneered a low-cost alternative to voice calls, the Short message service (SMS, also called "text

messaging"), which is now supported on other mobile standards as well.

Newer versions of the standard were backward-compatible with the original GSM phones.

For example, Release '97 of the standard added packet data capabilities, by means of General Packet

Radio Service (GPRS). Release '99 introduced higher speed data transmission using Enhanced Data

Rates for GSM Evolution (EDGE)

GSM (Global System for Mobile communication) is a digital mobile telephone

system that is widely used in Europe and other parts of the world. GSM uses a variation of

Time Division Multiple Access (TDMA) and is the most widely used of the three digital

wireless telephone technologies (TDMA, GSM, and CDMA). GSM digitizes and compresses

data, then sends it down a channel with two other streams of user data, each in its own time

slot. It operates at either the 900 MHz or 1,800 MHz frequency band.

GSM is the de facto wireless telephone standard in Europe. GSM has over one billion

users worldwide and is available in 190 countries. Since many GSM network operators have

roaming agreements with foreign operators, users can often continue to use their mobile

phones when they travel to other countries.

Mobile Frequency RangeRx : 925-960; Tx: 880-915

Multiple Access Method : TDMA/FDM

Duplex Method : FDD

Number of Channels1 24 (8 users per channel)

Channel Spacing : 200kHz

Modulation : GMSK (0.3 Gaussian Filter)

Channel Bit Rate 270.833Kb

Network structure

The network behind the GSM system seen by the customer is large and

complicated in order to provide all of the services which are required. It is divided into a

number of sections and these are each covered in separate articles.

The Base Station Subsystem (the base stations and their controllers).

The Network and Switching Subsystem (the part of the network most similar to a

fixed network). This is sometimes also just called the core network.

The GPRS Core Network (the optional part which allows packet based Internet

connections).

All of the elements in the system combine to produce many GSM services such as

voice calls and SMS.

One of the key features of GSM is the Subscriber Identity Module (SIM), commonly

known as a SIM card. The SIM is a detachable smart card containing the user's subscription

information and phonebook. This allows the user to retain his or her information after

switching handsets. Alternatively, the user can also change operators while retaining the

handset simply by changing the SIM. Some operators will block this by allowing the phone to

use only a single SIM, or only a SIM issued by them; this practice is known as SIM locking,

and is illegal in some countries.

In Australia, Canada, Europe and the United States many operators lock the mobiles

they sell. This is done because the price of the mobile phone is typically subsidised with

revenue from subscriptions, and operators want to try to avoid subsidising competitor's

mobiles. A subscriber can usually contact the provider to remove the lock for a fee, utilize

private services to remove the lock, or make use of ample software and websites available on

the Internet to unlock the handset themselves. While most web sites offer the unlocking for a

fee, some do it for free. The locking applies to the handset, identified by its International

Mobile Equipment Identity (IMEI) number, not to the account (which is identified by the

SIM card). It is always possible to switch to another (non-locked) handset if such a handset is

available.

Some providers will unlock the phone for free if the customer has held an account for

a certain time period. Third party unlocking services exist that are often quicker and lower

cost than that of the operator. In most countries, removing the lock is legal. United States-

based T-Mobile provides free unlocking services to their customers after 3 months of

subscription.

In some countries such as Belgium, India, Indonesia, Pakistan, and Malaysia, all

phones are sold unlocked. However, in Belgium, it is unlawful for operators there to offer any

form of subsidy on the phone's price. This was also the case in Finland until April 1, 2006,

when selling subsidized combinations of handsets and accounts became legal, though

operators have to unlock phones free of charge after a certain period (at most 24 months).

GSM security

GSM was designed with a moderate level of security. The system was designed to

authenticate the subscriber using a pre-shared key and challenge-response. Communications

between the subscriber and the base station can be encrypted. The development of UMTS

introduces an optional USIM, that uses a longer authentication key to give greater security, as

well as mutually authenticating the network and the user - whereas GSM only authenticated

the user to the network (and not vice versa). The security model therefore offers

confidentiality and authentication, but limited authorization capabilities, and no non-

repudiation.

GSM uses several cryptographic algorithms for security. The A5/1 and A5/2 stream

ciphers are used for ensuring over-the-air voice privacy. A5/1 was developed first and is a

stronger algorithm used within Europe and the United States; A5/2 is weaker and used in

other countries. A large security advantage of GSM over earlier systems is that the

cryptographic key stored on the SIM card is never sent over the wireless interface. Serious

weaknesses have been found in both algorithms, however, and it is possible to break A5/2 in

real-time in a ciphertext-only attack. The system supports multiple algorithms so operators

may replace that cipher with a stronger one.

The Future of GSM

GSM together with other technologies is part of an evolution of wireless mobile

telecommunication that includes High-Speed Circuit-Switched Data (HSCSD), General

Packet Radio System (GPRS), Enhanced Data rate for GSM Evolution (EDGE), and

Universal Mobile Telecommunications Service (UMTS).

HSCSD (High Speed Circuit Switched Data)

It is a specification for data transfer over GSM networks. HSCSD utilizes up to four

9.6Kb or 14.4Kb time slots, for a total bandwidth of 38.4Kb or 57.6Kb. 14.4Kb time slots are

only available on GSM networks that operate at1,800MHz. 900Mhz GSM networks are

limited to 9.6Kb time slots. Therefore, HSCSD is limited to 38.4Kbps on 900Mhz GSM

networks. HSCSD can nly achieve 57.6Kbps on 1,800Mhz GSM networks.

General Packet Radio System (GPRS)

GPRS (General Packet Radio Service) is a packet based wireless communication service

that offers data rates from 9.05 up to 171.2 Kbps and continuous connection to the Internet

for mobile phone and computer users. GPRS is based on GSM communications and

complements existing services such as circuit switched cellular phone connections and the

Short Message Service (SMS).

GPRS represents the bridge between 2G and 3G mobile telecommunications and is

commonly referred to as 2.5G.

GPRS implementation requires modification of existing GSM networks, because

GSM is a circuit switched technology while GPRS is packet oriented. GPRS enables packet

data (the same as is used by an Ethernet LAN, WAN or the Internet) to be sent to and from a

mobile station - e.g. mobile phone, PDA or Laptop.

WAP and SMS can also be sent using GPRS and individuals working with GPRS

need to learn and understand how the mobile stations, the air interface, network architecture,

protocol structures and signaling procedures must be modified.

GPRS offers much higher data rates than GSM and can be combined with 3G

technologies such as EDGE (Enhanced Data-Rates for GSM Evolution) to give even higher

bit-rates. It offers many benefits for customers and network operators: such as volume (rather

then time) dependent billing and more efficient use of network resources.

Due to the worldwide delay in implementing 3G solutions such as CDMA and UMTS the

demand for GPRS is still growing.

GPRS Networks:

Offers detailed information ranging from standards to practical implementation

Answers 'how' and 'why' rather than just simply re-stating GPRS specifications

Provides comprehensive coverage in a single volume

Essential reading for all telecommunications project managers, field engineers,

technical staff in network operator and manufacturing organizations, GPRS application and

service developers, Datacom/IT engineers.

The comprehensive coverage also makes this a superb reference for students of

computer science, telecommunications and electrical engineering.

EDGE (Enhanced Data rate for GSM Evolution)

It is a specification for data transfer on GSM networks.EDGE features both a packet

capability, EGPRS (Enhanced General Packet Radio Service), and a circuit switched

capability, ESCD (Enhanced Circuit Switched Data).

EDGE packs up to 69.2Kbps into eight timeslots, for a total theoretical bandwidth of

473.6Kb. GERAN (GSM/EDGE Radio Access Network) is the name given to the 3GPP

standards for GSM/EDGE radio access.EDGE is an update to GPRS. In turn, EDGE will

eventually be replaced by WCDMA (Wideband Code Division Multiple Access).

GSM AT COMMANDS

AT

AT&D0

AT+IFC=00

ATCMGF=1

AT+CNMI=22000

AT commands features

1 Wavecom line settings

A serial link handler is set with the following default values (factory settings): autobaud, 8

bits data, 1 stop bit, no parity, RTS/CTS flow control. Please use the +IPR, +IFC and +ICF

commands to change these settings.

2 Command line

Commands always start with AT (which means ATtention) and finish with a <CR>

character.

3 Information responses and result codes

Responses start and end with <CR><LF>, except for the ATV0 DCE response format) and

the ATQ1 (result code suppression) commands.

If command syntax is incorrect, an ERROR string is returned.

If command syntax is correct but with some incorrect parameters, the +CME ERROR:

<Err> or +CMS ERROR: <SmsErr> strings are returned with different error codes.

If the command line has been performed successfully, an OK string is returned.

In some cases, such as “AT+CPIN?” or (unsolicited) incoming events, the product does not

return the OK string as a response. In the following examples <CR> and <CR><LF> are

intentionally omitted.

SIM Insertion, SIM Removal

SIM card Insertion and Removal procedures are supported. There are software

functions relying on positive reading of the hardware SIM detect pin. This pin state

(open/closed) is permanently monitored.

When the SIM detect pin indicates that a card is present in the SIM connector, the product

tries to set up a logical SIM session. The logical SIM session will be set up or not depending

on whether the detected card is a SIM Card or not.

The AT+CPIN? command delivers the following responses:

If the SIM detect pin indicates “absent”, the response to AT+CPIN? Is “+CME ERROR 10”

(SIM not inserted).

If the SIM detect pin indicates “present”, and the inserted Card is a SIM Card, the

response to AT+CPIN? is “+CPIN: xxx” depending on SIM PIN state.

If the SIM detect pin indicates “present”, and the inserted Card is not a SIM Card, the

response to AT+CPIN? is CME ERROR 10.

These last two states are not given immediately due to background initialization.

Between the hardware SIM detect pin indicating“present” and the previous results the

AT+CPIN? sends “+CME ERROR: 515” (Please wait, init in progress).

When the SIM detect pin indicates card absence, and if a SIM Card was previously

inserted, an IMSI detach procedure is performed, all user data is removed from the product

(Phonebooks, SMS etc.). The product then switches to emergency mode mode.

Background initialization

After entering the PIN (Personal Identification Number), some SIM user datafiles are

loaded into the product (Phonebooks, SMS status, etc.). Please be aware that it might take

some time to read a large phonebook.

The AT+CPIN? command response comes just after the PIN is checked. After this response

user data is loaded (in background). This means that some data may not be available just after

PIN entry is confirmed by ’OK’. The reading of phonebooks will then be refused by “+CME

ERROR: 515” or “+CMS ERROR: 515” meaning, “Please wait, service is not available, init

in progress”.

This type of answer may be sent by the product at several points:

when trying to execute another AT command before the previous one is completed

(before response),

when switching from ADN to FDN (or FDN to ADN) and trying to read the relevant

phonebook immediately,

when asking for +CPIN? status immediately after SIM insertion and before the

product has determined if the inserted card is a valid SIM Card.

AT&D0

Set DTR signal &D

Description

This commands controls the Data Terminal Ready (DTR) signal. DTR is a signal

indicating that the computer is ready for transmission.

I. To dial the remote MODEM odem, you need to use the terminal program. You should dial

the modem bysending the following command:

II. AT &D0 DT telephone number (Example: AT&D0 DT 1,2434456666)

III. The ‘&D0’ command tells the modem to not hang up the line when the DTR signal is

dropped. Since we will have to exit the terminal program, the communications port is reset

and the DTR signal is dropped. If the modem disconnected at this point, we wouldn’t be able

to connect to the PLC with DirectSoft. With some modems (US Robotics included) terminal

must be configured to not insert a carriage return (CR) automatically after each command.

The carriage return cancels out the Dial request. Look under “Terminal Preferences”.

IV. OK, assuming you have used the command above to connect to the remote site, you will

have to exit the terminal program COMPLETELY. Let me repeat that. You will have to exit

the terminal program completely. Otherwise, DirectSoft will not be able to get control of the

communications port and you will not be able to get online.

V. Start DirectSoft like you would normally. Create a new link using the communications

port that your modem is connected to.

1.AT + IFC = (0,0)

Description

Command syntax : AT+IFC=<DCE_by_DTE>,<DTE_by_DCE> This command is used to

control the operation of local flow control between the DTE and DCE The terms DTE and

DCE are very common in the data communications market. DTE is short for Data Terminal

Equipment and DCE stands for Data Communications Equipment. But what do they really

mean? As the full DTE name indicates this is a piece of device that ends a communication

line, whereas the DCE provides a path for communication.

4.AT CMGF = 1

Description :

The message formats supported are text mode and PDU mode. In PDU mode, a

complete SMS Message including all header information is given as a binary string (in

hexadecimal format). Therefore, only the following set of characters is allowed:

{‘0’,’1’,’2’,’3’,’4’,’5’,’6’,’7’,’8’,’9’, ‘A’, ‘B’,’C’,’D’,’E’,’F’}. Each pair or characters is

converted to a byte (e.g.: ‘41’ is converted to the ASCII character ‘A’, whose ASCII code is

0x41 or 65). In Text mode, all commands and responses are in ASCII characters. The format

selected is stored in EEPROM by the +CSAS command.

5. AT+CNMI = 22000

AT+CNMI: New Message indication to TE

Command Possible response(s)

+CNMI=[<mode>[,<mt>[,<bm>[,<ds>[,<bfr>]]]]]  

+CNMI?+CNMI:

<mode>,<mt>,<bm>,<ds>,<bfr>

+CNMI=?+CSCB: (list of supported

<mode>s,<mt>s,<bm>s,<ds>s,<bfr>s)

<mode>: 0: buffer in TA;

1: discard indication and reject new SMs when TE-TA link is reserved; otherwise forward

directly;

2: buffer new Sms when TE-TA link is reserved and flush them to TE after reservation;

otherwise forward directly to the TE;

3: forward directly to TE; <mt>: 0: no SMS-DELIVER are routed to TE;

1: +CMTI: <mem>,<index> routed to TE;

2: for all SMS_DELIVERs except class 2: +CMT: .... routed to TE;class 2 is indicated as in

<mt>=1;

3: Class 3: as in <mt>=2;

other classes: As in <mt>=1;

<bm>: same as <mt>, but for CBMs;

<ds>: 0: No SMS-STATUS-REPORT are routed to TE;

1: SMS-STATUS-REPORTs are routed to TE, using +CDS: ...

<bfr>: 0: TA buffer is flushed to TE (if <mode>=1..3);

1: TA buffer is cleared (if <mode>=1..3);

---> Only when <mt> is different from 0, you will get a message that a new SMS has been

received.

Steps using AT commands to send and receive SMS using a GSM modem from a computer

1.Setting up a gsm modem

2.Using the hyperterminal

3.Initial Setup AT commands

4.Sending sms using AT commands

5.Receiving sms using AT commands

6.Using a computer program to send and receive sms

After succesfully sending and receiving SMS using AT commands via the

HyperTerminal, developers can 'port' the ASCII instructions over to their programming

environment, eg. Visual Basic, C/C++ or Java and also programmically parse ASCII

messages from modem.

1. Setting up your GSM modem

Most GSM modems comes with a simple manual and necessary drivers. To setup your

T-ModemUSB, download the USB GSM Modem Quick Start ( Windows ) guide (460kB

PDF). You would be able to send SMS from the Windows application and also setup GPRS

connectivity. The GSM modem will map itself as a COM serial port on your computer.

Windows based control panel to setup GSM modem, GPRS and send SMS

2. Using the hyperterminal

Hint :: By developing your AT commands using HyperTerminal, it will be easier for you to

develop your actual program codes in VB, C, Java or other platforms.

Go to START\Programs\Accessories\Communications\HyperTerminal (Win 2000)

to create a new connection, eg. "My USB GSM Modem". Suggested settings ::

 - COM Port :: As indicated in the T-Modem Control Tool 

 - Bits per second :: 230400 ( or slower ) -Data Bits : 8  - Parity : None-

StopBitsFlowControl:HardwareYou are now ready to start working with AT commands.

Type in "AT" and you should get a "OK", else you have not setup your HyperTerminal

correctly. Check your port settings and also make sure your GSM modem is properly

connected and the drivers installed.

3. Initial setup AT commands

We are ready now to start working with AT commands to setup and check the status

of the GSM modem.

AT Returns a "OK" to confirm that modem is working

AT+CPIN="xxxx"   To enter the PIN for your SIM ( if enabled )

AT+CREG? A "0,1" reply confirms your modem is connected to GSM network

AT+CSQ Indicates the signal strength, 31.99 is maximum.

4. Sending SMS using AT commands

We suggest try sending a few SMS using the Control Tool above to make sure your

GSM modem can send SMS before proceeding. Let's look at the AT commands involved ..

AT+CMGF=1 To format SMS as a TEXT message

AT+CSCA="+xxxxx"   Set your SMS center's number. Check with your provider.

To send a SMS, the AT command to use is AT+CMGS..

AT+CMGS="+yyyyy"<Enter>> Your SMS text message here <Ctrl-Z>

The "+yyyyy" is your receipent's mobile number. Next, we will look at

receivingSMSviaATcommands.

5. Receiving SMS using AT commands

The GSM modem can be configured to response in different ways when it receives a SMS.

a) Immediate - when a SMS is received, the SMS's details are immediately sent to the host

computer (DTE) via the +CMT command

AT+CMGF=1 To format SMS as a TEXT message

AT+CNMI=1,2,0,0,0   Set how the modem will response when a SMS is received

When a new SMS is received by the GSM modem, the DTE will receive the following

+CMT :  "+61xxxxxxxx" , , "04/08/30,23:20:00+40"

This the text SMS message sent to the modem

Your computer (DTE) will have to continuously monitor the COM serial port, read and parse

the message.

b) Notification - when a SMS is recieved, the host computer ( DTE ) will be notified of the new

message. The computer will then have to read the message from the indicated memory location and

clear the memory location.

AT+CMGF=1 To format SMS as a TEXT message

AT+CNMI=1,1,0,0,0   Set how the modem will response when a SMS is received

When a new SMS is received by the GSM modem, the DTE will receive the following ..

+CMTI: "SM",3 Notification sent to the computer. Location 3 in SIM memory

AT+CMGR=3 <Enter>  AT command to send read the received SMS from modem

The modem will then send to the computer details of the received SMS from the specified

memory location ( eg. 3 ) +CMGR: "REC READ","+61xxxxxx",,"04/08/28,22:26:29+40"

This is the new SMS received by the GSM modem

After reading and parsing the new SMS message, the computer (DTE) should send a AT

command to clear the memory location in the GSM modem..

AT+CMGD=3 <Enter>   To clear the SMS receive memory location in the GSMmodem If

the computer tries to read a empty/cleared memory location, a +CMS ERROR: 321 will be

sent to the computer.

6. Using a computer program to send and receive SMS

Once we are able to work the modem using AT commands, we can use high-level

programming ( eg. VB, C, Java ) to send the AT ASCII commands to and read

messages from the COM serial port that the GSM modem is attached to.

Hard Ware Coding

// for remote_display

#include<reg52.h>

#include<intrins.h>

#include<string.h>

#include "lcd.h"

#include "key.h"

bit flag = 0;

bit r_flag = 0;

bit sucess = 0;

int i=0;

#define CARD_CHARGE 1

#define CARD_DEDUCT 2

#define BALANCE 3

# define DEBUG 1

void cmd_lcd (unsigned char); /*FUNCTION FOR LCD COMMAND

*/

void write_lcd (unsigned char); /*FUNCTION FOR DISPLAY CHARCTER

*/

void init_lcd(); /*FUNCTION FOR LCD

INITIALIZATION */

void display_lcd(unsigned char *); /*FUNCTION FOR DISPLAY STRING */

void transmit(unsigned char *); /*TRANSMITING STRING TO MODEM

*/

void integer_lcd(int);

unsigned char RxCount = 0;

void read(void);

unsigned char status;

unsigned char ucCardId = 0;

unsigned int guiCharge[4] = {0,0,0,0};

void CardCharging(unsigned char ucCardId);

void Ticketing(unsigned char ucCardId);

void Balance(unsigned char ucCardId);

void Transaction(unsigned char ucCardId, unsigned char ucTransactionType);

char getval(void);

void option(unsigned int);

char idata buff[100];

char idata num[15];

char idata mes[10]="WELCOME TO";

void send_chr(unsigned char);

bit vl=0,li=0;

void serial_intr(void) interrupt 4

{

if(TI==1)

{

TI=0;

flag=1;

}

else

{

RI=0;

r_flag=1;

if(i<150)

buff[i++]=SBUF;

}

}

void print(char *str)

{

while(*str)

{

flag=0;

SBUF=*str++;

while(flag==0);

}

}

unsigned char m;

void main()

{

int I;

char t=0;

TMOD=0x21;

SCON=0x50;

TH1=0XFD;

TR1=1;

IE=0X92;

TH0=0X00;

TL0=0X00;

init_lcd();

display_lcd("GSM BASED");

cmd_lcd(0XC0);

display_lcd("ATM TERMINAL");

delay_ms(3000);

cmd_lcd(0x01);

display_lcd("INITIALIZING");

i=0;

print("AT+CMGF=1\r\n");

delay_ms(100);

sucess=0;

do

{

strcpy(buff," ");

r_flag=0;

i=0;

print("AT+CMGD=1,4\r\n");

while(i<16)

delay_ms(100);

cmd_lcd(0xc0);

display_lcd("MESSAGES DELETED");

// display_lcd(buff);

delay_ms(1000);

I=0;

while(buff[I]!='\0')

{

if(buff[I++]=='E')

sucess=1;

}

delay_ms(1000);

}while(sucess!=1);

cmd_lcd(0x01);

display_lcd("MESSAGE DELETED");

delay_ms(1000);

while(1)

{

sucess=0;

init_lcd();

display_lcd("GSM BASED");

cmd_lcd(0XC0);

display_lcd("ATM TERMINAL");

delay_ms(200);

do

{

i=0;

strcpy(buff,'"');

r_flag=0;

do

{

i=0;

strcpy(buff,'"');

}

while(r_flag==0);

delay_ms(100);

if(buff[2]=='+')

sucess=1;

} while(sucess!=1);

cmd_lcd(0x01);

display_lcd("MESSAGE RECIVED");

delay_ms(1000);

i=0;

strcpy(buff,'"');

print("AT+CMGR=1\r\n");

delay_ms(1000);

I=0;

while(buff[I++]!=',');

cmd_lcd(0x01);

display_lcd("CELL NO:");

cmd_lcd(0xc0);

//I=I+4;

t=0;

while(buff[I]!='"');

buff[I++];

do

{

num[t++]=buff[I++];

delay_ms(50);

}

while(buff[I]!='"');

num[t]='\0';

// cmd_lcd(0x01);

display_lcd(num);

delay_ms(1000);

cmd_lcd(0x01);

cmd_lcd(0xc0);

while(buff[I]!='"')

(buff[I++]);

while(buff[I]!='"')

(buff[I++]);

while(buff[I++]!=0x0d);

cmd_lcd(0x01);

display_lcd("MESSAGE READING");

cmd_lcd(0xc0);

buff[I++];

//write_lcd(buff[I]);

//delay_ms(1000);

t=0;

//while(buff[I]!='"');

//buff[I++];

do

{

mes[t++]=buff[I++];

delay_ms(50);

}

while(buff[I]!=0x0d);

mes[t]='\0';

delay_ms(200);

cmd_lcd(0x01);

display_lcd(mes);

delay_ms(2000);

if(strcmp(mes,"p423") == 0)

{

cmd_lcd(0x01);

display_lcd("PASSWORD OK");

delay_ms(2000);

option(0);

}

else

{

cmd_lcd(0x01);

display_lcd("sending sms.....");

print("AT+CMGS=");

send_chr('"');

print(num);

send_chr('"');

print("\r\n");

print("SEND PASSWORD");

print("\r\n");

send_chr(0x1A);

send_chr(0x1A);

delay_ms(500);

cmd_lcd(0x01);

display_lcd("Message sent");

}

//delay_ms(2000);

sucess=0;

do

{

strcpy(buff," ");

r_flag=0;

i=0;

print("AT+CMGD=1,0\r\n");

while(i<14);

delay_ms(100);

I=0;

while(buff[I]!='\0')

{

if(buff[I++]=='E')

sucess=1;

}

delay_ms(500);

}while(sucess!=1);

cmd_lcd(0x01);

}

}

void send_chr(unsigned char c)

{

flag=0;

SBUF=c;

while(flag==0);

}

void option(unsigned int ucCardId)

{

cmd_lcd(0x01);

//write_lcd(OK);

display_lcd("1.WITHDRAW");

cmd_lcd(0xC0);

display_lcd("2.DEPOSIT");

cmd_lcd(0xCA);

display_lcd("3.VIEW");

//buzzer=1;

//delay_ms(1000);

//buzzer=0;

status=getval();

switch(status)

{

case '1':

init_lcd();

display_lcd("WITHDRAW MODE");

delay_ms(1000);

Ticketing(ucCardId);

break;

case '2':

init_lcd();

display_lcd("DEPOSIT MODE");

delay_ms(1000);

CardCharging(ucCardId);

break;

case '3':

init_lcd();

display_lcd("VIEW MODE");

delay_ms(1000);

Balance(ucCardId);

break;

default:

init_lcd();

write_lcd(status);

write_lcd('-');

display_lcd("Wrong Key...");

///break;

}

}

char getval(void){

unsigned char key;

while(!(key=getkey()));

key = translate(key);

return key;

}

void CardCharging(unsigned char ucCardId)

{

Transaction(ucCardId, CARD_CHARGE);

}

void Ticketing(unsigned char ucCardId)

{

Transaction(ucCardId, CARD_DEDUCT);

}

void Balance(unsigned char ucCardId)

{

/////////////////////guiCharge[ucCardId]=a;

init_lcd();

display_lcd("UR BALANCE ");

cmd_lcd(0xc0);

integer_lcd(guiCharge[ucCardId]);

delay_ms(2000);

}

void Transaction(unsigned char ucCardId, unsigned char ucTransactionType)

{

unsigned char ucKeys[4];

unsigned int uiChargeAmount;

unsigned int a,b,c,d;

////////////////////////////guiCharge[ucCardId]=1000;

init_lcd();

display_lcd("UR BALANCE ");

cmd_lcd(0xc0);

integer_lcd(guiCharge[ucCardId]);

delay_ms(2000);

init_lcd();

display_lcd("ENTER THE AMOUNT");

cmd_lcd(0xc0);

display_lcd("FOUR DIGIT");

delay_ms(1000);

//init_lcd();

cmd_lcd(0x01);

display_lcd("ENTER THE AMOUNT");

cmd_lcd(0xc0);

ucKeys[0] =getval();

write_lcd(ucKeys[0]);

ucKeys[1] =getval();

write_lcd(ucKeys[1]);

ucKeys[2] =getval();

write_lcd(ucKeys[2]);

ucKeys[3] =getval();

write_lcd(ucKeys[3]);

delay_ms(100);

cmd_lcd(0x01);

display_lcd("PRESS '#' TO");

cmd_lcd(0xc0);

display_lcd("CONTINUE....");

c=getval();

while(c!='e');

uiChargeAmount = (((ucKeys[0]-0x30) * 1000) + ((ucKeys[1]-0x30) * 100) +

((ucKeys[2]-0x30) * 10) + (ucKeys[3]-0x30) );

delay_ms(2000);

if(ucTransactionType == CARD_CHARGE)

guiCharge[ucCardId] = (guiCharge[ucCardId] + uiChargeAmount);

else

{

if(uiChargeAmount > guiCharge[ucCardId])

{

init_lcd();

display_lcd("NO BALANCE");

delay_ms(1000);

return;

}

guiCharge[ucCardId] = (guiCharge[ucCardId] - uiChargeAmount);

}

delay_ms(2000);

init_lcd();

display_lcd("UR BALANCE");

cmd_lcd(0xc0);

integer_lcd(guiCharge[ucCardId]);

delay_ms(2000);

/* a=guiCharge[ucCardId]/1000;

d=guiCharge[ucCardId]%1000;

b=d/100;

d=d%100;

//d=c;

c=d/10;

d=d%10;

cmd_lcd(0x01);

display_lcd("SAVING");

delay_ms(1000);

write_i2c(0xa0,ucCardId+10,a);

write_i2c(0xa0,ucCardId+20,b);

write_i2c(0xa0,ucCardId+30,c);

write_i2c(0xa0,ucCardId+40,d);

delay_ms(1000);

a=read_i2c(0xa0,ucCardId+10);

b=read_i2c(0xa0,ucCardId+20);

c=read_i2c(0xa0,ucCardId+30);

d=read_i2c(0xa0,ucCardId+40);

guiCharge[ucCardId]=a*1000+b*100+c*10+d;

init_lcd();

display_lcd("UR BALANCE ");

cmd_lcd(0xc0);

integer_lcd(guiCharge[ucCardId]);

delay_ms(2000); */

}

//keypad display

#define EXIT 3

#define TRUE 1

#define FALSE 0

//bit check(unsigned char *,unsigned char *,unsigned char);

//void setulock();

char getinput(void);

//unsigned char input[2];

#define keyport P0

sbit col1 = P0^0;

sbit col2 = P0^1;

sbit col3 = P0^2;

void keypad_init();

unsigned char getkey();

unsigned char translate(unsigned char);

bit keystatus = FALSE;

void keypad_init(){

keyport &=0x07;

}

unsigned char getkey(){

unsigned char i,j,k,key=0,temp;

k=1;

for(i=0;i<5;i++){

keyport &=~(0x80>>i);

temp = keyport;

temp &= 0x07;

if(7-temp){

if(!col1){

key = k+0;

while(!col1);

return key;

}

if(!col2){

key = k+1;

while(!col2);

return key;

}

if(!col3){

key = k+2;

while(!col3);

return key;

}

j++;

}

k+=3;

keyport |= 0x80>>i;

delay_ms(10);

}

return FALSE;

}

unsigned char translate(unsigned char keyval){

if(keyval<10)

return keyval+'0';

else if(keyval==10)

return 'x';

else if(keyval==11)

return '0';

else if(keyval==12)

return 'e';

else if(keyval==13)

return '1';

else if(keyval==14)

return '2';

else if(keyval==15)

return '3';

}

char getinput(void){

unsigned char key;

while(!(key=getkey()));

key = translate(key);

return key;

}

//LCD display

#include <reg52.h>

#define LCD P2

void delay_ms(unsigned int i)

{

unsigned int j;

while(i-->0)

{

for(j=0;j<500;j++)

{

;

}

}

}

void cmd_lcd(unsigned char c)

{

unsigned char temp;

temp=c>>4;

LCD=temp<<4|0x02; //logical or with 0x02 since rs(rs=0) & en(en=1) are

LCD=0; //connected to p2.0 & p2.1 respectively

//transmit low byte

LCD=c<<4|0x02;

LCD=0;

delay_ms(2); //delay 2 milliseconds

}

void init_lcd(void)

{

delay_ms(10); //delay 10 milliseconds

cmd_lcd(0x28); //4 bit initialize, 5x7 character font, 16x2 display

cmd_lcd(0x0c); //lcd on, cursor on

cmd_lcd(0x06); //right shift cursor automatically after each character is displayed

cmd_lcd(0x01); //clear lcd

}

void write_lcd(unsigned char c)

{

unsigned char temp;

temp=c>>4;

LCD=temp<<4|0x03; //logical or with 0x03 since rs(rs=1) & en(en=1) are

LCD=0;

LCD=c<<4|0x03;

LCD=0;

delay_ms(2);

}

void display_lcd(unsigned char *s)

{

while(*s)

write_lcd(*s++);

}

void integer_lcd(int n)

{

unsigned char c[6];

unsigned int i=0;

if(n<0)

{

// SBUF='-';

write_lcd('-');

n=-n;

}

if(n==0)

{

write_lcd('0');

//SBUF='0';

}

while(n>0)

{

c[i++]=(n%10)+48;

n/=10;

}

while(i-->=1)

{

write_lcd(c[i]);

//SBUF=c[i];

delay_ms(50);

}

}

/*void integer_lcd1(int n)

{

unsigned char c[6];

unsigned int i=0;

if(n<0)

{

// SBUF='-';

write_lcd('-');

n=-n;

}

if(n==0)

{

write_lcd('0');

///SBUF='0';

}

while(n>0)

{

c[i++]=(n%10)+48;

n/=10;

}

while(i-->=1)

{

write_lcd(c[i]);

// SBUF=c[i];

delay_ms(50);

}

}*/

/*void float_lcd(float f)

{

int n;

float temp;

n=f;

integer_lcd(n);

write_lcd('.');

SBUF='.';

temp=f-n;

if(temp>=0.00&&temp<=0.09)

{

write_lcd('0');

SBUF='0';

}

f=temp*100;

n=f;

integer_lcd(n);

}

*/

Conclusion

Thus, through our project when an person gets his/her ATM card damaged or in any

emergency with drawl of money when card is not present. Through the SIM module and by

SMS sending through GSM modem one can easily access their account. This can be further

developed in the security basis by providing one time password.