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A Wideband Lumped-Element Model for Arbitrarily Shaped Integrated Inductors abio Passos, M. Helena Fino New University of Lisbon Faculty of Science and Technology 2829-516 Caparica, Portugal Email: [email protected] ; hfi[email protected] Elisenda Roca Institute of Microelectronics of Seville, CNM CSIC and University of Seville 41092 Seville, Spain Email: [email protected] Abstract—In this paper a model based on lumped elements is used to characterize integrated inductors. The method proposed allows the modelling of integrated inductors for a wide range of frequencies, thus granting the overall characterization of the device and the evaluation of important design parameters such as inductance, quality factor and resonance frequency. The model can easily be applied to any polygonal shape inductor due to its inductance calculation through self and mutual inductances. Electromagnetic simulations results are presented to demonstrate the validation of the model. Index Terms—Integrated inductor modelling, CMOS Analog integrated circuits, RF IC Design. I. I NTRODUCTION The general lack of accurate analythical models for appli- cations up to 10 GHz, presents one of the most challenging problems for silicon-based radio frequency integrated circuits. This lack of models leads RF designers to design inductors through a time consuming process of EM simulation and silicon verification [1] [2]. Furthermore, as the design of integrated inductors involves the determination of a set of correlated geometrical parameters, it is usually accomplished through the use of optimization-based approaches. To integrate EM simulation in an optimization loop is a time prohibitive solution. Thus several lumped-element inductor models have been proposed, such as the well known π-model. The model presented in this work is based on the π-model and provides the means to design integrated inductors of any layout, such as square, hexagonal, octagonal and also tapered inductors, which are known for their improved quality factor [3], while being valid for a wide range of frequencies. The model is explained in detail in Section II. Afterwards, in Section III, results are presented and the model is validated. Finally, in Section IV, conclusions are presented. II. I NTEGRATED I NDUCTOR MODEL Lumped-element inductor models are related to the physical parameters of an integrated inductor. Fig. 1, illustrates a typical This research work has been partially supported by the TEC2010-14825 Project, funded by the Spanish Ministry of Economy and Competitiveness (with support from the European Regional Development Fund). This work was supported by national funds through FCT - Fundao para a Ciłncia e Tecnologia under project PEst-OE/EEI/UI0066/2011 . Figure 1. Square inductor and its physical parameters. Figure 2. Model explanation with an inductor trimmed and the π model. square integrated inductor, where n is the number of turns, w, the width of the metal turn, s, the spacing between metal turns, D out , the outer diameter and, finally, D in , the inner diameter. The model used in this work is based on the segment model approach [4]. The inductor is divided into segments and then each segment is characterized with a π lumped-element circuit, as shown in Fig. 2. The series branch of this model, consists of L s , R s and C p . The series resistance, R s arises from metal resistivity of the inductor and is closely related to the quality factor, being a key issue for inductor modelling. The series feedforward capacitance, C p , has usually been considered as the overlap capacitance between the spirals and the underpass metal lines, also called C o . However, as the minimum feature size of CMOS process continues to shrink, the spacing between metal spirals, s, can be reduced to a value similar to the distance to the underpass. Therefore the coupling capacitance between metal lines, C s , can play a major role in the total capacitance of the device, and therefore in the self resonance frequency (SRF), which is the frequency at which the inductor behaviour becomes capacitive. C p is then given by the sum of C s and C o . The capacitance C ox represents the oxide capacitance between the spiral and the substrate. The silicon substrate is modelled with C sub and R sub [5]. In the following sections each lumped-element of the model

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Page 1: [IEEE 2013 European Conference on Circuit Theory and Design (ECCTD) - Dresden, Germany (2013.9.8-2013.9.12)] 2013 European Conference on Circuit Theory and Design (ECCTD) - A wideband

A Wideband Lumped-Element Model for ArbitrarilyShaped Integrated Inductors

Fabio Passos, M. Helena FinoNew University of Lisbon

Faculty of Science and Technology

2829-516 Caparica, Portugal

Email: [email protected] ; [email protected]

Elisenda RocaInstitute of Microelectronics of Seville, CNM

CSIC and University of Seville

41092 Seville, Spain

Email: [email protected]

Abstract—In this paper a model based on lumped elements isused to characterize integrated inductors. The method proposedallows the modelling of integrated inductors for a wide rangeof frequencies, thus granting the overall characterization of thedevice and the evaluation of important design parameters such asinductance, quality factor and resonance frequency. The modelcan easily be applied to any polygonal shape inductor due toits inductance calculation through self and mutual inductances.Electromagnetic simulations results are presented to demonstratethe validation of the model.

Index Terms—Integrated inductor modelling, CMOS Analogintegrated circuits, RF IC Design.

I. INTRODUCTION

The general lack of accurate analythical models for appli-

cations up to 10 GHz, presents one of the most challenging

problems for silicon-based radio frequency integrated circuits.

This lack of models leads RF designers to design inductors

through a time consuming process of EM simulation and

silicon verification [1] [2]. Furthermore, as the design of

integrated inductors involves the determination of a set of

correlated geometrical parameters, it is usually accomplished

through the use of optimization-based approaches. To integrate

EM simulation in an optimization loop is a time prohibitive

solution. Thus several lumped-element inductor models have

been proposed, such as the well known π-model. The model

presented in this work is based on the π-model and provides

the means to design integrated inductors of any layout, such

as square, hexagonal, octagonal and also tapered inductors,

which are known for their improved quality factor [3], while

being valid for a wide range of frequencies.The model is explained in detail in Section II. Afterwards,

in Section III, results are presented and the model is validated.

Finally, in Section IV, conclusions are presented.

II. INTEGRATED INDUCTOR MODEL

Lumped-element inductor models are related to the physical

parameters of an integrated inductor. Fig. 1, illustrates a typical

This research work has been partially supported by the TEC2010-14825Project, funded by the Spanish Ministry of Economy and Competitiveness(with support from the European Regional Development Fund).

This work was supported by national funds through FCT - Fundao para aCiłncia e Tecnologia under project PEst-OE/EEI/UI0066/2011 .

Figure 1. Square inductor and its physical parameters.

Figure 2. Model explanation with an inductor trimmed and the π model.

square integrated inductor, where n is the number of turns, w,

the width of the metal turn, s, the spacing between metal turns,

Dout, the outer diameter and, finally, Din, the inner diameter.

The model used in this work is based on the segment model

approach [4]. The inductor is divided into segments and then

each segment is characterized with a π lumped-element circuit,

as shown in Fig. 2.

The series branch of this model, consists of Ls, Rs and

Cp. The series resistance, Rs arises from metal resistivity of

the inductor and is closely related to the quality factor, being

a key issue for inductor modelling. The series feedforward

capacitance, Cp, has usually been considered as the overlap

capacitance between the spirals and the underpass metal lines,

also called Co. However, as the minimum feature size of

CMOS process continues to shrink, the spacing between metal

spirals, s, can be reduced to a value similar to the distance

to the underpass. Therefore the coupling capacitance between

metal lines, Cs, can play a major role in the total capacitance

of the device, and therefore in the self resonance frequency

(SRF), which is the frequency at which the inductor behaviour

becomes capacitive. Cp is then given by the sum of Cs and Co.

The capacitance Cox represents the oxide capacitance between

the spiral and the substrate. The silicon substrate is modelled

with Csub and Rsub [5].

In the following sections each lumped-element of the model

Page 2: [IEEE 2013 European Conference on Circuit Theory and Design (ECCTD) - Dresden, Germany (2013.9.8-2013.9.12)] 2013 European Conference on Circuit Theory and Design (ECCTD) - A wideband

will be presented in detail, its physical meaning will be

explained and the formulas to calculate the elements are given.

A. Inductance

Inductance is the most critical parameter to model in

integrated inductors. In 1946, Groved derived formulas for

inductance calculation of various structures [6]. Greenhouse

later applied those formulas to calculate the inductance of a

square shaped inductor [7]. The inductance is calculated as

follows,

Ls = L0 +Mp+ −Mp− (1)

where Ls is the total series inductance of the inductor, L0

is the self inductance of each segment, Mp+ is the mutual

inductance where the current flows in the same direction

whereas Mp− accounts for mutual inductance of the parallel

segments where currents flow in the opposite directions. Self

inductance is given by the following equation,

L0 = 2l

{ln

[2l

w + t

]+ 0.50049 +

w + t

3l

}(nH) (2)

where l is the length of the segment in cm, w is the width

and t is the metal thickness. The mutual inductances can be

calculated using,

M = 2 · l · U (3)

where l stands for segment length and U is the mutual

inductance factor, which is calculated through Eq. 4,

U = ln

⎡⎣ l

d+

√1 +

(l

d

)2⎤⎦−

√1 +

(d

l

)2

+d

l(4)

The distance between segments, d, is considered as the

geometric mean distance (GMD), between segments and cal-

culated by,

lnGMD = lnp− w2

12p2− w4

60p4− w6

168p6− w8

360p8− w10

660p10−···

(5)

where, p is the pitch of the two wires.

B. AC Series Resistance

When the inductor operates at high frequencies, the metal

line suffers from the skin and proximity effects, and Rs

becomes a function of frequency [8]. As a first-order approx-

imation, the current density decays exponentially away from

the metal-SiO2 interface, and Rs can be expressed as follows,

Rs =l · ρ

w · δ · teff (6)

where ρ is the resistivity of the wire, and teff is given by,

teff = (1− e−t/δ) (7)

where δ is the skin depth, which is a function of the frequency,

f in Hz and is given by,

δ =

√ρ

πfμ(8)

where μ is the permeability in H/cm.

C. Capacitances

Accurate modelling of turn-to-turn, Cs, turn to underpass,

Co, and turn-to-substrate, Cox capacitances is critical to obtain

Q and self-resonance frequency (SRF) accurate values. The

spiral to underpass capacitance Co, is given by the following

equation [9],

Co = N · w2 · εoxtM1−M2

(9)

where, tM1−M2 is the oxide thickness between spiral and the

underpass metal layer and N is the number of crossovers

between the spiral and the underpass metal. Traditionally Cs

and Cox are modelled using the parallel-plate capacitance

concept [10], however this method does not provides accuracy

over 10 GHz. For a good modelling at high frequencies,

the scalable distributed capacitance model should be used

[11]. To calculate the capacitances, we first define the lengths

of each segment as l1, l2,..., ln, and the total length as

ltot=l1+l2+...+ln, where ln is the length of the last segment of

the outer turn. Afterwards we define,

hk =

n∑k=1

lkltot

(10)

and the capacitances can be calculated with the following

formulas,

Cs =

n∑k=1

x · 43Cmmlk

[(hk − hk−1)

2 + (hk+1 − hk)2]

(hk+1 − hk−1)2+

x · 43Cmmlk

([hk+1 − hk)(hk − hk−1)]

(hk+1 − hk−1)2(11)

Cox =n∑

k=1

1

2· 43Cmslk·[

(1− hk−1)2 + (1− hk)

2 + (1− hk)(1− hk−1)]

3(2− hk − hk−1)2(12)

An empirical scale factor x, of 1/3 of the total Cp capac-

itance for each segment is shown to match the distributed

capacitance for simulations over a wide range of physical

parameters and layouts. This empirical capacitance factor is

then used as a fitting parameter to the measured SRF and Qover a large set of inductors.

The 1/2 factor in Cox, is due to the fact that the capacitance

is divided into two in the π-model. Cmm and Cms, are the

unit length capacitance between the metal spirals and the

unit length capacitance between the metal and the substrate,

Page 3: [IEEE 2013 European Conference on Circuit Theory and Design (ECCTD) - Dresden, Germany (2013.9.8-2013.9.12)] 2013 European Conference on Circuit Theory and Design (ECCTD) - A wideband

respectively. Normally these are extracted from measured data,

but they can be approximated as follows [12],

Cmm =ε0εsiO2 · t

s(13)

Cms =ε0εsiO2

· whsiO2

(14)

where ε0 is the vacuum permittivity and εsiO2is the relative

permittivity. hsiO2 is the distance from the metal to substrate.

D. Substrate Resistance and Capacitance

The substrate resistance is crucial for accurately modelling

of the peak Q and the shape of the Q curve, along with the

series resistance Rs. This resistance can be calculated by Eq.

15, given in [9] and [13].

Rsub =2

l · w ·Gsub(15)

where Gsub is the conductance per unit area for the silicon

substrate and can be approximated by [12],

Gsub =σsi

hsi

(16)

where σsi is the conductivity of the silicon substrate and hsi its

the thickness of the substrate. The capacitance which models

the substrate is of secondary order [2], and normally it can

be approximated using a simple fringing capacitance model

as the one given in [13]. However for a modelling at high

frequencies, it is necessary a model that takes into account

the skin and proximity effects, such as the one given by the

following equations [4],

Δw =t

π· ln

⎡⎣4 · e

/√(t

hsi

)2

+

(1/π

w/t+ 1.1

)2⎤⎦ (17)

Δw′ =(1 +

1

ε0εsi

)· Δw

2(18)

Csub =1

2· w +Δw′

hsi

· ε0εsi (19)

Again, the 1/2 factor in Csub, is due to the fact that the

capacitance is divided into two in the π-model.

III. RESULTS AND MODEL VALIDATION

In this section we present the results obtained with the

proposed model. In order to validate the model, comparisons

will be made to EM simulation with ADS Momentum [14].

Additionally, results are also compared to ASITIC, an elec-

tromagnetic simulator which has been widely used by the RF

community for inductor simulations [15]. Simulations were

made for square, hexagonal and octagonal inductors. Inductors

layout was generated with ASITIC and then exported to ADS

Momentum. It is important to mention that ASITIC does not

take into consideration the underpass metal for hexagonal

and octagonal layouts, so the underpass was drawn in ADS

Table ILs RESULTS FOR THE PROPOSED MODEL, ASITIC AND EM ADS

MOMENTUM SIMULATIONS.

Sides n LM Last LADS εM (%) εAST (%)

4 2 3.48 3.45 3.45 0.99 0.154 3 6.55 6.44 6.46 1.39 0.314 4 9.89 9.71 9.77 1.23 0.614 5 13.25 13.03 13.24 0.08 1.596 2 3.05 2.81 3.00 3.15 6.506 3 5.90 5.23 5.65 4.44 7.436 4 9.20 7.88 8.60 6.98 8.376 5 12.24 10.56 11.68 7.96 9.598 2 3.30 2.97 3.17 4.10 6.188 3 6.40 5.58 6.00 6.67 7.008 4 9.91 9.79 9.25 7.14 5.848 5 13.40 11.46 12.60 6.35 9.05

Momentum. The technology used was UMC 130 nm, with

the inductors being implemented in the top most metal layer

available (metal 8), which has thickness, t=2 μm. The square

inductors have an area of 350×350 μm2 and the hexagonal

and octagonal inductors have an area of 400×400 μm2. All

the inductors have a metal width, w=10 μm and a spacing

between metals, s=2.5 μm.

Table I shows the results for the DC inductance in nH,

obtained by the model, as well as the values obtained by EM

simulation and ASITIC. The error presented as εM , is the error

of the model compared to EM simulation, and, εAST , is the

error of ASITIC compared to EM simulation. The fact that

ASITIC does not take into consideration the underpass metal

in hexagonal and octagonal layouts might be the cause for the

larger errors in the ASITIC results.

Table II summarizes the results for the quality factor and

SRF (in GHz) values, and the errors obtained for each parame-

ter. The Q value is measured at the highest frequency at which

the inductor can be used, which corresponds to a maximum 5%increase in DC inductance. As previously mentioned, ASITIC

does not consider the underpass metal, therefore neglecting

the capacitance Co, inducing higher errors in SRF.

Fig. 3, Fig. 4 and Fig. 5 illustrate typical curves for induc-

tance and quality factor. For square, hexagonal and octagonal

inductors with 3 and 4 turns, respectively. Fig. 3 also presents a

curve for a tapered square inductor with 4 turns, thus showing

that this method is also valid for tapered inductors.

The model presents quality factor errors of an average value

of 4% with respect to EM simulations, which are smaller than

the 11% in ASITIC. The SRF value has an average error value

of 5% and ASITIC presents an average error of 25%, when

compared with EM simulations.

IV. CONCLUSION

In this paper we have introduced an efficient integrated

inductor model for the prediction of the inductance, quality

factor and self-resonance frequency for several layouts. The

results were compared with EM simulations and the field

solver ASITIC, where the model has proven its validity for

different layouts topologies, with all results showing low devi-

ations with respect to the EM Simulations. It may be observed

that generally the model achieves a higher accuracy when

Page 4: [IEEE 2013 European Conference on Circuit Theory and Design (ECCTD) - Dresden, Germany (2013.9.8-2013.9.12)] 2013 European Conference on Circuit Theory and Design (ECCTD) - A wideband

Table IISRF AND Q VALUES FOR THE PROPOSED MODEL, ASITIC AND EM ADS MOMENTUM SIMULATIONS.

Sides n SRFM SRFADS SRFAST εM (%) εAST (%) QM QADS QAST εM (%) εAST (%)

4 2 9.70 10.50 8.32 7.62 20.73 2.29 2.38 2.50 3.70 5.044 3 7.30 7.30 5.39 0.00 26.21 2.37 2.37 2.53 0.00 6.754 4 5.60 5.65 4.03 0.88 28.65 2.05 1.94 2.43 5.88 25.264 5 4.50 5.25 3.27 14.29 37.71 2.09 2.09 2.56 0.10 22.496 2 11.85 12.70 10.48 6.69 17.48 2.77 2.81 2.95 1.42 4.986 3 9.00 8.70 6.77 3.45 22.22 2.92 2.82 2.96 3.55 4.966 4 6.80 6.85 5.09 0.73 25.69 2.73 2.52 2.63 8.33 4.376 5 5.45 5.70 4.13 4.39 27.47 2.53 2.15 2.37 17.67 10.238 2 10.80 12.10 10.02 10.74 17.19 2.74 2.70 2.40 1.48 3.708 3 8.00 8.30 6.44 3.61 22.46 2.47 2.38 2.46 4.00 3.588 4 6.00 6.50 4.75 7.96 26.92 2.69 2.46 2.04 9.35 17.078 5 4.80 5.40 3.87 11.11 28.33 2.43 2.20 2.28 10.45 3.64

109 1010−40−20

02040

Inductance−Frequency characteristic

Indu

ctan

ce (n

H)

Frequency (Hz)

108 109 10100

5Quality Factor−Frequency characteristic

Qua

lity

Fact

or

Frequency (Hz)

Model

Model

EM Sim n=4 EM Sim n=3 EM Sim tapered n=4

Figure 3. EM simulation data (solid line) compared with the model for a 3and 4 turn square inductor and for a 4 turn square tapered inductor.

1010−40−20

02040

Inductance−Frequency characteristic

Indu

ctan

ce (n

H)

Frequency (Hz)

108 109 10100

2

4

Quality Factor−Frequency characteristic

Qua

lity

Fact

or

Frequency (Hz)

Model

Model

EM Sim n=4EM Sim n=3

Figure 4. EM simulation data (solid line) compared with the model for a 3and 4 turn hexagonal inductor.

1010−50

0

50Inductance−Frequency characteristic

Indu

ctan

ce (n

H)

Frequency (Hz)

108 109 10100

5Quality Factor−Frequency characteristic

Qua

lity

Fact

or

Frequency (Hz)

Model

Model

EM Sim n=3 EM Sim n=4

Figure 5. EM simulation data (solid line) compared with the model for a 3and 4 turn octagonal inductor.

compared to the field solver ASITIC. Yet the main advantage

of the proposed model, when compared to ASITIC, relies in

the possibility of being fully integrated into an optimization

based design tool.

REFERENCES

[1] M. P. Wilson, “Modeling of itegrated vco resonators using momentum,”in technical paper, Agilent Technologies publication, 2008.

[2] V. Blaschke and J. Victory, “A scalable model methodology for octagonaldifferential and single-ended inductors,” in Custom Integrated CircuitsConference, 2006. CICC ’06. IEEE, pp. 717 –720, sept. 2006.

[3] J. Lopez-Villegas, J. Samitier, C. Cane, P. Losantos, and J. Bausells,“Improvement of the quality factor of rf integrated inductors by layoutoptimization,” Microwave Theory and Techniques, IEEE Transactionson, vol. 48, no. 1, pp. 76–83, 2000.

[4] Y. Koutsoyannopoulos, Y. Papananos, C. Alemanni, and S. Bantas,“A generic cad model for arbitrarily shaped and multi-layer integratedinductors on silicon substrates,” in Solid-State Circuits Conference,1997. ESSCIRC ’97. Proceedings of the 23rd European, pp. 320 –323,sept. 1997.

[5] T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits.Cambridge University Press, 2004.

[6] F. W. Grover, “Inductance calculations: Working formulas and tables,”Courier Dover Publications, 1929.

[7] H. Greenhouse, “Design of planar rectangular microelectronic induc-tors,” IEEE J. Trans. PHP, vol. 10, no.2, pp. 101-109, June 1974.

[8] Y. Cao, R. Groves, X. Huang, N. Zamdmer, J.-O. Plouchart, R. Wachnik,T.-J. King, and C. Hu, “Frequency-independent equivalent-circuit modelfor on-chip spiral inductors,” Solid-State Circuits, IEEE Journal of,vol. 38, no. 3, pp. 419–426, 2003.

[9] J. Chen and J. J. Liou, “On-chip spiral inductors for rf applications: Anoverview,” Semiconductor Technology and Science, vol. 4, pp. 149–167,2004.

[10] C. Yue and S. Wong, “On-chip spiral inductors with patterned groundshields for si-based rf ics,” Solid-State Circuits, IEEE Journal of, vol. 33,no. 5, pp. 743–752, 1998.

[11] F. Huang, J. Lu, and N. Jiang, “scalable distributed capacitance modelfor silicon on-chip spiral inductors,” Microwave and optical technologyletters, 2006.

[12] H. Hasegawa, M. Furukawa, and H. Yanai, “Properties of microstripline on si-sio2 system,” Microwave Theory and Techniques, IEEETransactions on, vol. 19, no. 11, pp. 869–881, 1971.

[13] C. Yue and S. Wong, “Physical modeling of spiral inductors on silicon,”IEEE J. Transactions on Electron Devices, vol. 47, pp. 560–568, Mar.2000.

[14] A. Momentum, “Agilent technologies,” EEsof division, Santa Rosa, CA,2006.

[15] A. M. Niknejad, S. Member, and R. G. Meyer, “Analysis, design, andoptimization of spiral inductors and transformers for si rf ic’s,” IEEE J.Solid-State Circuits, vol. 33, pp. 1470–1481, 1998.