ieee sf bay area council grid magazine · march 2008 visit us at page 3 [email protected]...

M a r c h 2 0 0 8 V i s i t u s a t w w w . e - G R I D . n e t P a g e 1

GRID.pdf

Vis i t us at e-GRID.netMarch 2008

CHAPTER MEETINGS

SF-PES - 3/3 | Holistic Transmission and Resource Planning - resource allocation without a highly regulated environment ... [more]

SCV-LEOS - 3/4 | CW Visible Lasers Based on Telecom Technology - packaging, fiber coupling, optical coatings in a new design ... [more]

SCV-TMC - 3/6 | Facilitated Networking, plus 'Offshore' Panel Discussion - managing where engineers are located offshore ... [more]

SCV-SPS - 3/10 | Digital Fingerprinting for Multimedia Forensics - anti-collusion, pinpointing sources of leaks ... [ [more]

SCV-EMC - 3/11 | Minimizing EMI & Noise: Coupling Among Circuit Regions In Circuit Boards - high impulse currents ... [more]

SCV-ComSoc+NATEA - 3/12 | Panel: Next-Generation Wireless Broadband - panelists from Treyspan, Wichorus, Atheros ... [more]

SCV-Ed - 3/12 | Introduction to BlackBoard CE6: A Web-Based Learning Management System for Higher Education ... [more]

SCV-MTT - 3/13 | Nonlinear Network Analysis - error correction algorithms, scattering parameter, memory effects ... [more]

OEB-ComSoc+CS - 3/13 | Cyber Security in the Electric Power Control Industry - vulnerabilities, actual cyber events ... [more]

SCV-CAS - 3/17 | Using Thermal Analysis as a Tool to Aid Analog Floorplanning - effects on circuit performance, speed ... [more]

SCV-Nano - 3/18 | Atomic Scale Modeling of Electron Transport in MRAM - f magnetoresistive random-access memory ... [more]

SCV-MAG - 3/18 | Home Digital Storage Hierarchy and Consumer Storage Demand - mobile and static storage devices ... [more]

SCV-CNSV - 3/18 | Research Techniques for the Consultant: Using the IEEE's Xplore Database - access, searches ... [more]

SCV-EMB - 3/19 | Robotically Assisted Surgery: How daVinci Works Now and How It Could Evolve - technical and challenges ... [more]

SCV-PSES - 3/25 | The Future of Product Safety - developing IEC 62368 on Hazard-Based Safety Engineering ... [more]

SCV-CPMT - 3/27 | Flip-Chip Substrates For Advanced Applications - for CPUs, graphics and gaming processors, ASICs ... [more]

SF-PES - 4/2 | The CPUC Renewable Portfolio Standard - refining procurement, tracking goals, additional ways to comply ... [more]

SCV-ComSoc - 4/9 | Fourth Generation (4G) Mobile Smartphone Architecture Targeted for China and US Markets ... [more]

SCV-CPMT+Rel - 4/9 | A New Perspective on Electronic Product Reliability – prognostics/health management for reliability ... [more]

SCV-MAG - 4/15 | Magnetism and Polarized Soft X-rays - Towards Fundamental Magnetic Length and Time Scales -... [more]

SCV-CAS - 5/19 | Highly Integrated Re-configurable RF Front-ends in Deep Sub-micron CMOS - WCDMA, GSM/GPRS/EDGE ... [more]

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MARKETPLACE – Services page 3

2008 Chapter Officers Directory page 35

Professional Skills Courses [more]- Breakthrough Project Management - Management Essentials - Influential Communication Transitioning from Individual Contributor to Mgr

Technical Skills Courses/Seminars [more]- MATLAB & Simulink for Design & DSP - Design of Radio Frequency Integrated Circuits - Statistical Process Control (SPC) Carbon Nanotube & Nanowire Technology

Conference Calendar

Mar 16-20: Semiconductor Thermal Measurement, Modeling & Management Symposium and Expo - Fairmont Hotel, San Jose [more]

Mar 17-19: Int’l Symposium on Quality Electronic Design - DoubleTree Hotel, San Jose [more]

Apr 14-18: Embedded Systems Conference/ Silicon Valley - SJ Convention Center [more]

Apr 15-16: Intellectual Property Symposium - San Jose Fairmont Hotel [more]

May 11-16: Photovoltaic Specialists Conference - San Diego Manchester Grand Hyatt [more]

UC-Santa Cruz Extension Courses [more]Jitter Essentials - Practical Network Security - TCP/IP Essentials - Mixed-Signal IC Design - Advanced ASIC Physical Design - Digital Design Using Verilog …more

Santa Clara University: Info Sessions [more]Learn about Graduate Courses, Certificates, Open University programs in Engineering, Management March 11 or April 9 – retool for your future.

WiMAX Opportunities, Tech Challenges, Design Concepts 1-day Seminar [more]

NEC 2005 Code Changes - Seismic Req'ts - Selective Coordination 1-day Seminar [more]


Your Networking Partner

® March 2008 • Volume 55 • Number 3

IEEE-SFBAC ©2008

IEEE GRID is the monthly newsmagazine of the San Francisco Bay Area Council of the Institute of Electrical and Electronics Engineers, Inc. As a medium for news for technologists, managers and professors, the editorial objectives of IEEE GRID are to inform readers of newsworthy IEEE activities sponsored by local IEEE units (Chapters, Affinity Groups) taking place in and around the Bay Area; to publicize locally sponsored conferences and seminars; to publish paid advertising for conferences, workshops, symposia and classes coming to the Bay Area; and advertise services provided by local firms and entrepreneurs. IEEE GRID is published as the GRID Online Edition

residing at www.e-GRID.net, in a handy printable GRID.pdf edition at the end of each month, and also as the e-GRID sent by email twice each month to more than 24,000 Bay Area members and other professionals.

Editor: Paul Wesling IEEE GRID PO Box 2110 Cupertino CA 95015-2110 Tel: 408 331-0114 / 510 500-0106 / 415 367-7323 Fax: 408 904-6997 Email: edi tor@e-gr id.net www.e-GRID.net

From the Editor’s Desk … Most of you hear about upcoming Chapter

meet ings ei ther d irect ly f rom that Chapter ’s own distr ibut ion l is t ( typical ly by way of the IEEE’s L istServ appl icat ion) , or e lse from the twice-a-month e-GRID that I send to al l local IEEE members wi th val id emai l addresses plus to thousands of others. But a “ l i fe t ime” on the internet is pret ty short – maybe a few years – and the mode of del ivery may already be changing from email to something else.

Our emai l accounts are at tract ing more spam and other junk – to the point that some people are making the decis ion to swi tch to another form of information-retr ieval . These ear ly adopters are e lect ing to p ick and choose what they receive by set t ing up subscr ipt ions to RSS feeds . Examples are the mul t ip le topical-area feeds from the NY Times, or from CNN.

Now these adopters are able to subscr ibe to a feed direct ly f rom the GRID . I make posts of each upcoming chapter meet ing the day I get the informat ion, and again the week pr ior to the meet ing. The subscr iber ’s RSS reader then checks every 10 minutes, or every hour, to see i f new content has been posted, and the new posts are downloaded and queued up for the engineer to read when the t ime is r ight.

For our GRID in format ion, you can elect to receive al l “posts” in your RSS Reader – or you can choose from one of the fol lowing 9 categories: BioEngineer ing, Communicat ions, Computers/ Software, Electr ical /Power, Electronics Design, Engineer ing Mgmt, NanoEngineer ing, Opt ics/ Displays, and/or Semiconductors.

The internet has “ freed” a considerable amount of informat ion, a l lowing i t to f loat in the web’s “ether” and be located and cataloged by search engines. And current, author i tat ive informat ion has a premium and is sought after .

That ’s why I ’m very pleased that the Google web crawler is camped on our RSS feed’s output. With in about 30 minutes, Google has indexed the latest posts and sent out a lerts to those monitor ing the keywords that appear in a chapter meet ing’s t i t le and story.

To get s tar ted, go to www.e-grid.net/rss

Paul

NOTE: This PDF version of the IEEE GRID – the GRID.pdf – is a monthly publication and is issued a few days before the first of the month. It is not updated after that. Please refer to the Online edition and Interactive Calendar for the latest information: www.e-GRID.net

DIRECTORS

Santa Clara Valley Ram Sivaraman Tom Coughlin

Oakland East Bay Victor Stepanians Rosanna Lerma

San Francisco Sandra Ellis Dan Sparks

OFFICERS Chair: Victor Stepanians Secretary: Dan Sparks

Treasurer: Ram Sivaraman

IEEE-SFBAC PO Box 2110

Cupertino, CA 95015-2110

IEEE GRID

http://www.e-grid.net/rss/


Patent Agent Jay Chesavage, PE

MSEE Stanford 3833 Middlefield Road, Palo Alto 94303

[email protected]

www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835

Do you provide a service? Would you like more inquiries?

• Access 25,000 engineers and managers • IEEE Members across the Bay Area • Monthly and Annual Rates available

Visit our Marketplace (page 3)

Download Rates and Services information: www.e-grid.net/docs/marketplace-f lyer.pdf

GRID.pdf

e-GRID

ANSYS Channel Partner

• Multiphysics, Multidisciplinary Engng • CFD, Stress, Heat Transfer, Fracture • Fatigue, Creep, Electromagnetics • Dynamics, Design Optimization • Linear/Nonlinear Finite Element Analyses

Ozen Engineering (408) 732-4665

[email protected] www.ozeninc.com

Professional Services Marketplace – [email protected] for information

Say you found them in our GRID MARKETPLACE

MET Laboratories

EMC – Product Safety

US & Canada

• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (BQTF & EPCglobal Test Lab)

Facilities in Union City and Santa Clara

www.metlabs.com [email protected] 510-489-6300

Valon Technology, LLC

valontechnology.com

[email protected]

RF and Wireless Product Design & Development

- System Engineering - Test & Measurement - Schematic Capture & PCB layout - Expert Witness

Redwood City (650) 369-0575

Bernie Siegal

650-961-5900

[email protected] www.thermengr.com

Device Thermal Characterization Package Thermal Characterization Thermal Test Boards Thermal Test Equipment & Fixtures

IEEE-CNSV Consultants' Network

of Silicon Valley

• Become a member • Find a Consultant • Submit a Project

CaliforniaConsultants.org

M E S OIn t eg r at io n

Let us help you integrate your product and get it into production • MEMS & Sensors Experts • Product Design ▪ R&D ▪ Failure Analysis • Medical Devices ▪ High-Volume Manufacturing • Experienced Consultants www.MesoIntegration.com

[email protected] TEL: 949.278.0275

http://www.metlabs.com/

http://www.ozeninc.com/

http://www.MesoIntegration.com/

http://www.thermengr.com/

http://www.File-EE-Patents.com/

http://valontechnology.com/

http://www.CaliforniaConsultants.org/

mailto:[email protected]?subject=GRID_Inquiry:






http://www.e-grid.net/docs/marketplace-flyer.pdf


SCV Microwave Theory and Techniques Chapter

Saturday, April 19, 2008

8 AM - 4 PM (includes breakfast, lunch)

SLAC Auditorium, Stanford

Mobile Broadband Internet is a transport system as important as waterways, railroads and interstate highways. Affordable broadband for all citizens is essential to a knowledge based economy and society. WiMAX has the potential to transform worldwide mobile & broadband markets. Engineers must understand the complexities facing the roll-out of WiMAX networks and address them while optimizing WiMAX solutions in a final, portable and energy-efficient form that can coexist with other wireless access services on the same portable device.

This Short Course gives an overview of WiMAX technology, industry trends, the business case, optimization for end users, GaN technology, and an overview of WiMAX testing.

Co-Sponsor: Santa Clara Valley Section, IEEE

MATLAB & Simulink for Design & Digital Signal Processing 12 week course, M/W 6:00PM-9:00PM (Starts April 21) Hands-on, from basic concepts in discrete time systems, filter design and implementation all the way to advanced concepts of multi-rate systems; balanced mix of theory and practice.

Discount of $40 for IEEE Members on 12-week courses.

Design of Radio Frequency Integrated Circuits 12 week course, T/TH 6:00PM-9:00PM (Starts: May 6) A balance of communications, physics and IC design. Includes high-speed amplifiers, LNA, Mixer, VCO, PA, PLL and other RF blocks.

Digital VLSI Design with Verilog 12 week course, M/W 6:00PM-9:00PM (Starts May 12) Learning language constructs in a progressively more complex project environment. Synthesis of gate-level netlists from behavioral, RTL, and structural code; constraints most useful for area and speed optimization; partitioning, safe coding styles

Introduction Dr. Mohamed Sayed, Chair, IEEE MTT-SCV WiMAX Technology and Infrastructure Overview

Dr. Siavash Alamouti, Fellow and CTO, Mobility Intel WiMAX Industry Trends

Dr. Mo Shakouri, VP Marketing, WiMAX Forum, & Vice President, Alvarion

WiMAX Business Case Doug Gray, Consultant

Panel Discussion: WiMAX in 2013 Lunch GaN Technology for Both Fixed and Mobile WiMAX

Dr. Raymond Pengelly, Cree WiMAX Optimization for End Users

Tom Tofigh, AT&T WiMAX Wave 2 Testing

David Huynh, Application Engineer, Agilent Wrap up, raffle and giveaways

$95 members, $120 non-members (through April 5)

For more information and to register:

www.mtt-scv.org Upcoming 1- and 2-day Seminars:

March 7: RFID (Radio Frequency Identification) - Technologies, Applications, and Trends

March 11: Statistical Process Control (SPC) - Principles and Applications

March 24: Carbon Nanotube & Semiconductor Nanowire Technology and Applications

March 27: Advanced IC Packaging Technology

April 2: Device & Interconnect Reliability in Advanced CMOS

Discount of $30 for IEEE Members on Seminars.

Get more information:

www.svtii.com/SVTI-calendar.htm

Review all SVTI offerings: www.svti.org

SILICON VALLEY TECHNICAL INSTITUTE

Upcoming Courses with labs

WiMAX Opportunities, Tech Challenges, Design Concepts

http://www.mtt-scv.org/

http://www.svtii.com/SVTI-calendar.htm

http://www.svti.org/


SCU's School of Engineering offers masters and Ph.D. degrees, professional certificates, and Open University programs in Applied Mathematics, Computer, Electrical, Mechanical, Software Engineering, and Engineering Management. With over 300 graduate level courses in engineering taught each year, the curriculum is customized to meet the rapid changes and diverse challenges in your workplace. The Engineering Graduate Programs provide you with an enormous opportunity to refresh, reconnect, and retool for your future. Classes are offered early mornings, late afternoons, evenings, and weekends, to fit into your work schedule, with easy parking.

The Graduate Engineering Open University program is a quick and easy way to enroll in our graduate-level classes. For those of you who might be seeking a degree, you can start with courses under this program and later transfer units into a degree program. You can examine a field of study, enhance your professional training, or get a head start by enrolling in classes while waiting for admission/transfer to a degree program. You may start in any quarter.

SCV and SF Industry Applications Chapters

Wednesday, March 5, 2008 8:00 AM - 4:40 PM (with breakfast, lunch)

Marriott Hotel, Pleasanton Free BART shuttle

There are big changes to the 2005 NEC Code. Emergency and Legally Required Standby power systems, as well as the essential electrical system in health care facilities, must now selectively coordinate. The requirement is further expanded in the 2008 NEC Code to include critical operations power systems. Get up to speed on the new requirements. This course will review these new NEC requirements and will explain how to meet them with low-voltage circuit breakers. We will also review system design guidelines and challenges with meeting with the NEC requirements.

This one-day Application Conference is for power, civil and structural engineers, electrical specifiers and consultants.

FIND OUT MORE! Come to one of these Information Sessions:

March 11 (Tues), 5:15 PM April 9 (Wed), 5:15 PM

• Spring Classes start March 31st. More Information:

www.scu.edu/engineering/graduate

Open University Link

To attend an Info Session, contact Wan Chen: [email protected] 408-215-8008

Topics: - Short Circuit Selective Coordination with LV Circuit

Breakers (new NEC req'ts and how to meet them) - 2008 Seismic Code Changes for Electrical Equipment

(landmark changes this year for moderate and higher seismicity, with examples)

- 2005 Code Changes Update (selected changes for system protection, equipment installation and application)

- The Other side of Selective Coordination (balancing req'ts of arc fault, selective coordination, series ratings)

Register by Feb. 29th for free Handbook!

For full details and registration form, see www.e-grid.net/docs/0803-sf-ias.pdf

Santa Clara University School of Engineering Graduate Programs

SCU Information Sessions Open House - Learn about Graduate Courses & Programs

NEC 2005 Code Changes, Seismic Requirements, Selective Coordination

http://www.scu.edu/engineering/graduate

http://www.scu.edu/engineering/graduate/non_degree_programs/openuniversity.cfm


http://www.e-grid.net/docs/0803-sf-ias.pdf


Jitter Essentials Mar 10-11, Mon-Tue, 9:00AM to 5:00PM, Cupertino Campus Timing uncertainty, the timing budget, propagating jitter through a system, creating jitter budgets, measuring jitter, minimizing jitter.

Practical Network Security Mar 15, Sat 9:00AM to 5:00PM, Cupertino Campus Description: A one-day course on the use of basic network security tools - Top 100 security tools - Network scanning - Networking considerations - Nmap - Nmap lab - Wireshark - Wireshark lab Earlybird rate through March 1st – save 10%

TCP/IP Essentials April 7 - June 2, Mon 6:00-9:00PM Sunnyvale Campus Topics: - routing concepts, protocol suite, IP addressing, subnetting, name-resolution, troubleshooting Earlybird rate through March 25th – save 10%

Mixed-Signal IC Design Apr 14 to Jun 23, Mon 6:30-9:30PM Sunnyvale Campus Topics: basic analog circuits and systems, problems encountered, precautionary measures and techniques Earlybird rate through March 31st – save 10% The winner of the 2008 IEEE Information Theory Society Claude E. Shannon Award is Dr. Robert M. Gray, Lucent Technologies Professor of Electrical Engineering, Stanford University. The award honors consistent and profound contributions to the field of information theory. Gray will give the Shannon Lecture at ISIT 2008 in Toronto, Ontario, Canada.

UPCOMING CLASSES FOR ENGINEERS – IN SUNNYVALE,

CUPERTINO

Chip Design Flow from Netlist to GDS-II Apr 07 to Jun 16, Mon 6:30 to 9:30PM, Sunnyvale Campus Earlybird rate through March 24th – save 10%

VLSI and ASIC Design, Introduction Apr 08 to Jun 10, Tue 6:30 to 9:30PM, Cupertino Campus Earlybird rate through March 25th – save 10%

Advanced ASIC Physical Design Apr 16 to Jun 18, Wed 6:30 to 9:30PM, Sunnyvale Campus Earlybird rate through April 2nd – save 10%

Digital Design Using SystemVerilog Apr 17 to Jun 19, Thu 6:30 to 9:30PM, Sunnyvale Campus Earlybird rate through April 3rd – save 10%

Plus many other courses – see the website “Real-time" courses, and "real-world" instructors

– Take one course or a whole certificate. Find out more:

www.ucsc-extension.edu/EngTech

Dr. Robert Gray received his B.S.& M.S. degrees in 1966 from MIT, and his Ph.D. from USC, all in Electrical Engineering. Since 1969 he has been a professor in the Department of Electrical Engineering at Stanford.

He served for some years as Director of the Information Systems Laboratory at Stanford, and since June 1993 he has been Vice Chair of the Department. of Electrical Engineering. He served terms as EIC and an Associate Editor for IEEE’s Transactions on Information Theory. He was awarded both the IEEE Centennial Medal (1984) and the IEEE Third Millenium Medal.

We are pleased that one of our SF Bay Area members has been honored with one of the IT Society’s major awards.

2008 IEEE Information Theory Society Claude E. Shannon Award

http://www.ucsc-extension.edu/EngTech


The Intellectual Property Symposium brings together a unique combination of thought leaders in electronic systems, software, and semiconductors across the engineering, business and legal professions. This event is co-chaired by Rick Merritt, Editor-at-Large of EE Times and Mike McLean, Vice-President of IPinsights, Semiconductor Insights. Working with our Advisory Board that includes senior executives from ARM, Cisco Systems, Hewlett-Packard, Microsoft and TSMC, they have created an in-depth program that will resonate with those in the engineering, business and legal communities. The conference is open to anyone who wants to understand what is going on in the rapidly changing marketplace for patents and intellectual property at the level of chips, systems and/or software in the electronics industry. The program has sessions geared towards:

• Senior Engineers and Engineering Managers • Line of Business Managers • Legal Professionals

Sessions: ● The Evolution of the IP Marketplace ● Surveying the Patent Landscape ● Practical Implications of Recent Court Decisions ● Silicon Subsystems: How to Develop SoCs Faster and With Lower Risk ● How To Read Your Competitors' Patents ● IP Rights You Really Need to Understand ● Key Ingredients of an Effective Patent Application ● Pitfalls of Patents ● IP Risks in Open Source Software ● Managing 3rd Party IP in Software Development Life Cycle ● Building an Effective Patent Defense Strategy ● Finding Evidence of Patent Infringement ● Enhance Your Firm's Value Through IP Communication ● Managing IP Portfolios in Mergers and Acquisitions ● China Panel ● Silicon IP Panel & Discussion … and more!

learn.analyze.engage Plenary panel discussions on topics including:

• Issues in silicon IP with top technologists from Intel and Texas Instruments

• IP practices in China from companies with hands-on experience including TSMC, UTS Starcom

• Open source software with executives from Hewlett-Packard, Microsoft, MontaVista

Keynote addresses on the state of intellectual property in electronics, from:

• Peter Detkin, co-founder of Intellectual Ventures and former head of IP at Intel

• Mike Meurer, a noted author on the problems of the patent system and Professor of Law, Boston University School of Law

• Jon Dudas, Director of the US Patent and Trademark Office

The Intellectual Property Symposium is co-located with the Embedded Systems Conference and the EE Times ACE Awards.

Register by March 7th for the best symposium rates.

Register today! Visit:

www.eetimes.semiconductor.com

For sponsorship opportunities, please contact Sean Raman at [email protected]

Intellectual PROPERTY DESIGN PROTECT MANAGE LEVERAGE TECHNOLOGY IP

SYMPOSIUM April 15-16, 2008 • The San Jose Fairmont Hotel

http://www.eetimes.semiconductor.com/



McEnery Convention Center San Jose

CONFERENCE: APRIL 14-18 EXPO: APRIL 15–17

ESC Silicon Valley delivers a comprehensive technical program focusing on 15+ critical topics that affect your designs. One day at ESC can change how you design for a year! Over 200 sessions! Topics include:

● Architectures and Low Power ● Analog Design/Data Conversion ● Digital Signal Processing & Multimedia ● Hardware Design ● Linux and Open Source Software ● Multi-Core ● Operating Systems ● Project Management ● Real-time Design ● Security ● Software Design ● Tools ● Verification and Debugging ● Wired and & Wireless Networking

ESC 90-Minute Sessions Learn engineering solutions that you can apply to your real life design challenges today.

Full-Day Tutorials In addition to standard sessions, the ESC program offers a series of full-day tutorials in which attendees have the opportunity to become completely immersed in a particular subject.

New this year!

Build Your Own Embedded System Every paid conference attendee will receive a fully loaded development kit that they will use to create their own unique embedded system.

MSP430 Day Free training with Texas Instruments and Arrow on the MSP430: get the latest product updates, technical demonstrations and receive a FREE eZ430-RF-2500 development tool.

Career Fair Check out who is hiring embedded engineers! Talk with companies like Renasas, General Dynamics, Cisco, NVidia and Broadcom about their employment opportunities. Open to all registered ESC attendees.

Free Solar Powered Backpack All registered conference attendees receive a free solar powered backpack that can charge mobile devices!

LEARN TODAY, DESIGN TOMORROW

Keynote & Industry Addresses 2008 marks the 20th anniversary of ESC Silicon Valley. To celebrate this momentous occasion, we’re planning a multimedia extravaganza Keynote Address. We’ve invited a host of industry experts/authorities/inventors/creators, as well as some of the faces you’ve come to know and love over the past 20 years of ESCs. That’s in addition to the special embedded “effects” we’ve got planned for this celebration/keynote presentation. We’ll be looking both back and ahead in time throughout the presentation, which will be hosted by embedded industry luminary, Jack Ganssle. Comprehensive Technology Exhibition With over 350 leading vendors, only ESC has the size and scope to offer you answers to your questions, a look at new product applications, and the technical information you need. Zero in on technologies in special areas of the show floor. You may request a free exhibits pass. Product Teardowns We will tear apart and look at the electronics in a Sony OLED TV (yes, really tear it apart!), a Gibson Robot Guitar and other cool products that are pushing the boundaries of system design.

Flexible Registration Packages

• 1-day, 3-day, or the 5-day All-Access Pass value

• Free Exhibits Pass (with Keynote and sponsored sessions)

• Choose exactly what suits your needs and schedule

• Group rates – bring your team (save up to 25%) Earlybird rates through March 14. Save up to $400! Register today at

www.embedded.com/esc/sv

http://www.embedded.com/esc/sv


See us at Booth 3047!

The Consultants’ Network of Silicon Valley (CNSV) will be joining IEEE Media at the IEEE Spectrum booth at the Embedded Systems Conference (see previous page). CNSV will set up our newly developed web search engine and walk any potential client through a search. It searches by key words, i.e consultant names or technical fields/terms. For example, a search on “embedded” brings up about one third of our group.

Please tell your HR people that IEEE CNSV will be at ESC 2008. For HR, we are a resource in a search to hire consultants for specific tasks. All who are or hope to become a consultant, come to the booth and talk with us. We will have CNSV people at the booth at all times during the show.

Please stop by whether you want a consultant, are interested in publications or --- you don’t need a reason to visit – just come and say hello. The Photovoltaic Specialists Conference presents groundbreaking research papers on all aspects of PV-relevant materials, devices, systems and applications. We once again have a very strong Technical Program that will encompass seven programmatic areas covering topics from novel materials and devices, thin-film cells made from CIGS and CdTe and emerging semiconductors, crystalline and amorphous silicon, III-V cells, concentrator devices and systems, and module and system experience including reliability studies.

Tutorials: ● Nanostructures in Photovoltaics ● Silicon Solar Cell Technology ● Polycrystalline Thin Film Solar Cells ● High-Concentration Photovoltaics: Cells, Optics, and Systems ● Productive Buildings - the integration of architecture and solar electric systems ● Materials, Defects, and Characterization Methods for Photovoltaics

Exhibits: visit GT Solar, EMCORE, Spectrolab, Trina Solar, SunPower, HelioVolt, Despatch, Motech, SDG&E and many others

IEEE-CNSV is organized under the auspices of the Institute of Electrical and Electronics Engineers, the world's largest technical professional society. The Institute's US Activities Board, with its focus on issues surrounding the career engineer, began the ground-work for the Network in 1991.

Since then, it has grown into a nation-wide representation named the Alliance of IEEE Consultants' Networks (AICN), of which our Consultants' Network of Silicon Valley is part.

The IEEE Consultants' Network of Silicon Valley is a Prime Source of Engineering Talent in the Valley and helps companies and brokers meet qualified consultants with technical credentials. Our goals include promoting inno-vation and job growth and adherence to the IEEE values.

Our mission: • Attract the best engineering consultants in Silicon Valley • Present Network members effectively to clients • Serve as a platform for networking • Accomplish all of above synergistically Visit our website: www.CaliforniaConsultants.org Sessions: (partial listing) ● Space Photovoltaic Devices ● Materials and Theory ● TCOs and Contacts ● Inorganic Nanostructures ● III-V Cells and Characterization ● Silicon Solar Cells ● CPV Technology ● Concentrator Technology ● CdTe and CIGS Deposition ● Contacts and Novel Concepts ● Innovations in PV ● Modules and Manufacturing ● Optical Enhancement in Amorphous and Thin Film Si ● Standards and Codes ● PV Modules ● Devices and Defects

Earlybird discount through April 11th.

More information and registration:

www.33pvsc.org

For more information on booths and sponsorships, contact Jamie Price, [email protected]

33rd IEEE Photovoltaic Specialists Conference Manchester Grand Hyatt Hotel, San Diego May 11–16, 2008

http://www.CaliforniaConsultants.org/

http://www.33pvsc.org/



The twenty-fourth annual SEMI-THERM Symposium is an international forum dedicated to the thermal design and characterization of electronic components and systems. The symposium fosters the exchange of knowledge between practitioners and leading experts from industry and academia from around the world.

SHORT COURSES: Unlearning the Myths of Cooling Electronics – Tony Kordyban Ultrahigh-Thermal-Conductivity Packaging Materials -- Dr. Carl Zweben Thermal Characterization of Electronic Packages

– Bruce Guenin, Sun Microsystems Integrated Design Approach for Thermal and EMI – Mark Heerema, HP, and Herman Chu, Cisco

Embedded Tutorial: “Thermal Interface Materials”

This year’s embedded tutorial features an in-depth look at thermal interface material, presented by Dr Ravi Prasher of Intel and Arizona State University.

IEEE Professional Skills Courses

Influential Communication – Date/Time: Tues. March 4, 8:30AM – 4:30PM – Location: – Carl Zeiss Meditec, Dublin

Fee: $400 for IEEE Members; $500 non-members

Breakthrough Project Management – Date/Time: Wed/Th March 5-6, 8:30AM – 4:30PM – Location: – VeriSign, Mountain View


Management Essentials – Date/Time: Wed/Th March 5-6, 8:30AM – 4:30PM – Location: – TIBCO Software, Palo Alto


Influential Communication – Date/Time: Tues, March 11, 8:30AM – 4:30PM – Location: – TIBCO Software, Palo Alto


Improve your skills – register for one of these classes, or for others coming up this spring. Bring a team!

SESSIONS ● Two Phase Cooling ● Air Cooling ● Die-Level Cooling ● Package Level Cooling ● System Level Cooling ● Liquid Cooling ● Data Center Cooling ● Test Methods ● plus poster session

KEYNOTE ADDRESS “Computer Architecture Implications of Multi-Core Processors” Mike Vildibill, Sun Microsystems

EXHIBITS AND VENDOR WORKSHOPS Afternoons, Tuesday and Wednesday, March 18, 19 Complimentary Exhibits Admission and Wednesday reception Register On-line:

www.semi-therm.org

For further information about exhibiting: C/S Communications, Inc.

480-839-8988 [email protected]

SCV Chapters, Engineering Management & Components, Packaging and Manufacturing Technology Societies

Preparing Technical Content for Presentations

– Date/Time: Thurs, March 20, 8:30AM – 4:30PM – Location: – LSI Corporation, Milpitas


Transitioning from Individual Contributor to Manager

– Date/Time: Thurs, April 10, 8:30AM – 4:30PM – Location: – LSI Logic, Milpitas


Breakthrough Project Management – Date/Time: Th/Fri, April 17-18, 8:30AM – 4:30PM – Location: – TIBCO Software, Palo Alto


For complete course information, schedule, and registration form, see our website:

www.EffectiveTraining.com

I E E E T W E N T Y – F O U R T H A N N U A L

Semiconductor Thermal Measurement, Modeling and Management Symposium and Exposition

March 16-20, 2008 Fairmont Hotel San Jose

24

http://www.semi-therm.org/


http://www.effectivetraining.com/calendar.php?loc=local

The International Symposium on Quality Electronic Design (ISQED) is a leading Electronic Design & Design Automation conference, aimed atbridging the gap among electronic design tools and processes, integrated circuit technologies, processes & manufacturing, to achievedesign quality. ISQED is the pioneer and leading international conference dealing with design for manufacturability and quality issues front-to-back. ISQED emphasizes a holistic approach toward electronic design and intends to highlight and accelerate cooperation among the ICDesign, EDA, Semiconductor Process Technology and Manufacturing communities. ISQED spans three days, Monday through Wednesday, inthree parallel tracks, hosting over 150 technical presentations, six keynote speakers, panel discussions, workshops/tutorials and otherinformal meetings.

KEYNOTESPlenary sessions will be held on Tuesday and Wednesday mornings. Several indus-try leaders will discuss the issues surrounding electronic design, design for yieldand manufacturability and other critical topics from various point of views. Pre-liminary list of keynote speakers includes:

PANEL DISCUSSIONSISQED is pleased to offer three high-power panel discussion sessions, where manyleading experts, highlight and address the important issue surrounding the elec-tronic design and quality. These panels focus on the following topics:

1. DFM: Is it Helping or Hurting?Moderator: Ron Wilson - EDN

2. ESL 2.0- Is Anybody Using It 2.0?Moderator: John Blyler - Chip Desgin Magazine

3. Statistical Design - Solutions Searching for Problems?Moderator: Michael Santarini, EDN

TECHNICAL SESSIONSISQED Technical sessions start on Tuesday March 18, and continue until the afternoon of Wednesday, March 19. Beside the above plenary sessions, panel discussions,and workshops, the program consists of twenty technical sessions featuring over 150 papers on various challenging topics related to design for manufacturabilityand quality. A partial list of topics is shown below. Detail program would be available on the web at www.isqed.org.

EDA Methodologies, Tools, Flows & IP Cores; Interoperabilityand Reuse (EDA)Design for Manufacturability & Quality (DFMQ)Design Verification and Design for Testability (DVFT)Package - IC Design Interactions & Co-Design (PDI)Design of Reliable Circuits and Systems (DFR)

Power-conscious Devices, Interconnects, and Circuits (PCC)Physical Design, Methodologies & Tools (PDM)Emerging/Innovative Process & Device Technologies and DesignIssues (EDT)System Level Design, Methodologies and Tools (SDM)

REGISTRATIONPlease refer to ISQED web site at www.isqed.org for information regarding the tutorials, conference, and hotel registration. Direct all conference inquiries [email protected]. Early registration is recommended to take advantage of the discounted registration fee.

Rich Goldman, Vice-President, Strategic Alliances, SynopsysDrew Gude, Director, MicrosoftRobert Hum, Vice President & General Manager, Mentor GraphicsSanjiv Taneja, Vice President & General Manager, Cadence Design SystemsChandu Visweswariah, Research Staff Member, IBM Thomas J. Watson Research Center

Caches in the Many-Core Era: What Purpose Might eDRAM Serve?Hillary Hunter, IBMEnhancing Yield through Design for Manufacturability (DFM)Praveen Elakkumanan, IBMManaging early design feasibility issues through system physicalprototyping (Embedded Tutorial)Matthew Raggett, Javelin Design AutomationHow to Determine Best DFM Practices (Embedded Tutorial)Tom Jackson, Cadence, Milind Weling, Cadence

The promise of high-k/metal gates – From electronic transportphenomena to emerging device/circuit applicationsK. Maitra, AMDLow Voltage Circuit Design Techniques for Sub-32nm TechnologiesChris Kim, University of MinnesotaRobust System Design in Scaled CMOSSubhasis Mitra, Stanford UniversityMil/Aero/Vehicle High Reliability Design - Issues/challenges/solutions(Embedded Tutorial), Chris Nicklaw, L3 CommunicationsModifications and Tradeoffs in the Creation and Characterization ofHigh Reliability IP (Embedded Tutorial), Jens C. Michelsen, Nangate

LUNCHEON KEYNOTEEDA Is Truly Where Electronics Quality Begins! Antun Domic, GM and VP, Synopsys

TUTORIALS/WORKSHOPSISQED2008 is pleased to offer a single full-day tutorial track, as well as three embedded tutorials. These tutorials explore critical areas in electronic design andare presented by several experts in their respective fields. List of topics covered is as follows:

CONFERENCE HIGHLIGHTS

VENDOR EXHIBITIONISQED08 Exhibition floor will be open on Tuesday afternoon, March 18, andfeatures vendors offering design tools, methodologies, and services in theareas of design for manufacturing, yield, reliability, and quality. Exhibition in-cludes embedded tutorials, panel discussions, and over 50 technical presen-tations. Exhibition floor attendance is free but needs advance on-line regis-tration.

Call for Participation

ISQED 2008, 9th International Symposium on

QUALITY ELECTRONIC DESIGN

www.isqed.org

March 17-19, 2008. San Jose, CA, USA

ISQED08 corporate sponsors are Synopsys, Microsoft, Cadence, Magma, Mentor Graphics, Ponte, and Silicon Valley Technical Institute. Media Sponsors are Chip Design Magazine, and EDACafe

Advanced Technology & Design Solutions in Design for Manufacturing Era

http://www.isqed.org/

http://www.isqed.org/


Holistic Transmission and Resource Planning

Speaker: Stephen T. Lee, senior technical executive,

Electric Power Research Institute Time: Noon Cost: none for IEEE members, $5 for non-

members (includes lunch) Place: CPUC Building, Courtyard Training Room,

505 Van Ness Ave., San Francisco RSVP: required by Feb. 29th, by phone or email to

Chuck Magee, [email protected], 415-703-4683 (for lunch count)

Web: www.e-grid.net/docs/0803-sf-pes.pdf

Stephen T. Lee is senior technical executive, power delivery and utilization, at the Electric Power Research Institute, Palo Alto. He recently authored an article in the October/November edition of the IEEE Power and Energy Magazine titled, “For the Good of the Whole” on the subject of holistic transmission and resource planning. Dr. Lee has over 40 years of electric power industry experience. He received his B.S., M.S., E.E. and Ph.D. from M.I.T. in electrical engineering, majoring in power system engineering, in 1969, 1970, 1971, and 1972, respectively. He worked for Stone & Webster Engineering Corporation in Boston, Massachusetts; Systems Control Inc. in California; and was vice president of consulting for Energy Management Associates. Before joining EPRI in 1998, Dr. Lee was an independent consultant in utility planning and operation. At EPRI, he manages technical research programs for power system planning and operations.

Holistic planning is a new concept that recognizes the reality of today's fragmented organizational structures of the power industry and is a philosophy and methodology that attempts to reap the benefits of optimal resource allocation without reverting to a fully integrated and highly regulated environment. Two aspects of holistic planning will be discussed: transmission planning and resource planning. Transmission planning has become a difficult challenge. With so many uncertainties affecting it and so many players involved, a new technical approach is needed to design a future power grid that is robust and that can handle all reasonable ways in which it will be used. Transmission planning cannot be done holistically without considering resource planning, demand options, and global climate concerns. Where new generation resources will be built will greatly affect transmission planning. To handle holistic resource planning, we will discuss the idea of using a CO2 charge and a public benefit fund (PBF) to facilitate the market's optimal adoption of different alternatives, implementing the concept of Unity in Diversity as a way to steer individual's choices into decisions that also benefit society as a whole.

Dr. Lee will also demonstrate the EPRI CAR (Community Activity Room) computer program which

is used for grid operations and planning. The program graphically plots the many constraints on the system enabling an operator or planner to visually determine if he/she is safely operating within the limitations of the system at any given time or planning correctly.

EPRI Car Program

MONDAY March 3SF Power Engineering


CW Visible Lasers Based on Telecom Technology

Speaker: Len Marabella, PhD, Director of Product

Marketing, JDS Uniphase Time: Networking and pizza at 6:00 PM,

Presentation at 6:45 PM Cost: none Place: National Semiconductor Building E

Auditorium, 2900 Semiconductor Drive, Santa Clara

RSVP: by email to [email protected] (for pizza count)

Web: ewh.ieee.org/r6/scv/leos/

Dr. Leonard Marabella is a Director of Product

Marketing for JDSU, and is responsible for Q-switched ultraviolet lasers, CW visible lasers, fiber lasers, and gas lasers. Dr. Marabella received his Ph.D. in Chemical Physics from Indiana University in 1972. After being a postdoctoral research associate at MIT for two years, he was an Assistant Professor of Chemistry at Boston College for a year. He then worked at Hughes Aircraft from 1974-1981, primarily focusing on the development of chemical lasers. From 1981-2002, he worked at TRW, and his work included development of tunable semiconductor and ultraviolet lasers, as well as a wide range of R&D projects on electro optic and photonic devices. Since 2002, he has worked for JDSU, primarily working on industrial lasers including diode-pumped solid state and fiber lasers. Dr. Marabella has been a board member of the Laser and Electro-optics Manufacturers' Association for the last 10 years, and was a board member of the Laser Institute of America from 1996-1998. He also was president of the South Bay Chamber Music Society from 1997-2002.

In "standard" diode pumped solid state lasers

designs, a large number of optical components like a pump laser diode, a laser crystal, mirrors, lenses, wavelength selective elements and a non-linear crystal have to be mounted to an optical base plate, which has to be mounted to a relatively large TEC to guaranty long term stability and proper operation. Combining JDSU's industry unique telecom and optics expertise in single-mode laser diodes, packaging and fiber coupling of single-mode structures and optical coatings together with periodically-poled non-linear crystals enables a new design for visible CWSS lasers based on JDSU's Frequency Converted Diode (FCD) technology.

TUESDAY March 4SCV Lasers and Electro Optics

Patent Agent Jay Chesavage, PE

MSEE Stanford 3833 Middlefield Road, Palo Alto 94303

[email protected]

www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835


Application Conference for Electrical Specifiers

and Consultants Speakers: 4 sessions on code requirements,

selective coordination Time: 8:00 AM - 4:40 PM Cost: $250, includes breakfast and lunch Place: Marriott Pleasanton, 11950 Dublin Canyon

Rd., Pleasanton RSVP: required, by phone or email to Finn

Schenck, [email protected] -electric.com, 925-463-7112

Web: www.e-grid.net/docs/0803-sf-ias.pdf

Topics & Speakers: Update on California 2005 Code Requirements for Electrical Equipment

The new California Electrical Code is based on the 2005 NEC. This presentation will review selected changes adopted for the 2005 code with focus made on changes related to system protection, equipment installation and application. You will receive insights on why the Code Panel adopted these changes and gain a better understanding of the intent of these changes.

Speaker: Gary Fox, PE, Specification Engineer for GE Consumer & Industrial

Gary H. Fox, PE, received his BSEE from California Polytechnic State University, San Luis Obispo in 1978. He has been employed by General Electric Company for 29 years. In his current assignment he provides application and technical support for power distribution/control equipment and lighting. Previous assignments included experience in field testing and maintenance of power equipment, project management, and power system analysis. Mr. Fox is a Senior Member of the IEEE Industry Applications (IAS) and IEEE Power Engineering Societies and has been an active participant since 1989. He has authored several papers on protective relay application and surge protection. Officer positions he has held include Chair for the San Francisco Chapter, IAS; Chair, San Francisco Section; and Chair, San Francisco Bay Area Council. He was a recipient of the IEEE Third Millennium Medal. He has been a licensed Professional Engineer since 1982.

(Continued, next column)

(continued, from previous column) Short Circuit Selective Coordination with LV Circuit Breakers

The 2005 NEC requires emergency and legally required power systems and the essential electrical system in health care facilities to be selectively coordinated, and the requirement has been expanded to include critical operations power systems in the 2008 NEC. This course will review these new NEC requirements and will explain how to meet them with low voltage circuit breakers. System design guidelines and challenges meeting the NEC requirements will be addressed.

Speaker: Ed Larsen, Manager of Industry Standards for Circuit Protection with Square D Company

Mr. Larsen is responsible for managing company activities relating to product standards for overcurrent protective devices, including circuit breakers. He holds a Bachelor of Science degree in Electrical Engineering Technology and a Master of Science degree in Engineering Management from Milwaukee School of Engineering. Mr. Larsen has served in various positions over the past 33 years at Square D. His responsibilities as an application engineer and marketing manager for control products involved contactors and starters, combination motor controllers, overload relays, pilot devices, relays and timers. As a product planning manager, product line manager and engineering manager for low voltage circuit breakers, Mr. Larsen participated in the development of circuit breakers, electronic trip units and ground fault relays. He possesses an understanding of customer needs such as series ratings and selective coordination for overcurrent protection. Mr. Larsen also served as the director of engineering at Heinemann Electric Company, where he was responsible for the design of circuit protection products. As a senior member of the IEEE, Mr. Larsen authored a chapter in the Blue Book, the IEEE Recommended Practice for Applying Low Voltage Circuit Breakers Used in Industrial and Commercial Power Systems. He has also authored an article on low voltage circuit breaker short circuit selective coordination in Electrical Contracting Products magazine and an article on circuit breaker markings for IAEI News. He is a member of several CANENA, CSA, IEEE, NEMA and UL technical committees. Mr. Larsen is also a member of the IAEI, NFPA and the Standards Engineering Society.

(continued, next page)

WEDNESDAY March 5SF+SCV Industry Applications


2008 Seismic Code Changes for Electrical Equipment

With the basis of the California Building Code changing this year from the 1997 UBC to the 2006 International Building Code, the design professional is faced with landmark changes on how to establish and verify seismic specification requirements for electrical and mechanical equipment for critical facilities. As signaled by the obsolescence of seismic zones, this shift is revolutionary and introduces sweeping changes in the basis of seismic design for critical facilities especially in areas of moderate and higher seismicity. Presented will be an overview on the basics, from the design professional’s perspective, of how to establish site specific project specification requirements for electrical and mechanical equipment in a critical facility and also verify manufacturer’s compliance by the use of a number of examples.

Speaker: Philip Caldwell, Electrical Engineer for Square D Company

Since graduating in Electrical Engineering from Virginia Tech Phil has thirty years of experience in the commercial nuclear and electrical industry including design assurance qualification testing to North American and European standards. He is the company’s external representative to all activities and government agencies in North America that are involved in earthquake engineering research and code development including IEEE 693. Phil is a member of Earthquake Engineering Research Institute and the Seismological Society of America as well as IEEE and ASCE.

The Other side of Selective Coordination

Designing the optimal electrical system is now more challenging than ever. Balancing the requirements of arc fault, selective coordination and series ratings can be confusing and require tradeoffs. This presentation discusses the characteristics of molded case circuit breakers as well as power breakers in light of these tradeoffs to help you optimize the application of these products.

Speaker: Chris Lovin, District Application Engineer Mr. Lovin holds a BSEE from the University of Illinois

and is a registered PE in the state of Illinois. With over 20 years at Cutler Hammer (Westinghouse) he has held positions in sales marketing, operations as well as engineering.


Facilitated Networking, plus 'Offshore' Panel Discussion

Panelists: Richard Danielson, President of PlanV

Software; Rakesh Gowda, Director of Software Development at QuinStreet; Steve Mezak, CEO of Accelerance; Dmytry Mykhaylov, software engineer

Time: Facilitated Networking at 6:30 PM, Dinner at 7:00 PM, Panel Discussion at 7:45 PM

Cost: $25 for IEEE members, $30 for non-members ($5 extra if not preregistered)

Place: Ramada, 1217 Wildwood Ave (Fwy 101 frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale

RSVP: requested, on the website Web: www.ieee-scv-ems.org

Chris Sims, Founder of the Technical Management Institute and TMC chair, will moderate the panel.

Networking Exercise

From 6:30 - 7:00, Chris Sims will facilitate a networking and collaboration exercise for our management club.

At last month's meeting, we answered the question "What makes an engineering manager great?" We created a list of the most important skills, traits, and practices for an engineering manger. Our list included:

• Integrity • Enthusiastic & inspiring • Listens well • Communicates clearly • Have a vision • Interpersonal skills • Respects staff input • Appreciates the service of others • Team builder • Know each staff member's strengths and

weaknesses This month we will begin to answer the all-

important question "How do you actually do these things?" Participants will collaborate in small teams, to generate suggestions for putting last month's ideas into actual practice. The results will be shared with all in attendance as well as posted online.

Today's engineering managers need to be able to manage projects where some, or even all, of the engineers are located offshore. While the situation is becoming more common, the challenges and opportunities are still not widely understood. We are bringing together 4 panelists, with diverse backgrounds and experience, to answer your questions about managing with offshore engineers.

Richard Danielson is Founder and President of PlanV Software. He has been a consumer and a provider of outsourced software development services since the mid-80s, working with offshore engineers from India, Russia, Israel, Taiwan, Korea, and Vietnam. One of Rich's projects was helping Honeywell set up their Bangalore development center. In early 2007 Rich founded PlanV Software which provides Vietnam-based web and mobile device application development services to small and young companies.

Rakesh Gowda is the Director of Software Development at QuinStreet, a provider of online marketing and media services for nearly 600 clients, headquartered in Foster City. In 2005, Rakesh traveled back to his home country of India to set up QuinStreet's development center in Pune, outside of Mumbai. He is pleased to report that the Pune team no longer requires his direct supervision for day-to-day operations. Rakesh holds a MS in Computer Science from Stanford and BE from the University of Mysore in India.

Accelerance CEO Steve Mezak has more than 25 years of software development experience and is a veteran of six Silicon Valley startups. He has served in a variety of management and technical roles, including CTO and CEO. Steve is also an internationally acclaimed speaker and author. His most recent book is Software Without Borders: A Step-By-Step Guide to Outsourcing Your Software Development. Steve holds a BS Degree in Computer Science from Worcester Polytechnic Institute, where he now serves as an advisor to the Electrical and Computer Engineering Department.

Dmytry Mykhaylov is a software engineer and project manager who has been working on geographically distributed projects for over 6 years. As a project manager he specializes in helping small to mid-sized projects in the Bay Area effectively incorporate offshore engineering talent. Dmytry firmly believes that an agile approach to project organization on all sides of a distributed team is key to a project's success and profitability.

THURSDAY March 6SCV Technical Management Council


Digital Fingerprinting for Multimedia Forensics

Speaker: Prof. Min Wu, ECE Dept, Institute of

Advanced Computer Studies, University of Maryland

Time: Presentation at 7:00 PM Cost: none Place: National Semiconductor (north end of

Building E), 2900 Semiconductor Drive, Santa Clara

RSVP: not required Web: ewh.ieee.org/r6/scv/sps

Prof. Min Wu received the B.E. degree in

electrical engineering and the B.A. degree in economics in 1996 from Tsinghua University in Beijing, China (both with the highest honors), and the Ph.D. degree in electrical engineering from Princeton University in 2001. Since 2001, she has been on the faculty of the Department of Electrical and Computer Engineering and the Institute of Advanced Computing Studies at University of Maryland, College Park, where she is currently an Associate Professor. Dr. Wu leads the Media and Security Team (MAST) at University of Maryland, with main research interests on information security and forensics and multimedia signal processing. She has authored or co-authored two books and about 100 publications in international journals and conferences, and holds five U.S. patents on multimedia security and communications. She is a co-recipient of two Best Paper Awards from the IEEE Signal Processing Society and EURASIP, respectively. She also received a U.S. National Science Foundation CAREER award in 2002, a TR100 Young Innovator Award from the MIT Technology Review Magazine in 2004, a U.S. ONR Young Investigator Award in 2005, and a Computer World "40 Under 40" IT Innovator Award in 2007. She is current serving as Area Editor of the IEEE Signal Processing Magazine for its "Inside Signal Processing E-Newsletter" and on three IEEE Technical Committees on image and multimedia processing and systems.

Technology advancement has made multimedia content widely available and easy to process. These benefits also make it easy to make unauthorized duplication, manipulation, and redistribution of multimedia content, prompting the need of multimedia forensics research to facilitate evidence gathering in digital world. Embedded digital fingerprinting is one of the emerging forensics technologies. A unique ID that serves as a digital fingerprint to represent a receiving user is inserted into the content, and the fingerprinted content is then delivered to the user. When some copies are leaked or misused, the authority will be able to use these embedded fingerprints to trace back to the culprits. For multimedia data, digital fingerprints can be put into the content using conventional robust embedding techniques, which are typically concerned with surviving attacks mounted by an individual. Advances in communications and networking have made it easy for adversaries to work together to generate a new version based on their individual copies. These so-called collusion attacks provide adversaries with a cost-effective way to remove the fingerprints and circumvent the traitor-tracing mechanism.

In this talk, I will present our recent research on anti-collusion fingerprinting for multimedia data. Through jointly considering the encoding, embedding, and detection of fingerprints, our techniques can help collect digital-domain evidence and pinpoint to the sources of leak among millions of users. Applications of such multimedia forensic tools range from military and government operations to piracy deterrence in Hollywood and other entertainment industry.

If time permits, I will also give a brief introduction on non-intrusive forensic analysis that explores intrinsic traces to complement the embedded fingerprints in determining the origin and processing history of digital multimedia data.

MONDAY March 10SCV Signal Processing


Minimizing EMI & Noise: Coupling Among Circuit Regions

In Circuit Boards Speaker: W. Michael King, Systems Design Advisor Time: Social 5:30 PM, Presentation at 6:30 PM Cost: none Place: Applied Materials Bowers Cafeteria, 3090

Bowers Ave., Santa Clara RSVP: not required Web: www.scvemc.org

W. Michael King is a systems design advisor with a career spanning over four decades. He has been: engaged in the definition, design, evaluation, implementation, management and execution of well over one thousand projects and systems. He has held positions that have spanned the range from Systems Engineer to Director of Systems Engineering, and Chief Electronics Engineer. He has served as an advisor to Executive Management (Government Agencies and Commercial corporations). His initial period in engineering was in programs allocated broadly to approximately 400 government communications, surveillance, counter-ops (ELINT), and military projects (both AD and Deployment phases). These projects spanned “sensitive” applications and technologies across the frequency range from sub-hertz to tens of gigahertz with system amplitudes ranging from minus 140 dbm to energy in megajoules. Many terms used for PC Board Layout, such as the “3-W Rule”, the “V-plane Undercut Rule”, and “ground stitching nulls”, were all originated by Mr. King. He is generally recognized for his work in Systems Integration, EMC Emission and Susceptibility Control for all forms of systems, and occasionally serves as a manager or systems integrator. He has collaborated on the formations of many networks and standard practices, including the study group for 10/100BASEt. He serves an international client base as an independent design advisor.

Mr. King’s published original research changed the state the art on the subjects of the ESD dynamic waveform continuum and responses of cardiac pacemakers to electromagnetic fields. He has authored contributing feature articles to EDN Magazine, Design News Magazine, University of Oxford (England) CPD Newsletter, and Elliott Laboratories Compliance Advisory Service Newsletters as well as other publications.

Increasingly, circuit boards have a diversity of

circuit “block” regions that are not necessarily functionally compatible for noise from region to region in terms of performance margins. High speed “digital circuit regions” will demand high impulse currents from power planes that produce EMI and potentially high “noise” when compared to the sensitivities of “analog regions.” Some of this coupling can transfer back and forth due to electromagnetic field currents transferred across chassis! This presentation will cover layout topology concepts in not just the X & Y axes, but the Z-axis as well where coupling “through” chassis is one consideration of the Z-Axis!

The presentation includes information on the formation of layout topology concepts, separations of planes in the Z-Axis, and the role of copper weight to separate coupling from one circuit board region to another.

W. Michael King (continued) Significantly, he is the author of EMCT: High Speed

Design Tutorial (ISBN 0-7381-3340-X), which is the source of some of the graphics used in his IPC presentation. EMCT provides over 1,200 screens of instruction and is available through Elliott Laboratories, co-branded with the IEEE Standards Information Network.

Services currently provided by Mr. King include: a) performing as a member or lead of project teams to conceptualize the packaging, design, layout, integration and interface schemes of products and systems for appropriate EMC control; b) performing as a member or lead of the program development team to conceptualize or develop the product or system; c) functioning as an advisor to company/product management in order to establish appropriate systems integration policies; d) working with corporate/product management to form organizational efficiency; and, e) acting as an intermediary to coordinate efforts among corporations or groups associated in joint efforts.

TUESDAY March 11SCV Electromagnetic Compatibility


Panel: Next-Generation Wireless Broadband

Speakers: Dr. William C.Y. Lee, Treyspan; Rehan

Jalil, Wichorus; Bruce Himebauch, Atheros Time: Presentation at 6:00 PM Cost: none Place: National Semiconductor, Building E,

Conference Room, 2900 Semiconductor Dr, Santa Clara

RSVP: by email to Lu Chang, [email protected] Web: www.ewh.ieee.org/r6/scv/comsoc HSPA and LTE Dr. William Lee, Chairman, Treyspan, Inc.

Dr. Lee is Chairman of GoAnywhere, Inc.; previously he was Chairman of LinkAir Communications. From 1985-2000, he was Vice President and Chief Scientist of Global Technology for Vodafone AirTouch; from 1979-1985, he was manager of the Advanced Development Department at ITT Defense Communications Division; and from 1964 to 1979, he was with Bell Laboratories where he was a pioneer in mobile radio communications studies.

Lee served as a member of the California Council on Science and Technology from 1996-2002. He was recognized with the Bell Labs Dedicated Service Award, the ITTDCD Technical Contribution Award and the Institute of Electrical and Electronics Engineers (IEEE) VTS Avant Garde Award. In 1998, he was awarded the CDMA Industry Achievement award for his technical achievements; the IEEE Third Millennium Medal Award for his outstanding achievement and contributions; and the Stuart Meyer Memorial Award from the IEEE Vehicular Technology Society. In 2001, he received the Telecommunication Achievement award from the Chinese Historical Society of America.

WiMAX Rehan Jalil, CEO of Wichorus

Rehan has over 15 years of technical management and sales experience in telecommunications, networking, and multi-core processors. Prior to WiChorus, he was the chief architect for Aperto Networks and played diverse leadership roles in technology and sales. Aperto was a key contributor of technology that became part of IEEE802.16 and was a founding member of the WiMAX Forum. He developed multiple generations of broadband wireless silicon, carrier-grade base stations and terminals, and also brought in multi-million dollar orders. These systems are used to deploy networks globally, in over 75 countries, by more than 400 operators. At Sun Microsystems, he helped develop one of the industry’s earliest advanced multi-core multithreaded processors for throughput computing and graphics applications. Part of the technology is now used in Sun’s 32-threaded Niagara and Rock processors. At Siemens, he managed projects related to system-level design and implementation. He also contributes to social entrepreneurship projects and is a charter member of OPEN Silicon Valley. He has over 18 patents pending and graduated with an MSEE from Purdue University.

Wifi 11n Bruce Himebauch, Director of Solution Product Engineering, Atheros Communications

Bruce Himebauch is Director of Solution Product Engineering in the Software Research and Development Group of Atheros Communications. His 25 years of network industry experience at companies such as Symbol Technologies and Proxim Corporation has focused on LAN communications.

Bruce has worked on a variety of communication technologies including Binary Synchronous Communications Protocols, System Network Architecture/Synchronous Data Link Control protocols, and 802.11x.

WEDNESDAY March 12SCV Communications


Introduction to BlackBoard CE6: A Web-Based Learning Management System for Higher Education

Speaker: Corey Gin, instructional developer for

eCampus, a unit of International and Extended Studies at San Jose State University

Time: Dinner (no cost) at 6:30 PM, Presentation at 7:00 PM

Cost: none Place: Silicon Valley Technical Institute, 1762

Technology Drive, Suite 227, San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/es

Corey Gin is the senior lead instructional developer for eCampus, a unit of International and Extended Studies at San Jose State University. He is responsible for leading the department in providing tools, resources, and support to faculty who are using technology for learning. As an academic technology leader for eCampus, Corey seeks to ensure that students and faculty have access to powerful e-learning environments. Currently, eCampus administers BlackBoard CE6, a learning management system that includes web-based tools like threaded discussions, blogs, email, digital drop-boxes, quizzes/surveys, and content creation.

Corey Gin will provide an overview of how

BlackBoard CE6 is used in a higher education environment. He will begin by describing the need for web-based tools/resources to support instruction, how CE6 serves his institution, and why access is important for a variety of learners. He will then give an orientation to the BlackBoard CE6 learning environment, sharing commonly used tools/ resources, and discuss further how they may relate to common teaching and learning issues. If time and access permit, Corey will allow participants to explore a CE6 course shell.

WEDNESDAY March 12SCV Education


Nonlinear Network Analysis Speaker: Loren Betts, Agilent Technologies Time: Refreshments at 6:00 PM, Presentation at

6:30 PM Cost: none Place: National Semiconductor, Building 9,

Classroom 4, 2900 Semiconductor Dr, Santa Clara

RSVP: not required Web: www.mtt-scv.org

Loren Betts received a B. Sc. degree in computer engineering from the University of Alberta, Edmonton, Alberta, Canada in 1997. He received a M. Sc. degree in electrical engineering from Stanford in 2003. Currently he is working on his Ph. D. degree in electrical engineering from The University of Leeds, Leeds, UK. He is currently a senior engineer at Agilent Technologies focusing on complex stimulus/response measurements and modeling of nonlinear devices utilizing vector network analyzers. He originated and co-developed recent developments in pulse measurement detection algorithms utilized in current Agilent VNA's. He was also instrumental in driving the current multiport measurement and control schemes used in current Agilent VNA's. He has also authored or coauthored numerous articles in magazines, trade journals, conferences, and customer presentations.

Recent advances in VNA HW and measurement algorithms provide the means to accurately measure and model the RF and Microwave nonlinear characteristics of devices. This presentation will discuss the error correction algorithms used to accurately measure nonlinear device characteristics, introduce a new nonlinear measurement scattering parameter (X-parameter), new measurements of memory effects in nonlinear devices, and recent algorithm advancements RF and DC pulse detection.

THURSDAY March 13SCV Microwave Theory and Techniques

ANSYS Channel Partner

• Multiphysics, Multidisciplinary Engng • CFD, Stress, Heat Transfer, Fracture • Fatigue, Creep, Electromagnetics • Dynamics, Design Optimization • Linear/Nonlinear Finite Element Analyses

Ozen Engineering (408) 732-4665

[email protected] www.ozeninc.com


Cyber Security in the Electric Power Control Industry

Speaker: Joe Weiss PE, CISM, Applied Control

Solutions, LLC Time: Pizza and drinks at 7:00 PM; Presentation

following Cost: none Place: eastern doors, 6101 Bollinger Canyon Road,

San Ramon RSVP: by email by March 12 to [email protected]

(for food order) Web: www.comsoc.org/oeb

Joseph Weiss is an industry expert on control

systems and electronic security of control systems, with more than 30 years of experience in the energy industry. Mr. Weiss spent more than 14 years at the Electric Power Research Institute (EPRI) where he led a variety of programs. Mr. Weiss serves as a member of numerous organizations related to control system security. These include the North American Electric Reliability Council (NERC) Critical Infrastructure Protection Committee (CIPC), the International Electrotechnical Commission (IEC) Technical Committee (TC) 57 Working Group 15 - Data and Communication Security, the Process Controls Security Requirements Forum, CIGRÉ Joint Working Group D2/B3/C2 01- Security for Information Systems and Intranets in Electric Power Systems, and other industry working groups. He also established and chairs the annual Control System Cyber Security Workshop and established the International Standards Coordination Meeting on Control System Cyber Security. Mr. Weiss has received numerous industry awards, including EPRI Presidents Award (2002) and is an ISA Fellow and a member of the ISA Engineering, Science, and Technology Policy Committee. He has two patents on instrumentation and control systems and is a registered professional engineer in the State of California and a Certified Information Security Manager.

Industrial control systems such as SCADA, plant

control systems, and even meters and programmable thermostats have been designed to be efficient and reliable. Cyber security considerations have generally been an afterthought. From a cyber security perspective, these systems are different than traditional business systems. The presentation will focus on the vulnerabilities of these systems, some actual cyber events that have occurred, and the difficulties in securing these critical systems.

THURSDAY March 13OEB Communications and Computer

M E S OIn t eg r at io n

Let us help you integrate your product and get it into production • MEMS & Sensors Experts • Product Design ▪ R&D ▪ Failure Analysis • Medical Devices ▪ High-Volume Manufacturing • Experienced Consultants www.MesoIntegration.com

[email protected] TEL: 949.278.0275


Using Thermal Analysis as a Tool

to Aid Analog Floorplanning Speaker: David Schwan, CAD and Layout Manager,

RFMD Time: Fast Food & drinks at 6:30 PM,

Presentation at 7:00 PM Cost: none Place: Cadence Design Systems, Building 5, 655

Seely Avenue, San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/cas

David Schwan is a CAD and Layout Manager for

RFMD and works in the Multi-Market Product group (formerly Sirenza Microdevices). He is responsible for all tool support for the MPG division; which includes Analog, Digital, and RF tools; System level design, front end design, and back end design. He is the author of numerous papers in CAD methodology and IP. He has two patents pending. He is a member of the GSA (formerly FSA) mixed-signal subcommitte, and is an active participant in the GSA IP ecosystem.

Todays' IC designers are being driven to reduce

area and increase performance and power-efficiency. Local circuit temperature can affect circuit performance, speed and current consumption, as well create reliability problems like electro-migration and thermal-runaway. Temperature can be an engineered parameter, like voltage current, or resistance; instead of the traditional "seat of the pants" guess-temics. Design can be done without impacting reliability or performance, by looking at thermal maps of the circuit, thus aiding the floor-planning process to reduce temperatures, allowing transistors to operate in potentially more usable regions or to reduce temperature deltas in sensitive areas of the design; this can translate to lower operating currents, meaning greater efficiency. Since electro-migration is a function of temperature, current densities in metal traces are typically derated at higher temperatures. Lowering the operating temperature can mean narrower power traces, potentially reducing interconnect parasitics, or improved reliability. The presentation will show results from using Gradient Design Automation's CircuitFire to iterate placement of the transistors in a 1.9GHz 24dBM power amplifier, and the resulting effect on (predicted) operating temperature, and PA power efficiency.

MONDAY March 17SCV Circuits and Systems

Bernie Siegal

650-961-5900

[email protected] www.thermengr.com

Device Thermal Characterization Package Thermal Characterization Thermal Test Boards Thermal Test Equipment & Fixtures


Atomic Scale Modeling of Electron Transport in MRAM

Speaker: Dr. Dimitri Novikov, CTO, Atomistix, Inc. Time: Registration & light lunch 11:30 AM,

Presentation at Noon Cost: IEEE Members and Students $5, Non-

Members $10 Place: National Semiconductor, Bldg E-1 CMA

Room, 2900 Semiconductor Drive, Santa Clara

RSVP: from the website Web: www.ieee.org/nano

Dmitri Novikov is a Computational Materials Scientist, who is the Chief Technical Officer (CTO) of Atomistix Inc. Atomistix, founded in 2001, is a leading provider of modeling tools, based in part on Dr. Novikov’s work, for nanoelectronic applications. Prior to joining Atomistix, Dr. Novikov worked as a lead scientist at TIAX, LLC, where he did development work on electron transport in phosphate cathode materials for LCD displays. Prior to TIAX, Dr. Novikov worked as a lead technical consultant with Arthur D. Little, Inc., where one of his successful projects was, in collaboration with the U.S. Department of Energy, to create a higher efficiency filament for incandescent lamps. Prior to Arthur D. Little, Dmitri spent 15 years of as an academic researcher, focused on modeling of solid-state and molecular properties of numerous materials, including semiconductors. In addition to his duties as CTO at Atomistix, Dr. Novikov is also the co-founder of scientific software company QMD Inc., which develops a commercial version of a density-functional package for the modeling of electronic and optical properties of solids from first-principles.

Dr. Novikov holds Ph.D. degree from Russian Academy of Sciences, and has published 79 scientific journal articles.

Atomic-scale modeling is becoming an important

step in the process of designing novel advanced electronic devices, especially at the nanoscale size. Modeling R&D efforts are growing much faster than experimental research. One of the most prominent areas is the modeling of Tunneling Magnetoresistance, which is important to the production of magnetoresistive random-access memory (MRAM) and read sensors for hard drives. We will present results on atomic-scale modeling, using Atomistix’s atomic scale modeling platform, of transport properties of Fe/Mg/Fe, Co/MgO/Co and FeCo/MgO/FeCo tunnel junctions at zero bias. We will show how these properties depend on the thickness of the MgO layer as well as the chemical composition of the interface layer in the case of FeCo, and compare these to published experimental results.

TUESDAY March 18SCV Nanotechnology


Home Digital Storage Hierarchy and Consumer Storage Demand

Speaker: Thomas M. Coughlin, Coughlin Associates Time: Cookies & Conversation at 7:30 PM,

Presentation at 8:00 PM Cost: none Place: Western Digital, 1710 Automation Parkway,

San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/mag

Dr. Thomas Coughlin is the Founder and President of Coughlin Associates. Tom has over 30 years of experience in the data storage industry as a working engineer and high level technical manager. In addition to regular technical and management consulting projects he is the publisher of reports on digital storage in consumer electronics as as content creation and distribution. He is the author of the recently published Digital Storage in Consumer Electronics: The Essential Guide from Newnes (a division of Elsevier). Tom has many published reports and articles on digital storage and its applications. He has 6 patents on magnetic recording and related technologies. Tom is the founder and organizer of the annual Storage Visions Conference, a partner to the International CES. Tom is a senior member and was 2007 chairman of the Santa Clara Valley IEEE Section and San Francisco Bay Area Council and was chairman of the Santa Clara Valley IEEE Consumer Electronics Society in 2006 and past chairman of the SCV IEEE Magnetics Society more than once.

Tom is a member of the IEEE CE Society Adcom. He is also a member of APS, AVS, IDEMA, SNIA, AAAS, TCG and SMPTE. Tom received a B.S. in Physics and an M.S.E.E. from the University of Minnesota (Minneapolis) and a PhD in Electrical Engineering from Shinshu University in Nagano, Japan.

.

This presentation discusses different mobile and

static usage models for digital storage in consumer devices. These models define storage hierarchies that are useful for analyzing the proper digital storage technology for a consumer electronics application. Important characteristics of consumer storage devices are shown and guidelines are given for how digital storage should be designed in consumer devices. Demand for higher resolution content and for capturing ever greater details of the life of family members will drive increases in commercial as well as personal content storage demand. Sharing of content within a home or over the Internet creates much greater demand for storage since a shared file can be multiplied many times through network sharing.

TUESDAY March 18SCV Magnetics


Research Techniques for the Consultant: Using

the IEEE's Xplore Database Speaker: Paul Wesling, VP-Publications, IEEE CPMT

Society; Advisory Design Engineer, Hewlett Packard Corp (retired)

Time: Networking at 7:00 PM, followed by Presentation

Cost: none Place: KeyPoint Credit Union, 2805 Bowers

Avenue, Santa Clara RSVP: not required Web: www.CaliforniaConsultants.org

Paul Wesling received his BS in electrical engineering and his MS in materials science from Stanford. Following assign-ments at GTE/Lenkurt Electric (component eng-ineeering), ISS/Sperry Univac (bubble memory development, reliability, manufacturing engineer-ing), Datapoint Peripheral Products (VP - Product Integrity), and Amdahl (design analysis, mainframe testing, console peripherals), he joined Tandem Computers (now HP's NonStop Enterprise Division) in 1985. As a member of the development team for advanced IC packaging, he designed several multi-chip module prototypes, supervised their fabrication, and tested them. In Tandem's Education Group from 1993-2002, he developed courses on reliability, managed Tandem's Distinguished Lectures series, and was on education's Technology Initiative team. He organized a number of advanced technology and professional skills development courses for his Division and also for the IEEE. He managed a grant from the National Science Foundation for the development of multimedia educational modules in the field of IC packaging. Now retired, he is communications director and editor for the IEEE’s SF Bay Area Council. (continued)

Consultants need to quickly understand previous technical developments and current difficulties associated with a proposed client project. While some of this information can be obtained from specialists working for the client, and you may have considerable first-hand knowledge in the field, a full literature search can usually reveal details unknown to the client and lead to better recommendations and solutions. Such facts may include which companies/labs are working on similar products, what techniques are proving suitable for production, which methods have been abandoned for reasons of cost or implementation difficulties, what IP is available for licensing, and which conferences and forums are covering details of the selected technology.

After a brief overview of IEEE's journals in computing, communications, packaging and other technical areas, the presentation will demonstrate methods for using the IEEE's on-line database of journal and conference papers for analysis of published results that can affect and influence the direction of development activities. This includes how to access the 1.6 million items using XPLORE, some search and selection strategies, full-text versus abstracts searches, storing searches for re-use, and using Google Scholar. and Scitopia. Specific recommendations for accessing the full papers will be made.

Sharing a portfolio of relevant citations can support your work proposal and provide authority for your recommendations. Maintaining access to IEEE’s literature can be a key differentiating factor for your consulting business.

Wesling (continued)

Mr. Wesling has published a number of technical and education papers and authored a book chapter. As CPMT's vice president of publications, he supervised four archival journals and a newsletter, and oversaw authors for IEEE Press books. He is a Fellow of the IEEE, and received the IEEE Centennial Medal, the CPMT Board's Distinguished Service award, the Society Contribution Award, and the IEEE's Third Millennium Medal. He has organized over 500 courses for the local IEEE CPMT chapter in the Santa Clara Valley, many of them held at Stanford University (and, more recently, at industrial facilities). He served as scoutmaster of his local Boy Scout Troop for 15 years, is currently Advisor of a High-Adventure Crew, and enjoys backpacking, fly fishing, and amateur radio.

TUESDAY March 18SCV Consultants' Network of Silicon Valley


Robotically Assisted Surgery: How daVinci Works Now and

How It Could Evolve Speaker: William C. Nowlin, Ph.D, Intuitive Surgical Time: No-host dinner at 6:15 PM, Presentation at

7:30 PM Cost: none, for presentation Place: Optional Dinner, Stanford Hospital

Cafeteria, 6:15 PM (no reservations); talk at Clark Center Auditorium, Stanford Univ.

RSVP: not required Web: ewh.ieee.org/r6/scv/embs

Dr. William Nowlin joined Intuitive Surgical in

1996 from SRI International, where he was involved in developing SRI's prototype surgical system. Dr. Nowlin became part of Intuitive Surgical’s system software leadership team in 1999, then was promoted to Director in 2001 and Senior Director in 2006. Dr. Nowlin received his B.A. in Mathematics and Physics from the University of Virginia, where he was honored by each department as its outstanding graduate; he then received a Masters Degree and Ph.D. in Applied Mathematics from Harvard University, with an application in robotics. Dr. Nowlin is co-author of more than a dozen U.S. and international patents, as well as several technical conference and journal publications.

Intuitive Surgical makes the daVinci™ Surgical System, which is variously described as a "robot", a "telesurgical system", and a "mechanism for minimally invasive surgery". In this presentation, I'll give a general introduction to the device and how surgery is accomplished using it. I'll talk a little about the business of robotic surgery. I'll try to give some historical background to credit those on whose shoulders we stand, and describe the fundamental technological elements (what's neat about it). Next I'll discuss the technical and business challenges, and I'll do my best to describe where I see the technology going in the next few years. I promise plenty of pictures and videos, and I hope to bring some hardware to let you explore. The talk can be very interactive, and I am happy to veer off in a direction determined by the group.

WEDNESDAY March 19SCV Engineering in Medicine and Biology


1.8 Gpulses/s UWB Transmitter in 90nm CMOS

Speaker: Murat Demirkan, University of California,

Davis Time: Refreshments at 6:00 PM; Presentation at

6:30 PM Cost: small donation for food Place: National Semiconductor Building E,

Auditorium, 2900 Semiconductor Dr., Santa Clara

RSVP: not required Web: www.ewh.ieee.org/r6/scv/ssc

Murat Demirkan received the B.S. degree in

electrical and electronics engineering from METU University, Ankara, Turkey in 2001 and in 2004 he received the M.S. degree in electrical and computer engineering from the University of California, Davis where he is expected to receive the Ph.D. degree in March 2008.

His research interests are in the areas of analog, mixed-signal and RF integrated-circuit design. During his time at the University of California, Davis, he has worked on projects involving ultra-wideband transceiver circuit design, RF frequency synthesizers and the modeling of ultra-wideband antennas. In January 2008, he joined Agilent Technologies, Santa Clara, where he is engaged in the design of mixed-signal circuits for high-speed serial links.

Mr. Demirkan received the Analog Devices Outstanding Student Designer Award in 2007. He was a co-recipient of the 2nd-place Best Student Paper Award at the 2007 IEEE Radio Frequency Integrated Circuits Symposium. He also received the Beatrice Winner Award for Editorial Excellence at the 2008 International Solid-State Circuits Conference.

This presentation is based on the speaker’s Ph.D.

dissertation which focuses on the design of a pulse-based ultra-wideband (UWB) transmitter. The transmitter consists of a pulse generator, a phase-locked loop (PLL) and modulation circuitry. The novel pulse generator employs FIR filtering so that the transmitted signal is compliant with the indoor FCC spectral mask. The frequency-multiplying PLL is designed to provide an accurate timing reference. Implemented in a 90 nm standard digital CMOS process, the prototype transmitter achieves a maximum pulse rate of 1.8 Gpulses/s. The 2.83 mm2 chip consumes 227 mW from a 1 V supply and includes everything but the antenna.

Because the antenna is a critical part of the system that produces the final transmitted signal, a general method is presented for the modeling of arbitrary ultra-wideband antennas directly in RF circuit simulators in order to enable simulations of circuit performance with the antennas included. The antenna modeling approach is based on S-parameter measurements, which are conducted in an anechoic chamber. Since the FCC uses the EIRP to assess compliance with their regulations, being able to accurately simulate its value is important. In addition, a procedure to model multipath channels in the circuit domain is presented.

Since a voltage-controlled oscillator (VCO) is required for this project, the design of high-frequency, tunable VCOs was investigated. As a part of this investigation, VCOs with mutually coupled and switched inductors were implemented in a 90 nm digital CMOS process to demonstrate that the tuning range of an LC VCO can be improved with only a small increase in phase noise and die area. This work was done in collaboration with Stephen Bruss. One of the VCOs implemented has two extra coupled inductors and achieves a 61.9% tuning range with an 11.75 GHz center frequency while dissipating 7.7 mW from a 1.2 V supply. This VCO has a measured phase noise of -106 dBc/Hz at 1 MHz offset from the center frequency and its area is only 30% more than a conventional LC VCO with a single inductor.

THURSDAY March 20SCV Solid State Circuits


The Future of Product Safety: Developing IEC 62368

Speaker: Rich Pescatore, Global Product Safety

Standards Development and Certification Manager, Hewlett-Packard

Time: No-host dinner at 5.45 PM at El Torito; Presentation at 7:00 PM at Bowers Café

Cost: none, for presentation Place: Optional dinner, El Torito Mexican

Restaurant, 2950 Lakeside Drive, Santa Clara (no reservations); talk at Applied Materials, Bowers Café, 3090 Bowers Ave, Santa Clara

RSVP: not required Web: www.e-grid.net/docs/0803-scv-pses.pdf

Rich Pescatore has over 35 years of experience in the fields of Product Safety and Regulations and presently serves as Hewlett-Packard's Global Product Safety Standards Development and Certification Manager. He is

* A Member of the Board of Directors of the IEEE Product Safety Engineering Society,

* Vice Chairman (and past Chairman) of the Information Technology Industry Council (ITI) Technical Regulations Committee,

* Head of the US Delegation to the IECEE Certification Management Committee, and

* Head of the US Delegation to IEC TC 108 and Convener of the corresponding Working Group developing IEC 62368.

Mr. Pescatore was the recipient of the Edward Lohse Information Technology Medal for his demonstrated leadership in the development and promotion of national and international standards. He has been awarded the "IEC 1906 Award" for "his major contribution in the promotion of the IECEE CB Scheme." Mr. Pescatore has a BSEE from California Polytechnic State University and an MBA from the University of Santa Clara. He is a Registered Electrical Engineer in the State of California.

They said it couldn't be done - a safety standard

built on the foundation of Hazard-Based Safety Engineering. But Rich Pescatore now is leading the international effort to create just such a hazard-based safety standard. It will be known as IEC 62368, and its scope will be the Safety of Information and Communication Technology Equipment and Audio/ Video Equipment. Mr. Pescatore will review the basis, the scope and the goals of this new standard. He will share his insight into the challenges being overcome to make this standard both accurate and useful, and he will describe the work being done to ensure it will be functional within the IECEE CB Scheme.

There is a REVOLUTION taking place in Safety Standards, and here is a report from the front lines! The biggest hazard would be to miss this presentation!

TUESDAY March 25SCV Product Safety Engineering

MET Laboratories

EMC – Product Safety

US & Canada

• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (BQTF & EPCglobal Test Lab)

Facilities in Union City and Santa Clara

www.metlabs.com [email protected] 510-489-6300


Flip-Chip Substrates For Advanced Applications

Speaker: Bernd Appelt, Director, Worldwide Business

Development, ASE (U.S.) Inc. Time: Lunch at 11:45 AM, Presentation at Noon Cost: $15 if reserved by March 24; $20 at door Place: Ramada, 1217 Wildwood Ave (Fwy 101

frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale

RSVP: by email with Ed Aoki, [email protected] Web: www.cpmt.org/scv

Bernd Appelt obtained his PhD in Polymer Chemistry at the University of Mainz, Germany. He started his career in the US as a post-doc at the University of Massachusetts and IBM Research. Subsequently, he worked for many years at IBM in Materials & Process Development of PCBs. There, he held management positions in Manufacturing Engineering, Business Development and Technology Licensing of packaging technologies. In February 2003, he joined ASE US as Director of Substrate Marketing. In 2004, Bernd moved to ASE Europe as Director of Engineering and Substrate Business Development. Starting in 2006, he moved to ASE Shanghai to lead a team of professionals in World Wide Business Development and to direct the Substrate Technology consultation efforts within ASE Materials Shanghai. At the end of 2007, Bernd returned to the US and is promoting ASE Materials substrates as Director of World Wide Business Development in Santa Clara.

.

The continuing advancements in silicon technology

are driving further innovation in flip-chip substrate technology. Market dynamics have lead to a de facto standardization of build-up technology for flip chip substrates for CPUs, graphics and gaming processors and ASICs. More advanced substrates like coreless and high density core substrates have been developed but their market penetration has yet to happen. The most aggressive substrate development is now driven by mobile applications seeking to embed components directly into the substrate. Discretes as well as active die can be embedded successfully but market penetration is pending the development of new business models because the supply chain will be changed by these new substrates. Likewise the development of flip-chip chip-scale substrates is also driven by mobile applications to become a low cost and high volume technology.

In this presentation, the different substrate technologies will be reviewed. The market dynamics of the substrate evolution will be described and opened up for discussion.

THURSDAY March 27SCV Components, Packaging and Manufacturing Technology


The CPUC Renewable Portfolio Standard

Speaker: Sara Kamins, Energy Division policy

analyst, California Public Utilities Commission

Time: Lunch and Presentation at Noon Cost: none for members, $5 for non-members (to

cover food) Place: Public Utilities Commission, Courtyard

Room, 505 Van Ness Ave., San Francisco RSVP: by email by March 31st to Julian Ajello,

[email protected] Web: www.e-grid.net/docs/0803-sf-pes.pdf

Sara Kamins is a policy analyst

in the California Public Utilities Commission’s Energy Division. Her main responsibilities include developing and implementing the Renewables Portfolio Standard (RPS) policy framework, evaluating renewable energy power purchase agreements and coordinating RPS policy design with the Greenhouse Gas policy design. Sara received her Masters of Science from the Energy and Resources Group (ERG) at UC-Berkeley in May 2006, where she developed an optimization model of California’s electricity sector to analyze the costs and effectiveness of several global warming policies. Before attending ERG, Sara worked at the Global Energy Network Institute, a non-profit in San Diego, where she helped develop and market the KLD Global Climate 100SM Index, an index fund designed to promote investment in public companies whose activities help mitigate the causes of climate change. Her experience also includes work for other Bay Area non-profits, political offices in Washington D.C. and the United Nations Environmental Programme in Paris.

The California Renewables Portfolio Standard

(RPS) Program was established by Senate Bill (SB) 1078 (2002) and amended by SB 107 (2006). The law requires that each retail seller of electricity increase its procurement of eligible renewable energy resources by at least one percent of annual retail sales per year so that 20 percent of its retail sales are supplied by eligible renewable energy resources by 2010. The CPUC is responsible for determining annual procurement targets, approving utility procurement plans, overseeing the IOUs’ annual renewables solicitations, reviewing RPS power purchase agreements and assessing compliance with annual targets. The CEC establishes the renewable resources eligibility guidelines and certifies RPS facilities. Thus far, the CPUC has approved 80 RPS contracts with the IOUs for nearly 4,000 MW. While the RPS procurement and contracting process has been successful, only about 340 MW of the approved projects have come online – project development (e.g. permitting, transmission upgrades) continues to delay project online dates. While now working with other agencies to implement solutions to these project development hurdles, the CPUC continues to refine the RPS procurement processes, track progress with the RPS goals and consider additional ways to comply with the RPS program.

WEDNESDAY April 2SF Power Engineering


A New Perspective on Electronic Product Reliability: Prognostics

and Health Management Speaker: Prof. Michael Pecht, Center for Advanced

Life Cycle Engineering (CALCE), University of Maryland

Time: Dinner at 6:30 PM, Presentation (no cost) at 7:30 PM

Cost: $25 for dinner (if reserved by April 6) Place: Ramada Inn, 1217 Wildwood Ave (Fwy 101

frontage road, between Lawrence Expressway and Great America Parkway), Sunnyvale

RSVP: by email with Janis Karklins, [email protected]

Web: www.cpmt.org/scv

Michael Pecht has a BS in Acoustics, an MS in Electrical Engineering and an MS and PhD in Engineering Mechanics from the University of Wisconsin at Madison. He is a Professional Engineer, an IEEE Fellow and an ASME Fellow. He has received the IEEE Reliability Lifetime Achievement Award, the IEEE Undergraduate Teaching Award, the IMAPS William D. Ashman Memorial Achievement Award for his contributions in electronics reliability analysis, and the 3M Research Award for electronics packaging. He has written over 20 books on electronic products development, reliability, use and supply chain management. He served as chief editor of the IEEE Transactions on Reliability for eight years and on the advisory board of IEEE Spectrum. He is chief editor for Microelectronics Reliability and an associate editor for the IEEE Transactions on Components and Packaging Technology. He is the founder of CALCE (Center for Advanced Life Cycle Engineering) and the Electronic Products and Systems Consortium at the University of Maryland. He is also a Chair Professor.

He has been leading a research team in the area of prognostics for the past six years, and has now formed a new Electronics Prognostics and Health Management Consortium at the University of Maryland. He has consulted for over 100 major international electronics companies, providing expertise in strategic planning, design, test, prognostics, IP and risk assessment of electronic products and systems.

Reliability is the ability of a product or system to perform as intended (i.e., without failure and within specified performance limits) for a specified time, in its life-cycle environment. It is now well known that the handbook electronics reliability prediction methods (Mil-Hdbk-217, 217-Plus, Bellcore/ Telcordia, PRISM, FIDES, SAE) are misleading and provide erroneous life predictions, a fact that led the U.S. military and many commercial companies to abandon these electronics reliability prediction methods. Although the use of stress and damage models permits a more accurate result, their application to long-term reliability predictions based on extrapolated short-term life testing data or field data, is typically constrained by insufficient knowledge of the actual operating and environmental application conditions of the product. This also affects the cost-effective and efficient application of accelerated test methods.

Prognostics and health management is a method that permits the assessment of the reliability of a system under its actual application conditions. It integrates sensor data with models that enable in-situ assessment of the deviation or degradation of a product from an expected normal operating condition (i.e., the system’s “health”) and also predicts the future state of reliability based on current and historic conditions.

The Center for Advanced Life Cycle Engineering (CALCE) at the University Of Maryland has an established Prognostics and Health Management (PHM) Consortium to provide basic research and technology to members. Different prognostics approaches that have been assessed by CALCE PHM include: the use of expendable devices, such as ‘canaries’ and fuses that fail earlier than the host product to provide advance warning of failure; the monitoring and reasoning of parameters that are precursors to impending failure, such as shifts in performance parameters; and the modeling of stress and damage utilizing life cycle loads (e.g., usage, temperature, vibration, radiation). Examples of implementation methods and results are given.

WEDNESDAY April 9

SCV Components, Packaging and Manufacturing Technology and Reliability


Fourth Generation (4G) Mobile Smartphone Architecture Targeted for Chinese and

US Markets Speaker: Prof. Willie W. Lu, U.S. Center for Wireless

Communications (USCWC) Time: 6:00 PM Cost: none Place: National Semiconductor, Building E,

Conference Room, 2900 Semiconductor Dr, Santa Clara

RSVP: not required Web: www.ewh.ieee.org/r6/scv/comsoc

Dr. Willie W. Lu, a former Stanford University Professor, is now executive director of U.S. Center for Wireless Communications (USCWC) in Palo Alto, and a special advisor on emerging technologies and strategies in several China information and communications authorities as well as a technology expert committee member and examiner for European Commission's FP6 and FP7 programs. Prof. Lu was a member of the Technological Advisory Council of the U.S. Federal Communications Commission (US FCC-TAC), and a chief wireless architect and vice president of Siemens and Infineon Technologies. He is also an internationally recognized and accredited senior expert in emerging wireless technologies and has been a senior technical advisor for 22 wireless communication authorities in more than 10 countries. He is an independent technical examiner for many high-tech venture capitals in the United States, Europe and Asia, and is listed in major Who's Whos in the world. He has guest-edited around 50 special issues on emerging wireless communications in IEEE, IEICE, ACM and other major publications, and has had over 180 papers published in major professional publications as well as about 80 papers in SCI index. Prof. Lu was member of the editorial board of IEEE Spectrum, the flagship of the IEEE. He has been technical program chairman of numerous IEEE conferences including GLOBECOM'03, WCNC'02, VTC'03, and WWC'00-07, and wireless feature editor of IEEE Communications Magazine, IEEE Transactions on Wireless Communications (former J-SAC Wireless), and others. (continued …)

The future wireless and mobile communications

terminal device will be shifted from the traditional transmission-specific technology to an interface-based technology to be able to converge with the computer system architecture.

This talk will present an open architecture platform for the fourth generation (4G) mobile smartphone device supporting multi-bands, multi-standards wireless and mobile communications and enabling extensibility and upgradeability of the system modules including radio frequency transceiver, data converter and base-band processing core where the open system platforms are based on the open wireless architecture (OWA) BIOS and frameworks. This OWA system platform is an optimal integration of the computer’s architecture with the next generation wireless and mobile communications technology to deliver truly open and simple 4G smartphone products.

The presented system architecture can be utilized for the next generation iPhone product, the Google phone product, the Blackberry product, the iPAQ product as well as other advanced smartphone product definitions. The architecture development is focused on the Chinese and US markets where openness and simplicity become the driving forces in designing the next-generation smartphones. … continued

He is a frequent keynote and featured speaker at global technical fora, and a prominent wireless pioneer on a worldwide basis. He is a member of IEEE, ACM, IEICE, CIC and Sigma Xi, and an adjunct professor at many world-class universities. Willie is also the founding chairman of the prestigious World Wireless Congress, Global Mobile Congress and Fourth Generation Mobile Forum (4GMF), and has been a distinguished and notable Chinese wireless expert overseas by Chinese central government since 1996.

WEDNESDAY April 9SCV Communications

Valon Technology, LLC

valontechnology.com

[email protected]

RF and Wireless Product Design & Development

- System Engineering - Test & Measurement - Schematic Capture & PCB layout- Expert Witness

Redwood City (650) 369-0575


Magnetism and Polarized Soft X-rays – Towards Fundamental

Magnetic Length and Time Scales Speaker: Peter Fischer, Center for X-ray Optics,

Lawrence Berkeley National Laboratory Time: Cookies & Conversation at 7:30 PM,

Presentation at 8:00 PM Cost: none Place: Western Digital, 1710 Automation Parkway,

San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/mag

Peter Fischer studied physics at the Technical University of Munich and received his PhD from the Technical University of Munich/Germany in 1993, followed by the habilitation thesis from the Universiy of Wuerzburg/Germany in 2000. After being a scientific group leader at the Max-Planck-Insitute for Metal Research in Stuttgart/Germany, he joined the Center for X-ray Optics at Lawrence Berkeley National Laboratory in 2004 where he is staff scientist within the Materials Science Division. He is in charge of the scientific program and the user support at the high resolution soft X-ray microscope beamline at the Advanced Light Source, a world leading instrument serving a wide community in X-ray optics, nanomagnetism research, materials science and biology.

His research interests are dedicated to the use of polarized X-rays to study magnetism at short length and time scales based on X-ray dichroism effects, and he pioneered soft X-ray microscopy for magnetic imaging. His recent focus is on spin dynamics in nanoscale magnetic systems.

He has (co-)authored more than 90 refereed publications and he is serving the synchrotron community as a member of the proposal panels at the Swiss Light Source and the ALS and as a member of the international program committee for X-ray microscopy conferences. He is chair of the 7th International Symposium on Metallic Multilayers (MML2010) to be held in 2010 in Berkeley. He is a member of the Magnetics Society of IEEE and APS.

The challenge to modern magnetic microscopes is

to provide both spatial resolution in the nanometer regime, a time resolution on a ps to fs scale and elemental specificity which allows us to study novel multicomponent and multifunctional magnetic nanostructures and their ultrafast spin dynamics which are of both fundamental and technological interest.

The magnetic soft X-ray microscopy combines X-ray magnetic circular dichroism (X-MCD) as element specific magnetic contrast mechanism with high spatial and temporal resolution. Fresnel zone plates used as X-ray optical elements provide a spatial resolution down to currently <15nm, which approaches fundamental magnetic length scales such as the grain size and magnetic exchange lengths. Images can be recorded in external magnetic fields giving access to study magnetization reversal phenomena on the nanoscale. Utilizing the inherent time structure of current synchrotron sources, fast magnetization dynamics with 70ps time resolution, limited by the lengths of the electron bunches, can be performed with a stroboscopic pump-probe scheme.

I will give an overview of the current status of high resolution magnetic soft X-ray microscopy. The data presented were obtained with the full-field soft X-ray microscope XM-1 at the Advanced Light Source in Berkeley. Selected examples on magnetic multilayers and nanostructured systems, where both classical Oersted fields as well as spin torque phenomena are used to manipulate the magnetization, demonstrate the potential of this novel diagnostic tool.

Future perspectives of magnetic soft X-ray microscopy aiming for <10nm spatial and fs time resolution will be discussed.

This work is supported by the DOE, Office of Science, Basic Energy Sciences, Division of Materials Sciences and Engineering.

TUESDAY April 15SCV Magnetics


Highly Integrated Re-configurable RF Front-ends in Deep

Sub-micron CMOS Speaker: Naveen Yanduru, Design Manager, Texas

Instruments Inc. and IEEE/CAS Distinguished Lecturer

Time: Fast food and drinks at 6:30 PM, Presentation at 7:00 PM

Cost: none Place: Cadence Design Systems, Building 5, 655 Seely Avenue, San Jose RSVP: not required Web: ewh.ieee.org/r6/scv/cas

Naveen Yanduru is currently a Design Manager at

Texas Instruments Inc., and a Member Grade Technical Staff. While at Texas Instruments he has led design teams in the design of various RF receivers including GSM/EDGE, WCDMA, TDSCDMA, GPS and multi-mode receivers. He is currently involved in the design of DRP™ chips, which are highly integrated ICs in deep sub-micron CMOS processes for mobile phones.

Various RF bands, standards, modulation

schemes, duplex mechanisms and signal bandwidths needed for the mobile terminal call for a highly adaptable and reconfigurable RF receiver. The biggest bottleneck in achieving this goal lies with the RF pre-select filter at the antenna, which is band specific and creates a bottleneck in being able to share the hardware.

Solving this multi band programmability is the biggest challenge in achieving aN RF receiver for software defined radio. A few of the possible architectures and their limitations are presented. However, designing a multi mode RF receiver for a given RF band with highly reconfigurable performance is an achievable goal.

A WCDMA/EDGE receiver without inter-stage SAW filter in 90nm digital CMOS is used as an example in illustrating the architecture, circuit and system considerations for such a receiver.

MONDAY May 19SCV Circuits and Systems


SAN FRANCISCO BAY AREA COUNCIL DIRECTORY OF OFFICERS

2008

Oakland East Bay Section (below)

San Francisco Section

Santa Clara Valley Section

SF BAY AREA COUNCIL OFFICERS FOR 2008

OEB Delegate and Chair Victor Stepanians J and M Consultants P.O. Box 1513 San Ramon, CA 94583 Tel: 925 968-0979 Fax: 925 244-4782 Email: [email protected]

SF Delegate and Secretary Dan Sparks, PE P.O. Box 191681 San Francisco, CA 94119 Tel: 415 260-4613 Email: [email protected]

SCV Delegate and Treasurer Ram Sivaraman KLA-Tencor, Mail Stop: J1229 145 Rio Robles San Jose, CA 95134 Tel: 512 296-8734 (c) Email: [email protected]

SCV Delegate Thomas M. Coughlin Coughlin Associates Tel/Fax: 408 978-8184 408 202-5098 (c) Email: [email protected]

OEB Delegate Rosanna Lerma Salas O’Brien Engineers 408 282-1500 x268 [email protected]

SF Delegate Sandra Ellis, PE Pacific Gas and Electric Company P.O. Box 770000 San Francisco, CA 94177 Tel: 415 973-1665 Email: [email protected]

OAKLAND/EAST BAY SECTION OFFICERS

FOR 2008

EXECUTIVE COMMITTEE

Chair Rosanna Lerma 436 14th Street, Suite 150 Oakland, CA 94612 Tel: 408 282-1500 x268 [email protected]

Vice Chair Alan Meyer Lawrence Livermore Natl Labs L-151 PO Box 808 Livermore, CA 94551 Tel: 925 422-8695 Email: [email protected]

Secretary/ Treasurer James Hungerford 5870 Stoneridge Mall Rd., Suite 205 Pleasanton, CA 94588 Tel: 925 218-1822 Email: [email protected]

PACE Katherine Wade Lawrence Livermore Nat’l Lab L-153 PO Box 808 Livermore, CA 94551 Tel:925-422-1567 [email protected]

Communications Director/Webmaster William J. “Bill” DeHope Lawrence Livermore Nat’l Lab Tel: 925 424-6413 Email: [email protected]

Region 6 Student Representative Kelly Smith CSU Fresno 2320 East San Ramon Ave. M/S EE94 Fresno, CA 93740 Tel: 559-278-4163 Email: [email protected]

GOLD (Grads of the Last Decade) GOLD Chair Brent McHale Lawrence Livermore National Lab 7000 East Ave, L-229 Livermore, CA 94550 Tel: 925-422-8730 Email: [email protected]

GOLD Vice Chair Laura Tully Email: [email protected]

GOLD Treasurer Adam White Email: [email protected]

GOLD Secretary Eric Crull Email: [email protected]

COMMUNICATIONS SOCIETY Chair Bill Kaminsky 2635 Comistas Dr. Walnut Creek, CA 94598 Tel: 925-639-7192 Email: [email protected]

Vice Chair Malik Audeh Tel: 510 305-6022 Email: [email protected]

Secretary Subhasis Saha, Ph.D. 3788 Mohr Ave. Pleasanton, CA 94588 [email protected]

Treasurer Dr. Avtar Singh 4008 Ordaz Ct. Dublin, CA 94568 Tel: 925 361-7209 Email: [email protected]

Webmaster Randy Roberts Tel: 925 423-9255 Email: [email protected]


ENGINEERING MANAGEMENT Chair/Treasurer Annie Kong ChevronTexaco 841 Chevron Way Richmond CA 94802 Tel: 510 242-1130 Email: [email protected]

INDUSTRY APPLICATIONS SOCIETY Chair Gregg A. Boltz, PE Brown & Caldwell 201 N. Civic Drive, Suite 115 Walnut Creek, CA 94596-3864 Tel: 925 210-2571 Email: [email protected]

Vice Chair Richard Romero Stanley Electric Motor Company Tel: 209-464-7321

Secretary Michael Nakamura East Bay Municipal Utility District 375 Eleventh Street, MS 702 Oakland, CA 94607 Tel: 510 287-2066 Email: [email protected]

NUCLEAR & PLASMA SCIENCES SOCIETY Chair Joe Mauger Lawrence Livermore Nat’l Laboratory P.O. Box 808, L-353 Livermore, CA 94550 Tel: 925 423-7682 Email: [email protected]

Vice Chair G. Patrick Roberson University of California Lawrence Livermore Nat’l Laboratory 7000 East Avenue, M/S L-333 Livermore, CA 94550 Tel: 925 422-8693 Email: [email protected]

Secretary

Paul G. Banchero 6232 Auburn Avenue Oakland, CA 94618-1322 Tel: 510 627-1165 Email: [email protected]

Treasurer Edward J. Lampo University of California Lawrence Livermore Nat’l Laboratory 1 Cyclotron Road, M/S 80-101 Berkeley, CA 94720 Tel: 510 486-6779 Email: [email protected]

POWER ENGINEERING SOCIETY Chair Stephen Howarter 436 14th Street, Suite 150 Oakland, CA 94612 Tel: 408 282-1500 x236 [email protected]

Vice Chair Marvin Hamon 1535 Buena Vista Avenue Alameda, CA 94501 Tel: 510 387-6843 Email: [email protected]

Secretary Rosanna Lerma 436 14th Street, Suite 150 Oakland, CA 94612 Tel: 408 282-1500 x210 [email protected]

Treasurer Jeffry Gosal 305 So. 11th Street San Jose, CA 95112 Tel: 408 282-1500 x252 Email: [email protected]

Program Chair Carole Pharr Salas O'Brien Engineers 305 South 11th Street San Jose, CA 95112 Tel: 408 282-1500 x 213 Email: [email protected]

SOLID STATE CIRCUITS SOCIETY Chair Vojin Oklobdzija Integration Corp. 1285 Grizzly Peak Blvd. Berkeley, CA 94708 Tel: 510 486-8171 Email: [email protected]

UC Berkeley Student Chapter Branch Chair John Torous [email protected]

Faculty Advisor Prof. Ali Niknejad EECS Department, UC Berkeley 572 Cory Hall #1770 Berkeley, CA 94720 Email: [email protected]

Cal State Fresno Student Chapter Chair Tom Pittenger CSU Fresno 2320 East San Ramon Ave. M/S EE94 Fresno, CA 93740 Email: [email protected]

Advisor Ramakrishna Nunna Dept of Electrical & Computer Eng CSU Fresno MS94 Fresno, CA 93740 Tel: 559 278-8111 Email: [email protected]

DeVry Fremont Student Chapter Secretary/Webmaster Joshua Quintero Email: [email protected]

Advisor Mostafa Mortezaie Tel: (510) 574-1132 Email: [email protected]

Branch Chair Gary Sarbacher Email: [email protected]


SAN FRANCISCO SECTION

OFFICERS FOR 2008

EXECUTIVE COMMITTEE Chair Sandra Ellis, PE Pacific Gas and Electric Company Mail code B15A, P.O. Box 770000 San Francisco, CA 94177 [email protected]

Vice Chair Dan Sparks, PE P.O. Box 191681 San Francisco, CA 94119 Tel: 415 260-4613 Email: [email protected]

Secretary Julian Ajello, PE Calif Public Utilities Commission 550 Van Ness Avenue, 2D San Francisco, CA 94102 Tel: 415 703-1327 Email: [email protected]

Treasurer Ray Holstead, PE 818 Rivera St. San Francisco, CA 94116 Tel: (415) 564-0810 Email: [email protected]

Member at Large James Lekas Email: [email protected]

PACE Pauline B. Tapia Pacific Gas & Electric Co 1919 Webster Street, Room 452 Oakland, CA 94612 Tel: 510 874-2656 Email: [email protected]

GOLD Alex Goldhammer Email: [email protected]

Section Director George Puffett, PE Cammisa Wipf Consulting Engineers 32 Page Street San Francisco, CA 94102 Tel: 415 863-5740 Email: [email protected]

Education Activities Emery Fabri 7650 Falkirk Drive San Jose, Ca. 95135 Tel: 408-238-5166 Email: [email protected]

COMMUNICATIONS SOCIETY Chair Michael Butler 8 Almond Court Novato, California Tel: (415) 209-6630 (8) Email: [email protected]

Vice Chair Tim Ryan Network Manager, City College of SF Phone: 415-452-5352 Email: [email protected]

Secretary James Jones Photisis Consulting 931 Modoc Street Berkeley, CA 94707 (415) 867-6616 Email: [email protected]

Treasurer

Past Chair George Mattathil PO Box 249 San Bruno, CA 94066 Email: [email protected]

Engineering in Medicine and Biology (Chapter in formation) Chair Bob Giebeler Email: [email protected]

INDUSTRY APPLICATIONS SOCIETY Chair Sonny K. Siu, P.E. EYP Mission Critical Facilities, Inc. 49 Stevenson Street #800 San Francisco, CA 94105 415-901-4318 office [email protected]

Vice Chair Jamie Fox The Engineering Enterprise 1305 Marina Village Parkway Alameda, CA 94501 Tel: 510-769-7600 [email protected]

Secretary/ Jack Lin SFPUC-EMB 1155 Market Street, 7th Floor San Francisco, CA 94103 Email: [email protected] Tel: (415) 551-4894 Fax: (415) 551-4828Email: [email protected]

Treasurer Finn Schenck Square D Company 6160 Stoneridge Mall Rd., #200 Pleasanton, CA 94588 Office - 925-463-7112 [email protected] -electric.com

Membership Gary Fox General Electric 2120 Diamond Blvd. #230 Concord, CA 94520-5733 Tel: 925-969-3608 Email: [email protected]

POWER ENGINEERING SOCIETY Chair Shirin Tabatabai, PE Pacific Gas and Electric Company Mail Code B15A, P.O. Box 770000 San Francisco, CA 94177


Tel: (415) 973-1474 Email: [email protected]

Ben Williams Pacific Gas and Electric Company Mail Code B15A P.O. Box 770000 San Francisco, CA 94177 Tel: 415 973-9473 Email: [email protected]

Vice Chair Jon Eric Thalman Pacific Gas and Electric Company PO BOX 770000 San Francisco, CA 94177 Email: [email protected]

Treasurer Davis Erwin, PE Pacific Gas and Electric Company Mail Code B15A, P.O. Box 770000 San Francisco, CA 94177 Email: [email protected]

Secretary Anupama Pandey Nexant, Inc. 101 2nd St. 10th Floor San Francisco, Ca. 94105 Tel: (415) 369-1096 Email: [email protected]

Webmaster Chuck Magee California Public Utilities Commiss. Email: [email protected]

San Francisco State University Student Chapter Advisor Dr. Todor Cooklev San Francisco State University School of Engineering 1600 Holloway Avenue San Francisco CA 94132 Tel: 415 338-3946 Email: [email protected]

Chair Henry Quiñonez IEEE SFSU Student Branch 1600 Holloway SCI Bldg Rm 152 San Francisco, CA 94132 Email: [email protected]

SANTA CLARA VALLEY SECTION

OFFICERS FOR 2008

EXECUTIVE COMMITTEE

Chair Ram Sivaraman KLA-Tencor, Mail Stop: J1229 145 Rio Robles San Jose, CA 95134 Tel: 512 296-8734 (c) Email: [email protected]

Vice Chair Roxsana Hadjizadeh Tesla Motors Inc. 1050 Bing Street San Carlos, CA 94070 Tel: 408-891-7297 (c) Email: [email protected]

Treasurer & Finance Chair Allen Earman Novalux, Inc. 1220 Midas Way Sunnyvale CA 94085 Tel: 408-730-3833 Email: [email protected]

Secretary Jayasimha Prasad [email protected]

Junior Past Chair & CLCPE rep Tom Coughlin Coughlin Associates Tel: 408 978-8184 Email: [email protected]

Senior Past Chair Fred Jones, P.E. Stanford Linear Accelerator Center 2575 Sand Hill Rd. M/S 22 (Bldg. 035, Rm. 006) Menlo Park, CA 94025 Off: 650-926-2036 Email: [email protected]

Chair Emeritus Lee Colby Lee Colby & Associates 860 Mangrove Avenue Sunnyvale CA 94086 Tel: (408) 730-8528 Email: [email protected]

PACE Chair - Will Lumpkins Anthology Solutions 2457 Augustine Drive Santa Clara CA 95054 Tel 408-454-6772 [email protected]

Program Committee Ram Sivaraman KLA-Tencor, Mail Stop: J1229 145 Rio Robles San Jose, CA 95134 Tel: 512 296-8734 (c) Email: [email protected]

Student Activities Coordinator David Craven Lam Research Corporation P.O. Box 730 Los Altos, Ca 94023 Tel: 510-572-2141 Email: [email protected]

K-12 Education Coordinator Lee Colby Lee Colby & Associates 860 Mangrove Avenue Sunnyvale CA 94086-8640 Tel: (408) 730-8528 Email: [email protected]

Educational Activities Chair (open)

Webmaster Min Hua Tel: 408-230-6257 Email: [email protected]

Senior Member Advancement Mark Hooper 211 Stockbridge Ave. Atherton, CA 94027 Tel: 650-368-0831 Email: [email protected]

Nominations and Awards Dan Oprica P. O. Box 62288 Sunnyvale CA 94088-2288 Tel: (408) 985-9166 Email: [email protected]

Membership Chair Slava Mach Email: [email protected]


SVEC Representative Dan Oprica P. O. Box 62288 Sunnyvale CA 94088-2288 Tel: (408) 985-9166 Email: [email protected]

IEEE Engineering Milestone Coordinator Dick Ahrons DACON Associates 983 Garrity Way Santa Clara CA 95054 Tel: (408) 970-8892 Email: [email protected]

Audit Committee Chair Slava Mach Email: [email protected]

GOLD (Grads of the Last Decade) GOLD Chapter Chair Tokunbo Ogunfunmi Dept. of Electrical Engineering Santa Clara University Santa Clara, CA 95053 Tel: 408-554-4481 [email protected]

GOLD Chapter Vice Chair Jonathan David Scintera 4340 Stevens Creek Blvd #260 San Jose CA 95129 Tel: 408-636-2618 [email protected]

MONTEREY BAY SUBSECTION Chair Marcelo Siero Tel: 831-335-2165 Cell: 831-335-5600 Email: [email protected]

Secretary Todd Weatherford Code EC/Wt, Dept of ECE Naval Postgraduate School Monterey, CA 93943 Tel: 831 656-3044 [email protected]

Treasurer David Jenn Code EC/Jn

Dept. of ECE Naval Postgraduate School Monterey, CA 93943 Tel: 831 656-2254 Email: [email protected]

Santa Clara Univ Student Chapter Faculty Advisor Shoba Krishnan Tel: 408-554-4666 Email: [email protected]

Co-Chair Sarah Hanna Email: [email protected]

Co-Chair Matt Lanham Email: [email protected]

Vice Chair Zefram Marks Email: [email protected]

Treasurer/Secretary Curtis Wong Email: [email protected]

Student Activities Juliana Khan Email: [email protected]

Student Activities Laya Yadgar Email: [email protected]

Micromouse Director Zefram Marks Email: [email protected]

UC-Santa Cruz Student Chapter Faculty Advisor Gabriel Elkaim [email protected]

Chair John Splawn Email: [email protected]

Vice Chair Tom Ituarte Email: [email protected]

Secretary Yuna Dung Email: [email protected]

Treasurer Kevin Nelson Email: [email protected]

San Jose State Student Chapter Faculty Advisor

President Gregory McKernan Email: [email protected]

Vice President Sharl (Charles) Pakbaz Email: [email protected]

Treasurer Madu Amajor Email: [email protected]

Public Relations Srinivas Muddagowni Email: [email protected]

Secretary Allen Yousefi Email: [email protected]

Webmaster Ozhen Minashy Email: [email protected]

CPMT Chapter Faculty Advisor Fred Barez Tel: 408-924-4298 Email: [email protected]

Stanford University Student Chapter Faculty Advisor Prof. Antony C. Fraser-Smith STAR Laboratory Stanford University Stanford, CA 94305Email: [email protected]

President Ian Wong Email: [email protected]

Publicity Nicki Lui Email: [email protected]

VP, Membership Gary Chang Email: [email protected]


Awards Vincent Mei Email: [email protected]

Treasurer Karthik Subramanian Email: [email protected]

Webmaster Tracy Chou Email: [email protected]

ANTENNAS & PROPAGATION SOCIETY Chair Charles Brown Jr. Lawrence Livermore Nat’l Laboratory P.O. Box 808, L-153 Livermore, CA 94551 Ph: 925-423-4435 Email: [email protected]

Vice Chair Farshid Aryanfar Email: [email protected]

Secretary Adam White Lawrence Livermore Nat’l Laboratory PO Box 808, L-153 Livermore, CA 94551 Ph: 925-424-5935 Email: [email protected]

Treasurer Mike Perkins Lawrence Livermore Nat’l Laboratory PO Box 808, L-153 Livermore, CA 94551 Ph: 925-337-4272 Email: [email protected]

CIRCUITS AND SYSTEMS SOCIETY Chair Navneet Jain Transmeta Corporation 2073 Mesa Verde Dr. Milpitas, CA 95035 Tel: 408-919-5939 Email: [email protected]

Vice Chair Mark Hooper 211 Stockbridge Ave. Atherton, CA 94027 Tel: 650-368-0831 Email: [email protected]

Treasurer Weikai Sun Ph: 408-857-7098 Email: [email protected]

Secretary Ping Chen Tel: 40-829-5278 Email: [email protected]

Program Chair Jonathan David Scintera, Inc. 1154 Sonora Ct. Sunnyvale, CA 94086 Tel: 408-636-2618 408-390 2425 (c) Email: [email protected]

Publicity and Seminar Marduke Yousefpor Email: [email protected]

COMMUNICATIONS SOCIETY Chair Lu Chang Tel: 408-888-8093 Email: [email protected]

Co-Chair Bin Hu Motorola Inc. 459 Casita Way Los Altos, CA 94022 Tel: 408-541-6511 Email: [email protected]

Treasurer Mukul Chauhan Email: [email protected]

Secretary/Program Chair Alan Weissberger Email: [email protected]

Webmaster Lu Chang Email: [email protected]

COMPONENTS, PACKAGING & MANUFACTURING TECHNOLOGY SOCIETY Chair Dan Donahoe, P.E. Exponent Inc. 149 Commonwealth Drive Menlo Park, CA 94025 Ph: 650-688-7129 Email: [email protected]

Vice Chair Allen M. Earman Novalux, Inc. 4327 Lake Santa Clara Drive Santa Clara, CA 95054-1331 Tel: (408) 691-5550 Email: [email protected]

Treasurer Valerie Pilloud Novellus Email: [email protected]

Deputy Treasurer Elizabeth Logan P.O.Box 1042 Danville, California 94526 Tel: (510) 386-1745 Email: [email protected]

Secretary Mudasir Ahmad Cisco Systems, Inc 170 West Tasman Drive San Jose CA 95134 Email: [email protected]

Membership Development Janis Karklins Tel: 408 374-0960 Email: [email protected]

Program Chair Dinner Meetings Harvey Miller InfraFocus 255 Town & Country Village Palo Alto, CA 94301 Tel: 650 327-2029 Email: [email protected]

Program Co-Chair Lunch Meetings Ed Aoki Email: [email protected]


Program Co-Chair Lunch Meetings Sandra Winkler [email protected]

Webmaster/Training/Communi’ns Paul Wesling 12250 Saraglen Dr. Saratoga, CA 95070 Tel: 408-331-0114 Email: [email protected]

Student Activities Chair John Jackson Analog Devices 1519 Blackhawk Dr Sunnyvale, CA 94087 Tel: 408 732 2833 Email: [email protected]

K-12 Education Joseph Fjelstad Silicon Pipe 992 De Anza Blvd #201 San Jose CA 95129 Tel: (408) 973-1744 x203 Email: [email protected]

Awards and Advancement Luu Nguyen National Semiconductor 3707 Tahoe Way, Mail Stop 19-100 Santa Clara CA 95051 Tel: (408) 721-4786 Email: [email protected]

Financial Advisory Bernie Siegal Thermal Engineering Associates, Inc. 1780 Holly Ave Menlo Park, CA 94025-5726 Email: [email protected]

Newsletter OPEN

Symposia Chair OPEN

COMPUTATIONAL INTELLIGENCE SOCIETY Chair Dr. Hamid Berenji Intelligent Inference Systems Corp MS: 566-109 NASA Research Park Moffett Field, CA 94035 Tel: 650 965-9365

Email: [email protected]

Vice Chair Maryam Naghibzadeh

Secretary Dr. Edward Katz CMU-West NASA Research Park, Bldg 23 M/S 23-11 Moffett Field, CA 94035 Email: [email protected]

Treasurer Dr. Hamid Berenji mail: [email protected]

COMPUTER SOCIETY Chair Howard (Ching T.) Ho IBM – Almaden Research Center K55/B1, 650 Harry Road San Jose CA 95120 Tel: 408-927-1814 Email: [email protected]

Vice Chair Eric Louie 650 Harry Road San Jose CA 95120 Tel: 408-927-2662 Email: [email protected]

Treasurer Yoo Hsiu Yeh Carnegie Mellon West NASA Ames Research Park Building 23 (MS 23-11) Moffett Field CA 94035 Email: [email protected]

Secretary Tom Qi Zhang Google Inc. 1550 Plymouth Street Mountain View CA 94043 Tel: 650-253-1376 Email: [email protected]

Publicity Dale James Gutierrez P.O. Box 320096 San Francisco CA 94132 Email: [email protected]

Past Chair T.Y. Lin Department of Computer Science,

San Jose State University San Jose, California 95192 Tel: 408-924-5121 e-mail: [email protected]

CONSUMER ELECTRONICS SOCIETY Chair Gary Sasaki DIGDIA 11234 Mt. Crest Pl Cupertino, CA 95014 Tel: 408.981.2288 Email: [email protected]

Secretary/Webmaster Bill Orner Transmeta Corporation 3990 Freedom Circle Santa Clara, CA 95054 Tel: 408.919.5975 Email: [email protected]

Treasurer Rich Elder Hewlett-Packard Laboratories 1501 Page Mill Rd. Palo Alto CA 94306 Mobile: 650 269-3052 Office: 650 857-5247 Email: [email protected]

Program Chair Winston Chen Qpixel Technologies Tel: 408.572.6293 Cell: 408-621-1932 Email: [email protected]

Vice-Program Chair Will Lumpkins Director of Engineering Pragmatics Technologies 1275 Lincoln Ave San Jose, CA 95125 Tel: 408.289.8202 Mobile: 972-639-6393, [email protected]

Event Planning Chris Pedersen DIGDIA Email: [email protected] Michael Wang Macronix International Email: [email protected]


Victor Ramamoorthy Infinite Algorithms Email: [email protected]

Past Chair: Thomas M. Coughlin Coughlin Associates 408 202-5098 (c) Email: [email protected]

Past Chair: Abhi Dugar ESS Technology, Inc P.O.Box 2868 Saratoga, CA 95070 Tel:408.805.0268 Email: [email protected]

CONSULTANTS’ NETWORK OF SILICON VALLEY Chair T. Kim Parnell, Ph.D., P.E. 1150 Kelsey Drive Sunnyvale, CA 94087 Tel: 408 732-4525 [email protected]

Vice Chair Duane Strong Strong Engineering, LLC 4414 Ranchero Dr. Soquel, CA 95073 Tel: 831-247 -0201 Email: [email protected]

Treasurer Jeffrey Safire 2267 Oakland Avenue Pleasanton, CA 94588 925.462.5454 [email protected]

Secretary Joel Williams 1240 McKendrie St. San Jose, CA 95126 Tel: 408-249-5574 Email: [email protected]

Advisor Director Richard Ahrons 983 Garrity Way Santa Clara, CA 95054 Tel: 408 970-8892 Email: [email protected]

Past Chair Brian Berg 14500 Big Basin Way, Suite F Saratoga, CA 95070-1488 Tel: 408 741-5010 Email: [email protected]

CONTROL SYSTEMS SOCIETY Chair/Treasurer Tejesh Makanawala 107 Serenity Place Milpitas, CA 95035 Email: [email protected]

Secretary Giuseppe Prisco Tel: 408 523-2418 Email: [email protected]

EDUCATION SOCIETY Chair Ali Iranmanesh Silicon Valley Technical Institute 1762 Technology Drive, Suite 227 San Jose, CA 95110 Tel: 408-573-0100 Email: [email protected]

Vice Chair Kevin Khosrow Lashkari Silicon Valley Technical Institute 1762 Technology Drive, Suite 227 San Jose, CA 95110 Tel: 408-573-0100 Email: [email protected]

Secretary/Treasurer David Craven Lam Research Corp P.O. Box 730 Los Altos, Ca 94023 Tel: 510-572-2141 Email: [email protected]

Program Chair Lili He San Jose State University Dept. of Electrical Engineering San Jose, CA 95192-0084 Tel: 408-924-4073 Email: [email protected]

Webmaster Steven Swinkels Email: [email protected]

ELECTROMAGNETIC COMPATIBILITY SOCIETY Chair Ken Renda Lockheed Martin Phone 408 742-7042 Email: [email protected]

Vice Chair Oscar Mahinfallah Cisco Systems, Inc. 170 West Tasman Drive San Jose, CA 95134 Phone: 408 525-5068 Email: [email protected]

Treasurer Tony Permsombut Met Labs 215 Kiely Blvd., Unit B Santa Clara, CA 95051 Phone: 510 378-1962 Email: [email protected]

Secretary Len Goldschmidt Cisco Systems 170 West Tasman Drive San Jose, CA 95134 Tel: 408 902-8252 Email: [email protected]

Institutions Hans Mellberg BACL Corp Phone: 408 732-9162 x3601 Email: [email protected]

Membership Peter Krebill Email: [email protected]

Nominations: (pro-tem) Shirley Cui Tarantino BACL Corp Phone: 408 732-9162 x3205 Email: [email protected]

Activities/Awards Len Goldschmidt Cisco Systems, M/S SJ-18-1 170 West Tasman Drive San Jose, CA 95134 Tel: 408 902-8252 Email: [email protected]


Webmaster: Mike Walker CS Design Email: [email protected]

ELECTRON DEVICES SOCIETY Chair Samar Saha DSM Solutions Inc. 130B Knowles Drive Los Gatos, CA 95032 Tel: 408-866-4125 Email: [email protected]

Vice Chair Jaysimha Prasad Maxim Integrated Products 3725 North First Street San Jose, CA 95134 Tel: (408) 965-8178 Email: [email protected]

Secretary/Webmaster Manuj Rathor AMD One AMD Place Sunnyvale, CA 94088 Tel: 408-390-2732 Email: [email protected]

Assistant Secretary Toshishige Yamada Santa Clara University 500 El Camino Real Santa Clara, CA 95053 Tel: 408 554-6983 Email: [email protected]

Treasurer Chaparala Prasad National Semiconductor 2900 Semiconductor Dr #D2-555 Santa Clara, CA 95052 Tel: 408-721-8985 Email: [email protected]

Past Chair Jeffrey T. Watt Altera 101 Innovation Drive MS 4204 San Jose, CA 95134 Tel: 408 544-8270 Fax: 408 544-7594 Email: [email protected]

Past Chair Philippe Jansen National Semiconductor M/S E-155 2900 Semiconductor Drive Santa Clara, CA 95052 Tel: (408) 551-4500 Email [email protected]

ENGINEERING MANAGEMENT SOCIETY See the new Technology Management Council, below

ENGINEERING IN MEDICINE & BIOLOGY SOCIETY Chair Jim McIntosh 6149 Royal Acorn Place San Jose, CA 95120 Tel: 408 626-9360 Email: [email protected]

Secretary Fred Rasmussen 1432 Thunderbird Ave. Sunnyvale, CA 94087 Tel: 408 249-2478 email: [email protected]

Treasurer Steve Brugler 2041 Webster St. Palo Alto, CA 94301 Tel: 650 322-3323 email: [email protected]

E-mail and Web Site Jim Stoneburner 2071 Rockhurst Ct. Santa Clara, CA 95051 Tel: 408 243-2232 email: [email protected]

SCV ExCom Contact Ken Doniger Email: [email protected]

INSTRUMENTATION & MEASUREMENT SOCIETY Chair David Rivkin, PhD 1390 Curtiss Ave San Jose, CA 95125-2321 Email: [email protected]

Secretary (Vacant)

Treasurer John Niple 6581 Capri Way San Jose, CA 95129 Tel: 408-865-1561 Email: [email protected]

Webmaster David Rivkin, PhD 1390 Curtiss Ave San Jose, CA 95125 Email: [email protected]

Past Chair Yeou-Song (Brian) Lee Anritsu Company 490 Jarvis Drive Morgan Hill, CA Tel: 408 201-1976 Email: [email protected]

INFORMATION THEORY SOCIETY Chair/Treasurer Art Astrin 1051 Greenwood Ave. Palo Alto, CA 94301 Tel: 650 328-1777 Email: [email protected]

LASERS & ELECTRO OPTICS SOCIETY Chair Bob Herrick Finisar 41762 Christy St. Fremont, CA 94538 Email: [email protected]


Vice Chair William Murray Tel: 650-906-4471 Email: [email protected]

Treasurer Brent K. Whitlock Carr & Ferrell LLP 2200 Geng Rd. Palo Alto, CA 94303 Tel: 650-812-3406 Email: [email protected]

Secretary Min Hua Email: [email protected]

Program Chair Ram Sivaraman KLA-Tencor, Mail Stop: J1229 145 Rio Robles San Jose, CA 95134 Tel: 512 296-8734 (c) Email: [email protected]

Educational Activities Coordinator Edwin Vivian El-Kareh Tel: 408 875-5203 Email: [email protected]

Education/Webmaster Robert Dahlgren Silicon Valley Photonics, Ltd. P.O. Box 1569 San Jose, CA 95109 Tel;: 408-437-9292 Email: [email protected]

Chapter Angel Ron Kubacki

Venue Coordinator Amjad Obeidat

MAGNETICS SOCIETY Chair Georg Lauhoff Samsung Information Systems Tel: 408 544-5884 [email protected]

Program Chair: Uri Cohen Email: [email protected]

Treasurer Joost Mortelmans HGST (ret.) Tel: (650) 941-8035 Email: [email protected]

Secretary/Webmaster David Saperstein 130 Durazno Way Portola Valley, CA 94028 Tel: 408-570-3150 Email: [email protected]

Past Chair Dr. Roger F. Hoyt 6613 Tam O'Shanter Drive San Jose, CA 95120 Phone/Fax number 408 997 1826 Email: [email protected]

MICROWAVE THEORY & TECHNIQUES SOCIETY Chair Mohamed Sayed 2608 Knob Hill Dr. Santa Rosa, CA 95404 Tel: 707-578-1092 Email: [email protected]

Vice Chair Luiz Franca-Neto Tel: 408-718-0490 Email: [email protected]

Treasurer Jay Banwait Email: [email protected]

Secretary Nima Shams Tel: 510-676-4475 Email: [email protected]

Webmaster Michael Forman [email protected]

Past Chair Jim Sowers Space Systems/Loral 3825 Fabian Way, M/S G16 Palo Alto, CA 94303 Tel: 650 852-5172 Email: [email protected]

NANOTECHNOLOGY COUNCIL Chair Kris Verma Tel: 408 573-0100 Email: [email protected]

Vice Chair Nick Massetti Tel: 650 424-3708 Email: [email protected]

Secretary Jack Berg

Treasurer Wei Wu Tel: 650 857-7255 Email: [email protected]

Past Chair Dhaval Brahmbhatt 50 Airport Parkway, Suite 111 San Jose, CA 95110 Tel: 408 561-1594 Email: [email protected]

Past Chair Nitin Parekh Tel: 650 812-4132 Email: [email protected]

POWER ELECTRONICS SOCIETY (No Report)

POWER ENGINEERING & INDUSTRY APPLICATIONS SOCIETIES Chair James Alvers Square D/Schneider Electric 6160 Stoneridge Mall Rd., Suite 200 Pleasanton, CA 94588 Tel: 925-730-3105 510-604-6979 (c) Email: [email protected]

Vice Chair Richard Celio Applied Power Technologies 10601 S. De Anza Blvd., #106 Cupertino, CA 95014 Tel: 408-342-0790 408-821-7749 (c) Email: [email protected]


Treasurer Fred Jones, P.E. Stanford Linear Accelerator Center 2575 Sand Hill Rd. M/S 22 (Bldg. 035, Rm. 006) Menlo Park, CA 94025 Tel: 650-926-2036 408-687-2433 (c) Email: [email protected]

Secretary K. S. Wong Fluor Tel: 650-742-4306 Email: [email protected]

ADCOM Rhonda Tramble, P.E. University of California Santa Cruz 1156 High Street, Barn G Santa Cruz, CA 95064 Tel: 831-459-2733 Email: [email protected]

Vish Ponnathpore, P.E. Greene Engineers 1740 Technology Dr., Suite 210 San Jose, Ca 95110 Tel: 408 200 7223 Email: [email protected]

PRODUCT SAFETY ENGINEERING SOCIETY Chair Steve Baldwin Lam Research Corporation 45757 Northport Loop West Fremont, CA 94538 Tel: 408-838-2667 Email: [email protected]

Vice Chair Richard Powell 309 Manzanita Avenue Santa Clara, CA 95051 Tel: 408) 249-5708 Email: [email protected]

Treasurer Mark Montrose Montrose Compliance Services, Inc. 2353 Mission Glen Drive Santa Clara, CA 95051-1214 Tel: 408.247.5715 Email: [email protected]

Secretary Gary Eldridge, P.E. Apple Computer 1 Infinite Loop, MS: 26-P Cupertino, CA 95014 Tel: 408.974.7365 Email: [email protected]

Webmaster Mike Gibson Underwriters Laboratories Inc. 455 E. Trimble Rd. San Jose, CA 95131 Tel: 408-754-6644 Email: [email protected]

Past Chair Thomas M. Burke, PE Underwriters Laboratories, Inc. 1655 Scott Blvd. Santa Clara, CA 95050-4169 Tel: 408-876-2286 Email: [email protected]

Past Chair John W. McBain KLA-Tencor 160 Rio Robles (A-1114G) San Jose, CA 95134 Tel: 408.875.8996 Email: [email protected]

RELIABILITY SOCIETY Chair Mike Silverman 20151 Guava Court Saratoga, CA 95070 Tel: 408-472-3889 Email: [email protected]

Vice Chair Fred Schenkelberg 968 White Cloud Dr. Morgan Hill, CA 95037 Tel: 408-710-8248 Email: [email protected]

Treasurer Alan Wood Sun Microsystems Tel: 650-568-4855 Email: [email protected]

Secretary Jon Elerath Network Appliance

Tel: 408-822-3340 Email: [email protected]

Ex Officio Arthur Rawers Xilinx 585 Calle Siena Morgan Hill, CA 95037 Tel: 408-482-2177 Email: [email protected]

Webmaster Wei Hou Research In Motion Tel: 519-888-7465 x 3965 [email protected]

ROBOTICS AND AUTOMATION SOCIETY Chair Edward P. Katz Carnegie Mellon University West NASA Rsch Park, Bldg 23 M/S 23-11 Moffett Field, CA 94035 Tel: 650-335-2839 Email: [email protected]

Vice-Chair Dave Wyland 165 Berkshire Drive Morgan Hill, CA 95037 Tel: 408-778-3860 Email: [email protected]

Program Chair Waiming Mok 462 Crescent Ave Sunnyvale, CA 94087 Tel: 408-404-8707 / 408-738-3016 Email: [email protected]

Secretary-Treasurer Angie Shia 125 Hilton Way, Apt #4 Pacifica, CA 94044 Tel: 510-735-6726 Email: [email protected]

SIGNAL PROCESSING SOCIETY Chair Tokunbo Ogunfunmi Dept. of Electrical Engineering


Santa Clara University Santa Clara, CA 95053 Tel: 408-554-4481 Email: [email protected]

Vice Chair Xiaoshu Qian Intel Corporation Email: [email protected]

Treasurer Vlad Potanin Tel: 408-721-4679 Email: [email protected]

Secretary Doug Chan [email protected]

Program Coordinator Yen-Kuang Chen [email protected]

SOLID STATE CIRCUITS SOCIETY Chair Dan Oprica P.O. Box 62288 Sunnyvale, CA 94088 Tel: 408-985-9166 Email: [email protected]

Vice Chair Mark Hooper 211 Stockbridge Ave. Atherton, CA 94027 Tel: 650-368-0831 Email: [email protected]

Treasurer Gregoire Le Grand de Mercey 401 Chiquita Ave Mountain View CA 94041 Tel: 650-215-0067 Email: [email protected]

Secretary Kiran Gunnam 2050 McKee Road, Apt 83 San Jose, CA-95116 Tel: 979-492-7964 Email: [email protected]

Event Coordinator Pete Edwards [email protected]

Webmaster Perry Chow Tel: 408 926-2954 Email: [email protected]

Past Chair Adrian Gradinaru Magma Design Automation 5460 Bayfront Plaza Santa Clara, CA 95054-3600 Ph (W): (408) 565-7953 Email: [email protected]

TECHNOLOGY MANAGEMENT COUNCIL Chair Chris Sims [email protected]

Vice Chair Julia Sulisthio P.O. Box 62407 Sunnyvale, CA 94088 Tel: 408-316-6279 Email: [email protected]

Treasurer Richard Stallkamp 18305 Murphy Springs Dr. Morgan Hill, CA 95037 Tel: 408-779-6038 Email: [email protected]

Secretary Larry Reeves Data Domain Tel: 408-980-4827 Email: [email protected]

Webmaster Ilya V. Ivanchenko Email: [email protected]

Publicity Rich Hendrickson [email protected]

VEHICULAR TECHNOLOGY SOCIETY Chair/Treasurer Clay Maynard 3311 Brandywine Drive Yuba City, CA 95993 Tel: 530 790-6611 Email: [email protected]

Vice Chair/Programs David Craven P.O. Box 730 Los Altos, CA 94023 (510) 572-2141 Email: [email protected]

Secretary/Webmaster Stephen Foley 25261 Terrace Grove Rd. Los Gatos, CA 95033 (408) 316-2017 Email: [email protected]

WOMEN IN ENGINEERING

Chair/Treasurer Roxsana Hadjizadeh Tesla Motors Inc. San Jose, CA 95120 Tel: 408-361-9940 Email: [email protected]

Vice-Chair/Secretary Katie Purcell Email: [email protected]

ieee sf bay area council grid magazine · march 2008 visit us at page 3 [email protected]...

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