Improving Topological Mapping on NoCs Rafael Tornero (PhD Student) and Juan M. Orduña Huertas (PhD Advisor)Departament dʼInformàtica, Universitat de València, Spain

Networks-on-Chip (NoCs) have been proposed as an efficient solution to the complex communications on System-on-chip (SoCs). The design flow of network-on-chip (NoCs) include several key issues, and one of them is the decision of where cores have to be topologically mapped. This thesis proposes a new approach to the topological mapping strategy for NoCs. Concretely, we propose a new topological mapping technique for regular and irregular NoC platforms and its application for optimizing application specific NoC based on distributed and source routing.

The Topological Mapping Technique [3]

Currently, we are performing a study of heuristic methods for adapting the mapping technique to NoC platforms using source routing. This kind of platforms introduce new constraints to the mapping process. Thus, the heuristic search methods employed in distributed routing NoC platforms might not be suitable for them. Therefore, the goal of this study is to find the most suitable search method for satisfying the new constraints of source routing NoC platforms.Also, we plan to apply the technique for optimizing applications in shared memory MPSoCs, where communications are carried out by synchronization mechanism. Finally, we would like to evaluate our technique in NoCs with irregular topologies. The reason is that most of the topological mapping proposals in the literature use NoCs with regular topology, leaving the mapping on NoCs with irregular topology as a currently open issue.

[1] A. Jantsch and H. Tenhunen, Eds., Networks on Chip. Kluwer Academic Publishers, Feb. 2003. [2] R. Marculescu, J. Hu, and U. Ogras, “Key research problems in noc design: a holistic perspective,” in Proc. of CODES+ISSS ʼ05, 2005, pp. 69–74.[3] R. Tornero, J. M. Orduña, M. Palesi, and J. Duato, “A communication-aware topological mapping technique for nocs,” in Proc. of the 14th international Euro-Par conference on Parallel Processing. Springer-Verlag, 2008, pp. 910-919.[4] R. Tornero, J. M. Orduña, A. Mejía, J. Flich, and J. Duato, “Cart: Communication-aware routing technique for application-specific nocs,” in Proc. 11th EUROMICRO Conf. on Digital System Design Architectures, Methods and Tools, 3–5 Sept. 2008, pp. 26–31.[5] A. Mejia, J. Flich, J. Duato, S.-A. Reinemo, and T. Skeie, “Segment-based routing: an efficient fault-tolerant routing algorithm for meshes and tori,” in Proc. 20th International Parallel and Distributed Processing Symposium IPDPS 2006, 25–29 April 2006, p. 10pp.[6] R. Tornero, V. Sterrantino, M. Palesi, and J. M. Orduña, “A multi-objective strategy for concurrent mapping and routing in network on chip,” in Proc. of the 23rd IEEE International Parallel and Distributed Processing Symposium, 25–29 May 2009.[7] M. Palesi, R. Holsmark, S. Kumar, and V. Catania, “Application specific routing algorithms for networks on chip,” IEEE Transactions on Parallel and Distributed Systems, vol. 20, no. 3, pp. 316–330, 2009.[8] R. Tornero, S. Kumar, S. Mubeen, and J. M. Orduña, “Distance constrained mapping to support noc platforms based on source routing,” in Proc. of the Euro-Par 2009 Workshops - Parallel Processing." Springer- Verlag, 25 August 2009, pp. To be published, January 2010.

Abstract Proposed Approach Results

24th IEEE International Parallel and Distributed Processing SymposiumApril 19-23, 2010ATLANTA (Georgia) USA

Description of the Problem

A/V Mul t imedia system mapped on 16 IPs

Average packet latency of 3000 random mappings

Results for the top 478 mappings

The remaining 2522 mapping have latency much higher than 200 clock cycles

The Network-on-Chip (NoC) paradigm has emerged recently as a promising solution to the complex on-chip communications derived from the increasing number of Intellectual Property (IP) cores that can be integrated on a single chip as semiconductor technology scales down to make complex Systems-on-Chip (SoCs) [1].

The use of NoCs as the interconnection infrastructure for complex SoCs has opened several interesting research and design issues [2]. These include: topology selection, routing strategy selection and application mapping.

Impact of Mapping on Performance

What does Topological Mapping Consist of?Splitting the application

on a set of concurrent t a s k s , a s s i g n i n g a n d scheduling on a list of IP co res (by p rocedures beyond the scope of this thesis)

D e c i d i n g h o w t o topological ly place the selected set of cores onto the tiles of the system such that the interested metrics (energy, latency, etc) are optimized

Mapping Technique

Characteristics

Heuristics Methods

Experimental validation avoided

Quality solutions as for regular as for irregular networks topologies

Communication-driven

Routing-awareness

Three key issues:

1.Modeling the network as a table of distances (or costs), model of communication cost, between each pair of source/destination nodes. This table contains the cost of communicat ing every pair of network nodes without taking into account any traffic pattern, but taking into account the underlying network topology and routing algorithm.

Example

2.For each pair of source/destination IPs, the amount of information exchanged by them is measured, and a table of communicat ion requirements of the application is computed.3.In order to search the best assignment of IPs

to network nodes, the technique defines a mapping array and an associated quality function for each array. This quality function measures the overall cost for sending all the messages exchanged by the application (exchanged by all the tasks hosted in the IPs) if the IPs were mapped as indicated in the mapping array. Finally, this approach consists of using a heuristic method based on a random search for obtaining a near-optimal assignment of IPs to network nodes (topological mapping) that minimizes the quality function value.

Application Specific NoC Platforms Based on Distributed Routing

Remaining Objectives References

Analysis of CART4390 different routing algorithms for

a 5x5 mesh have been constructed .Best, Worst and Random mappings

have been combined with the Best, Worst and Random SR configurations.

All plots corresponding to Best Mappings show a similar stable throughput. Additionally, the Best Mappings significantly reduce the average network delay, regardless of the SR configuration used.

Fault Tolerance of the Multi-Objective Strategy

Distance Constrained Mapping. Feasibility exp.

Validation of the Network Model

Application Specific NoC Platforms using Source Routing

Optimizes the network performance for Application-Specific NoCs.

Combines a flexible, topology-agnostic routing algorithm (SR) with the communication-aware mapping technique described above.

Communication-Aware Routing Technique (CART) [4]

The Segment-based Routing (SR) algorithm [5] is based on a segmentation process of the network. It guarantees deadlock freedom and full connectivi ty among nodes by placing a bidirectional routing restriction at every segment. This results in a larger degree of freedom when placing turn restrictions.

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Figure 1. An example of the SR algorithm

A.Topology formed by links and nodesB.Part i t ion in different network segmentsC.All possible bidirectional routing restrictionsD.Random set of routing restriction elected

The first step consists of computing a random SR configuration (combination of segments and routing restrictions applied to the network topology). Then, the communication-aware mapping technique is applied to that SR configuration.

Multi-Objective Strategy for Concurrent Mapping and Routing [6]This strategy is able to determine an approximation of the Pareto-set of NoC configurations which o p t i m i z e m u l t i p l e p e r f o r m a n c e i n d e x e s simultaneously. We have considered the routing algorithm designed by APSRA [7] and the topological mapping as the multidimensional interacting parameters. We have considered message delay and fault tolerance as the objectives to be optimized

s

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A single link fault does not compromise the communication from s to d

A single link fault in either l' or l” makes it impossible the communication from s to d

Robustness Index

Design Space Exploration Flow

Source Routing Packet Format

Path 1 , 1

Packet

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Destination Address

Distributed Routing Packet Format

DSP ( Source )

1 , 1 Video Receiver

1 , 2 Processor

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Processor 2 , 2

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Memory 3 , 2

Processor 3 , 3

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Video Transmitter

4 , 1 I / O Interface

4 , 2 DSP

4 , 3 Audio Transmitter

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Network Interface Switch

Advantages:Simple and fast routersTopology independenceGuaranteed throughputMixing of minimal and

non-minimal paths

Disadvantages:Overhead and low

bandwidth utilizationStatic routing

Distance constrained mapping [8] to:Minimize the overheadSupport NoC platforms using source routing with a

constraint in the path length field of the header packet

The method consists of two steps:1.F i n d a m a p p i n g u s i n g t h e technique described above, but with a distance constraint added.

2.Find a source routing function for every core pair Ci and Cj where:

The path length is equal to the manhattan distance between Ci and Cj

There is no possibility of deadlockThe traffic is balanced among all the links

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Performance Evaluation

MMS - CART provides more than 30% improvement in latency and 15% higher throughput than the rest of routing techniques.

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pir scale factor

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CARTRandom mapping SRRandom mapping UDRandom mapping XY

MMS - energy required for CART is more than twice lower than the energy required by the rest of the routing techniques considered.

The figure shows the average latency in cycles. It shows that at both low traffic loads and high traffic loads both the UNCONSTDISTMAP and MINDISTMAP present similar behavior and save more than 20% cycles and 25% over RNDMAP respectivelyTherefore, the evaluation results show that is possible to reduce the path length of the header flit at least to half of the network diameter without significantly degradation of the performance, less than 5%

Average delay has been measured at a packet injection rate where none of the algorithms are saturated.

For all traffic scenarios and low pirs MCBMAP-XY performs slightly better than the other.

For higher values of pir, the best solution in terms of MC found by the proposed approach outperforms the others.

The best solution in terms of RI found by the p r o p o s e d a p p r o a c h , e x h i b i t s d e l a y characteristics close to MCBMAP-AS.

Performance evaluation of the CART method compared to other routing techniques that do not take into account the traffic generated by the application.

Simulation of the 5×5 2D-mesh topology with different applications when using Up/Down (UD) routing, Dimension Order (XY) routing, SR and CART.

The evaluation results show that the CART method can significantly improve the network performance for those application specific N o C s w h e r e t h e communication requirements of the application can be measured or estimated.

CART

Distance Constrained Mapping for NoC Platforms using Source Routing

Multi-Objective Strategy

MMS Traffic

How mapping is changedMulti-objective genetic algorithm

Mapping of 500 random applicationsUniform probabil i ty of spatial communicationsCommunication bandwidth un i fo rm ly d i s t r i bu ted between 10 and 100 KB/s

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Best mapping, Best SRRandom mapping, Best SRBest mapping, Worst SRBest mapping, Random SRRandom mapping, Random SRRandom mapping, Worst SR

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Multi-objective Pareto mapping with customize

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Mono-objective mapping with customize routing

algorithm

Mono-objective mapping with XY routing algorithm

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Correlation Coefficient Graph

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Least square Linear adjustment for point S8Correlation Coef. = 0.85507

Value in Table of Distances

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Simulation pointsy = 4.4516 * x + 11.435

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Least square Linear adjustment for point S10Correlation Coef. = 0.141

Value in Table of Distances

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Least square Linear adjustment for point S10 (Mean)Correlation Coef. = 0.96539

Value in Table of Distances

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P1 = 224P2 = 388P3 = 496P4 = 552P5 = 560P6 = 524P7 = 448P8 = 336P9 = 224P10 = 140P11 = 80P12 = 40P13 = 16P14 = 4

Simulation Pointsy = 35.6185 * x + 312.1961

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Value in Table of Distances

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munications0,5%

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MCBMAP-XYMCBMAP-ASMOGARMAP-MCMOGARMAP-RI