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Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 1 Spezielle Anwendungen des VLSI Entwurfs Applied VLSI design Course and contest Results of Phase 3 Arne Wall Institute MD, University of Rostock Slide 2 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 2 Agenda Optimization of Filter architecture Metric of VHDL-Synthesis Optimization of ST65-Synthesis Result Outlook Slide 3 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 3 Optimization of Filter architecture - Adder Use Carry-save adders for summation of partial products Use Carry-save adders for adder chain => only two Full adders of depth Last sum of sum vector and carry vector needs to be calculated fast Slide 4 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 4 Optimization of Filter architecture - Adder Adder Adders Register Partial products Previous Adders Register Slide 5 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 5 Metric of VHDL-Synthesis Frequency f [MHz]233 Area A [# of LUT-FF-Pairs]955 # of Pipeline Stages2 Metric [MHz^3]9.86 # Slice LUTs1275 # Slice Registers1006 Slide 6 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 6 Optimization of ST65-Synthesis Metric [10^9*MHz^3/mW^2] Operating Voltage 1.01.11.21.3 Low V T --0.430.48 Medium V T --2.892.60 High V T 7.729.159.098.55 Slide 7 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 7 Optimization of ST65-Synthesis Maximum Frequency [MHz] Operating Voltage 1.01.11.21.3 Low V T --565643 Medium V T --422491 High V T 147205264323 Slide 8 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 8 Result Best Metric at 1.1 V Operating Voltage and High Threshold Voltage Frequency f [MHz]500 Area A [m]30.093 Power P_dyn [mW]16.41 Power P_leak [nW]229.85 # of Pipeline Stages2 Metric [10^9 MHz^3/mW^2]33.14 Slide 9 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 9 Result Slide 10 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 10 Outlook Use fast Adder to add carry- and sum-vector Dont use to much bits inside the multiplication Try further synthesis parameters Slide 11 Institute of Applied Microelectronics and Computer Engineering College of Computer Science and Electrical Engineering, University of Rostock Slide 11 Thank you for your attention!