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CDA 3101 Fall 2013 Introduction to Computer Organization Instruction Representation 06 September 2013

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CDA 3101 Fall 2013 Introduction to Computer Organization. Instruction Representation 06 September 2013. Review. ISA: hardware / software interface Design principles, tradeoffs MIPS instructions Arithmetic: add/sub $t0, $s0, $s1 - PowerPoint PPT Presentation

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Page 1: Instruction Representation 06 September 2013

CDA 3101 Fall 2013

Introduction to Computer Organization

Instruction Representation

06 September 2013

Page 2: Instruction Representation 06 September 2013

Review• ISA: hardware / software interface

– Design principles, tradeoffs

• MIPS instructions– Arithmetic: add/sub $t0, $s0, $s1– Data transfer: lw/sw $t1, 8($s1)

• Operands must be registers– 32 32-bit registers– $t0 - $t7 => $8 - $15– $s0 - $s7 => $16 - $23

• Memory: large, single dimension array of bytes M[232]– Memory address is an index into that array of bytes– Aligned words: M[0], M[4], M[8], ….M[4,294,967,292]– Big/little endian byte order

Page 3: Instruction Representation 06 September 2013

Machine Language -- MIPS• All instructions have the same length (32 bits)• DP3: Good design demands good compromises

– Same instruction length or same format

• Three different formats– R: arithmetic instruction format– I: transfer, branch, immediate format– J: jump instruction format

• add $t0, $s1, $s2 – 32 bits in machine language– Fields for:– Operation (add)

• Operands ($s1, $s2, $t0)

10101110101101001010000000010010110000

00000010010010000100000000100000

10001101001010000000010010110000

lw $t0, 1200($t1)add $t0, $s2, $t0sw $t0, 1200($t1)

A[300] = h + A[300];

Page 4: Instruction Representation 06 September 2013

Instruction Formats

op functrs rt rd shamt

6 bits 6 bits5 bits 5 bits 5 bits 5 bits

op address / immediaters rt

op target address

R:

I:

J:

op: basic operation of the instruction (opcode)rs: first source operand registerrt: second source operand registerrd: destination operand registershamt: shift amountfunct: selects the specific variant of the opcode (function code)address: offset for load/store instructions (+/-215)immediate: constants for immediate instructions

Page 5: Instruction Representation 06 September 2013

R Format

0 3217 18 8 0

000000 10000010001 10010 01000 00000

6 bits 6 bits5 bits 5 bits 5 bits 5 bits

add $t0, $s1, $s2 (add $8, $17, $18 # $8 = $17 + $18)

sub $t1, $s1, $s2 (sub $9, $17, $18 # $9 = $17 - $18)

0 3417 18 9 0

000000 10001010001 10010 01001 00000

6 bits 6 bits5 bits 5 bits 5 bits 5 bits

Page 6: Instruction Representation 06 September 2013

I Format

35 5219 8

100011 0000 0000 0011 010010011 01000

6 bits 16 bits5 bits 5 bits

lw $t0, 52($s3) lw $8, 52($19)

43 5219 8

101011 0000 0000 0011 010010011 01000

6 bits 16 bits5 bits 5 bits

sw $t0, 52($s3) sw $8, 52($19)

Page 7: Instruction Representation 06 September 2013

Example

A[300] = h + A[300]; /* $t1 <= base of array A; $s2 <= h */

lw $t0, 1200($t1) # temporary register $t0 gets A[300]

add $t0, $s2, $t0 # temporary register $t0 gets h +A[300]

sw $t0, 1200($t1) # stores h + A[300] back into A[300]

0 3218 8 8 0

000000 10000010010 01000 01000 00000

35 12009 8

43 12009 8

100011 0000 0100 1011 000001001 01000

101011 0000 0100 1011 000001001 01000

Compiler

Assembler

Page 8: Instruction Representation 06 September 2013

Immediates (Numerical Constants)• Small constants are used frequently (50% of operands)

– A = A + 5;– C = C – 1;

• Solutions– Put typical constants in memory and load them– Create hardwired registers (e.g. $0 or $zero)

• DP4: make the common case fast• MIPS instructions for constants (I format)

– addi $t0, $s7, 4 # $t0 = $s7 + 4

8 423 8

001000 0000 0000 0000 010010111 01000

Page 9: Instruction Representation 06 September 2013

Arithmetic Overflow• Computers have limited precision (32 bits)

15 1111

+ 3 0011

18 10010

• Some languages detect overflow (Ada), some don’t (C)• MIPS provides 2 types of arithmetic instructions:

– Add, sub, and addi: cause overflow

– Addu, subu, and addiu: do not cause overflow

• MIPS C compilers produce addu, subu, addiu by default

Page 10: Instruction Representation 06 September 2013

Logical Instructions• Bitwise operations

– View contents of registers as 32 bits rather than as a single 32-bit number

• Instructions– and, or: the 3 operands are registers (R format)– andi, ori: the 3rd argument is an immediate (I format)

• Example: masks (andi $t0, $t0, 0xFFF) 1011 0110 1010 0100 0011 1101 1001 1010 0000 0000 0000 0000 0000 1111 1111 1111 0000 0000 0000 0000 0000 1101 1001 1010

Page 11: Instruction Representation 06 September 2013

Shift Instructions• Move all the bits in a register to the left/right

– sll (shift left logical): fills emptied bits with 0s– srl (shift right logical): fills emptied bits with 0s– sra (shift right arithmetic): sign extends emptied bits

• Example: srl $t0, $s1, 8 (R format)

000000 00001000000 10001 01000 01000

0001 0010 0011 0100 0101 0110 0111 0100

0000 0000 0001 0010 0011 0100 0101 0110

shamt

Zero Fill

Page 12: Instruction Representation 06 September 2013

Multiplication and Division• Use special purpose registers (hi, lo)

– 32-bit value x 32-bit value = 64-bit value

• Mult $s0, $s1 – hi: upper half of product– lo: lower half of product

• Div $s0, $s1– hi: remainder ($s0 / $s1)– lo: quotient ($s0 % $s1)

• Move results into general purpose registers:– mfhi $s0– mflo $s1

000000 10000 0000010001 00000 011000

000000 10000 0000010001 00000 011010

000000 00000 1000000000 00000 010000

000000 00000 1000100000 00000 010010

Page 13: Instruction Representation 06 September 2013

Assembly vs. Machine Language• Assembly provides convenient symbolic representation

– Much easier than writing numbers

– Destination operand first

– Pseudo instructions

– Labels to identify and name words that hold instructions/data

• Machine language is the underlying reality– Destination operand is no longer first

– Efficient format

• Assembly can provide pseudo instructions– Move $t0, $t1 (add $t0, $t1, $zero)

• When considering performance (IC) you should count real instructions

Page 14: Instruction Representation 06 September 2013

Register Conventions

Name Register Number Usage Preserved on call

$zero 0 the constant value 0 n.a.$at 1 reserved for the assembler n.a.

$v0-$v1 2-3 value for results and expressions no$a0-$a3 4-7 arguments (procedures/functions) yes$t0-$t7 8-15 temporaries no$s0-$s7 16-23 saved yes$t8-$t9 24-25 more temporaries no$k0-$k1 26-27 reserved for the operating system n.a.

$gp 28 global pointer yes$sp 29 stack pointer yes$fp 30 frame pointer yes$ra 31 return address yes

Page 15: Instruction Representation 06 September 2013

New Topic – Decision Instructions

• Conditional branches– If-then– If-then-else

• Loops– While– Do while– For

• Inequalities

• Switch statement

Page 16: Instruction Representation 06 September 2013

Conditional Branches

• Decision-Making Instructions• Branch if equal

– beq register1, register2, destination_address

• Branch if not equal– bne register1, register2, destination_address

• Example: beq $s3, $s4, 20

4 519 20

000100 0000 0000 0000 010110011 10100

6 bits 16 bits5 bits 5 bits

Page 17: Instruction Representation 06 September 2013

Labels

• No need to calculate addresses for branches

if (i = = j) go to L1;

f = g + h;

L1: f = f – i;

f => $s0g => $s1h => $s2i => $s3j => $s4

(4000) beq $s3, $s4, L1 # if i equals j go to L1

(4004) add $s0, $s1, $s2 # f = g + h

L1: (4008) sub $s0, $s0, $s3 # f = f - i

L1 corresponds to the address of the subtract instruction

Page 18: Instruction Representation 06 September 2013

If Statements

if (condition) clause1;else clause2;

if (condition) goto L1; clause2; goto L2;L1: clause1;L2:

if (i = = j) f = g + h;else f = g - h;

beq $3, $4, Truesub $0, $s1, $s2j False

True: add $s0, $s1, $s2False:

Page 19: Instruction Representation 06 September 2013

Loops

Loop: g = g + A[i]; i = i + j; if (i != h) goto Loop;

g: $s1h: $s2i: $s3j: $s4Base of A: $s5

Loop: add $t1, $s3 $s3 # $t1 = 2 * i add $t1, $t1, $t1 # $t1 = 4 * I add $t1, $t1, $5 # $t1=address of A[i] lw $t0, 0($t1) # $t0 = A[i] add $s1, $s1, $t0 # g = g + A[i] add $s3, $s3, $s4 # i = i + j bne $s3, $s2, Loop # go to Loop if i != h

Basic Block

Clever method of multiplying by 4 to get byte offset for one word

Page 20: Instruction Representation 06 September 2013

While Loop

while (save[i] = = k) i = i +j;

# i: $s3; j: $s4; k: $s5; base of save: $s6

Loop: add $t1, $s3, $s3 # $t1 = 2 * i add $t1, $t1, $t1 # $t1 = 4 * i add $t1, $t1, $s6 # $t1 = address of save[i] lw $t0, 0($t1) # $t0 = save[i] bne $t0, $s5, Exit # go to Exit if save[i] != k add $s3, $s3, $s4 # i = i +j j Loop # go to LoopExit:

Number of instructions executed if save[i + m * j] does not equal k for m = 10 and does equal k for 0 m 9 is 10 7 + 5 = 75

Page 21: Instruction Representation 06 September 2013

Optimization

add $t1, $s3, $s3 # Temp reg $t1 = 2 * i add $t1, $t1, $t1 # Temp reg $t1 = 4 * i add $t1, $t1, $s6 # $t1 = address of save[i] lw $t0, 0($t1) # Temp reg $t0 = save[i] bne $t0, $s5, Exit # go to Exit if save[i] kLoop: add $s3, $s3, $s4 # i = i + j add $t1, $s3, $s3 # Temp reg $t1 = 2 * i add $t1, $t1, $t1 # Temp reg $t1 = 4 * i add $t1, $t1, $s6 # $t1 = address of save[i] lw $t0, 0($t1) # Temp reg $t0 = save[i] beq $t0, $s5, Loop # go to Loop if save[i] = kExit:

The number of instructions executed by this new form of the loop is 5 + 10 6 = 65 Efficiency = 1.15 = 75/65. If 4 i is computed

before the loop, then further efficiency in the loop body is possible.

6

Instr’s

Loop PartiallyUnrolled

Page 22: Instruction Representation 06 September 2013

Do-While Loop

do { g = g + A[i]; i = i + j;} while (i != h);

L1: g = g + A[i]; i = i + j; if (i != h) goto L1

L1: sll $t1, $s3, 2 # $t1 = 4*i add $t1, $t1, $s5 # $t1 = addr of A lw $t1, 0($t1) # $t1 = A[i] add $s1, $s1, $t1 # g = g + A[i] add $s3, $s3, $s4 # i = i + j bne $s3, $s2, L1 # go to L1 if i != h

g: $s1h: $s2i: $s3j: $s4Base of A: $s5

• The conditional branch is the key to decision making

Rewrite

Page 23: Instruction Representation 06 September 2013

Inequalities• Programs need to test < and >• Set on less than instruction• slt register1, register2, register3

– register1 = (register2 < register3)? 1 : 0;

• Example: if (g < h) goto Less;

• slti: useful in for loops if (g >= 1) goto Loop

slt $t0, $s0, $s1bne $t0, $0, Less

g: $s0h: $s1

slti $t0, $s0, 1 # $t0 = 1 if g < 1beq $t0, $0, Loop # goto Loop if g >= 1

• Unsigned versions: sltu and sltiu

Page 24: Instruction Representation 06 September 2013

Relative Conditions

• == != < <= > >=• MIPS does not support directly the last four• Compilers use slt, beq, bne, $zero,

and $at

• Pseudoinstructions• blt $t1, $t2, L # if ($t1 < $t2) go to L

• ble $t1, $t2, L # if ($t1 <= $t2) go to L

• bgt $t1, $t2, L # if ($t1 > $t2) go to L

• bge $t1, $t2, L # if ($t1 >= $t2) go to L

slt $at, $t1, $t2bne $at, $zero, Lslt $at, $t2, $t1 beq $at, $zero, Lslt $at, $t2, $t1 bne $at, $zero, L

slt $at, $t1, $t2beq $at, $zero, L

Page 25: Instruction Representation 06 September 2013

The C Switch Statement

switch (k) { case 0: f = i + j; break; case 1: f = g + h; break; case 2: f = g - h; break; case 3: f = i - j; break;}

if (k==0) f = i + j; else if (k==1) f = g + h; else if (k==2) f = g - h; else if (k==3) f = i - j;

# f: $s0; g: $s1; h: $s2; i: $s3; j: $s4; k:$s5

bne $s5, $0, L1 # branch k != 0 add $s0, $s3, $s4 # f = i + j j Exit # end of caseL1: addi $t0, $s5, -1 # $t0 = k - 1 bne $t0, $0, L2 # branch k != 1 add $s0, $s1, $s2 # f = g + h j Exit # end of caseL2: addi $t0, $s5, -2 # $t0 = k - 2 bne $t0, $0, L3 # branch k != 2 sub $s0, $s1, $s2 # f = g - h j Exit # end of caseL3: addi $t0, $s5, -3 # $t0 = k - 3 bne $t0, $0, Exit # branch k != 3 sub $s0, $s3, $s4 # f = i - jExit:

Page 26: Instruction Representation 06 September 2013

Jump Tables# f: $s0; g: $s1; h: $s2; i: $s3; j: $s4; k:$s5# $t2 = 4; $t4 = base address of JT slt $t3, $s5, $zero # test k < 0 bne $t3, $zero, Exit # if so, exit slt $t3, $s5, $t2 # test k < 4 beq $t3, $zero, Exit # if so, exit add $t1, $s5, $5 # $t1 = 2*k add $t1, $t1, $t1 # $t1 = 4*k add $t1, $t1, $t4 # $t1 = &JT[k] lw $t0, 0($t1) # $t0 = JT[k] jr $t0 # jump registerL0: add $s0, $s3, $s4 # k == 0 j Exit # breakL1: add $s0, $1, $s2 # k == 1 j Exit # breakL2: sub $s0, $s1, $s2 # k == 2 j Exit # breakL3:sub $s0, $s3, $s4 # k == 3Exit:

L0

L3

L2

L1Jump Table

• Jump register instruction - jr <register> - unconditional branch to address contained in register

Page 27: Instruction Representation 06 September 2013

Conclusions

• MIPS instruction format – 32 bits• Assembly: Destination = first operand• Machine Language: Dest = last operand• Three MIPS formats: R (arithmetic)

I (immediate)J (jump)

• Decision instructions – use jump (goto)• Performance improvement - loop unrolling