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Page 1: IPC LAB MANUAL - WordPress.comTHEORY: The DIAC is two terminal device exhibiting characteristics generally similar to its V-I characteristic. Its structure is essentially that as transmitted

IPC LAB MANUAL

[3361702]

Page 2: IPC LAB MANUAL - WordPress.comTHEORY: The DIAC is two terminal device exhibiting characteristics generally similar to its V-I characteristic. Its structure is essentially that as transmitted

IPC LAB MANUAL 3361702

IC DEPARTMENT GOVERNMENT POLYTECHNIC GANDHINAGAR Page 1

Experiment No: 1 S.C.R. Characteristics AIM: To Test the V-I characteristics of S.C.R. and determine the Break over voltage, on state resistance Holding current. & latching current APPARATUS REQUIRED: SCR – TY604, Power Supplies, Wattage Resistors, Ammeter, Voltmeter, etc. CIRCUIT DIAGRAM:

PROCEDURE: 1) Connections are made as shown in the circuit diagram. 2) The value of gate current Ig, is set to convenient value by adjusting Vgg. 3) By varying the anode- cathode supply voltage Vaa gradually in step-by-step,

note down the corresponding values of Vak & Ia. Note down Vak & Ia at the instant of firing of SCR and after firing (by reducing the voltmeter ranges and increasing the ammeter ranges) then increase the supply voltage Vaa. Note down corresponding values of Vak & Ia.

4) The point at which SCR fires, gives the value of break over voltage VBO. 5) A graph of Vak V/S Ia is to be plotted. 6) The on state resistance can be calculated from the graph by using a

formula. 7) The gate supply voltage Vgg is to be switched off. 8) Observe the ammeter reading by reducing the anode-cathode supply voltage

Vaa. The point at which the ammeter reading suddenly goes to zero gives the value of Holding Current Ih.

9) Steps No.2, 3, 4, 5, 6, 7, 8 are repeated for another value of the gate current

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Ig. TABULAR COLUMN: Ig = _______mA

Sr No Vak(Volts) Ia (μA/mA/A)

CONCLUSION: As we are applying gate signal, Forward breakdown voltage is decreased and SCR is turned ON.

Question Bank: 1) Define Holding current, Latching current on state resistance, Break down voltage 2) Write an expression for anode current. 3) Mention the applications of S.C.R.

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Experiment No: 2 DIAC Characteristics AIM: To Test & plot the V-I characteristics of DIAC. APPARATUS REQUIRED: DIAC –DB3, connecting wires and multi meter Base Diagram DB 3

THEORY: The DIAC is two terminal device exhibiting characteristics generally similar to its V-I characteristic. Its structure is essentially that as transmitted with the equivalent emitter and collector connections being used. The device blocks the flow of current for both forward and reverse voltage up to its break over voltage. The DIAC is used in saw-tooth waveform generator and pulse generator circuit for triggering thyristors. Once the break over voltage is reached the device exhibits negative resistance i.e. the voltage across it decreases while current increases. The forward and reverse characteristic of a DIAC are similar from the characteristic plate the fall in voltage from to Vbo value for a certain fix value of DIAC current. This is called delta V. Also the closeness of Vbo values for forward and reverse characteristic is called

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Vbo symmetry. CIRCUIT DIAGRAM:

PROCEDURE: 1) Assemble the circuit using patch cords. Select the range of current meter as

200mA. 2) Switch on the supply and slowly vary it from 0-50V DC in intervals, say 4V,

and keep observing the corresponding DIAC current. 3) Take a few more reading of DIAC current and voltage after Vbo is reached. 4) Now connect circuit again with opposite polarity and repeat the above

steps. 5) Plot the V-I characteristics.

OBSERVATION TABLE: Forward Region

Sr No. Voltage (V) Current (I)

Reverse Region

Sr No. Voltage (V) Current (I)

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V-I Characteristic of DIAC:

CONCLUSION: DIAC starts to conduct after Breakdown Voltage.

QUESTION BANK:

1) State application of DIAC.

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Experiment No: 3

TRIAC Characteristics

AIM: To study the V-I characteristics of a TRIAC in both directions and also in different (1, 2, 3 & 4) modes operation and determine break over voltages, holding current, latching current and comment on sensitivities. APPARATUS REQUIRED: TRIAC – BT 136, power supplies, wattage resistors, ammeter, voltmeter, etc.

Base Diagram BT136

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PROCEDURE: 1) Mode 1:

1) Connections are made as shown in the circuit diagram (a) 2) The value of gate current Ig is set to convenient value by adjusting Vgg. 3) By varying the supply voltage Vm gradually in step-by-step, note down the

corresponding values of Vmt2t2 and i1. Note down Vmt2t2 and i1 at the instant of firing of TRIAC and after firing (by reducing the voltmeter ranges and increasing the ammeter ranges) then increase the supply voltage Vmt2t2 and i1.

4) The point at which TRIAC fires gives the value of break over voltage vbo1 5) A graph of Vmt2t2 v/s i1 is to be plotted. 6) The gates supply voltage. Vgg is to be switched off 7) Observe the am meter reading by reducing the supply voltage Vmt. The

point at which the ammeter reading suddenly goes to zero gives the value of holding current ih.

2) Mode 2:

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1) Connections are made as shown in the circuit diagram (b) 2) The gate current is set as same value as in i-mode 3) Repeat the step no. s 3, 4, 5, 6, & 7 of I-mode. 3) Mode 3:

1) Connections are mode as shown in the circuit diagram (c). 2) Step no. s 2, 3, 4, 5, 6, & 7 are to be repeated as in I-mode.

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4) Mode 4:

1) Connections are mode as shown in the circuit diagram (d) 2) Repeat the step no. s 2, 3, 4, 5, 6, & 7 of I-mode. TABULAR COLUMN: Mode 1 Ig = ______mA

Sr No. VTRIAC (volts) ITRIAC (mA)

Mode 2

Ig = ______mA

Sr No.

VTRIAC (volts) ITRIAC (mA)

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Mode 3 Ig = ______mA

Sr No.

VTRIAC (volts) ITRIAC (mA)

Mode 4

Ig = ______mA

Sr No.

VTRIAC (volts) ITRIAC (mA)

V-I CHARACTERISTIC OF TRIAC:

CONCLUSION: Question Bank: 1) Explain the different working modes of operations of a TRIAC? 2) Why I-mode is more sensitive among all modes? 3) What are the applications of TRIAC. 4) Why I & II modes are operating in 1st quadrant and III & IV modes are

operating in 3rd quadrant?

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Experiment No: 4 MOSFET Characteristics AIM: To Test the characteristics of MOSFET. APPARATUS REQUIRED: MOSFET-IRF740, Power Supplies, Wattage Resistors, Ammeter, Voltmeter, etc. CIRCUIT DIAGRAM:

PROCEDURE:

a. Drain Characteristics 1) Connections are made as shown in the circuit diagram. 2) Adjust the value of VGS slightly more than threshold voltage Vth. 3) By varying V1, note down ID & VDS and are tabulated in the tabular 4) Repeat the experiment for different values of VGS and note down ID v/s

VDS 5) Draw the graph of ID v/s VDS for different values of VGS.

b. Trans conductance Characteristics

1) Connections are made as shown in the circuit diagram. 2) Initially keep V1 and V2 zero. 3) Set VDS = say 0.6 V

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4) Slowly vary V2 (VGE) with a step of 0.5 volts, note down corresponding ID and VDS readings for every 0.5v and are tabulated in the tabular column.

5) Repeat the experiment for different values of VDS & draw the graph of ID v/s VGS

6) Plot the graph of VGS v/s ID. Observation Table: For Drain Characteristic:

Sr No. VDS (Voltage) ID (mA)

For Transconductance Characteristic:

Sr No. VGS (Voltage) ID (mA)

Ideal Graphs:

Drain Characteristics

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Transconductance Characteristics

CONCLUSION: QUESTION BANK: 1) Name different voltage controlled power devices 2) Draw symbols of N-channel and P-Channel MOSFET.

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Experiment No: 5 IGBT Characteristics AIM: To Test the characteristics of IGBT. APPARATUS REQUIRED: IGBT-IRGBC 20S, Power Supplies, Wattage Resistors, Ammeter, Voltmeter, etc. CIRCUIT DIAGRAM:

PROCEDURE: Collector Characteristics 1) Connections are mode as shown in the circuit diagram. 2) Initially set V2 to VGE = 5v (slightly more than threshold voltage).

3) Slowly vary V1 and note down IC and VCE. 4) For particular value of VGE there is pinch off voltage (VP) between

collector and emitter 5) Repeat the experiment for different values of VGE and note down IC v/s

VCE 6) Draw the graph of IC v/s VCE for different values of VGE.

Transconductance Characteristics 1) Connections are mode as shown in the circuit diagram.

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2) Initially keep V1 and V2 at zero. 3) Set VCE = say 0.8 V.

4) Slowly vary V2 (VGE) and note down IC and VGE readings for every 0.5v and enter tabular column

5) Repeat the experiment for different values of VCE and draw the graph of IC v/s VGE.

Observation Table: For Collector Characteristics: VGE = _____ Volts

Sr No. VCE (Volts) IC (mA)

For Transfer Characteristics: VCE = _____ Volts

Sr No. VGE (Volts) IC (mA)

Ideal Graphs: Collector Characteristics

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Transconductance Characteristics

CONCLUSION:

QUESTION BANK:

1) 2)

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Experiment No: 6 UJT Characteristics

AIM: To Test the characteristics of UJT.

APPARATUS: Regulated Power Supply (0-30V, 1A), UJT 2N2646, Resistors

10kΩ, 47Ω, 330Ω, Multimeters, Bread Board, Connecting Wires

CIRCUIT DIAGRAM:

THEORY:

A Unijunction Transistor (UJT) is an electronic semiconductor device

that has only one junction. The UJT Unijunction Transistor (UJT) has three

terminals an emitter (E) and two bases (B1 and B2). The base is formed by lightly

doped n-type bar of silicon. Two ohmic contacts B1 and B2 are attached at its

ends. The emitter is of p-type and it is heavily doped. The resistance between B1

and B2, when the emitter is open-circuit is called interbase resistance. The

original unijunction transistor, or UJT, is a simple device that is essentially a bar

of N type semiconductor material into which P type material has been diffused

somewhere along its length. The 2N2646 is the most commonly used version of

the UJT.

The UJT is biased with a positive voltage between the two bases. This

causes a potential drop along the length of the device. When the emitter voltage

is driven approximately one diode voltage above the voltage at the point where

the P diffusion (emitter) is, current will begin to flow from the emitter into the base

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region. Because the base region is very lightly doped, the additional current

(actually charges in the base region) causes (conductivity modulation) which

reduces the resistance of the portion of the base between the emitter junction

and the B2 terminal. This reduction in resistance means that the emitter junction

is more forward biased, and so even more current is injected. Overall, the effect

is a negative resistance at the emitter terminal. This is what makes the UJT

useful, especially in simple oscillator circuits. When the emitter voltage reaches

Vp, the current starts to increase and the emitter voltage starts to decrease. This

is represented by negative slope of the characteristics which is referred to as the

negative resistance region, beyond the valley point, RB1 reaches minimum value

and this region, VEB proportional to IE.

PROCEDURE:

1. Connection is made as per circuit diagram.

2. Output voltage is fixed at a constant level and by varying input voltage

corresponding emitter current values are noted down.

3. This procedure is repeated for different values of output voltages.

4. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated

using η = (Vp-VD) / VBB

5. A graph is plotted between VEE and IE for different values of VBE.

OBSERVATION TABLE:

SR

NO.

VBB = ____V VBB = ____V VBB = ____V

VEB(V) IE(mA) VEB(V) IE(mA) VEB(V) IE(mA)

V-I Characteristic of UJT:

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CALCULATIONS:

VP = ηVBB + VD

η = (VP-VD) / VBB

η = ( η1 + η2 + η3 ) / 3

CONCLUSION:

The characteristics of UJT are observed and the values of Intrinsic Stand-Off

Ratio is calculated.

QUESTION BANK:

1) State the application of UJT.

2) State the range of η.

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Experiment No: 7 Half-Wave Rectifier AIM: To Study and Test half-wave controlled rectifier. APPARATUS: SCR trainer kit, connecting wires and gate triggering circuit, CRO, CRO probe. CIRCUIT DIAGRAM:

THEORY: The circuit is energized by the line voltage or transformer secondary voltage, e = E

m sin wt. It is assumed that the peak supply voltage never exceeds the forward

and reverse blocking ratings of the thyristor. The various voltage and current wave shapes for this circuit as shown in fig. During the positive half-cycle of the supply voltage, the thyristors anode is positive with respect to its cathode and until the thyristor is triggered by a proper gate pulse, it blocks the flow of load current in the forward direction. When the thyristors is fired at an angle α, full supply voltage (neglecting the thyristor drop) is applied to the load. Hence the load is directly connected to the AC supply. With a zero reactance source and a purely resistive load, the current waveform after the thyristors is triggered will be identical to the applied voltage wave, and of a magnitude dependent on the amplitude of the voltage and the value of load resistance r. As sown in fig., the load current will flow until it is cumulated by reversal of supply voltage at wt = Π. The angle during which the thyristor conducts is called the conduction angle. By varying the firing angle α, the output voltage can be controlled. The operation of the circuit on inductive loads changes slightly. Now at instant t

01,

when the thyristor is triggered, the load-current will increase in a finite-time through the inductive load. The supply voltage from this instant appears across the load. Due to inductive load, the increase in current is gradual, Energy is

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stored in inductor during time t01

to t1, the supply voltage reverses, but the

thyristors is kept conducting. This is due to the fact that current through the inductance cannot be reduced to zero. During negative-voltage half-cycle, current continues to flow till the energy stored in the inductance is dissipated in the load-resistor and a part of the energy is fed-back to the source. PROCEDURE:

a. Rotate the firing control pot in full clockwise direction. b. Switch ON the power. c. Measure the ac voltage (V

RMS) by voltmeter between point 0V-15V

and calculate Em by Em =1.414 X VRMS

.

d. Switch OFF the power. e. Connect the circuit of half-wave rectifier as shown figure 6.1. f. Switch ON the power. g. Connect the oscilloscope and voltmeter across the load. h. Vary the firing control pot and set on 30º, 60º, 90º, 120º and 150º

firing angles using T = (αX 10ms) / 180 . i. Observe the output waveforms and note the readings of voltage

across load on different firing angles. j. Observe the waveform across the SCR1 when firing angle is 90º. k. Calculate the average load IDC current and power PDC from measured

load voltage Vo. l. Plot the input signal, gate pulse, and drop signal across SCR and

output Waveforms. WAVEFORMS:

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Experiment No: 8 Full – Wave Rectifier AIM: To Study and Test full-wave bridge rectifier. APPARATUS: Diodes, resistors, connecting wires, CRO, CRO probe CIRCUIT DIAGRAM:

THEORY: It produces the same output waveform as the full wave rectifier circuit above, is that of the Full Wave Bridge Rectifier. This type of single phase rectifier uses four individual rectifying diodes connected in a closed loop "bridge" configuration to produce the desired output. The main advantage of this bridge circuit is that it does not require a special center tapped transformer, thereby reducing its size and cost. The single secondary winding is connected to one side of the diode bridge network and the load to the other side as shown below. The four diodes labeled SCR1 to be arranged in "series pairs" with only two diodes conducting current during each half cycle. During the positive half cycle of the supply, diodes SCR1 and SCR2 conduct in series while diodes SCR3 and SCR4 are reverse biased and the current flows through the load. PROCEDURE:

1. Rotate the firing control Pot in full clockwise direction. 2. Switch ON the power. 3. Measure the ac voltage (Vrms) by voltmeter between point 0V-18V and

calculate Em by Em =1.414 X Vrms. 4. Switch OFF the power.

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5. Connect the circuit of full-wave controlled rectifier as shown figure using 2 mm patch cords.

6. Switch ON the power. 7. Connect the oscilloscope and voltmeter across the load. 8. Vary the firing control pot and set on 30º, 60º, 90º, 120º and 150º firing

angles using T = (αX 10ms) / 180. 9. Observe the output waveforms and note the readings of voltage across

load on different firing angle. a. Connect the oscilloscope one by one across the load and observe

the waveform when firing angle is 90º. b. Calculate the average load IDC current and power PDC from

measured load voltage Vo. c. Plot the input signal, gate pulse, and drop signal across SCR and

output waveforms when firing angle is 90º. WAVEFORMS:

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Experiment No: 9 Class- A Commutation Circuit AIM: Test outputs of Class A Load Commutation using physical components and on MULTISIM. APPARATUS: Commutation Circuit trainer kit, Patch cords, Wires, CRO. THEORY: The commutation techniques are broadly classified into four types depending Upon how the device forward current is reduced to zero to turn it off. 1. Natural or Line commutation 2. Load commutation 3. External Pulse commutation 4. When Thyristor is turned off by external pulse causing reverse voltage through a pulse transformer, the technique is called “External Pulse commutation”. This technique is used in AC choppers. The types are

1. Class A: Load Commutation 2. Class B: Resonant Pulse Commutation 3. Class C: Complementary Commutation 4. Class D: Auxiliary Commutation 5. Class E: External Pulse Commutation 6. Class F: AC line Commutation

Class A Commutation: When load resistance ‘R’ is low, the elements L, C & R are connected in series. However if ‘R’ is high, then C is connected across it and then this parallel combination is connected in series with inductor ‘L’ and Thyristor. Load in series: Initially the thyristor is off, hence entire supply voltage ‘E’ appears across it in forward biased. Once turned on, it acts as short circuit, thereby connecting series R-L-C circuit across DC source Load in parallel.

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Load in parallel: When the load resistance ‘R’ is not low and cannot form under damped series RL-C circuit then ‘R’ is connected in parallel with ‘C’. Initially ‘C’ has zero voltage when first firing pulse is applied to it, it conducts. The capacitor acts as short circuit, hence entire supply voltage ‘E’ appears across an inductor. The current starts to flow and capacitor charges Capacitor charges to a voltage greater than ‘E’. At zero current thyristor is turned off. Reversed biased is maintained as VC > ‘E’. Once thyristor is turned off, Capacitor starts discharging through load.

PROCEDURE:

1) Measure voltage across SCR. 2) Now apply triggering pulse on gate. 3) Observe the voltage across SCR until it once again gets off by commutation

circuit.

CONCLUSION: QUESTION BANK:

1) Give the difference between natural and forced commutation.

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Experiment No: 10 Class – B Commutation Circuit AIM: Verify outputs of Class B Resonant Pulse Commutation using physical components and on MULTISIM. APPARATUS: Commutation Circuit, Patch cords, Wires, CRO. CRCUIT DIAGRAM:

THEORY:

In this method, LC resonating circuit is across the SCR and not in series with the load. The commutating circuit and the associated waveform are shown in figure-10.1. Initially, as soon as the supply voltage +12 v is applied, the capacitor starts getting charged with its plates, and it charges up to the supply voltage. When thyristor T triggered, the circuit current flows in two directions:

1) Load current flows through the path +12v dc-ST-RL-+12v dc, 2) Commutating current The moment thyristor T is turned ON, capacitor C starts discharging through

the path C-L-T-C-. When the capacitor C becomes completely discharged, it starts getting charged with reverse polarity. Due to the reverse voltage, a commutating current start flowing which opposes the load current. When the commutating current is greater than the load current, thyristor T becomes turned OFF. When the thyristor T is turned OFF, capacitor C again starts getting charged to its original polarity through inductor and the load. Thus, when it is fully charged, the thyristor will be ON again

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Hence, from the above discussion it becomes clear that the thyristor after getting ON for some time automatically gets OFF and after remaining in OFF state for some time, it again gets turned ON. This process of switching ON and OFF is a continuous process. The desired frequency of ON and OFF states can be obtained by designing the commutating components as per the requirement. The main application of this process is in DC chopper circuits, where the thyristor is required to be in conduction state for a specified duration and then to remain in the OFF state also for a specified duration. Morgan chopper circuit is using a saturable reactor in place of the ordinary inductor is a modified arrangement for this process. The circuit has the advantage of longer oscillation period and therefore of more assurance of commutation. In this class B commutation method, the commutating component does not carry the load current. Both class A and class B turn-off circuits are self-commutating types, that is in both this circuits the SCR turns-off automatically after it has been turned ON. PROCEDURE:

1) Measure voltage across SCR. 2) Now apply triggering pulse on gate. 3) Observe the voltage across SCR until it once again gets off by

commutation circuit.

CONCLUSION: QUESTION BANK: 1) State the difference between class A and class B commutation circuit.

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Experiment No: 11 Class – C Commutation Circuit AIM: Test outputs of Class C Complementary Commutation using physical components and on MULTISIM. APPARATUS: Commutation Circuit, Patch cords, Wires, CRO. THEORY: The class C commutation circuit is shown in figure-11.1. In this method, the main thyristor T1 is that is to be commutated is connected in series with the load. An additional thyristor T2 called the complementary thyristor is connected in parallel with the main thyristor. CIRCUIT DIAGRAM:

Circuit operation:

(a) Mode 0: [Initial state of circuit] initially, both the thyristors are OFF. Therefore, the states of the devices are-

T1→OFF

T2→OFF

EC1

=0

(b) Mode 1: when a triggering pulse is applied to the gate of T1, the thyristor T1 is triggered. Therefore, two circuits current, namely, load current and charging current start flowing. Their paths are:

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Load current; E

dc +→R

1→E

dc-

Charging current; E

dc+→R

2→C+→C-→T

1→E

dc-

Capacitor C will get charged by the supply voltage Edc with the polarity shown in figure. The states of circuit components becomes

T1 →ON

T2 →OFF

EC1

=Edc

(C) Mode 2: When a triggering pulse is applied to the gate of T2,T

2 will be

turned on. As soon as T2 is ON, the negative polarity of the capacitor C is applied

to the anode of T1

and simultaneously, the positive polarity of capacitor C is

applied to the cathode. This causes the reverse voltage across the main thyristor T

1 and immediately turns it off. Charging of capacitor C now takes place through

the load and its polarity becomes reverse. Therefore, charging path of capacitor C becomes

E dc+→

R1→C

+→C

-→T

2(a-k)→E

dc-

Hence, at the end of Mode 2, the states of the devices are T

1 →OFF

T2 →ON

EC1

= -Edc

(D)Mode 3: Now, when thyristor T1 is triggered, the discharging current of capacitor turns the complementary thyristor T2 OFF. The state of the circuit at the ends of this Mode 3 becomes

T1 →ON

T2 →OFF

EC1

=Edc

Therefore, this Mode 3 operation is equivalent to the Mode1 operation. The waveforms at the various points on the commutation circuit are shown in figure-11.1. With the aid of certain accessories, this class is very useful at frequencies below about 1000 Hz. Sure and reliable commutation is the other characteristic of this method.

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PROCEDURE: 1) Measure voltage across SCR. 2) Now apply triggering pulse on gate. 3) Observe the voltage across SCR until it once again gets off by

commutation circuit. CONCLUSION: QUESTION BANK: 1) Why class c commutation method is called voltage commutation method.

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Experiment No: 12 Class – D Commutation Circuit AIM: Test outputs of Class D Impulse or Auxiliary SCR commutation using physical components and on MULTISIM. APPARATUS: Commutation Circuit, Patch cords, Wires, CRO. THEORY: In this commutation method, an auxiliary thyristor T

2 is required to commutate the

main thyristor T1,

Assuming ideal thyristors and the lossless components, and

then the waveforms are as in figure. Here, inductor L is necessary to ensure the correct polarity on capacitor C. Thyristor T1 and load resistance RL from the power circuit, whereas L, D and T2 from the commutation circuit.

CIRCUIT DIAGRAM:

CIRCUIT OPERATIONS:

(a) Mode 0: (Initial operation) When the battery Edc is connected, no current flows as both thyristors are OFF. Hence, initially, the state of the circuit components becomes T

1→OFF T

2→OFF E

C = 0

(b) Mode 1: Initially, SCR T2 must be triggered first in order to charge the

capacitor C with the polarity shown. This capacitor C has the charging path E

dc+→C

+→C

-→T

2→R

L→E

dc-. As soon as capacitor C is fully charged, SCR

T2 turns – off. This is due to the fact that, as the voltage across the

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capacitor increases, the current through the thyristor T2 decreases since capacitor C and thyristor T2 from the series circuit.

Hence the state of circuit component at the end of mode 1 becomes, T

1→ON T

2→OFF E

C = Edc

(c) Mode 2: When thyristor T1is triggered, the current flows in two paths:

a. Load current I L flows through E

dc+ → T

1→R

L→k

L→E

dc-

b. Commutation current (capacitor-discharges through) flows through C

+→T

1After the capacitor C has completely discharged, its polarity

will be reversed, i.e., its upper plate will acquire negative charge and lower plate will acquire positive charge, Therefore, at the end of Mode 2, the state of the circuit components becomes, T

1→ON

T2→OFF E

C = - E

dc

(d) Mode 3: When the thyristor T2

is triggered, capacitor C starts

discharging through the path C+→T

2 (A-K) →T

1(K-A)→C. When this

discharging current (commutating current Ic) becomes more than the

load current IL, thyristor T

1gets OFF. Therefore, at the end of Mode 3,

the state of circuit component becomes, T1→OFF T

2→ON Again

capacitor C will charge to the supply voltage with the polarity shown and hence SCR T

2 gets OFF. Therefore, thyristors T

1 and T

2This type

of commutation circuit is very versatile as both time ratio and pulse width regulation is readily incorporated. The commutation energy may readily be transferred to the load and so high efficiency is possible.

PROCEDURE:

1) Measure voltage across SCR. 2) Now apply triggering pulse on gate. 3) Observe the voltage across SCR until it once again gets off by

commutation circuit. CONCLUSION: QUESTION BANK: 1) Give one application of class D commutation method. 2)

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Experiment No: 13

Class – E Commutation Circuit AIM: Test outputs of Class E External Pulse Commutation using physical components and on MULTISIM. APPARATUS: Commutation Circuit, Patch cords, Wires, CRO. CIRCUIT DIAGRAM:

THEORY: In class E commutation method, the reverse voltage is applied to the current carrying thyristor from an external pulse source. A commutation pulse is applied through a pulse-transformer which is suitably designed to have tight coupling between the primary and secondary. It is also designed with a small air gap so as not to saturate when a pulse is applied to its primary. It is capable of carrying the load current with a small voltage drop compared to the supply voltage. When the commutation of T1 is desired, a pulse of duration equal to or slightly greater than the turn-off time specification of the thyristor is applied. This type of commutation is capable of very high efficiency as minimum energy is required and both time ration and pulse width regulation are easily incorporated. However, equipment designers have neglected this class for the designing of power circuits. PROCEDURE: 1) Measure voltage across SCR. 2) Now apply triggering pulse on gate.

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3) Observe the voltage across SCR until it once again gets off by commutation circuit. CONCLUSION: QUESTION BANK: 1) 2) 3) 4)

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Experiment No: 14 Class – F Commutation Circuit AIM: Test outputs of Class F Line or natural Commutation using physical components and on MULTISIM. APPARATUS: Commutation Circuit, Patch cords, Wires, CRO. CIRCUIT DIAGRAM:

THEORY: A typical line commutated circuit is shown in fig, if the supply is alternating voltage load current will flow during the negative half cycle the SCR will turn OFF due to the negative polarity across it. The duration of half cycle must be longer than the turn OFF time of SCR. The maximum frequency at which this circuit can operate depends on turn-off time of SCR. PROCEDURE:

1) Measure voltage across SCR. 2) Now apply triggering pulse on gate.

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3) Observe the voltage across SCR until it once again gets off by commutation circuit.

CONCLUSION: QUESTION BANK:

1) State the necessary condition for proper working of class F commutation method.

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Experiment No: 15

Series Inverter

Aim: Test basic operation of series Inverter. Apparatus required: Module, SCRs, Diodes, inductor, capacitors, etc. CIRCUIT DIAGRAM:

Procedure: 1) To begin with switch on the power supply to the firing circuit check that

trigger pulses by varying the frequency.

2) Connections are made as shown in the circuit diagram. 3) Now connect trigger outputs from the firing circuits to gate and cathode of

SCRs T1 & T2. 4) Connect DC input from a 30v/2A regulated power supply and switch on the

input DC supply. 5) Now apply trigger pulses to SCRs and observe voltage waveform across

the load.

6) Measure Vorms & frequency of o/p voltage waveform.

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CALCULATION:

Resonance frequency fr = 1/2π√(1

𝐿𝐶− R2/4L2)

L=10mH, C = 10μF, R = 20Ω, fth = 477 Hz, fp = 250 KHz WAVEFORMS:

CONCLUSION:

QUESTION BANK: 1) 2) 3) 4)

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Experiment No: 16 Parallel Inverter Aim: Test parallel inverter using two SCRs Apparatus required: Module, SCRs, Diodes, inductor, capacitors, etc. CIRCUIT DIAGRAM:

PROCEDURE:

1) Connecting are made as shown in the circuit diagram. 2) Select values of C and L. 3) Set input voltage to 5 volts. 4) Apply trigger voltage, observe corresponding output voltage (AC voltage

and wave forms) at load terminal. 5) Note down the voltage & frequency of output wave form. 6) The o/p ac voltage is almost equal to the two times of the dc input voltage.

WAVEFORMS:

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CONCLUSION: QUESTION BANK: 1) 2) 3) 4)

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Experiment No: 17 Speed Control of AC Motor Aim: To study speed control of AC motor using TRIAC and plot speed v/s α. Apparatus required: Module, TRIAC-BT136, Universal Motor, Diode-IN4001 etc. CIRCUIT DIAGRAM:

PROCEDURE: 1) Connections are made as shown in the circuit diagram. 2) Firing angle α is varied in steps gradually, note down corresponding speed of the induction motor using Tachometer and tabulate. 3) A graph of α v/s speed is plotted. CONCLUSION: QUESTION BANK: 1) 2) 3) 4)

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Experiment No: 18 Chopper Circuit AIM: Test chopper circuits with load. APPARATUS: DC Power supply, Switch, Resistor, Diode, Load. THEORY:

A chopper circuit is used to refer to numerous types of electronic switching devices and circuits. A chopper is basically a dc to dc converter whose main function/usage is to create adjustable dc voltage from fixed dc voltage sources through the use of semiconductors.Essentially, a chopper is an electronic switch that is used to interrupt one signal under the control of another.

Principle of Chopper Operation

A chopper can be said as a high speed on/off semiconductor switch. Source to load connection and disconnection from load to source happens in a rapid speed. Consider the figure, here a chopped load voltage can be obtained from a constant dc supply of voltage, which has a magnitude Vs. Chopper is the one represented by “SW” inside a dotted square which can be turned on or off as desired.

CIRCUIT DIAGRAM:

WAVE FORM:

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During the time period Ton the chopper is turned on and the load voltage is equal

to source voltage Vs. During the interval Toff the chopper is off and the load current

will be flowing though the freewheeling diode FD. The load terminals are short

circuited by FD and the load voltage is therefore zero during Toff. Thus, a chopped

dc voltage is produced at the load terminals. We can see from the graph that the

load current is continuous. During the time period Ton, load current rises but

during Toff load current decays.

Average load Voltage is given by

V0 =Ton/(Ton+Toff)*Vs

=(Ton/T)V

= A Vs

Where Ton: on -time

Toff: off- time

T = Ton +Toff= chopping period

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A = Ton /T = duty cycle

So we know that the load voltage can be controlled by varying the duty cycle A.

Equation shows that the load voltage is independent of load current it can be also

written as

V0 = f. Ton .Vs

Where f= 1/T = chopping frequency

CONCLUSION:

QUESTION BANK:

1)

2)

3)

4)

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Experiment No: 19 Resistance Welding AIM: To study about Resistance Welding

APPARATUS: DC Power supply, electrodes

THEORY:

Principle of resistance welding

The resistance during resistance heating is composed of the contact resistances on the two plates and of their material resistance. The reduction of the electrode force down to 90% increases the heat input rate by 105%, the reduction of the welding current down to 90% decreases the heat rate to 80% and a welding time reduction to 90% decreases the heat rate to 92%.

The contact resistance is composed of the interface resistances between the electrode and the plate (electrode/plate) and between the plates (plate/plate). The resistance height is greatly dependent on the applied electrode force. The higher this force is set, the larger are the conductive crosssections at the contact points and smaller the resistances.

The contact surfaces, which are rapidly increasing at the start of welding, effect a rapid reduction of interface resistances. With the formation of the weld nugget the interface resistances between the plates disappear. During the progress of the weld the material resistance increases from a low value (surrounding temperatures) to a maximum value above the melting temperature.

Figure shows diagrammatically the different resistances during the spot welding process with acting electrode force, but without welding current. Weld nugget formation must therefore start in the joining zone because of the existing high contact resistance there.

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Sequence of a resistance spot welding process

1->2 lowering of the top electrode 2->3 Application of the adjusted electrode force Set-up time tpre, sequence 3->4 Switching-on of the adjusted welding current for the period of the welding

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time tw. Formation of the weld nugget in the joining zone of both work pieces. An example shows the macro section of a weld nugget after the welding time has ended. 4->5 maintaining the electrode force for the period of the set post-weld holding time th. 5->6 Switching-off the force generating system and lifting the electrodes off the work piece. CONCLUSION: QUESTION BANK: 1) 2) 3) 4)