ismp-emap 2019 · 2019. 11. 12. · ismp-emap 2019 2 the 18th international symposium on...

The 18th International Symposium on Microelectronics and PackagingThe 21st Electronic Materials and Packaging(EMAP) Conference

November 13(Wed.)-15(Fri.), 2019, Hotel Aqua Palace, Busan, Korea

ISMP-EMAP 2019ISMP-EMAP 2019

Hosted by The Korean Microelectronics and Packaging Society (KMEPS)

EMAP (Electronic Materials And Packaging) Korea Section

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High Reliability PCB

Camera Module

Substrate Like PCB(MSAP)

Mini LED

5G Network

ADAS / Telematics

AP/ASIC

DRAM / NAND

www.daeduck.com• HQ & Korea : [email protected]• Canada(Ontario) : [email protected]

• USA(Irvine, CA) : [email protected]• Taiwan & China(Shanghai) : [email protected]

• Singapore : [email protected]

HQ & Sales Office

ISMP-EMAP 2019


November 13(Wed.)-15(Fri.), 2019, Hotel Aqua Palace, Busan, Korea 1

Welcome Message 2

Overview 3

Committee 4

Plenary Speaker 1, 2 6

Keynote Speakrer 1, 2, 3, 4 8

Invited Speaker 16

Program at a Glance 18

Poster Presentation Session 24

Presentation Guideline 32

Registration 33

Social Events 34

Conference Venue Information 35

Conference Room Information 36

Sponsors 38

Table of Contents

ISMP-EMAP 2019

2 The 18th International Symposium on Microelectronics and PackagingThe 21st Electronic Materials and Packaging(EMAP) Conference

It is our pleasure to announce that the 18th international Symposium on Microelectronics and Packaging (ISMP 2019) and 2019 EMAP (Electronic Materials and Packaging) will be held at the Hotel Aqua Palace, Pusan, Korea, during November 11~13th, 2019. This international conference will be organized by the KMEPS (the Korean Microelectronics and Packaging Society) and the EMAP Korean committee, and will address comprehensive coverage of recent advances in materials, processes, design and simulations, fabrication, reliability, and thermal management of electronic packaging. This conference will provide an excellent opportunity for researchers and engineers of academic institutes and industries to discuss recent advances and new electronic packaging technology directions. Three days of technical sessions for oral and poster presentations will be organized, and the program includes invited and keynote presentation from world-renowned speakers. In addition, you can also enjoy the wonderful night view of the Pusan beaches nearby the conference hotel. The ISMP-EMAP 2019 committees are cordially invite researchers, engineers, scientists and professors and students to submit abstracts and join the ISMP-EMAP 2019, and look forward to welcoming you in Pusan, Korea.

Prof. Seung-Boo JungGeneral Chairs

Prof. Kyung W. PaikGeneral Chairs

Welcome Message

ISMP-EMAP 2019



ISMP-EMAP 2019 is the joint conference of the 18th International Symposium on Microelectronics and Packaging and 21st International Conference on Electronic Materials and Packaging.ISMP is the top-tier international event that brings together the expertise in electronics packaging and microelectronic systems from academia to industry. EMAP is a unique event for the electronic packaging community. This year, these two conferences are held jointly to provide a bigger chance to exchange ideas and experiences from November 13 to 15, 2019 at the Hotel Aqua Palace, Busan, Korea. As the conference site, Busan is the second-largest city in Korea and famous for tourist and shopping attractions as well as its astounding variety of fresh seafood. You will not forget the vibrant marketplace experience and the exceptional hospitality of Busan. We look forward to seeing you in Busan at the ISMP-EMAP 2019.

Conference Topics• Advanced Packaging Technologies• Electronic Materials for Interconnects and Packaging• Emerging Process for Interconnects and Packaging• PCB, Solder, and Assembly Process• Power Electronic Packaging• Sensors, LED, and Emerging Packaging Technology• Wearable and Printed Electronics• MEMS/NEMS Packaging and Applications• Reliability of Electronic Devices and Systems• Design Tools and Modeling

Overview


ISMP-EMAP 2019

General Chair• Kyung Wook Paik (Korea Advanced Institute of Science and Technology)• Seung-Boo Jung (Sungkyunkwan University)

International Advisory Committee• Chair Yong-Bin Sun (Kyonggi University)• Taek-Soo Kim (Korea Advanced Institute of Science and Technology)• Hiroshi Nishikawa (Osaka University, Japan)• Joungho Kim (Korea Advanced Institute of Science and Technology)• Yong M. Kim (Intel Corp., USA)• Mitsumasa Koyanagi (Tohoku University)• Saikumar Jayaraman (Intel Corp.)• C. L. Gan (Nanyang Technological University)

Program Committee• Chair Sungdong Kim (Seoul National University of Science and Technology)• Co-chair Kwang-Seong Choi (Electronics and Telecommunications Research Institute)• Nam S. Kim (SK Hynix)• Daeil Kwon (UNIST)• Changhwan Choi (Hanyang University)• Ki Ill Moon (SK Hynix)

Publication Committee• Chair Hyung-Ho Park (Yonsei University)• Young-Bae Park (Andong National University)• Sung-Hoon Choa (Seoul National University of Science and Technology)• Jae Pil Jung (University of Seoul)

Committee



ISMP-EMAP 2019

Committee

Financial Committee• Chair Young C. Joo (Seoul National University)• Co-chair Jong-Hyun Lee (Seoul National University of Science and Technology)• SungSoon Park (Amkor Technology Korea)• Sarah Eunkyung Kim (Seoul National University of Science and Technology)• Byung Joon Kim (Andong National University)• Jiwan Kim (Kyonggi University)• Jaeho Lee (Hongik University)

Local Organization Committee• Chair Myungyung Jeong (Pusan National University)• Co-chair Yong-Ho Ko (Korea Institute of Industrial Technology)• Suck Won Hong (Pusan National University)• Jeong-Won Yoon (Korea Institute of Industrial Technology)• Jin Young Kim (Amkor Technology Korea)

Academia-Industry Cooperation Committee• Chair Young Jae Kim (Daeduck Electronics Co., Ltd.)• Min Hyun Kim (Hanmi Semiconductor Co., Ltd.)• Nam Gi Kang (Korea Electronics Technology Institute)• Jong Tae Moon (Hojun Able Co.)• Gu-Sung Kim (Kangnam University)• Hyuk Lee (Flex Com Co.)• Sehoon Yoo (Korea Institute of Industrial Technology)• Tae-Gon Lee (Samsung Electro-Mechanics)

Secretariat• Minjin Kim (ISMP-EMAP2019)• So-Yoon Park (Korean Microelectronics and Packaging Society)

ISMP-EMAP 2019


November 14, Thursday | AM 11:20~12:10Hotel Aqua Palace, Grand Ballroom, 2F

Name Dr. Sayoon Kang

Affiliation Samsung Electro-Mechanics, Korea

Position Vice President

Title The Future of Electronic Packaging Industry

Abstract Over the past decade, 4G cellular phones have driven the IT technology. 4G cell phone, represented by "Mobility", had a significant impact on the semiconductor industry.For example, "how do we implement low power character improvements?" In order to satisfy the low power consumption requirement, many semiconductor companies have improved IC design and fabrication scale-down methods that will continue to use mainly in the future.In the coming future a dramatic technological changes are expected that we could not imagined before. These changes will occur in various IT products and applications. Among them, 5G communication and AI will be the core technologies. The 5G of the Multi/Fast Interconnection feature and AI of the Data Generation/Application characteristic will cause huge changes in the semiconductor industry, that is, opportunity and crisis.Explosive demand of silicon chips is an opportunity factor.On the other hand, the fabrication scaling-down can be a crisis due to it's cost increase from huge investments, however, it can be an opportunity for the electronic package industry.In this presentation, I want to show "What and how shoud package industry prepare for the coming big opportunities of 5G and AI era?"

Biography Dr. Sayoon Kang who is working at the SEMCO has been developing new packaging technology using a substrate. Before joining Semco, he has developed several advanced packaging technologies at Samsung Electronics for 25 years.

Plenary Speaker 1

ISMP-EMAP 2019



November 15, Friday | AM 10:00~10:50Hotel Aqua Palace, Grand Ballroom, 2F

Name Takayuki Ohba

Affiliation Tokyo Institute of Technology, Japan

Position Professor

Title Wafer Level 3D Application for Tera-byte Node

AbstractThe prospect of three-dimensional (3D) integration for Terabyte large scale integration using bumpless interconnects with low-aspect-ratio TSVs and ultra-thinning are discussed. Bumpless (no bump) interconnects between wafers are a second-generation alternative to the use of micro-bumps for Wafer-on-Wafer (WOW) technology. Ultra-thinning of wafers down to 4μm provides the advantage of a small form factor, not only in terms of the total volume of 3D ICs, but also the aspect ratio of Through-Silicon-Vias (TSVs). The bumpless interconnects technology can increase the number of TSVs per chip with a finer pitch of TSVs and lower the impedance of the TSV interconnects with no bumps. Therefore, a promising operating platform with a higher speed by enhancing parallelism, lower power by no bumps, and smaller size by thinning wafers can realize.

Biography • 1984-2003 Fujitsu Limited• 1994-1995 Tohoku University, Ph.D.• 2004-2013 The University of Tokyo, Professor• 2013- Tokyo Institute of Technology, Professor• Filed: Advanced FEOL/BEOL process integration, 300-mm wafer level 3D process integration,

high-dense with lowest impedance TSV interconnects, and Thermal Engineering

Plenary Speaker 2

ISMP-EMAP 2019


Keynote Speaker 1

November 14, Thursday | PM 13:30~14:10Hotel Aqua Palace, Grand Ballroom, 2F

Name Dr. Kang-Wook Lee

Affiliation SK Hynix, Korea

Position Vice President

Title Advanced Packaging Technologies and Reliability Challenges for Exa-Era Applications

AbstractWith diminishing returns from traditional transistor scaling further improvements in power and performance of systems are likely to come from advanced packaging technologies.Furthermore, the increased focus on mobile computing, IoT, HPC, cloud networking, autonomous driving, and AI has highlighted the need for improved form-factor, improved performance, and low power technologies. This can be achieved only via increased emphasis on advanced packaging concepts such as 2.5D/3D integration and fan-out packaging technologies.2.5/3D integration has many benefits such as increased multi-functionality, increased performance, increased data bandwidth, reduced power, small form factor, reduced packaging volume, because it vertically stacks multiple materials, technologies, and functional components such as processor, memory, sensors, logic, analog, and power ICs into one stacked system.Fan-out packaging has more flexibility to integrate various functional components into hetero-integrated system in wafer level with lower cost.However, heterogeneous integration of different functional devices has many technical challenges owing to various types of size, thickness, and substrate of different functional devices, because they were fabricated by different technologies.Further trend of 3D integration towards thinner chip, more layer stacking, and more

ISMP-EMAP 2019



Keynote Speaker 1

joining density to maximize area efficiency and performance. 2.5D and fan‐out packaging requires finer width/space, multi-layers of Cu RDL and large package size for multi-dies integration.These trends could induce severe reliability challenges.This session will address advanced packaging revolution and reliability challenges of 2.5D/3D and fan-out packaging for exa-era systems.

Biography Kang-Wook Lee is currently VP, Package Development, SK Hynix, Korea. He received the Ph.D. degree in machine intelligence and systems engineering from Tohoku University, Japan, in 2000. From 2000 to 2001, he was a Researcher with Japan Science and Technology Corporation, Japan. From 2001 to 2002, he was a Postdoctoral Researcher with the Department of Electrical, Computer, and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY, USA.From 2002 to 2008, he worked with Memory Division, Samsung Electronics Ltd., Korea, as a Principal Engineer. From 2008 to 2016, he worked with the New Industry Creation Hatchery Center (NICHe), Tohoku University, Japan as a Professor.From 2017 to 2018, he worked with R&D, Amkor Technology Korea, as a VP. He has led the development of 2.5D/3D integration technologies for high performance/density memories, multi-functional convergence systems, wafer-level fan-out packaging for system scale, and the reliability studies about the impacts of 3D integration process on device performance.Dr. Lee has authored more than 230 scientific publications, co-edited 4 books, and given couples of tutorial/short course/invited/keynote talks in international conferences at IEEE IEDM, IEEE IRPS, and IEEE EDAPS.He has served as a frequent reviews for journals, including IEEE EDL, IEEE T-ED, IEEE CPMT, and technical program committees of international conferences, including IEEE IRPS, IEEE ECTC, IEEE EDTM, IEEE 3DIC. He is a Senior Member of IEEE.

ISMP-EMAP 2019


Keynote Speaker 2

November 14, Thursday | PM 14:10~14:50Hotel Aqua Palace, Grand Ballroom, 2F

Name Wei-Ping Dow

Affiliation National Chung Hsing Univ./ Taiwan

Position Professor

Title Electroplated Cu Bump with Ultra-Large Grain without Thermal Annealing and Kirkendall Void at the Interface of Cu/Sn Joint

AbstractSn-containing solder is still comprehensively used for chip packaging. Not only copper pillar but also copper bump will contact the Sn-containing solder. However, after the soldering process, not only IMC but also Kirkendall voids will be formed, which leads to poor reliability. In this work, copper bump was formed by electroplating at 25 ~ 35°C. After the copper electroplating, the copper bump has a grain size of 15 ~ 20 μm. Moreover, it has a preferred orientation of (111). Since the grain size is so big, it does not need to be annealed after electroplating. Also, it has no Kirkendall voids after soldering process at 200°C for 1000 hr.

Biography • Educational background: Ph.D. of Chemical Engineering, National Tsing Hua University (1995), Taiwan.• Active position: Tenured Distinguished Professor, National Chung Hsing University, Taiwan.• Professional specialty: Electroplating, Electroless deposition, Formulation and process Development for electronic devices and products fabrication

• Experience:- DRAM process engineer, Vanguard International Semiconductor Corporation, Taiwan.- Technology service engineer, Electrochemical Inc., USA.- D&R supervisor, Electrochemical Inc., USA.- Assistant Processor, National Yun-Lin University of Science & Technology, Taiwan.

ISMP-EMAP 2019



Keynote Speaker 2

- Associate Professor, National Yun-Lin University of Science and Technology, Taiwan.- Associate Professor, National Chung Hsing University, Taiwan.- Professor, National Chung Hsing University, Taiwan.- Distinguished Professor (III), National Chung Hsing University, Taiwan.- Distinguished Professor (II), National Chung Hsing University, Taiwan.

• Academic activities:- Electrochemical Society (ECS): Active Member, Invited Speaker, Meeting Organizer- International Electrochemistry Society (ISE): Active Member, Meeting Organizer- Electrochimca Acta, Guest Editor of Special Issue- Journal of the Taiwan Institute of Chemical Engineers, Deputy Editor.- Publication and Patent: 73 articles; 26 patents

• Honor- National Industrial Innovation Award, Ministry of Economic Affairs, Taiwan, 2019.- Breakthrough Award of Future Technology, Ministry of Science and Technology, Taiwan, 2018.- Outstanding Performance Award of Technology Alliance Project, Ministry of Science and

Technology, Taiwan, 2018.- Outstanding Award of Technology Transfer, National Chung Hsing University, Taiwan, 2017.- Outstanding Research Award, Ministry of Science and Technology, Taiwan, 2015.- Excellent Research Award, National Chung Hsing University, Taiwan, 2011 and 2014.- Outstanding Industry Collaboration Award, Engineering College, National Chung Hsing

University, Taiwan, 2012, 2015 and 2018.- Excellent Industry Collaboration Award, Engineering College, National Chung Hsing

University, Tai-wan, 2011, 2013 and 2014.- Outstanding Research Award of LCY Chemical Education Foundation, Taiwan, 2011.- Invited by international conferences as speaker: 14, where one was invited by Golden

Research Conference, 2010, USA.- Conference award: 24, where 4 are golden award, 1 is silver award.

ISMP-EMAP 2019


Keynote Speaker 3


Name Muhannad S. Bakir

Affiliation Georgia Tech/ USA

Position Professor

Title From Monolithic to Polylithic Integrated Circuits: A New Age for Moore’s Law

AbstractMonolithic ICs have progressed at an unprecedented rate of innovation in the past ~60 years. But, with Moore’s Law slowing down, ‘polylithic’ integration of heterogeneous ICs (or chiplets) is projected to be a key driver for the next era of Moore’s Law. This presentation will discuss polylithic integration ap-proaches using 2.5D and 3D IC technologies and their advantages. Specifically, we first discuss various 2.5D approaches including Heterogeneous Interconnect Stitching Technology (HIST), which enables the interconnection of multiple dice of various functionalities (including photonics) in a manner that mimics monolithic-like performance, yet utilizes advanced off-chip interconnects and packaging to provide flexi-bility in IC fabrication and design, improved scalability, reduced development time, and reduced cost. A key feature of HIST is the ability to place a ‘stitch chip’ between adjacent ICs on the surface of an or-ganic/ceramic package and use multi-height I/Os to interface the active dice to the package and stitch-chips simultaneously. Design considerations and benchmarking of power delivery, signaling, and thermal are described. Moreover, we show how such design considerations drive technology development in 2.5D/3D ICs along with experimental demonstrations. Secondly, we demonstrate embedded microfluidic cooling in 3D ICs along with TSV integration approaches to enable dense 3D electronics with no thermal limits; a Stratix-V FPGA with monolithic microfluidic cooling along with its performance benefits will also be shown. TSVs with deep sub-micron diameters are also

ISMP-EMAP 2019



shown for fine-grain 3D polylithic integration. Third, and lastly, we discuss 3D interconnect technologies for applications in CMOS multimodal biosen-sors.

Biography Muhannad S. Bakir is a Professor in the School of Electrical and Computer Engineering at Georgia Tech. Dr. Bakir and his research group have received thirty conference and student paper awards including six from the IEEE Electronic Components and Technology Conference (ECTC), four from the IEEE Interna-tional Interconnect Technology Conference (IITC), and one from the IEEE Custom Integrated Circuits Conference (CICC). Dr. Bakir’s group was awarded 2014 and 2017 Best Papers of the IEEE Transactions on Components Packaging and Manufacturing Technology (TCPMT). Dr. Bakir is the recipient of the 2013 Intel Early Career Faculty Honor Award, 2012 DARPA Young Faculty Award, 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited Participant in the 2012 National Academy of En-gineering Frontiers of Engineering Symposium. Dr. Bakir is the recipient of the 2018 IEEE Electronics Packaging Society (EPS) Exceptional Technical Achievement Award “for contributions to 2.5D and 3D IC heterogeneous integration, with focus on interconnect technologies.” He is also the co-recipient of the 2018 McKnight Foundation Technological Innovations in Neuroscience Awards.Dr. Bakir serves on the editorial board of IEEE Transactions on Components, Packaging and Manufactur-ing Technology (TCPMT) and IEEE Transactions on Electron Devices (TED). Dr. Bakir serves as a Distin-guished Lecturer for IEEE EPS.

Keynote Speaker 3

ISMP-EMAP 2019


Keynote Speaker 4


Name Sung Yi

Affiliation Portland State University/ USA

Position Professor

Title Could the Reliability of Solder Joints be Assessed Accurately by Using the Weibull Distribution?

AbstractSolder Joint Reliability (SJR) is the probability that solder joints will provide proper electrical and mechanical connections over a specific period of time (design life) under the design operating condi-tions without failures. Reliability and lifetime predictions of solder joints in electronic packages have been one of the most difficult problems in the electronics industry. In general, in order to evaluate the reliability of solder joints, accelerated temperature cycle tests are conducted. The experimental determi-nation of the fatigue life of the solder joints in electronic packages is a very time consuming process. After conducting accelerated temperature cycle tests, the failure data are further analyzed by the Weibull analysis to determine the Weibull parameters and the mean life. However, many previous studies show that the Weibull analysis may significantly underestimate or overestimate the reliability and the mean life to failure. The underestimation of the times to solder joint failures may result in fatal failures. For exam-ple, on 28 December 2014, Indonesia Air Asia Flight 8501, an Airbus A320-216, crashed into the Java Sea during bad weather, killing all 155 passengers and seven crew on board. On 1 December 1 2015, Indo-nesia’s National Transportation Safety Committee stated that the cracking of a solder joint of both chan-nel A and B resulted in loss of electrical continuity and two flight augmentation computer (FAC) fault, which caused the autopilot and auto-thrust disengaged and contributed to the subsequent loss of con-trol and a malfunction in two

ISMP-EMAP 2019



of the plane’s rudder travel limiter units. On the other hand, the overesti-mation of the times to failure may lead to consequently underestimating the maintenance interval, which may unnecessarily increase the maintenance cost.The goal of this study is to propose a general machine learning framework to predict the relia-bility of solder joints accurately for electronic devices and systems. In this study, it will be demonstrated how to achieve this goal using the machine learning method.

Biography Currently Sung Yi is a Professor and Chair of Mechanical and Material Engineering Department at the Portland State University, OR. He received Ph.D. from University of Illinois at Urbana-Champaign in 1992. Previously, he was a faculty member and Head of Engineering Mechanics Division, School of Mechanical Engineering, Nanyang Technological University, Singapore. He was also a Singapore-MIT Alliance Fellow from 1998 to 2002. From 2006 to 2009, he served as a Vice President at R&D Institute, Samsung Electro-Mechanics. In Samsung, he was privileged to build a brand new microelectronic packaging team. He and his team developed several advanced electronic and MEMS packaging technologies including embed-ding active devices and passives into organic substrates, the world’s smallest SAW filter using wafer level packaging, ALOX high thermal dissipation substrate technology for power devices and LED devices, 3-D advanced packaging technology, etc. He has published more than 220 papers in various journals and conference proceedings. He is an editorial advisory board member for the Journals of Soldering and Sur-face Mount Technology since 1998. He also served as an associate editor for ASME: Journal of Electronic Packaging from 2001 to 2004. He received the Jefferson Goblet Paper Award at the 32nd SDM Confer-ence in 1991 and the Roger A. Strehlow Memorial Award from UIUC in 1992, respectively. He also re-ceived Intel Learning Star Award in 2009 and Hedong Technology Award in 2007, respectively.

Keynote Speaker 4

ISMP-EMAP 2019


Thursday, 14 ~ Friday, 15 November 2019Hotel Aqua Palace, Grand Ballroom, 2F

No Name Affilliation Paper Title

I1-1 Osamu Suzuki NAMICS Corp. Recent Advances in Underfill for Flip Chip Applications

I1-3 Yasumitsu Orii NAGASE & CO., LTD. Development of Materials Informatics Platform

I1-5 Chih-Ming Chen

National Chung Hsing Univ.

Adhesion Enhancement through Co-Silanization-Assisted Metallic Immobilization on Flexible Polyimide

I1-7 C. Robert Kao National Taiwan University

Enhancement of Nano-Silver Chip Attachment by Using Transient Liquid Phase Reaction with Indium

I1-9 Hsiang-Chen Hsu I-Shou University An Investigation on Scribing and Etching the Thin-

Film Stainless Steel Substrate using Ultrafast Laser

I1-11 Jae-Sung Lim HANA Micron Inc. Silicon-Based Flexible Electronics Enabled by HANAflex

I1-13 Onishi Tetsuya Grand Joint Technology Ltd.

LED Packaging Trend & Super Strong + Ultra Tough LED

I1-15 Hyunkoo Lee ETRI Recent Microdisplay Technology Status for AR/VR Applications

I1-17 Hiroshi Nishikawa Osaka University Transient Liquid Phase Bonding using Sn-coated Cu

Particles for High-Temperature Applications

I1-19 Mingyu Li Harbin Institute of Technology

Micro-Nano Joining by Nano Silver Sintering in Power Electronic Packaging

I2-1 Takafumi Fukushima Tohoku University FOWLP-based Flexible Hybrid Sensor Systems with

Dielets and 3D-IC

Invited Speaker

ISMP-EMAP 2019



Invited Speaker

Thursday, 14 November 2019Hotel Aqua Palace, Orion Room, 3F

No Name Affilliation Paper Title

I1-2 Santosh Kumar

Yole Développe-ment Technology and Market Trends of Advanced SiP

I1-4 G.P. Li University of California, Irvine

A Perspective on Heterogeneous Integrated Edge Devices for Industry Internet of Things (IIOT) to Support Smart Manufacturing

I1-6 Yasuhiro Morikawa Ulvac, Inc. Manufacturing Technology Solution of Wafer / Panel

Level Packaging for Heterogeneous Integration.

I1-8 Katsumi Miyama

Hokkaido Univ. of Science Fabrication of Fine Pattern with Imprint Technique

I1-10 Jong-Hun Kim Nepes Corp. Ultimate 3D Package Solution by FO / PLP Technology

I1-12 Kyung W. Paik KAIST

A Study on the Dynamic Bending Reliability of Chip-in-Flex (CIF) Packages using Anisotropic Conductive Films (ACFs) Materials for Wearable Electronic Applications

I1-14 Jung Woo Lee Pusan National University

Soft, Thin Skin-Mounted Power Management Systems for Healthcare Monitoring

I1-16 Suk-Won Hwang Korea University Transient Electronics

I1-18 Ki Jun Yu Yonsei University Unventional Bio-integrated Electronics towards Human- machine Interface (HMI) Applications

I1-20 Soong Ju Oh Korea University Nanocrystal Based Electronic Devices and Wearable Sensors

ISMP-EMAP 2019


Program at a Glance

Nov. 13, 2019(Wed.)18:00~19:30 Welcome Reception

Nov. 14, 2019(Thu.)Orion Room, 3F Grand Ballroom, 2F

08:00~09:30 A1. Solder and Bump 1 B1. Heterogeneous Integration 1

Session chair

Hiroshi Nishikawa (Osaka University/ Japan)

Suck Won Hong (Pusan National University/ Korea)

08:00~08:25

(Invited) I1-1 Recent Advances in Underfill for Flip Chip Applications

(Invited) I1-2 Technology and Market Trends of Advanced SiP

Osamu Suzuki (NAMICS Corp./ Japan)

Santosh Kumar (Yole Développement/ France)

08:25~08:50

(Invited) I1-3 Development of Materials Informatics Platform

(Invited) I1-4 A Perspective on Heterogeneous Integrated Edge Devices for Industry Internet of Things (IIOT) to Support Smart Manufacturing

Yasumitsu Orii (NAGASE & CO., LTD./ Japan)

G.P. Li (University of California, Irvine/ USA)

08:50~09:10

O1-1 Microstructure and Solderability of Sn-Cu Solder Coatings Processed by Pulse

Electrodeposition from a Stannate Bath

O1-2 Technical Issues and their Solutions of Laser-Assisted Bonding Technology

Ashutosh Sharma (Ajou University/ Korea)

Jiho Joo (ETRI/ Korea)

09:10~09:30

O1-3 Advances in Metrology for Lead-free Solder Electroplating Bath

O1-4 Reactive Bonding by Integrated Nanostructured Al/Pd Multilayer Thin Film Systems for MEMS Packaging Applications

Jong Woung Kim (ECI Technology/ USA)

El-Mostafa Bourim (National NanoFab Center/ Korea)

09:30~09:45 Coffee break

ISMP-EMAP 2019



Orion Room, 3F Grand Ballroom, 2F09:45~11:00 A2. Taiwan Session 1 B2. Heterogeneous Integration 2

Session chair

Yoonchul Sohn (Chosun University/ Korea)

Sungdong Kim (Seoultech/ Korea)

09:45~10:10

(Invited) I1-5 Adhesion Enhancement through Co-Silanization-Assisted Metallic Immobilization

on Flexible Polyimide

(Invited) I1-6 Manufacturing Technology Solution of Wafer / Panel Level Packaging for

Heterogeneous Integration.Chih-Ming Chen

(National Chung Hsing Univ./ Taiwan)Yasuhiro Morikawa (Ulvac, Inc./ Japan)

10:10~10:35

(Invited) I1-7 Enhancement of Nano-Silver Chip Attachment by Using Transient Liquid Phase

Reaction with Indium

(Invited) I1-8 Fabrication of Fine Pattern with Imprint Technique

C. Robert Kao (National Taiwan University/ Taiwan)

Katsumi Miyama (Hokkaido Univ. of Science/ Japan)

10:35~11:00

(Invited) I1-9 An Investigation on Scribing and Etching the Thin-Film Stainless Steel Substrate

using Ultrafast Laser

(Invited) I1-10 Ultimate 3D Package Solution by FO / PLP Technology

Hsiang-Chen Hsu (I-Shou University/ Taiwan)

Jong-Hun Kim (Nepes Corp./ Korea)

11:00~11:10 Break

11:10~11:20 Opening Ceremony

Session chair Hee-Yeoun Kim (NNFC/ Korea)

11:20~12:10

Plenary Talk 1 The Future of Electronic Packaging Industry

Sayoon Kang (Samsung Electro-Mechanics/ Korea)12:10~13:30 Lunch

Session chair Taek-Soo Kim (KAIST/ Korea)

13:30~14:10

Keynote Talk 1 Advanced Packaging Technologies and Reliability Challenges for Exa-Era Applications

Kang-Wook Lee (SK Hynix/ Korea)

14:10~14:50

Keynote Talk 2 Electroplated Cu Bump with Ultra-Large Grain without Thermal Annealing and Kirkendall Void at

the Interface of Cu/Sn Joint Wei-Ping Dow (National Chung Hsing University/ Taiwan)


Program at a Glance

ISMP-EMAP 2019


Program at a Glance

Orion Room, 3F Grand Ballroom, 2F15:05~16:20 A3. Flexible & LED Packaging B3. Wearable Electronics 1

Session chair

Byoung Joon Kim (Andong National University/ Korea)

C. Robert Kao (National Taiwan University/ Taiwan)

15:05~15:30

(Invited) I1-11 Silicon-Based Flexible Electronics Enabled by HANAflex

(Invited) I1-12 A Study on the Dynamic Bending Reliability of Chip-in-Flex (CIF) Packages using Anisotropic Conductive Films (ACFs) Materials

for Wearable Electronic ApplicationsJae-Sung Lim

(HANA Micron Inc./ Korea)Kyung W. Paik (KAIST/ Korea)

15:30~15:55

(Invited) I1-13 LED Packaging Trend & Super Strong + Ultra Tough LED

(Invited) I1-14 Soft, Thin Skin-Mounted Power Management Systems for Healthcare

MonitoringOnishi Tetsuya

(Grand Joint Technology Ltd./ Japan)Jung Woo Lee

(Pusan National University/ Korea)

15:55~16:20

(Invited) I1-15 Recent Microdisplay Technology Status for AR/VR Applications (Invited) I1-16 Transient Electronics

Hyunkoo Lee (ETRI/ Korea)

Suk-Won Hwang (Korea University/ Korea)


16:35~17:25 A4. Solder and Bump 2 B4. Wearable Electronics 2

Session chair

Sehoon Yoo (KITECH/ Korea)

Katsumi Miyama(Hokkaido University of Science/ Japan)

16:35~17:00

(Invited) I1-17 Transient Liquid Phase Bonding using Sn-coated Cu Particles for High-

Temperature Applications

(Invited) I1-18 Unventional Bio-integrated Electronics towards Human- machine Interface

(HMI) ApplicationsHiroshi Nishikawa

(Osaka University/ Japan)Ki Jun Yu

(Yonsei University/ Korea)

17:00~17:25

(Invited) I1-19 Micro-Nano Joining by Nano Silver Sintering in Power Electronic Packaging

(Invited) I1-20 Nanocrystal Based Electronic Devices and Wearable Sensors

Mingyu Li (Harbin Institute of Technology/ China)

Soong Ju Oh (Korea University/ Korea)

17:25~18:30

Poster Presentation Session 1 (Jupiter Room)Session chair: Sungdong Kim (Seoultech/ Korea)

18:30~21:00 Banquet

ISMP-EMAP 2019



Program at a Glance

Nov. 15, 2019(Fri.)Orion Room, 3F Grand Ballroom, 2F

08:00~09:45 C1. Advanced Packaging D1. Electronic Materials

Session chair

Ben-Je Lwo (National Defense University/ Taiwan)

Changhwan Choi (Hanyang University/ Korea)

08:00~08:25

(Invited) I2-1 FOWLP-based Flexible Hybrid Sensor Systems with Dielets and 3D-IC

O2-1 Good Wettability and Mechanical Strength of Sn-3Ag-0.5Cu Solders on Ni Plated

ZnS CeramicsTakafumi Fukushima

(Tohoku University/ Japan)Shuye Zhang

(Harbin Institute of Technology/ China)

08:25~08:45

O2-2 Compact Yagi-Uda-Shaped and Array Antenna in Ka-Band Using Compressed EBG

Unit Cells

O2-3 Crystallinity Dependence of Grain and Grain Boundary Strength in Polycrystalline

Copper InterconnectionsJae-Yeong Lee

(Pohang University of Science and Technology/ Korea)

Ken Suzuki (Tohoku University/ Japan)

08:45~09:05

O2-4 New Paradigm in Silicon Capacitors Assembly used as Decoupling Capacitors

O2-5 Study on mold gap fill association factor of epoxy molding compound for thin package

Muller Charles (KOREA MURATA Electronics Co.,Ltd/ France)

Jun Shin Lee (SK Hynix/ Korea)

09:05~09:25

O2-6 A Study on Improving Flexibility for Chip Stackable Flexible Package

O2-7 Low Dielectric Materials for High-Speed Transmission

Kyoungtae Eun (SK Hynix/ Korea)

Shin TERAKI(NAMICS Corp./ Japan)

09:25~09:45

O2-8 Role of Wafer Supporting System for Advanced Packaging

O2-9 Comprehensive Stress Effects Induced by Through Silicon Via Integrated with Local S/

D Stressor on Performances of Nano-Scaled Devices in Silicon Interposer Architecture

KiYeul Yang (Amkor technology korea/ Korea)

Yan-Cian Lin (National Tsing Hua Univ./ Taiwan)


ISMP-EMAP 2019


Program at a Glance

Orion Room, 3F Grand Ballroom, 2FSession

chair Kwang-Seong Choi (ETRI/ Korea)

10:00~10:50

Plenary Talk 2 Wafer Level 3D Application for Tera-byte Node

Takayuki Ohba (Tokyo Tech/ Japan)

10:50~11:30

Keynote Talk 3 From Monolithic to Polylithic Integrated Circuits:

A New Age for Moore’s Law Muhannad S. Bakir (Georgia Tech/ US)

11:30~12:10

Keynote Talk4 Could the Reliability of Solder Joints be Assessed Accurately by Using the Weibull Distribution?

Sung Yi (Portland State University/ US)12:10~13:30 Lunch

13:30~15:30 C2. Young Scientists D2. Taiwan Session 2

Session chair

Ken Suzuki (Tohoku University/ Japan)

Sung-Hoon Choa (Seoultech/ Korea)

13:30~13:50

(Y/S) O2-10 A First Principle Study on the Localized Electronic Band Structure of a Single Long Graphene Nanoribbon with Graphene

Electrodes

O2-11 Electrospinning Opportunity for Wearable Thermoelectric Generator

Qinqiang Zhang (Tohoku University/ Japan)

Ben-Je Lwo(National Defense University/ Taiwan)

13:50~14:10

(Y/S) O2-12 Convolution Neural Network Based Diagnosis of Temperature Sensors in a Bake

Module

O2-13 AI-Assisted Design-on-Simulation Technology for Advanced Packaging

Jinwoo Lee (Sungkyunkwan University/ Korea)

Bo-Ruei Lai (National Tsing Hua Univ./ Taiwan)

14:10~14:30

(Y/S) O2-14 Photoresponsivity of a Graphene Nanoribbon based Field Effect Transistor for

the Development of a Multi-Junction Solar Cell using a Single Material

(Y/S) O2-15 Process-induced Warpage Characterization of Flip Chip Package on

Packaging

Jowesh Goundar (Tohoku University/Japan)

Ling-Ching Tai (Feng Chia University/Taiwan)

ISMP-EMAP 2019



Program at a Glance

Orion Room, 3F Grand Ballroom, 2F

14:30~14:50

(Y/S) O2-16 Effect of Surface Treatments on the Interfacial Adhesion of Cu RDL for FOWLP

(Y/S) O2-17 Thermally-Induced Curvatures and Warpages of 2.5D Packages Measured by

Strain GaugeKirak Son

(Andong National University/ Korea)Ms. Y. W. Wang

(Chang Gung University/ Taiwan)

14:50~15:10

(Y/S) O2-18 Low Temperature Wafer-Scale Si Layer Transfer by Wafer Bonding for the 3D

Integration

(Y/S) O2-19 Reliability Prediction of WLCSP using RF Regression Model

Hoonhee Han (Hanyang University/ Korea)

Mr. T.H. Tsai (National Tsing Hua Univ./ Taiwan)

15:10~15:30

(Y/S) O2-20 Advanced Nanofilm Transfer Methods by Water

(Y/S) O2-21 Determination of Thin Silicon Die Strength by Three-Point Bending

Sumin Kang (KAIST/ Korea)

Mr. H. Y. Liu (Chang Gung University/ Taiwan)

15:30~16:30

Poster Presentation Session 2 (Jupiter Room)Session chair: Daeil Kwon (Sungkyunkwan University/ Korea)

16:30~17:00 Award Ceremony and Closing Remark (Lucky Draw)

※�EMAP Steering Committee Meeting Nov.14, 2019 (Thu.) PM12:00, Venus Room (3rd Floor)※��Annual Meeting

Nov.15, 2019 (Fri.) PM12:10, Venus Room (3rd Floor)

ISMP-EMAP 2019


Poster Presentation Session

Session I - Nov. 14, 2019 (Thu.), Jupiter Room

P1-01 Low Temperature Bonding using a Laser for Flexible Electronic Devices Youngil Kim(Seoul National University of Science and Technology)

P1-02 Study on Viscoelastic Material Properties of Epoxy Mold Compound to Improve the Accuracy of Package Warpage Simulation Min kyu Kang(SK Hynix)

P1-03 Ar/N2 Plasma Treatment Effect on Quantitative Interfacial Adhesion Energy of Sputtered Cu Direct Bonding for 3-D Integration Gahui Kim(Andong National University)

P1-04 Effect of Femtosecond Laser Machining Environment on Mechanical Behaviors of Thinned Silicon Kwang Ho Ahn(Korea Advanced Institute of Science and Technology (KAIST))

P1-05 Panel Level Warpage Analysis with Various RDL Layouts Sungdong Kim(Seoul National University of Science and Technology)

P1-06 Characterization of the Viscosity Behavior of Electronic Packaging Adhesives Dain Lim(Korea Institute of Industrial Technology (KITECH))

P1-07 Flexible Ultrasonic Transducer Packaging using Solder ACFs (Anisotropic Conductive Films) Jae-Hyeong Park(Korea Advanced Institute of Science and Technology (KAIST))

P1-08 A Study of the Curing Behaviors and Viscosities of Non-Conductive Films (NCFs) on Flip Chip Solder Bump Joint Morphology and Reliability HanMin Lee(Korea Advanced Institute of Science and Technology (KAIST))

P1-09 Micro texture Dependence of Mechanical Damage Mechanism of Electroplated Gold Thin Film Used for Semiconductor Device Interconnections Genta Nakauchi(Tohoku University)

P1-10 Plasma Pre-treatment for Low-Temperature Cu-Cu Direct Bonding Sungdong Kim(Seoul National University of Science and Technology)

ISMP-EMAP 2019




P1-11 Planarization of Polymeric Dielectrics for FOWLP Sungdong Kim(Seoul National University of Science and Technology)

P1-12 Effects of Reaction Time and Pd Layer Type on Interfacial Reactions and IMC Morphologies of Thin-Au/Pd/Ni Surface Finished PCBs with Sn-3.0Ag- 0.5Cu Solder Joints Jungsoo Kim(Korea Institute of Industrial Technology (KITECH))

P1-13 Effect of Sn-Ni Solder on TLP Joint Properties of SiCfor Power Module HyeJun Kang(University of Seoul)

P1-14 High Thermal Conductive Cu Sintering Paste for xEV Power Module Hyuncheol Bae(Electronics and Telecommunications Research Institute (ETRI))

P1-15 Effect of Preform with Plasma Treatment on Joint of TLP Bonding Seungju Baek(Korea Institute of Industrial Technology (KITECH))

P1-16 Switching Performances by Chip Interconnections in Power Semiconductor Discrete Packages Dong Yun Jung(Electronics and Telecommunications Research Institute (ETRI))

P1-17 Novel Optical Biomedical Image Sensing Technique for Three-Dimensional Biological Inspection Sang-Pil Han(Electronics and Telecommunications Research Institute (ETRI))

P1-18 Biodegradably Coated Magnetic Nanocapsules for On-off Switchable Drug Release with Reduced Leakage Duyoung Choi(Korea Institute of Industrial Technology (KITECH))

P1-19 Transfer of Hall Sensor Materials using Low Temperature Gallium Arsenide- Silicon Wafer Eutectic Bonding Sang Hyun Jung(Korea Advanced Nano Fab Center)

P1-20 Improvement of Indirect X-ray Detector Performance by Applying Additive Solvent to the Organic Active Layer Jongkyu Won(Dankook University)

ISMP-EMAP 2019



P1-21 Stretchable and Thermally-healable Transparent Electrode Based on Diels- Alder Adducts for Stretchable Electronic Packages Jong-Woong Kim(Chonbuk National University)

P1-22 A Wearable Photoplethysmogram(PPG) Sensor Using Flexible and Stretchable Substrate Se-hoon Park(Korea Electronics Technology Institute (KETI))

P1-23 A Study on the Coating Characteristics of VO2 Nanoparticle Film with Various Conditions of Ultrasonic Spray Coater Jang-Woo Han(Korea Institute of Industrial Technology (KITECH))

P1-24 Stretchable and Flexible Transmission Line Based on Highly Conductive Silver Paste for Wearable Applications Ji Hun Yuk(Seoul National University of Science and Technology)

P1-25 Development of Mechanical Characteristics of Possible Stretchable Electrodes Applied to Stretchable/Flexible Display Nam Hyun Jin(Dept. of Manufacturing Systems and Design Engineering)

P1-26 A Study on the Adhesion Characteristics between Polyimide and Metal Film by CO2 Laser Treatment Junhyuk Son(Korea Institute of Industrial Technology (KITECH))

P1-27 Flexible and Stretchable Radio Frequency Antenna based on Silver Nanowires SangWoo Kim(Sungkyunkwan University)

P1-28 Comparison of Interconnection Methods for E-textile Applications Sungdong Kim(Seoul National University of Science and Technology)

P1-29 Fabrication of Printed Ag Circuits with Plasma Assisted-sintering Process and its Electrochemical Migration Behaviors Choong-Jae Lee(Sungkyunkwan University)

P1-30 Design of Cu Circuit for Stretchable Electronic Circuits using Finite Element Analysis SangWoo Kim(Sungkyunkwan University)

ISMP-EMAP 2019




P1-31 Fabrication of MEMS Gyro Sensor with Wafer Level Vacuum Packaging ChungMo Yang(National NanoFab Center)

P1-32 Analysis of Temperature Rise and Flexibility of Flexible Highly Efficient Compound Solar Module Youngil Kim(Seoul National University of Science and Technology)

P1-33 Mechanical Reliability of Conductive Yarn during Repeated Bending Deformation Geum-Yong Park(Andong National University)

P1-34 Twisting Test of Interconnect on Flexible Polymer Substrate Yong-Wook Kwon(Andong University Flexible Electronic Materials Laboratory)

P1-35 High Reliability Fan-Out Redistribution Layer with Nano-scaled Twinning Structure Yu-Jin Li(National Chiao Tung University)

P1-36 Anisotropic grain growth in Cu joints at low temperatures by 111-oriented nanotwinned copper films Chang Chih Hsieh(National Chiao Tung University)

P1-37 Porous Copper-Graphene-Graphene Oxide Composite for Thermal Management of Nanoelectronics Jun-Seok Ha(Chonnam National University)

P1-38 Stress Development Analyses of PBGA Chip under Random Vibration Yeong-Kook Kim(Inha University)

P1-39 Distinguishing Zigzag and Armchair Edges on Graphene Nanoribbons by X-ray Photoelectron and Raman Spectroscopies Jungpil Kim(Korea Institute of Industrial Technology (KITECH))

P1-40 Effects of Cu-CNT nanocomposite TIM on optical spectra of LED lighting applications Kwang-Seok Kim(Korea Institute of Industrial Technology (KITECH))

ISMP-EMAP 2019



Session II - Nov. 15, 2019 (Fri.), Jupiter Room

P2-01 Electromagnetic Interference Shielding Effect of Double Layer Copper Patterns with Moisture Ventilation at Package Level Bo kung Joung(Hanyang University)

P2-02 Effect of Reducing Agent on the Sinterability of Cu Paste Soonyong Kwon(Korea Institute of Industrial Technology (KITECH))

P2-03 Comparative Study of Plasma Treatment on Sputtered and Electroplated Cu Surfaces for Cu-to-Cu Bonding Sarah Eunkyung Kim(Seoul National University of Science and Technology)

P2-04 Copper Nitride Passivation by Ar-N2 Two Step Plasma Treatments for Low-Temperature Copper Bonding Sarah Eunkyung Kim(Seoul National University of Science and Technology)

P2-05 Effects of Surface Activated Monolayer (SAM) Treatment onConductive Particles in Anchoring Polymer Layer (APL)Anisotropic Conductive Films (ACFs) for Chip- on-Glass (COG) Interconnection Dal-Jin Yoon(Korea Advanced Institute of Science and Technology(KAIST))

P2-06 Novel Die-Attach Method on Cu-Finish Metallization by Pressure-Assisted Sinter- Bonding in Air Using Cu Formate Paste Jong-Hyun Lee(Seoul National University of Science and Technology)

P2-07 Bendability Test and Bending Fatigue Test of Metal Film on Flexible Substrate Minsu Park(Andong National University)

P2-08 Structural and Mechanical Properties of Eutectic Sn-Bi-Te Temperature Solder Sri Harini Rajendran(University of Seoul)

P2-09 Effect of Epoxy Contents in Cu Hybrid Paste on the Mechanical and Electrical Properties of Cu-Cu Joint Byeong-Uk Hwang(Sungkyunkwan University)

ISMP-EMAP 2019




P2-10 Mechnical Properties of Al2O3/Cu Active Metal Brazing for Electric Vehicle Seung Jun Hwang(University of Seoul)

P2-11 Sealing Process for Transparent Solar Cell based on Thin Film of Silicon AESUN OH(Electronics and Telecommunications Research Institute (ETRI))

P2-12 Mechanical Reliability of Flip Chip Package with Cu-core Solder Ballunder Thermal Shock Test Haksan Jeong(Sungkyunkwan University)

P2-13 Effect of Graphene Nanoplatelets on the Mechanical Properties of SAC Alloy Wook Sang Jeon(University of Seoul)

P2-14 Laser Assisted Bonding Process Using with Hybrid Underfill Technology for Flexible PET Application Ki-Seok Jang(Electronics and Telecommunications Research Institute (ETRI))

P2-15 Fabrication of SiC Power Module by TLP Solders and Its Characteristics HyeJun Kang(University of Seoul)

P2-16 Pressureless TLPS Bonding with Cu and Sn-58Bi Particles and its Corrosion Behavior Kwang-Ho Jung(Sungkyunkwan University)

P2-17 Sintering Study of Cu Micro/Nano-Particle Mixed Pastes for Power Semiconductor Bonding Applications Byung-Suk Lee(Korea Institute of Industrial Technology (KITECH))

P2-18 Transient Liquid Phase Sintering Bonding in Air using Cu and Sn-58Bi and its Bonding Reliability under High Temperature Condition Kyung Deuk Min(Sungkyunkwan University)

P2-19 Effect of Interfacial Intermetallic Compound on Thermal Resistance of Flip-Chip LED Tae Young Lee(Korea Institute of Industrial Technology (KITECH))

P2-20 Development and Research of Universally Applicable Stretchable Strain Sensor Nam Hyun Jin(Dept. of Manufacturing Systems and Design Engineering)

ISMP-EMAP 2019



P2-21 Improved Sensitivity of Organic Photodetector by Adding Polar Solvent to the Hole Transport Layer for Indirect X-ray Detection Hailiang Liu(Dankook University)

P2-22 Sensitivity Improvement of Quantum Dot-blended Hybrid Detector for indirect- type X-ray Imaging Saehong Kim(Dankook University)

P2-23 Bending Properties of Anchoring Polymer Layer (APL) Anisotropic Films (ACFs) for Ultra-Fine Pitch Chip-on-Flex (COF) Packages Yan Pan(Korea Advanced Institute of Science and Technology (KAIST))

P2-24 Ag-PDMS Printing Process for Stretchable Electrodes Park Jun hwan(Korea Institute of Industrial Technology (KITECH))

P2-25 Large-Scale Rapid Laser Sintering of Highly Stretchable Electrode Using a Homogenized Rectangular Laser Beam Nam Hyun Jin(Dept. of Manufacturing Systems and Design Engineering)

P2-26 Intense Pulse Light Sintering of an Ag Microparticle-based, Highly Stretchable, and Conductive Electrode Nam Hyun Jin(Dept. of Manufacturing Systems and Design Engineering)

P2-27 Implementation of the Array Antenna for 77 GHz Band Using T-junction and Series-fed Structure Hae Jin Kim(Korea Electronics Technology Institute)

P2-28 Mechanical Properties of Indium Tin Oxide (ITO) Transparent Conductors for Flexible Applications Seung Jin Oh(Korea Advanced Institute of Science and Technology (KAIST))

P2-29 Enhancement of Movement Speed of Soft Actuator Utilizing Diamagnetic Levitation Ji Hun Kim(Korea Advanced Institute of Science and Technology (KAIST))

P2-30 Deformation of Package and Changes of Natural Frequency in MEMS Accelerometer at Elevated Temperatures. Youngmoon Jang(Seoul National University of science and technology)

ISMP-EMAP 2019




P2-31 Numerical Analysis of Pad Deformation and Penetration withFine Pitch MEMS Vertical Probe Tip Cha Ji-Hoon(Seoul National University of Science and Technology)

P2-32 Study on Flame-retardant Coating of PET-based Module to Prevent Embers Eunsol Jo(Kangnam University)

P2-33 Fatigue Resistance and the Adhesion Properties of Cu Films on Polyimide Substrate Treated by Oxygen Plasma Jaegeun Seol(Andong National University)

P2-34 Characteristics of Diffusive Transport with use of Metasurfaces for the Spatial Resolution Enhancement of fNIRS Myung Yung Jeong(Pusan National University)

P2-35 Multiple Solutions of Thin Film Coating on Horizontal Rotating Cylindrical Mold by Drop-Casting Method: Roll-to-roll Nanoimprint Lithography Myung Yung Jeong(Pusan National University)

P2-36 Multiple Laser Interference Exposure: Simulations and Experiments for the Fabrication of Wavy Patterns Yong-Won Ma(Pusan National University)

P2-37 Interlayer materials to reduce transient liquid phase bonding time Namhyun Kang(Pusan National University)

P2-38 Preparation and Properties of Passivation Films Spray Coated on the Flexible Plastic Substrates SangHee Lee(Dankook University)

P2-39 SMT process effects on reliability of PCBs during biased HAST Seok Hwan Huh(Changwon National University)

ISMP-EMAP 2019


Oral presentation• Length of oral presentation material should be in accordance to your time assigned, 25 min for invited talk and 20 min for oral presentation, including questions and discussion.

• Presenters should prepare the presentation file in MS-PowerPoint in English.• If you use fonts other than standard Windows Office 2010 fonts, please bring the font files themselves with the presentation file.

• Please bring your PowerPoint presentation file on a CD or USB memory stick and submit it to the operator of each presentation room at least 10 minutes before each session starts. The operator will load the presentation files to the laptop PC.

• It is strongly discouraged to bring your own laptop computer (especially Apple iMac laptop) unless your presentation requires any special software and/or hardware.

• If you would like to use any other A/V equipment, please inform us no later than October 20, 2019.

Interactive Poster presentation• Each poster will be assigned a panel, which has its own paper’s number, at the poster room.• Each poster should include the paper title, authors, affiliation, and paper number and must fit within a 1.2m x 1.8m space.

• The poster text including the paper title should be printed and enlarged, so that it can be read from a distance of at least 2 meters.

• Poster presenters are required to prepare their own poster materials in advance and post their presentations by 11 a.m. to expose their poster to the attendees as much as possible.

• Please remove your poster within 1 hour after your session is ended. All remaining posters will be discarded. The materials such as some scissors and tapes will be provided in Poster Session Place.

Presentation Guideline

ISMP-EMAP 2019



CategoryPre-registration On-site Registration

Overseas Domestic Overseas Domestic

Regular USD 450 KRW 500,000 USD 500 KRW 550,000

Student USD 200 KRW 200,000 USD 250 KRW 250,000

* Additional Request for Students

For Students Overseas Domestic

Banquet ticket USD 40 KRW 44,000

* Notice• Regular: include access to the plenary lectures, invited lectures, oral sessions, a poster sessions, lunch and banquet

• Student: include access to the plenary lectures, invited lectures, oral sessions, a poster sessions and lunch

• Students can purchase additional banquet tickets on the registration page.

* Payment Method• Credit Card (VISA, MASTER, JCB, AMEX, Union Pay)• Bank Transfer

For Overseas

- Bank Name: Citibank Korea- Account Holder: The Korean Microelectronics and

Packaging Society- Account No.: 186-03701-246-01 - Swift Code: CITIKRSX- Bank Address: The Korea Science and Technology Center,

22, Teheran-ro 7-gil, Gangnam-gu, Seoul 06130, Korea

For Domestic- 은행명: 씨티은행- 계좌번호: 186-03701-246-01- 계좌명: (사)한국마이크로전자및패키징학회

* Cancellation Policy• Until October 30, 2019: 100% Refund (Exclusive of Banking Charges)• After October 30, 2019: No Refund

Registration

ISMP-EMAP 2019


Welcome Reception• Date: Wednesday, 13 November 2019 | PM 7:00~8:30• Venue: Kent Hotel by Kensington, 15F

229 Gwanganhaebyeon-ro, Gwangan-dong, Suyeong-gu, Busan

Opening Ceremony• Date: Thursday, 14 November 2019 | AM 11:10~11:20• Venue: Hotel Aqua Palace, 2F, Grand Ballroom

Banquet• Date: Thursday, 14 November 2019 | PM 6:30~9:00• Venue: Hotel Aqua Palace, 2F, Grand Ballroom

Yacht Tour• Date: Friday, 15 November 2019 | PM 8:00~9:00• Venue: Busan’s coastline• It may close early, so please contact the ISMP-EMAP2019 desk in advance to request a tour.• The tour may be canceled depending on the weather.

Social Events

ISMP-EMAP 2019



Hotel Aqua Palace, Busan, Korea

Location

• 225, Gwanganhaebyeon-ro, Suyeong-gu, Busan 48303 South Korea• Tel: +82-51-790-2300 | Fax: +82-51-790-2366

Transportation• By Subway: Gwangan Station, Line 2 > Exit No.5• By Bus:

- Gwangan Station | Station Number: 14-061- Gwanganli Beach Station | Station Number: 14-068- Airport Limousine Bus Stop | Gwangan Subway Station Exit No.3

Conference Venue Information

ISMP-EMAP 2019


Room Floor Session

Orion Room 3F

- A1. Solder and Bump 1- A2. Taiwan Session 1- A3. Flexible and LED Packaging- A4. Solder and Bump 2- C1. Advanced Packaging- C2. Young Scientists

Jupiter Room 3F- Poster Presentation Session I- Poster Presentation Session II

Venus Room 3F - EMAP Steering Committee Meeting

Grand Ballroom 2F

- Opening Ceremony- Plenary Talk 1, 2- Keynote Talk 1, 2, 3, 4- Banquet- Award Ceremony and Closing Remark (Lucky Draw)- B1. Heterogeneous Integration 1- B2. Heterogeneous Integration 2- B3. Wearable Electronics 1- B4. Wearable Electronics 2- D1. Electronic Materials- D2. Taiwan Session 2

Pearl Room 2F Lunch, Banquet(VIP)

Lobby 2F Registration

Conference Room Information

ISMP-EMAP 2019



Conference Room Information


ISMP-EMAP 2019


Sponsors

Gold Grade

Silver Grade

Lucky Draw

ISMP-EMAP 2019


November 13(Wed.)-15(Fri.), 2019, Hotel Aqua Palace, Busan, Korea 39The 18th International Symposium on Microelectronics and PackagingThe 21st Electronic Materials and Packaging(EMAP) Conference

MEMO

ISMP-EMAP 2019


MEMO


November 13(Wed.)-15(Fri.), 2019, Hotel Aqua Palace, Busan, Korea

ISMP-EMAP 2019ISMP-EMAP 2019

The Korean Microelectronics and Packaging Society (KMEPS)

ismp-emap 2019 · 2019. 11. 12. · ismp-emap 2019 2 the 18th international symposium on...

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