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Page 1: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 1

JEOL JBX-9300FS Electron Beam Lithography System

Training

Page 2: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 2

Course Outline•

Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check–

ALD & Exposure

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

Page 3: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 3

Why E-beam Lithography?

exceeds patterning capability of optical lithography–

easily pattern sub-micron features

MiRC has demonstrated 6.5nm features•

patterns rapidly created from CAD file–

no mask necessary like optical lithography

rapid turn around on design modifications, ideal for research

Presenter�
Presentation Notes�
You should not be using Ebeam Lithography to pattern primarily micron size features.�
Page 4: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 4

JBX-9300FS key features•

4nm diameter Gaussian spot electron beam

50kV/100kV accelerating voltage•

50pA –

100nA current range

50MHz scan speed•

+/-

100um vertical range automatic focus

+/-

2mm vertical range manual focus•

ZrO/W thermal field emission source

vector scan for beam deflection•

max 300mm (12") wafers with 9" of writing area

< 20nm line width writing at 100kV•

< 20nm field stitching accuracy at 100kV

< 25nm overlay accuracy at 100kV

Page 5: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 5

Generic Block DiagramGun Control

Blanking Control

Deflection Control

Electron Optics Control

Pattern Proc.and control

StageControl

Computer

x-interferometer

y-in

terfe

rom

eter

stage

stagemotor

stagemotor

Gun

Ele

ctro

n O

pics

referencemarks

Page 6: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 6

ColumnElectron gun

ZrO/W emitterSuppressor

First anode

Second anode

Acceleration electrodes

Ground anode

First alignment coil

Second alignment coil

Blanking electrode

Blanking aperture

Secondlens

Thirdlens

Zoom lensesDynamic focus correction electrode

Third alignment coil

Dynamic astigmatism correction electrode

Subsidiary deflector (SUBDEF)

Electromagnetism astigmatism correction electrodeMain deflector (PDEF)

Backscattered electron detector

Objective aperture

Objectivelens

Workpiece

surface

Page 7: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 7

Beam & Stage Position

Stage position accuracy = λ

/ 1024 = 0.62nm

Page 8: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 8

PDEF & SUBDEF

50

Page 9: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 9

Top View of Stage

Page 10: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 10

Side View

Page 11: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Stage w/o Cassette

cassette goes here

laser mirrors

Page 12: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 12

Wafer Cassette

Page 13: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 13

Field Stitching

500 µm (100kV)

500 µm(100kV)

Page 14: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 14

Within Field Writing

Vector scan

Page 15: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 15

4”

Wafer with Chips

2mm

2mm

Page 16: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 16

Example “Chip”

Chip

Field500um

500um

4um4um

Subfields

beamdiameter

shot pitch

Page 17: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Objective Aperture

larger aperture = larger beam diameter, more currentsmaller aperture = higher resolution

aperture

beam diameter min resolution

current range3,4,5

4 –

9nm < 20nm

50pA –

2nA6

8 –

14nm

30nm

2nA –

7nA7

30nm

60nm

10nA

Most of the time, the 9300 will be set to aperture #3 and 2nA beam current.

Page 18: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Beam diameter as a function of current & aperture

Page 19: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Dose Equation

AtID /)*(=whereD = dose (µC/cm2)I = current (A)t = time (sec)A = exposure area (cm2)

Page 20: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Job Time Estimate

IADt /)*(=if D = 200 µC/cm2

A = 1 cm2

I = 2nA

then

t = 27 hours 46 min

time calculator at http://nanolithography.gatech.edu/tcalc.php

Presenter�
Presentation Notes�
Ebeam lithography is very slow compared to optical lithography. Therefore you need to be careful about considering the amount of time it will take to expose your design.�
Page 21: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Shot Pitch

Shot pitch is equivalent to pixel value –

the smaller the shot pitch, the better the feature definition

Shot pitch is limited by scanning frequency of the SUBDEF (max = 50MHz)

Page 22: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Effect of Shot PitchEnergy deposited in resist

x

Consider a line is exposedwith 200uC/cm^2 dose. Dependingon the number of pixels thatthe line-width is divided into, the line edge roughness (LER)and line-width will vary.

The graph at right shows the cross-section of energydeposition profile of a line with1,2,4 and n pixels.

Page 23: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Minimum Shot Pitch Calculation

t = D.A/I•

A = area of pixel = a2

t = 1/fclk

where fclk

is the maximum scanning frequency of the amplifier

• a = √I/(fclk.D)

Page 24: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Faraday Cup

Page 25: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 25

Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check–

ALD & Exposure

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

Page 26: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 26

Stage

faraday cupAE, BE markSEM sample

Page 27: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 27

Absorbed Electron Detection

Page 28: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 28

INITAE

x -

scan y -

scan

ds/dx ds/dy

mark center position

y-scan

metal grid

x-scan

pn

junction

Page 29: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 29

Backscattered Electron Detection

Page 30: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 30

INITBE

x -

scan y -

scan

ds/dx ds/dy

Au cross on Si substrate

x-scan

y-scan

mark center position

Page 31: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 31

PDEFBE, SUBDEFBE, DISTBE mark detection

Page 32: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 32

PDEFBE & SUBDEFBE500 um

500 um

top

bottom

left right

482um

482um

4 um

4 um

1 2 3

54 6

7 8 9

PDEFBE4 points measured

x & y gain correctionx & y rotation correction

SUBDEFBE9 points measured

x & y gain correctionx & y rotation correction

gain

rotation

shift

Page 33: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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DISTBE Field Distortion Correction

Page 34: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Height Detection

Page 35: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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HEIMAP

measures height across wafer on defined array positions (adjustable by user)

takes average height and uses that for focus value for writing everywhere

appropriate for 100pA & 1nA current•

not appropriate for 10nA –

use virtual chip

mark height detection

Page 36: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 36

Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check–

ALD & Exposure

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

Page 37: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 37

Available Cassettes

Wafer–

75mm, 100mm, 150mm, 200mm diameter

300mm can be purchased for up to 9”

square writing area

Masks–

5”

mask, 6”

mask

Pieces–

minimum 3 x 5mm piece

Page 38: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 38

4”

Wafer Cassette

Page 39: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 39

Backside of Wafer Cassette

Page 40: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Global & Chip Mark Detection

Page 41: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 41

Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

Page 42: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 42

CAD file conversion

CADENCEfile

AutoCAD.DXF file linkCAD

GDSII file

JEOL01file JBXFILER JEOL52

v3.0 file

or

or

Page 43: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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SCHD execution

specifies1. JEOL52 v3.0 pattern file2. how to arrange on wafer3. shot modulation4. type of calibration 5. beam current

specifies1. wafer cassette window2. calibration file3. base dose4. job deck file(s) to use 5. shot pitch

Page 44: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Pattern Preparation

Page 45: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 45

JBXFILER Pattern Preparation

Page 46: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 46

Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

Page 47: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 47

Negative/Positive Resist

substrate

exposing e-beam exposing e-beam

NEGATIVE POSITIVE

select appropriate resist for process and to minimize writing time

Page 48: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 48

resist vs. dose curves

dose

resist thickness

positive negative

dose

resist thickness

lesssensitive

moresensitive

dose

resist thickness

lesscontrast

morecontrast

Page 49: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 49

Resists on hand at MiRC•

Positive resists–

ZEP520A+

good etch resistance+

fast+

good resolution (~ 10nm)-

expensive ($3/mL)

PMMA+

cheap ($1/mL)+

good for liftoff+

high resolution (< 10nm)-

poor etch resistance-

slow

Negative resist–

XR-1541 (HSQ)+

good etch resistance (HSQ is basically SiO2)

+

excellent resolution (6.5nm)

-

slow-

expensive ($4/mL)

ma-N 2403 (Novolak)+

good etch resistance+

optical DUV exposable+

faster than HSQ±

moderately priced ($2/mL)

-

poor adhesion to quartz

Page 50: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Resist Comparison

-0.2

0

0.2

0.4

0.6

0.8

1

1.2no

rmal

ized

resi

st th

ickn

ess

100 1000 800 600 500 400 300 200 2000 3000

dose (uC/cm2)

HSQPMMAZEP

resist200 480 1280

Page 51: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Metal Liftoff

evaporate metal ontopatterned resist

strip resist

Page 52: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 52

Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

Page 53: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

6/17/09, revision 11 53

Electron Solid Interactions

electrons forward scatter in resist (alpha)

electrons backscatter off substrate (beta)

Causes dose to spread away from where you want it to go, and expose areas you don’t want to be exposed

Page 54: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Forward Scattering (α)

as electrons enter resist, they experience small angle scattering, effectively broadening the initial beam diameter

forward scattering is minimized by using the thinnest possible resist and highest accelerating voltage

5.1)/(9.0 btf VRd =df

= effective beam diameter (nm)Rt

= resist thickness (nm)Vb

= acceleration voltage (kV)

Page 55: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Backscattering (β)•

as electrons pass thru resist and enter substrate, many will undergo large angle scattering events

these electrons may return back into the resist at a significant distance from the incident beam, causing additional resist exposure → this is called the proximity effect

Page 56: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Electron Solid Interaction

Source: SPIE Handbook of Microlithography, Section 2.3 Electron-Solid Interactions

Page 57: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Simulated Electron Energy Profile

Source: SPIE Handbook of Microlithography, Section 2.3 Electron-Solid Interactions

Page 58: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Alpha & Beta (for 0.5um resist on Si substrate)

Beam energy (keV)

α

(um) β

(um) η

5 1.33 [0.18] [0.74]10 0.39 [0.60] [0.74]20 0.12 2.0 0.7450 0.024 9.5 0.74100 0.007 31.2 0.74

backscattered electrons have large range at 100kV!!!

Page 59: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Influence of Proximity Effect on Pattern Generation

Page 60: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Line Edge Deviations due to Proximity Effect

Page 61: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Proximity Effect Correction by Dose Modulation

Page 62: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Proximity Effect Correction by Shape Modulation

original CAD pattern

simulated doseprofilecalculated shape

modification to achieve desired

line

Page 63: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Dose Dependencies

pattern size

pattern density

required dose

required dose

resist thickness required dose

acceleration voltage required dose

substrate AMU required dose

Page 64: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Example of Proximity Effectlarge exposed area next to small lines

causes overexposure

Page 65: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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How to correct in my CAD file?•

separate small features from large features by placing on different layers in AutoCAD

then assign a different datatype

to each layer in linkCAD

then assign different doses (shot modulation) to each datatype–

try a wide range of doses on your first exposure

use SEM image to make careful dimension measurements

adjust dose as necessary and repeat exposure

Page 66: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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Test Pattern

1000nm

500nm

200nm

100nm

50nm

20nm

10nm

2nm

50 x 50um

1 x line 2 x line 10 x line 10um 20um 30um 40um 50um

line width

space width(exception: 2nm line group has same spacing as 10nm line group)

3 x line 4 x line 5 x line

Page 67: JEOL JBX-9300FS Electron Beam Lithography System  · PDF fileElectron Beam Lithography System Training. 6/17/09, revision 11 2 ... global & chip mark alignment

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1um lines in ZEP at various pitch

0.9

0.95

1

1.05

1.1

1.15

1.2

1.25

1.3

line

wid

th (u

m)

100 200 300 400 500 600 700 800 900 1000 1100

actual dose (uC/cm2)

"1:01""1:02""1:03""1:04""1:05""1:10""1:20""1:30""1:40""1:50"

line:space ratio

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Required dose for 1um line in ZEP as a function of grating

0

1000

2000

3000

4000

50001u

m d

ose

(uC

/cm

2)

0 10 20 30 40 50 60

space/line ratio

1um dose (uC/cm2) = 98.318479 + 85.290888 space/line ratio

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Explain hardware–

column, lenses, amplifiers–

field, chip, subfield–

shot pitch, beam diameter–

D = (I * t)/A•

Calibration–

AE & BE marks–

INITAE, INITBE, PDEFBE, SUBDEFBE, DISTBE–

HEIMAP•

Substrate–

various cassettes–

global & chip mark alignment–

virtual chip mark height detection•

Pattern Preparation–

CAD file preparation–

linkCAD

conversion–

file transfer–

JBXFiler–

Job Deck & Schedule File–

Schd

and Array check

Resist Exposure & development–

positive & negative resists–

contrast–

liftoff, etching•

Proximity Effect•

Website

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6/17/09, revision 11 70

Website

•http://nanolithography.gatech.edu