VLSI Project

Aim :- To design 8-bit Ripple Carry Adder

Submitted by,

Abhishek P. Dabholkar

K00339249

Date of Submission :- 11/24/2015

Introduction :-

8 bit ripple carry adder basic design is as follows

To construct 8 bit RCA using CMOS logic I decided to buid this circuit using nand gate as show below

Magic layout for 8 bit RCA :-

SPICE output for 8 bit RCA in Square Wave representation so that all waves can get tested at a given

time, for different combinations

SPICE output for Avg. delay calculation

According to graph Avg. Delay is 40 ns.

According to Layout Area for 8 Bit RCA is

L * B = 170234 (lamda)^2 = 0.170234 µm2

SPICE output for Avg. Power calculation

Avg. Power = Vdd * I(max)

Which is 3.7mA * 3 V = 11.1 mW

Table demonstrating

1. Average delay 2. Layout area (size) 3. Average power

Average delay 40.1 ns Layout area (size) 0.170234 µm2

Average power 11.1 mW