January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

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KM3NeT CLBv2

January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

CLBv2-Proto StatusBefore proceeding to CLBv2-

Proto2…

CLBv2

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Timing Demo (SPEC-DIO / CLBv2)◦ White Rabbit 1 ns accurate◦ See also: http://pi1222.physik.uni-erlangen.de/Electronics/35

Ethernet Demo (Linux PC + Optical Network card / CLBv2)◦ Ping and basic UDP packet transfer (same as described in https://

docs.google.com/a/km3net.de/document/d/1m7cePSND1q4xHkX-Y96CDXsBKivap8j55cWaLbH7mjw/edit)

◦ aap

CLBv2_Proto DEMO (Yesterday)

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PPS PPS

January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

White Rabbit Switch

Near future: timing and Ethernet

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PPS PPS10MHz

PPS

Use switch as is:◦ no broadcast (yet)◦ Standard firmware/software

Timing Reference

Grand Master Mode

January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Determine clock stabilityUse a proper master clock

◦external PPS and 10 MHz reference 10 MHz Rubidium standard + KC705 as

PPS source “= divide by 10.000.000”◦SPEC in grand master mode◦Or WR Swtich-v3…

White Rabbit timing

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Sloppy first order measurement: time

between PPS(horizontal 20 ps/div)

January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Apart from the listing “KM3NeT_ELEC_2014_001_Doc-Prototype_design_changes_ELEC_draft”◦Just received a warning possible

reset issue with the CDCM61004 (GSI, Stefan Rauch; need to investigate further…)

Electrical issuesMechanical issues

Before proceeding to CLBv2-Proto2

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

1 Gbit flash issue BPI flash instead of SPI flash?

Determine timing margin Constraints 125 MHz + 10% = 140 MHz (P&R for XC160T-1 of current design

seems successful) Try Slow-Slew rate to suppress noise?

System test Readout of a complete assembled (½) DOM including PMT’s (needs integrated

firmware, embedded & DAQ software, shore station and rudimentary optical network)

Verify: Throughput Noise

Form a system test we also learn to setup a proper test procedure Write a test procedure document Write test software / Build test equipment

EMI We did our best to have a clock-enable on the Octopus boards to avoid noise

on the PMT bases. How noisy is the CLBv2? We don’t want to spoil the 24 bit Piezo ADC (a 144 DB signal/noise ratio!) This may lead to a mechanical issue (reversing component side of the PCB

and/or extra shielding)

Electrical Issues

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Apart from the listing “KM3NeT_ELEC_2014_001_Doc-Prototype_design_changes_ELEC_draft”

Holes around the FPGA to mount an industry standard heat sink? choose a proper heat-sink sort out the mechanical structure

Consider alternative SFP location solve fiber routing issue try the molex SFP flex rigid, later probably design custom SFP flex rigid to serve our

needs. Get rid of the RJ45 connectors (Piezo & Hydrophone)

Piezo is mounted on the octopus board so this is no longer needed on the CLBv2? Hydrophone only uses two signals “Clk” and “AES_OUT” plus power. Use a smaller

connector and remove RS485 (saves money, power and noise?). How does the hydrophone fit in mechanically anyhow?

EMI Verify readout of a complete assembled DOM including PMT’s (needs integrated

firmware, embedded & DAQ software, shore station and rudimentary optical network) Extra shieling needed?

Mechanical Issues

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Firmware integration (WRPC, IPMUX, LM32_2nd, State Machine, TDCs, Hydro, Multi-boot)

Embedded software (+ connection to WR embedded software)

Rudimentary optical network◦ one point to point link, 2 SFP’s◦ Note that the Molex SFP tail must be used since the SFP cage will

no longer be accessible once the DOM is assembled Rudimentary shore station (one WR switch V3) DAQ software As least 19 PMT’s and bases 1 Octopus large, 1 Octopus small Piezo, Hydrophone, Nano beacon, AHRS ½ DOM integration Test & learn!

Roadmap towards CLBv2-Proto2

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

There must be knowledge transfer from 7-Solutions to the collaboration.

To my opinion, the best way to do this is to repeated the 7-solutions work at different locations:1. All partners gain knowledge (including 7-

Solutions)2. We have multiple test sites

My first step towards this is to use a WR switch as is and later change firmware/software…

General remark

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Questions?Discussion…

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Backup SlidesMore details…

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January 28-30, 2014 KM3NeT, Electronics Workshop A‘dam

Peter JansweijerNikhefAmsterdamElectronics- Technology

Clocking

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Phase Compensated Clocks