lecture 9 mosfet i-v characteristics · 2020. 6. 12. · • mosfet in saturation (v ds≥v dssat):...
TRANSCRIPT
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Lecture 14
MOSFET I-V
CHARACTERISTICS
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Outline
1. MOSFET: cross-section, layout, symbols
2. Qualitative operation
3. I-V characteristics
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Key questions
• How can carrier inversion be exploited to make
a transistor?
• How does a MOSFET work?
• How does one construct a simple first-order
model for the current-voltage characteristics
of a MOSFET?
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1. MOSFET: layout, cross-
section, platform
Shallow
trench
isolation
(STI)
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Key elements:
• inversion layer under gate (depending on gate
voltage)
• heavily-doped regions reach underneath gate
=->inversion layer electrically connects source and
drain
• 4-terminal device: body voltage important
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Circuit symbols
Two complementary devices:
• n-channel device (n-MOSFET) on p-substrate
– uses electron inversion layer
• p-channel device (p-MOSFET) on n-substrate
– uses hole inversion layer
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Qualitative Operation
•Drain Current (Id: proportional to inversion charge and the
velocity that the charge travels from source to drain
•Velocity :proportional to electric field from drain to source
•Gate-Source Voltage (VGS controls amount of inversion charge
that carries the current
•Drain-Source Voltage (VDS: controls the electric field that
drifts the inversion charge from the source to drain
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Want to understand the relationship between the drain
current in the MOSFET as a function of gate-to-source
voltage and drain-to-source voltage.
Initially consider source tied up to body (substrate)
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Three regimes of operation:
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• MOSFET:
-VGS<VT, with VDS≥0
• Inversion Charge=0
• VDS drops across drain depletion region
• ID=0
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Linear or Triode regime:
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Electrons drift from source to drain →electrical current!
GS N D
DS y D
V Q I
V E I
DS GS TV V V
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Saturation Region VDS >VGS -VT
ID is independent of VDs: ID=Idsat
Electric field in channel cannot increase with VDs
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GD,GS T T DS GS TV V V V V V V
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Geometry of problem:
3. I-V Characteristics (Assume VSB=0)
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General expression of channel current
Current can only flow in the y-direction, Total channel flux:
Drain current is equal to minus channel current:
Rewrite in terms of voltage at channel location y, V (y):
• If electric field is not too high (velocity saturation doesn’t occur):
• For QN(y), use charge-control relation at location y:
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y N yI W Q y v y
D N yI W Q y v y
y n y n
dVv y E y
dy
N ox GS TQ y C V V y V
GS Tfor V V y V
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All together the drain current is given by:
Solve by separating variables:
Integrate along the channel in the linear regime subject the
boundary conditions :
Then:
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D n ox GS T
dV yI W C V V y V
dy
D y n ox GS TI d W C V V y V dV
0 0
DSVL
D n ox GS TI dy W C V V y V dV
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Resulting in:
For small VDS:
15
0
02
DSV
L
D D n ox GS T
VI y I L W C V V V
D n ox GS T DS
WI C V V V
L
DS GS Tfor V V V
2
DSD n ox GS T DS
VWI C V V V
L
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Key dependencies:
VDS↑→ ID↑ (higher lateral electric field)
VGS↑→ ID↑ (higher electron concentration)
L ↑→ID ↓ (lower lateral electric field)
W ↑→ID ↑ (wider conduction channel)
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This is the linear or triode region:
It is linear if VDS <<VGS - VT
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1. Equation only valid if VGS – V(y) ≥ VT at every y. Worst
point is y=L, where V(y) = VDS, hence, equation is valid if
Two important observations
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DS GS TV V V
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2. As VDS approaches VGS – VT, the rate of increase of
ID decreases.
As y increases down the channel, V(y) ↑, |QN(y)| ↓, and Ey(y)
↑ (fewer carriers moving faster)
inversion layer thins down from source to drain
Local ”channel overdrive” reduced closer to drain.
ID grows more slowly.
To understand why ID bends over, must understand first :
channel debiasing!
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N ox GS TQ y C V V y V
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Impact of VDS:
As VDS ↑, channel debiasing more prominent
=> ID rises more slowly with VDS20
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Key conclusions • The MOSFET is a field-effect transistor:
– the amount of charge in the inversion layer is controlled by the field-effect action of the gate
– the charge in the inversion layer is mobile ⇒ conduction possible between source and drain
• In the linear regime:
– VGS ↑⇒ ID ↑: more electrons in the channel
– VDS ↑⇒ ID ↑: stronger field pulling electrons out of the source
• Channel debiasing: inversion layer ”thins down” from source to drain ⇒ current saturation as VDS approaches:
21DSsat GS TV V V
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Drain current saturation
As VDS approaches
increase in Ey compensated by decrease in |QN|
⇒ ID saturates when |QN| equals 0 at drain end.
Value of drain saturation current:
22
DSsat GS TV V V
Dsat Dlin DS DSsat GS TI I V V V V
2DS GS T
DSDsat n ox GS T DS
V V V
VWI C V V V
L
21
2Dsat n ox GS T
WI C V V
L
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Transfer characteristics in
saturationOutput Characteristics
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What happens when VDS = VGS−VT ?
Charge control relation at drain end of channel:
No inversion layer at end of channel??!! ⇒ Pinchoff
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0n ox GS DS TQ L C V V V
c DSsat GS TV L V V V
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Key dependencies of IDsat
Drain current at pinchoff:
∝lateral electric field ∝VDSsat = VGS −VT
∝electron concentration ∝VGS−VT
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2
Dsat GS TI V V
1Dsat
y
IL
L E
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What happens when VDS > VGS−VT?
Depletion region separating pinchoff point and drain
widens (just like in reverse biased pn junction)
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To first order, ID does not increase past pinchoff:
To second order, electrical channel length affected
(“channel length modulation”):
VDS ↑⇒Lchannel↓⇒ID ↑
Experimental finding:
Hence:
2
2D Dsat n ox GS T
WI I C V V
L
1 11D
LI
L L L L
DS DSsatL V V
DS Dsat
LV V
L
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Improved model in saturation:
Also, experimental finding:
2
12
Dsat n ox GS T DS DSsat
WI C V V V V
L
1
L
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2. Backgate characteristics There is a fourth terminal in a MOSFET: the body.
What does the body do?
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Body contact allows application of bias to body with respect to
inversion layer, VBS .
Only interested in VBS<0 (pn diode in reverse bias).Interested in
effect on inversion layer⇒ examine for VGS >VT (keep VGS constant).
Application of VBS< 0 increases potential buildup across
semiconductor:
Depletion region must widen to produce required extra field:
2 2p p BSV
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Consequences of application of VBS< 0:
Application of VBS < 0 with constant VGS reduces
electron concentration in inversion layer ⇒VT ↑
max
2 2
since constant, unchanged
unchanged
unchanged
unchanged, but
inversion layer charge is reduced!
p p BS
B d
GS ox
ox
S G
S n B B n
V
Q x
V V
E
Q Q
Q Q Q Q Q
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How does VT change with VBS?
In VT formula change −2φp to −2φp −VBS:
In MOSFETs, interested in VT between gate and source:
Then:
And:
In the context of the MOSFET, VT is always defined in
terms of gate-to-source voltage.
1
2 2 2GB
T BS FB p BS s a p BS
ox
V V V V qN VC
GB GS
GB GS BS T T BSV V V V V V
GS GB
T T BSV V V
1
2 2 2GS
T BS FB p s a p BS T BS
ox
V V V qN V V VC
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Then :
Define backgate effect parameter [units: V1/2]:
Define Zero-bias threshold voltage
12 s a
ox
qNC
0To T BSV V V
2 2T BS To p BS pV V V V
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Key conclusions• MOSFET in saturation (VDS≥ VDSsat): pinchoff point at drain end
of channel
– electron concentration small, but
– electrons move very fast;
– pinchoff point does not represent a barrier to electron flow
• In saturation, ID saturates:
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•But due to channel length modulation, IDsat increases slightly
with VDS
•Application of back bias shifts VT (backgate effect)
2
2Dsat n ox GS T
WI C V V
L
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Example: MOSFET as a voltage controlled resistor
The circuit below shows an n-channel MOSFET that is used as
voltage-controlled resistor.
(a) Find the sheet resistance of the MOSFET over the range
VGS=1.5 V to VGS=4V using un= 215 cm2V-1S-1, Cox=2.3fF/um2
and Vtn =1 V.
Fig. an n-channel MOSFET used a voltage controlled resistor
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For a particular value of VGS, ID is a linear function of VDS and
the circuit model for the MOSFET is a resistor. Now we relate
R to the sheet resistance
1
D n ox GS Tn DS DS
WI C V V V V
L R
2 1 1 7 2
1 1/
as a function of is
1 1 20
1 1215 2.3 10 /
n ox GS Tnn ox GS Tn
GS
GS GS
LR R L W
W C V V WC V V
L
R V
k VR
V V V Vcm V s F cm
Note that for a gate-source voltage VGS>VTn+0.1V=1.1V, the
MOSFET operates in the triode region. Since the drain-source
voltage is small
SOLUTION
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The plot of sheet resistance as a
function of VGS with very small VDS
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(b) For a particular application, we need to control the resistor between 200 Ω
and 1 kΩ for VGS=1.5V to 4 V. How wide should the MOSFET be if the channel
length L=1.5 um?
Solution:
We already solved for the sheet resistance in part (a), so we can find the
range of sheet resistances for VGS=1.5V to 4V
Solving for (W/L) to obtain Rmin=200 Ω and Rmax=1 kΩ yields
(W/L)=33.3 is adopted so the width of the MOSFET should be
min max
20 206666.7 and 40
4 1 1.5 1
k V k VR R k
V V V V
min max
6666.7 4000033.3 and 40
200 1000
W W
L L
1.5 33.3 50W m m
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(c) Design the layout for
this MOS resistor so it
occupies a minimum area.
The length of the
source/drain diffusions is
Ldiff=6um with contact that
are 2um × 2um.
Solution:
Given the high ratio of
width to length (W/L=33.3),
it is desirable to fold the
MOSFET. Since the
diffusions are 6 um long,
the total length is
3 2
3 6um+2 1.5um=21um
T diffL L L
Fig (a) layout of folded n-channel MSOFET
(b) Equivalent schematic circuit
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Example: Measuring the backgate effect parameter
The test circuit below can be used to find an experimental value for the
backgate parameter γn. Note that a negative voltage VBS is applied from
the bulk to the source of the MOSFET. The circuit varies VGS
continuously from 0 to 5 V, for VBS=0 VBS=-5V. The drain-source voltage
is VDS=100mV.
(a) From the drain current measurements plotted below, find the backgate
effect parameter. The device parameters are un= 215 cm2V-1S-1,
Cox=2.3fF/um2 , Vt0 =1 V and Na=1017 cm-3.
Fig. circuit to find the
backgate effect parameter
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Solution:
Since the drain voltage is small, the MOSFET operates in its triode region
once VGS exceeds the threshold voltage. The drain current is linear with VGS
The threshold voltage is
From the graph, we have
D n ox GS Tn BS DS
WI C V V V V
L
2 2T BS To p BS pV V V V
1/22 1 0.84 5 0.84 0.67n nV V V V V V
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Homework 15
Consider an n-channel MOSFET with the following
parameters: un/Cox=0.18 mA/V2, W/L =8, and VT
=0.4 V. Determine the drain current ID for
(a) VGS =0.8 V, VDS = 0.2 V;
(b) VGS = 0.8 V, VDS = 1.2 V;
(c) VGS = 0.8 V, VDS = 2.5 V;
(d) VGS = 1.2 V, VDS = 2.5 V.