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  • KS30103 Microprocessor

    1

    INTRODUCTION TO PROGRAMMING

    Outcomes

    At the end of this chapter, you should be able to:

    1. Define software, programme, and programming languages

    2. Explain the classification of programming languages

    3. Describe the stages of a programme's development life cycle

    4. Describe the sequence, selection, and iteration programming constructs

    5. Design a simple program using flowchart

    Fundamentals

    Computers, in general, are divided into two parts: hardware and software. By definition, all

    physical components (CPU, memory, I/O ports etc) of the computer are collectively called the

    hardware. Software, on the other hand, refers to the instructions that tell the hardware what to

    do.

    Software

    Software refers to computer instructions or data or anything that can be stored electronically. It

    can be classified into systems software that includes the operating system and all the utilities

    that enable the computer to function. And applications software that includes programs that do

    real work for users. For example, word processors, spreadsheets, and database management

    systems fall under the category of applications software

    Program

    A program is an organised lists of instructions in a given programming language that, when

    executed, causes the computer to behave in a predetermined manner. An instruction is a

    computer command that tell the computer to perform an action.

    Programming Languages

    A programming language has a vocabulary and a set of grammatical rules for instructing a

    computer to perform specific tasks. The vocabulary is a set of unique keywords (words that it

    understands). While, the grammatical rules (syntax) specify how instructions are organised.

    Programming Languages Classifications

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    Programming languages, in general, can be classified into 4

    categories called generations. These generations reflect the

    historical development of programming languages. As can be

    seen in figure 1.1 below, the first level of software above the

    hardware is machine code (first generation). The second level

    (second generation) is assembly language. While, the third

    and fourth levels are high-level (third generation) and object-

    oriented (fourth generation) respectively.

    First Generation (Machine Code)

    Machine code is the lowest-level programming language and is the only languages understood

    by computers. Machine language instructions are written in binary or hexadecimal numbers.

    This makes it easily understood by computers but almost impossible for humans to understand

    and use. Every CPU has its own unique machine language and thus, machine language are

    called machine-dependent which means a program written for a given CPU can only runs on

    that CPU.

    Second Generation (Assembly Language)

    Assembly language is the next level above machine code. It has the same structure and set of

    commands as machine language, but it allows a programmer to use names (mnemonics)

    instead of numbers to write instructions. Each type of CPU has its own machine language and

    assembly language, so an assembly language program written for one type of CPU won't run on

    another. Thus, assembly language is machine-dependent.

    In the early days of programming, all programs were written in assembly language. Now, most

    programs are written in a high-level language. Programmers, however, still use assembly

    language when speed is essential or when they need to perform an operation that isn't possible

    in a high-level language. Assembly language programs need to be translated to machine code

    before they can be executed (run) by the CPU. An assembler (translator program) is used to

    translate assembly language programs into machine language

    Third Generation (High-Level Language)

    Machine code and assembly language are called low-level programming languages because

    each instruction corresponds to one CPU action. High-level languages, on the other hand, allow

    programmers to write powerful instruction that may generate many CPU actions. In addition,

    high-level languages enable a programmer to write programs that are more or less independent

    of a particular type of computer. Thus, high-level languages are called machine-independent.

    Hardware

    Machine code

    Assembly Language

    High-Level Language

    Fourth Generation

    Figure 1.1

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    The main advantage of high-level languages over low-level languages is that they are easier to

    read, write, and maintain. Programs written in a high-level language must be translated into

    machine language by a compiler or interpreter.

    Fourth Generation (Object-Oriented, Query Language)

    Fourth-generation languages, often-abbreviated 4GL, are programming languages closer to

    human languages than typical high-level programming languages. Most 4GLs are used to access

    databases.

    Program Development Life Cycle

    The phases a software product goes through

    between when it is conceived and when it is

    no longer available for use is called the

    software life cycle. The software life cycle

    typically includes the following stages:

    Requirements Analysis, Design, Coding,

    Testing (validation) and Debugging,

    Implementation, Operational Maintenance,

    and Retirement. The development process

    tends to run iteratively through these phases

    rather than linearly as shown in figure 1.2

    below. Although all the stages given in

    figure 1.2 are important, only those stages

    that are very critical for developing assembly

    language programs are briefly described

    below.

    Design Stage

    The design stage involves expressing the

    solution to the problem in a standard format.

    There are several design tools (pseudo-

    languages) that can be used by programmer. The most common design tool used by assembly

    language programmer is flowchart. While, pseudocode is a common design tool used by third

    and fourth generation programmers. These common design tools are briefly described below:

    Flowchart

    Requirement Analysis

    Design

    Coding

    Testing

    Logical

    Errors?

    Implementation

    Maintenance

    Retirement

    No

    Yes

    Figure 1.2

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    Flowchart is a graphical representation of the program logic. It is one of the oldest methods of

    program design. Flowchart uses graphical shapes to represents different actions that the

    computer will perform. Arrows that indicate the flow of control connect these shapes. Figure

    1.3 shows the common flowchart symbols.

    Pseudocode

    Pseudocode is a notation resembling a programming language but not intended for actual

    compilation. It usually combines some of the structure of a programming language with an

    informal natural-language description of the computations to be carried out. It is often

    produced by CASE systems as a basis for later hand coding.

    Coding

    A written computer instruction is called a code and the process of writing codes is called coding.

    The code written by programmers is called source code. The programmer then uses a compiler

    to compile the source code to produce what is called an object code. The object code is then

    converted to a program that is ready to run which is called executable code or machine code.

    Debugging

    A bug is an error or defect in software or hardware that causes a program to malfunction. The

    process of detecting and removing bugs is called debugging. This process is an iterative process

    that is carried out every time an error is detected by the testing stage. Thus, the debugging

    stage may involve going back through the analysis, design, coding, and testing stages.

    Program Constructs

    A program can be written using only few constructs (building blocks). These constructs are:

    1. Sequence

    2. Selection

    3. Iteration

    PROCESS

    PROCEDUR

    E

    DECISIO

    N

    INPUT

    / OUTPUT

    TERMINATION CONNECTOR

    OFF-PAGE

    CONNECTOR

    DIRECTION OF

    CONTROL FLOW

    START/END

    Figure 1.3

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    Sequence

    The simplest construct is the sequence. In a sequence, all the statements are executed one

    after another in the same order they are found in the program. The diagram below shows a

    sequence in flowchart and pseudocode

    STATEMENT 1

    STATEMENT 2

    a) Flowchart

    STATEMENT 1

    STATEMENT 2

    b) PseudocodeSalary = gross-

    deduction

    deduction = epf

    +income-tax

    deduction = epf

    +income-tax

    Salary = gross-

    deduction

    Selection

    There are two constructs that perform selection:

    The IF construct.

    The CASE construct

    The IF Construct

    This construct has two forms: IF THEN ELSE and IF

    THEN . The condition is evaluated. If the condition evaluates to

    logical True then the is executed and the is skipped. If the

    condition evaluates to logical False then the is executed and the

    is skipped. The diagram below shows an example.

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    IF Conditon THEN

    True Action

    ELSE

    False Action

    ENDIF

    IF Conditon THEN

    True Action

    ENDIF

    IF.THEN.ELSE

    True Action

    Decision

    True?

    Yes

    No

    True Action False Action

    Decision

    True?

    NoYes

    IF.THEN

    a) Flowchart

    b) Pseudocode

    The Case Construct

    The case construct can be thought of as a group of nested if constructs. In this construct,

    several conditions are evaluated. If condition1 evaluates to true then action1 is executed and all

    other actions are skipped. If, however, condition2 is true then action2 is executed and all other

    actions are skipped. This process continues until all conditions are evaluated. If no condition

    evaluates to true then the false action (if there is one) is executed. Like the IF construct, only

    one action or no action in the case construct will be executed.

    a) Flowchart

    Action 1

    Select Case Expression

    Case 1 Case 2 Case n

    ..Action 2 Action n

    Select Case

    Case 1

    Do action 1

    Case 2

    Do action 2

    ..

    Case N

    Do action N

    [Otherwise

    Do falseaction]

    Endcase

    c) Pseudocode

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    Iteration

    There are basically two types of Iterations: the While Loop and the Repeat until loop

    The While Loop

    A condition is evaluated at the beginning of the loop. If the condition is true, all the statements

    in the loop are executed and the condition is evaluated again. These processes continue until

    the condition evaluates to false.

    THE REPEAT-UNTIL LOOP

    All the statements in this loop are executed before the condition placed at the end of the loop is

    evaluated. If it evaluates to true the loop is terminated. However, if it evaluates to false, the

    statements are executed again until the condition is true.

    Is Condition

    True?

    Body of the Loop

    No

    Yes

    Is Condition

    True?

    Body of the Loop

    No

    Yes

    Figure

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    Example.

    The program below reads a set of numbers and counts how many odd and even numbers exist

    in the set. As it can be seen, the flowchart is made of a single while loop that checks if there

    are more numbers in the set. If yes, then a number is read from the set. Within the While

    construct there is an IF construct. If the number is odd the odd number counter is incremented

    by 1 else the even number counter is incremented by 1. This process continues until no more

    numbers in the set. A procedure displays the results before the program is terminated.

    Self-Test Questions

    1) Computers, in general, are divided into: a) Hardware and programs b) Hardware and software

    2) A programming language has: a) Keywords b) Syntax c) All of the above

    3) Programming languages are classified into: a) 3 generations b) 4 generations c) 5 generations d) None of the above

    Start

    More number

    ?

    Increment Odd Number Counter

    Print Result

    End Is Number odd?

    Increment Even Number Counter

    Read a Number

    No

    No

    Yes

    Yes

  • KS30103 Microprocessor

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    4) The common design tools are: a) Flowchart and coding b) Pseudocode and chart c) Pseudocode and flowchart

    5) The common programme constructs are: a) Sequence, IF, and Loop b) If, While loop, and Repeat loop c) Sequence, Selection, and Iteration d) None of the above

    6) In a While loop, the condition that control the execution of the loop is placed at: a) The beginning of the loop b) The end of the loop c) Anywhere in the loop

    Review Questions

    1) Define Software

    2) Define Program

    3) Define Programming Languages

    4) Describe 2nd generation programming languages

    5) List the stages in the programme development life cycle

    6) Describe the flowchart symbols given in figure 3.3

    7) Draw a flowchart for the program whose pseudocode is given below

    Input age

    If age > 21 then

    Display "You are eligible to vote"

    Else

    Display " Sorry! You are under-age"

    Endif

    8) Draw a flowchart for a program that displays the odd number from 1 to 9

    9) A program that perform the following tasks:

    a) Accept a long sentence

    b) Convert it to upper case

    c) Display the result on the screen

    You are required to:

    Design this program using flowchart and pseudocode

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    INTRODUCTION TO ASSEMBLY LANGUAGE PROGRAMMING

    Outcomes

    1. Explain the basic structure of an assembly language programme

    2. List and explain the tools required for assembly language programming

    3. Describe the steps in creating assembly language programmes

    Fundamentals

    The Structure of an Assembly Language Program

    An assembly program contains:

    1. Statements or instructions that the programmer wants them executed by the

    microprocessor. Each statement may have up to 4 fields

    2. Directives to the Assembler (translator program) that informs the assembler how to

    assemble (translate) the program

    3. Remarks that explains the working of the program to other programmers. These remarks

    are optional and will be ignored by the assembler.

    Assembly Language Programs Statements

    An assembly language statement may have up to 4 fields as shown in example 2.1. The first

    field (new:) is the label field. It is used for flow control of the program. A colon (:) must

    terminate the label field. This field is not required unless the programmer wants to refer to that

    line somewhere in the program. The next field is the operation code (Add), which must be a

    valid operation code for the given microprocessor. The operation codes are given by the

    microprocessor manufacturer and are called the instructions set. The operation code tells the

    microprocessor what action to perform. This field is required unless that line of the program is a

    remark line.

    The third field is the operand field (AX,5H). This contains the data on which the operation will

    be performed. The type and the number of operands depend on the operation code, as some

    may required no operand, one, or two operands. If more than one operand is required they

  • KS30103 Microprocessor

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    must separated by commas. The last field is the remark field (; Add percentage). This may

    contains anything as it is intended for the programmer and not the computer. The objectives of

    the remark field are to aid the readability of the program; help the programmer understands

    the program and thus improve maintainability. The comment field starts with a semicolon (;).

    This field is not compulsory but recommended.

    Example 2.1

    New: Add AX,5H ; Add percentage

    Mov dx,ax

    Jmp new

    Field

    No

    Contents Comment

    1 Label field Used for reference in program execution control

    Must be a single word

    Must be terminated by a colon (: )

    Optional i.e. not compulsory

    2 Operation

    Code

    A mnemonic taken from the microprocessor

    instructions set

    Compulsory except for empty lines

    3 Operand Depends on the operation code

    Not all operation code requires an operand

    Can be a constant or a variable

    4 Comment Must start with a semicolon (;)

    Used to explain the statement line

    Optional

  • KS30103 Microprocessor

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    Assembler Directives

    Assembler directives are pseudo-operations that control the assembly process but they do not

    generates any instructions in the assembled program. They merely instruct the assembler on

    how to process the assembly programs and as such they are specific to each particular

    assembler. Some common uses of assembler directives are: -

    To declare variables (reserve memory space to store data),

    To define segment, and

    To define procedures (subroutines)

    Assembly Language Programming Tools

    To be able to effectively develop assembly programs, the following tools are needed:

    Text Editor

    A text editor is a program that allows you to create a file containing the assembly programs

    (source code). Some of the operations that you can perform with a text: -

    1. Type the assembly program

    2. Correct any typing error in the program

    3. Insert new statements or delete unwanted ones

    4. Save the program on magnetic medium for later uses

    ; Exp2_1.asm ; display a message on the screen .MODEL SMALL .STACK 200h .DATA Prompt db 13,10,"This is the message $" .CODE .startup mov ax, seg prompt ;moves the segment of data into ax mov ds,ax mov ah,9 mov dx,offset Prompt int 21h ;print the message .exit end

    Figure 2.1 An Example of an Assembly Language Program

  • KS30103 Microprocessor

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    5. Rearrange the order of the statements by moving them from one place in the program to

    another

    6. Copy part of the program and insert it in another part of the program or in another program

    7. Some text editors may have more advanced facilities like find and replace, etc.

    Assembler

    The assembler is a program that translates assembly language statements into machine code

    instructions that can be executed by the microprocessor. The assembler takes the source code

    as input and will produces an object file containing the machine code instructions if the

    assembler did not detect any syntax error during the assembly process. Other optional files may

    be generated depending on the assembler in use. If the assembler detects any error during the

    assembly process only a list file containing the assembly instructions, the error code, and an

    error message for each error encountered will be produced.

    Hand written

    Assembly

    Program

    Manual

    Input

    Text

    Editor

    Source

    Code

    Source

    Code

    Figure 2.2

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    14

    LINKER

    A linker is a program that links several object files into an executable file (a program) that can

    be executed. The output of the linker is an executable file if no error encountered during the

    linking process. If any error encountered the linking process is halted and an error message

    describing the error is displayed

    Creating Assembly Programs

    To create an assembly program, follow the steps below:

    1. Design your program using any of the design tools mentioned earlier

    2. Use a text editor or a word processor that can produce text file to type the assembly

    language programs

    3. Save the program (as a DOS text file) on a disk

    4. Assemble the program to check for syntax errors

    Linker Object Code

    Figure 2.4

    Executable Code

    Library Files

    Assembler Source Code

    Figure 2.3

    Syntax Errors?

    Source code Listing + error messages

    Object Code

    Source code Listing

  • KS30103 Microprocessor

    15

    5. If the program assembles properly, Link the program to produce an executable file

    6. Run the executable file

    Self-Test Questions

    1) An assembly program may contain

    a) Assembly language instructions

    b) Assembler directives

    c) Comments

    d) All the above

    2) An assembly language statement may have up to ______ fields

    3) Assembler directives can be used to:

    a) Declare variables

    b) Define segments

    c) Define procedures

    d) All the above

    4) The input file to an assembler is called

    a) Source code

    b) Object code

    c) Executable code

    Review Questions

    1) Describe the structure of an assembly language program

    2) Describe the structure of an assembly language statement

  • KS30103 Microprocessor

    16

    ARCHITECTURE OF THE 80386 MICROPROCESSORS

    Outcomes

    1. Describe the RISC and CISC microprocessor architectures

    2. Highlight the major events in the history of microprocessor

    3. Give an overview of the software view of the 80386 microprocessor

    4. Describe the functions of the 80386 registers

    5. Describe the usage of the 80386 flags

    The Architecture of a Microprocessor

    A central processing unit (CPU) on a single integrated circuit is often called a microprocessor.

    The CPU is divided into several smaller units such as the Arithmetic and Logic Unit (ALU), the

    decoding unit, etc. Each of these units is designed to perform specific function such as

    arithmetic and logic operations performed by the (ALU).

    Architecture

    The architecture of a microprocessor refers to its internal design. Microprocessors can be

    classified according to their architecture as either Reduced Instruction Set Computing (RISC) or

    Complex Instruction Set Computing (CISC). However, microprocessors can also be classified

    according to the type of applications they are used for to two main categories general-purpose

    and special-purpose. General-purpose microprocessors are used in computers while special-

    purpose ones are used in embedded systems.

    Reduced Instruction Set Computing

    A processor whose design is based on the rapid execution of a sequence of simple instructions

    rather than on the provision of a large variety of complex instructions is called a RISC processor

    Features that are generally found in RISC designs are:

    Uniform instruction encoding which allows faster decoding

    A homogenous register set, allowing any register to be used in any context and simplifying

    compiler design

    Simple addressing modes with more complex modes replaced by sequences of simple

    arithmetic instructions.

    Examples of RISC processors are the Berkeley RISC, HP-PA, Clipper, i960, AMD 29000, RISC

    System 6000 and SP/2 lines

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    17

    Complex Instruction Set Computing

    A processor where each instruction can perform several low-level operations such as memory

    access, arithmetic operations or address calculations is called a CISC processor. The aim of this

    design is to bridge the "semantic gap". Thus, to design instruction sets to support high-level

    languages by providing "high-level" instructions such as procedure call and return, loop

    instructions such as "decrement and branch if non-zero" and complex addressing modes to

    allow data structure and array accesses to be compiled into single instructions. While these

    architectures achieved their aim of allowing high-level language constructs to be expressed in

    fewer instructions, it was observed that they did not always result in improved performance.

    Examples of CISC processors are the Motorola 680x0 family and the Intel 80186 through Intel

    486 and Pentium.

    Embedded Systems

    An embedded system is a system in which the microprocessor performs a dedicated task. A

    typical embedded system consists of a single-board microcomputer with software in ROM,

    which starts running some special purpose application program as soon as it is turned on and

    will not stop until it is turned off. An embedded system may include some kind of operating

    system but often it will be simple enough to be written as a single program. It will not usually

    have any of the normal peripherals such as a keyboard, monitor, serial connections, mass

    storage, etc. or any kind of user interface software unless these are required by the overall

    system of which it is a part. Often it must provide real-time response.

    Embedded systems can be classified as either event controller or data controller. Event

    controller as often called Microcontroller such as the Intel 8051 while data controller are called

    embedded microprocessor such as the 80386EX. The control of an air condition unit is an

    example of event control. The Microcontroller is used primarily to detect the temperature and to

    switch the air condition unit on and off. The hard-disk controller however, is an example of data

    control because the primary function of the microprocessor is to transfer as fast as possible

    data between the hard disk and the computer memory.

    The History of Microprocessors

    Microprocessors have evolved very fast during the introduction of the first microprocessor in

    1971 by Intel. A brief history of the evolution of the microprocessor is given in the table below

    Year Microprocessor Family Remarks

    1971 Intel 4004 and 4040 4-bit address up 4k*4 memory has only 45 instructions speed of 50 KIPs (Kilo Instructions per

    second)

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    1972 Intel 8008 8-bit address up 16k*8 memory has only 48 instructions can manipulate data and characters

    1974 Intel 8080 Motorola MC6800, Zilog Z80

    8-bit address up 64k*8 memory has only 48 instructions 10 times faster than the 8008

    1977 Intel 8085 8-bit An updated version and slightly faster than the 8080

    has 246 instructions

    1978 Intel 8086, Motorola 68000

    16-bit address up 1M*8 memory has 20,000 instructions

    speed of 2.5MIPs (Million Instructions per second)

    has an instruction cache or queue

    1983 Intel 80286 16-bit address up 16M*8 memory has a few additional instructions than

    the 8086 speed of 4.0 MIPs (Million Instructions

    per second)

    1986 Intel 80386, Motorola 68020

    32-bit address up 4G*8 memory

    clock speed of 16 to 33 MHz

    1989 Intel 80486 32-bit address up to 4G*8 memory clock speed of 25 to 100 MHz has an 8K internal cache speed of up to 50 MIPs

    1993 Intel Pentium, PowerPC

    64-bit address up to 4G*8 memory clock speed of 60 to 166 MHz has an 16K internal cache speed of up to 110 MIPs

    1997 Intel Pentium II 64-bit address up to 64 Gigabytes Clock speed from 233 to 450 MHz Has two levels caches 512K level 2 and

    32K level 1

    Bus speed of 66 and 100 MHz

    1999 Intel Pentium III 64-bit address up to 64 Gigabytes Clock speed from 450 to 550 MHz Has two levels caches 512K level 2 and

    32K level 1 Bus speed of 100 MHz 70 new instructions

    The Software View of the 80386 Microprocessor

    The 80386 Microprocessor Family

    The 80386 family contains several microprocessors to satisfy the needs of different types of

    users. The most common family members are the 80386DX and the 80386SX. Table 3.2 below

    gives a brief description of some of the features of both DX and SX versions of the 80386. Both

  • KS30103 Microprocessor

    19

    the SX and the DX versions of the 80386 can operate in either real mode or protected mode. In

    the real mode the 80386 microprocessor operates like a powerful 80286 (16-bit microprocessor)

    and thus can address only 1 MB of memory. In the protected mode the 80386 can access the

    entire memory space. In this book only the real mode will be discussed.

    Real Mode Model

    To enable a programmer to write assembly programs for the 80386 family of microprocessors,

    a software model of the internal architecture of the microprocessor is needed. Figure 2.1 shows

    software view of the real mode model of the 80386 microprocessor. In this model, it can be

    seen that all the registers that are available in the 80286 are available in the 80386 real mode

    for upward compatibility.

    Registers

    The 80386 microprocessor has a large number of registers as can be seen in figure 3.1. We can

    broadly classify these into two groups: General-purpose registers, and Special purpose registers

    GENERAL PURPOSE REGISTERS

    The general-purpose registers can also be divided into two groups: Data registers, and index

    and pointers registers.

    80386 DX 80386 SX

    32-bit data bus

    32-bit address bus

    132 pin package

    can address up to 4 Gigabyte

    32 bit data transfer

    16-bit data bus

    24-bit address bus

    100 pin package

    can address up to 16 megabyte

    16 bit data transfer

    Table 3. 2

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    CS

    DS

    SS

    ES

    FS

    GS

    0 15 31

    Segment

    Register

    EAX

    AX

    AL AH

    BL BH

    CL CH

    DL DH

    AX

    BX

    CX

    DX

    EAX

    EBX

    ECX

    EDX

    SP ESP

    BP EBP

    SI ESI

    DI EDI

    IP

    Flags

    CR0

    Figure 3.1

  • KS30103 Microprocessor

    21

    Data Registers

    There are 4 data registers that can be used to store temporary data during execution of

    program instructions. They can be used as destination or source for any data movement

    instruction. These register can be used as 8-bit (for example AL or AH) so that programs

    written on Intel 8-bit microprocessor can be executed on the 80386 in real mode. They can also

    be used as 16-bit (for example AX) to allow 80286 codes to run by the 80386. These registers

    also allow 32-bit operations (for example EAX).

    Although, these registers are called general purpose, there are certain operations that only

    possible on a given register. Table 3.2 below lists the 4 general-purpose data registers and the

    operations specific to each of them.

    REGISTER

    NAME

    ABBREVIATION USAGE

    8 8 16 32

    Accumulator AL AH AX EAX Arithmetic operations like addition, subtraction,

    division and multiplication, data conversion

    between byte, word, double word, and

    quadruple word. Input/output operations and

    memory addressing

    Base Index BL BH BX EBX Memory addressing

    Count CL CH CX ECX Looping and repeating string operations,

    reading and writing data to disk files

    Data DL DH DX EDX Input/output operations with external devices,

    multiplication and division operations (in

    conjunction with accumulator), and string

    operations

    Table 3.2

    Index and Pointer Registers

    The 4 registers in this group can be used either as 16-bit or 32-bit registers. These registers are

    used to hold the offset of the address of the data held in memory. The other part of the

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    22

    address, the segment address, is normally held by a segment registers. Table 3.3 list the name

    and abbreviation of these registers.

    Register Name Abbreviation Usage

    16 32

    Base Pointer BP EBP Used to hold the offset address of the stack

    as well as the memory

    Destination

    Index

    DI EDI Used to hold the offset address of a

    destination operand

    Source Index SI ESI Used to hold the offset address of a source

    operand

    Stack Pointer SP ESP Used to hold the offset address of the stack

    Table 3.3

    SPECIAL PURPOSE REGISTERS

    The 80386 microprocessor has 4 types of special purpose registers. These are the Segment

    registers, the Flags register, Instruction Pointer, and Control registers.

    The Segment Registers

    The six segment registers are 16 bits wide. Each segment register holds the base memory

    address for a 64K-memory segment. Table 3.4 below briefly describes the usage of the

    segment registers.

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    REGISTER NAME ABBREVIATION USAGE

    Stack Segment SS Holds the Base address of the stack

    memory

    Code Segment CS Holds the Base address of the code

    memory

    Data Segment DS Holds the Base address of the data

    memory

    Extra Segment ES Holds the Base address of the extra

    memory

    Additional Segments GS and FS Hold the Base address for two

    additional segments of memory

    Table 3.4

    The Flags

    The 80386 microprocessor has a 32-bit flag register (EFLAGS). However, in real-mode only the

    first nine bits are used. These are the same as those for the 80286 microprocessor. The first six

    are called status flags because their states (set or reset) change as a result of executing certain

    instructions. The last three flags are control flags used to control the operations of the 80386

    microprocessor. The name and usage of these status flags are summarised in table 3.5 below

    NAME ABBREVIATION USAGE

    Carry C This flag is set (1) if there is a carryout or a borrow-

    from the most significant bit of an arithmetic

    instruction such as Add. Otherwise, it is reset (0)

    Parity P If the result of an instruction has an even number of

    1's (even Parity) then this flag is set. Otherwise, it is

    reset

    Auxiliary

    Carry

    A This flag is set if there is a carryout from the low

    nibble to the high nibble or a borrow-from the high

    nibble to the low nibble during BCD addition and

    subtraction. Otherwise, it is reset

    Zero Z This flag is set if the result of an instruction is 0

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    otherwise, it is reset

    Sign S This flag is set if the result of logic or an arithmetic

    operation is negative. Otherwise, it is reset.

    Overflow O This flag is set when an overflow occurs during signed

    number arithmetic

    Trap T Used to enable trapping errors during program

    debugging. If this flag is set, the single-step mode of

    the 80386 is enabled

    Interrupt I If set to 1 interrupt is enabled otherwise interrupt is

    disabled

    Direction D If set to 1 the DI and SI registers are automatically

    decremented otherwise they are automatically

    incremented

    Table 3.5

    The Instruction Pointer

    The instruction pointer (IP) is a 16-bit register. This register is used with the code segment

    register (CS) to hold the address of the next instruction to be fetched from the code segment of

    the memory.

    Control Register

    Although, the 80386 microprocessor has several control registers, only one of them control

    register zero is active in real-mode. The five least-significant digits are called the machine

    status word (MSW). In real-mode, only bit 0 of the control register zero is active. This bit is

    called the protection enable and is used to switch between real-mode and protected-mode.

    Self-Test Questions

    1. Microprocessors are classified according to their architecture as:

    a. General-purpose, and special-purpose

    b. Complex instruction set computing, and reduced instruction set computing

    2. The 80386EX is an example of event controller?

    a. True

    b. False

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    3. RISC microprocessors decode instructions faster than CISC microprocessor of the same

    class?

    a. True

    b. False

    4) The registers of the 80386 microprocessor can be classified into:

    a) General-purpose and special-purpose

    b) General-purpose, data, index and pointer registers

    c) Special-purpose, data, index and pointer registers

    d) None of the above

    5) The number of data registers in the 80386DX microprocessor is?

    a) 6

    b) 4

    c) 8

    6) The data registers in the 80386 microprocessor allows:

    a) 8-bit access

    b) 16-bit access

    c) 32-bit access

    d) All the above

    7) Which of the following operations can be performed on the accumulator?

    a) Arithmetic operation

    b) Input/output operation

    c) Data conversion

    d) All the above

    8) The number of index registers in the 80386DX microprocessor is?

    a) 6

    b) 4

    c) 2

    d) None of the above

    9) Which two of the index and pointer registers can be used to hold the offset for the stack

    segment?

    a) SP and SI

    b) BP and DI

    c) SP and BP

    d) All the above

    10) The special-purpose registers of the 80386 microprocessor are:

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    a) Segment registers, Instruction pointer, and Control register

    b) Segment registers, Flags register, Instruction pointer, and Control register

    c) Segment registers and Flags register

    Review Questions

    1. Contrast the RISC and CISC microprocessor architectures

    2. Highlight the main features of Intel 32-bits microprocessors

    3. List the 4 data registers and briefly explain their usage

    4. List the 4 index and pointer registers and briefly explain their usage

    5. List the 6 segment registers and briefly explain their usage

    6. Explain the usage of the Carry flag

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    DATA STORAGE AND MOVEMENT

    Objectives

    1. Show how numeric data are represented in computers

    2. Show how alphanumeric data (Characters) are represented in computers

    Data Representation within a Computer

    Data can be classified into numeric and alphanumeric. The decimal digits from 0 to 9 are called

    numeric data because arithmetic operations can be performed on them. Alphanumeric data, on

    the other hand, comprises alphabets, numbers, and symbols.

    Alphanumeric Data

    The most common way to represent alphanumeric data is the ASCII code. The ASCII is an

    acronym of American Standard Code for Information Interchange. This code assigns the letters

    of the alphabet, decimal digits from 0 to 9 and some additional symbols a binary number of 7

    bits, putting the 8th bit in its off state or 0. This way each letter, digit or special character

    occupies one byte in the computer memory.

    In most microcomputer, placing a 1 in the most significant bit uses an extended ASCII

    character set. The extended ASCII is used to represent foreign letters, Greek and mathematical

    symbols as well as box drawing and other special characters. Table 4.1 below shows the ASCII

    code. Notice that the codes from 0H to 1FH (Grey background) are called control codes and are

    used to control the operation of the computer. The control codes are non-printable. Only 4 of

    the control codes are shown here.

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    MSB 0 1 2 3 4 5 6 7

    LSB 0 SP 0 @ P ' P

    1 ! 1 A Q a q

    2 " 2 B R b r

    3 # 3 C S c s

    4 $ 4 D T d t

    5 % 5 E U e u

    6 & 6 F V f v

    7 BEL ' 7 G W g w

    8 ( 8 H X h x

    9 ) 9 I Y i y

    A LF * : J Z j z

    B ESC + ; K [ k

    C , < L \ l |

    D CR _ = M ] m

    E . > N ^ n ~

    F / ? O - o DEL

    Table 4.1

    Numeric Data

    Numeric data can be classified as either integer or real. Integer numbers are whole number

    with no decimal point, while real numbers have decimal point. The 80386 can only perform

    arithmetic operations on integers and therefore, only the representation of integers in computer

    will be discussed here.

    Integers can be represented in the computer as pure binary digits or as a binary coded decimal

    (BCD).

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    BCD Method

    BCD is an acronym for Binary Coded Decimal. In BCD a group of 4 bits are used to represent

    each decimal digit from 0 to 9. Data in BCD can be stored either as packed BCD or as unpacked

    BCD. In packed BCD, each nibble of a byte represents one decimal digit. Thus, we can store

    two digits per byte of information. While, in unpacked BCD, the upper nibble is set to 0 and the

    lower nibble is used to store the decimal digit. Thus, we can only store one digit per byte of

    information. Table 4.2 below shows how integers are stored as packed and unpacked BCD.

    DECIMAL PACKED UNPACKED

    25 0010 0101 0000 0010 0000 0101

    427 0000 0100 0010 0111 0000 0100 0000 0010 0000 0111

    Table 4.2 Storage of decimal numbers as Packed and unpacked BCD

    Integer Representation In Binary Format

    Integers, signed and unsigned can be represented as a single byte, single word (2 bytes) or as

    a double word (4 bytes).

    Byte-Sized Data

    An integer can be stored as a single byte (8-bits). The range for unsigned integer is from 0 to

    28-1 i.e. from 0 to 255. While the range for the signed integer is from -27 to 27-1 i.e. from -128

    to 127. Signed integers are stored in 2's complement, thus, the most significant bit is 1 for

    negative numbers and 0 for positive numbers. Figure 4.2 below shows how signed and

    unsigned integers are stored as a single byte.

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    Word-Sized Data

    An integer can be stored as a single word (16-bits). The range for unsigned integer is from 0 to

    216-1 i.e. from 0 to 65535. While the range for the signed integer is from -215 to 215-1 i.e.

    from -32786 to 32785. Figure 4.3 below shows how signed and unsigned integers are stored

    as a single word.

    1 2 4 8 16 32 64 128 256 32768

    0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0

    1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1

    0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

    1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

    Binary Weights

    Figure 4.3 a) Storage of an unsigned integer in a 16-bit (word) format

    Figure 4.3 b) Storage of a signed integer in a 16-bit (word) format

    1 2 4 8 16 32 64 128 256 -32768

    Binary Weights

    Signed byte

    1 2 4 8 16 32 64 128 1 2 4 8 16 32 64 -128 Binary Weights

    Unsigned byte

    Binary Weights

    1 0 0 0 0 0 0 0

    1 1 1 1 1 1 1 1

    0 0 0 0 0 0 0 0

    0 1 1 1 1 1 1 1

    Smallest

    Largest

    Figure 4.2 Single byte storage of signed and unsigned integers

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    Double-Word Sized Data

    An integer can be stored as a double word (32-bits). ). The range for unsigned integer is from 0

    to 232-1 i.e. from 0 to 4294967295. While the range for the signed integer is from -231 to 231-

    1 i.e. from -2147483648 to 2147483647.

    Data Storage in Memory

    The Intel family of microprocessors uses the little Endian technique when storing data in

    memory. This technique stores the least significant byte of data in the low memory address and

    the most significant byte in the high memory address. Figure 4.4 below shows how the data

    FA3BH is stored in memory starting at address 0000EH.

    Address Content

    Binary

    Content

    Hexadecimal

    00010H

    0000FH 1111 1010 FA

    0000EH 0011 1011 3B

    0000DH

    Data Movement

    The move (MOV) instruction will be used to illustrate the addressing modes available in the

    real-mode programming of the 80386 family of microprocessors. This Instruction

    can be used to move, actually copy, data between registers and/ or memory. The general

    syntax is:

    Mov destination, source

    The destination can be a register or a memory address where the data will be stored. While the

    source can be a register, a memory address, or an immediate value

    Figure 4.4

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    Example 4.1

    Mov BL, 23 ; Store the number 23 decimal in the BL register

    Mov AL, 10010010B ; The binary number 10010010 is stored in the AL register

    mov cl, 0F3H ; The hexadecimal number F3 is stored in CL register

    Mov AX, BX ; The content of the BX register is copied into the AX register

    Mov DX, 7234O ; The Octal number 7234 is stored in the DX register

    mov BX, 'AB'; The ASCII code for the letters A and B are stored in the BX Register

    mov BX, AB

    Self- Test Questions

    1) What is the ASCII code for the 'Intel 80386'?

    a) 496E74656C203830333836H

    b) 696E74656C203830333836H

    c) 696E74656C3830333836H

    2) What is the alphanumeric data represented by the ASCII code

    696E74656C203830343836H

    3) What is the Decimal equivalence of the packed BCD byte 10010111?

    a) 79

    b) 97

    c) 151

    4) What is the Decimal equivalence of the signed integer 10001000?

    a) 136

    b) -120

    5) The largest unsigned integer that can be stored a single byte is?

    a) 256

    b) 255

    c) 127

    Review Questions

    I. What is the largest memory that can be accessed by the 80386 microprocessor in real

    mode?

    II. List the 4 data registers and briefly explain their usage

    III. List the 4 index and pointer registers and briefly explain their usage

    IV. List the 6 segment registers and briefly explain their usage

    V. Explain the usage of the Carry flag

    VI. Contrast the flat and segmented addressing techniques

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    VII. Explain the 80386 real-mode memory addressing scheme

    VIII. Show how the data 'Intel 80386' is stored in memory starting at address 00FC0H

    IX. Show how the signed integer -512 is stored as a word in memory starting at address

    00FFFH

    X. Show how the unsigned integer 234 is stored in memory starting at address 0F000H

    A. As unpacked BCD

    B. As packed BCD

    C. As binary

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    ADDRESSING MODES

    Objectives

    1. Explain flat and segment addressing techniques

    2. Explain the 80386 real mode addressing schemes

    Memory Addressing

    Memory can be addressed in two ways:

    1. Segment Addressing as used by Intel

    2. Flat Addressing as used by other microprocessor manufacturers

    Segment Addressing

    Segment addressing scheme used on the Intel 8086 and later Intel microprocessors where all

    memory references are formed by adding a 16 bit offset to a 16 bit base address held in a

    segment base registers. Each instruction has a default segment, which determines which

    segment register is used. Special prefix instructions allow this default to be overridden.

    The effect is to segment memory into blocks. Blocks may overlap either partially or completely,

    depending on the contents of the segment registers but normally they would be distinct to give

    access to the maximum total range of addresses.

    Flat Addressing

    The memory architecture in which any memory location can be selected from a single

    contiguous block by a single integer offset is called flat addressing. A flat address space greatly

    simplifies programming because of the simple correspondence between addresses (pointers)

    and integers.

    80386 Real Mode Memory Addressing

    In real mode, the 80386 can address up to 1M bytes of memory. Thus, the address space in

    real mode ranges from 00000H to FFFFFH. The memory is divided into two sections: a

    dedicated-use section and a general-use section. The dedicated-use section occupies the

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    address space from 00000H to 003FFH and is reserved for the storage of the microprocessor

    interrupt-table and cannot be used for the storage of program or data. While, the general-use

    section uses address range from 00400H to FFFFFH and is used for the storage of program and

    data.

    As mentioned earlier, the Intel microprocessor use segmented addressing technique. Thus, The

    general-use section of memory is divided into blocks called segment. Each segment is 64K-byte.

    The segments can be contiguous, adjacent, disjointed or even overlapping. As the 386

    microprocessor has 6 segment registers, only 6 segments can be active at any given time.

    Thus, the total memory that can be active at any given time is 6 x 64 for a total of 384K-byte.

    To address a memory location, a logical address consisting of a segment address and an offset

    (displacement) address is specified. The actual address (Physical address) is obtained by

    appending 0H to the segment address and adding it to the offset address. If the offset address

    generated by combining the contents of two registers is bigger than FFFFH the extra bit is

    ignored. A memory address can only begin at a 16-byte boundary in the memory system. This

    16- byte address is sometimes called a paragraph. Table 5.1 shows few examples of logical and

    physical addresses.

    Segment Offset Logical Address Physical Address

    1000H 1234H 1000:1234H 10000H +1234H =11234H

    23FBH FAB3H 23FB:FAB3H 23FB0H + FAB3H = 33A63H

    0FF1H 1324H 0FF1:1324H 0FF10H + 1324H = 11234H

    Table 5.1

    Segments and their Default Offset Registers

    As mentioned earlier, the logical address is formed from a segment address held in a segment

    register and an offset address. The offset address is obtained from one of the general purpose

    or special purpose registers or from a combination of both depending on the type of access to

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    be performed by the microprocessor. Each segment register has a default offset register as

    shown in table 5.2 below. This default segment-offset relationship can be overridden for certain

    operations by specifying the name of the segment to be used in front of the offset register.

    Type of operation Offset Default

    Segment

    Comment

    Instruction EIP CS Cannot be changed

    Stack ESP, EBP SS

    Data and String Source EAX, EBX, EDX, ESI,

    EDI

    DS Can use any other

    data segment

    Destination String EDI ES Cannot be changed

    Table 5.2

    Addressing Modes

    The Intel 80386 family of microprocessors supports several addressing techniques in real-mode

    programming. The following addressing modes can be used in the real-mode:

    Register addressing

    Immediate addressing

    Direct addressing

    Register indirect addressing

    Base plus index addressing

    Register relative addressing

    Base relative plus index addressing

    Scaled index addressing

    Register Addressing

    The register-addressing mode is very simple. It allows data to be moved between the 80386

    registers. In this mode:

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    1. The source and destination of the data is an 80386 register such as AH, AL, BH, BL, CH, CL,

    DH and DL or their 16-bit counterparts i.e. AX, BX, CX, DX, SP, BP, SI and DI. In addition,

    the 32 bit registers EAX, EBX, ECX, EDX, ESP, EBP, ESI, EDI, and EDI can also be used.

    2. Never mix registers of different sizes. For ex: MOV AX, BL is not allowed because BL is an 8-

    bit register while AX is a 16-bit register

    3. Segment to segment register is not allowed. For ex: MOV CS, DS is not allowed

    4. The code segment register (CS) cannot be used as a destination register

    Example 5.1

    Mov AX, CX ; the content of CX register is copied into the AX register

    Mov CS, AX ; Invalid the code segment register cannot be a destination

    Mov DS, AX ; the content of AX register is copied into the DS register

    Immediate Addressing

    The immediate addressing mode allows a constant value to be loaded into a register or to be

    stored in memory. The constant value is included in the instruction immediately after the

    destination. In this mode:

    1. The source data is included in the instruction.

    2. The data is constant (cannot change between program runs)

    3. The data can be in DECIMAL, BINARY, HEXADECIMAL, or CHARACTER

    4. The destination can be a register or a memory location

    Example 5.2

    Mov AX, 3 ; the decimal value 3 is stored into the AX register

    Mov List, 0FFh; the hexadecimal value FF is stored into the memory location given by the

    label list

    Mov CH, 11001001b ; the binary value 11001001 is stored into the CH register

    Mov AX, 'a' ; the ASCII code of the letter a is stored in the AX register

    Direct Addressing

    There are two basic forms of direct addressing:

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    1. Direct Addressing Between Memory And Accumulator

    a) Transfers data from a memory location in the data segment and the accumulator

    (AL or AX or EAX)

    b) The address of the memory location can be specified by a variable (symbolic

    memory location) or can be given as direct memory address in some assembler

    2. Displacement Addressing

    a) Transfers data from a memory location in the data segment and any of the

    general-purpose registers including the accumulator.

    b) The address of the memory location can be specified by a variable (symbolic

    memory location) or can be given as direct memory address in some assembler

    The two forms are identical except for the length of the generated machine code instruction.

    Example 5.3

    Mov AX, list ; A word is copied from the memory location list to the AX register

    Mov name, BX ; the content of the BX register (a word) is copied to the memory starting the

    memory address given by the name label

    It is important to note that both labels (list and name) must have been declared in the data

    segment before being used.

    Figure 5.2 below shows the AX register and the memory content at address list a) before and b)

    after the Mov AX, list instruction is executed.

    xxxx AX 7AF3H

    F3 List

    Figure 5.2

    a) b)

    7A

    Memory

    F3

    7A

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    Register Indirect Addressing

    The direct addressing method discussed earlier is good if you want to read or write a single

    value to the memory. However, when several values (a vector or a column) is to accessed the

    register indirect addressing is more appropriate than the direct method. This is achieved by

    loading the offset of the vector or column (a single dimension array) into one of the base

    registers and then incrementing it in a loop to access the other elements. Any of the following

    base registers: BX, BP, DI, and SI can be used. The BX, DI, and SI registers use the data

    segment by default. While the BP register uses the stack segment by default

    Example 5.5

    Mov AX,[BX] ; The word whose address in the BX register is copied into AX

    Mov list, byte ptr[SI] ; copy the byte addressed by the content of SI into the memory

    location addressed by list.

    Figure 5.3 shows the content of memory and registers a) before and b) after the Mov AX,

    [BX] instruction is executed. Assuming DS = F000 then physical address = F0000+F001 =

    FF001

    Base-Plus-Index Addressing

    The Base plus index addressing method is another indirect addressing method that allows

    access to two-dimensional arrays (table). In this method, two registers are required: a base

    register such as BX and BP (SP cannot be used) and an index register such SI and DI. One

    register will be used as the base and the other as the offset. The effective address (physical

    xxxx AX 7AF3H

    F3 FF001

    Figure 5.3

    a) b)

    7A

    Memory

    F3

    7A FF002

    F001 BX

    DS = F000

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    address) is obtained by adding the Base register and the Index register to the default data

    segment register. The offset of the table should be loaded into the base register and then

    incrementing it in a loop and to load the offset of the first element into the index register and

    then incrementing it in an inner loop to access the other elements.

    Example 5.6

    Mov AX,[BX+DI] ; The word stored at the memory address DS:BX+DI is copied into the

    AX register.

    Figure 5.4 shows the contents of memory and registers a) before and b) after the instruction

    Mov AX, [BX+DI] is executed assuming DS = F000

    Register Relative Addressing

    This addressing technique is similar to the base plus index addressing technique described

    earlier except that here only one register (an index or a base register) is used compared with

    two registers (an index and a base register). This technique can address Data in a segment of

    memory by adding the displacement to the content of a base or index register like (BP, BX, DI,

    and SI). Thus, it can be used to access data stored in table (array) by:

    1. Loading the offset of the table into the displacement (a variable) and

    2. Loading the offset of the first element of the table into one of the base registers and then

    incrementing it in a loop to access the other elements

    xxxx AX 7AF3H

    F3 FF0A4

    Figure 5.4

    a) b)

    7A

    Memory

    F3

    7A FF0A5

    F001 BX

    DS = F000

    00A3 DI

    F001

    00A3

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    Example 5.7

    Mov AX, [BX+100] ; copy a word from the memory addressed by DS:BX+100 to the AX

    register

    Mov CX, list[DI] ; copy a word from the memory addressed by DS:list+DI to the CX

    register

    Figure 5.5 shows the content of memory and registers a) before and b) after the Mov

    CX,list[DI] is executed. Assuming that DS = 1000H and list = F000H. Thus, the physical

    memory address of this instruction is DS*10+list+DI = 10000+F000+00A3 = 1F0A3H.

    Base Relative plus Index Addressing

    In this technique, adding the content of a displacement (offset) to a base register and an index

    register forms the physical address. Thus, it can be used to access data stored in table (one or

    two dimensions array) by:

    1. Loading the offset of the table into the base registers and then incrementing it in a loop and

    2. Loading the offset of the first element into the index register and then incrementing it in an

    inner loop to access the other elements.

    Thus, it can be seen that this technique is almost identical to the base-plus-index addressing

    mode except for the addition of the displacement. The addition of the displacement allows the

    addressing of 3 dimensional table or arrays.

    xxxx CX BA3F

    3F 1F0A3

    Figure 5.5

    a) b)

    BA

    Memory

    3F

    BA 1F0A4

    DS = 1000 and list = F000

    00A3 DI 00A3

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    Example 5.8

    Mov AX,list[BX+DI] ; The word stored at the memory address DS:list+BX+DI is copied into

    the AX register.

    Figure 5.6 shows the contents of memory and registers a) before and b) after the instruction

    Mov AX, list[BX+DI] is executed assuming DS = F000 and list = 0100. Thus, the physical

    memory addressed by this instruction is DS*10+list+DI+BX = F0000+100+A3+C300 = FC4A3.

    Self-Test Questions

    1) The 80386 microprocessor uses:

    a) Flat addressing techniques

    b) Segment addressing techniques

    c) All of the above

    2) In real-mode, the memory-address range reserved for the interrupt table is?

    a) 0000H to 003FFH

    b) 00000H to 003FH

    c) 00000H to 003FFH

    3) What is the total active memory that can be accessed by the 80386DX microprocessor

    in real-mode?

    a) 256K-byte

    b) 384K-byte

    c) 1M-byte

    d) None of the above

    4) What is the physical address for the logical address 1234:FFB3?

    a) 222F3H

    xxxx AX BA3F

    3F

    Figure 5.6

    a) b)

    BA

    Memory

    3F

    BA 00A3 DI 00A3

    FC4A3

    DS = F000 and list = 0100

    C300 BX C300

    FC4A4

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    b) 22F23H

    c) None of the above

    5) Which pairs of registers are used to hold the address of instructions in memory?

    a) CS:IP

    b) CS: BP

    c) DS:IP

    d) None of the above

    6) Which addressing mode is used in the instruction Mov Ax, [BX]

    a) Direct Addressing

    b) Immediate Addressing

    c) Register Addressing

    d) Register Indirect Addressing

    Review Questions

    1. List 3 addressing modes and give an example of each

    2. If you need to sum the marks obtained by a group of students for the microprocessor

    class, which addressing modes are suitable and why?

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    ACCESSING SYSTEM HARDWARE

    Outcomes

    1. Explain the 3 methods used for accessing the hardware

    2. Use the DOS function calls to access the hardware

    Fundamentals

    You can access the PC system hardware at one of three general levels from assembly

    Language.

    Programming the hardware directly

    Use ROM BIOS routines to access the hardware

    Use MS-DOS calls to access the hardware.

    Each level of system access has its own set of advantages and disadvantages.

    Programming the hardware directly

    1) Programming the hardware directly offers two advantages over the other schemes:

    Control and

    Efficiency.

    2) Programming the hardware directly has its drawbacks.

    The needs to create different versions of the same program to work with the

    same hardware type (monitor for example) produced by different manufacturers

    Use ROM BIOS

    The Basic Input Output System, or BIOS provide a hardware-independent interface to various

    devices in the IBM PC system. For example, one of the BIOS services is a video display driver.

    By making various calls to the BIOS video routines, your software will be able to write

    characters to the screen regardless of the actual display board installed. The BIOS allows you to

    manipulate devices in a very low level fashion

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    Use MS-DOS

    MS-DOS provides a high-level interface to many devices. This high-level interface greatly

    reduces the amount of effort in accessing the hardware.

    Accessing the hardware using BIOS or DOS call requires the use of software interrupts

    What is an Interrupt?

    1. An interrupt is a signal that tells the CPU to temporarily stop what it is doing and go do

    something else.

    2. Interrupt can be either External or Internal

    3. External interrupts are generated by external hardware devices. While Internal interrupts

    are generated by a running program

    Invoking an Interrupt

    There are 256 different interrupts numbered from 0 to 255.

    A program can invoke any of these interrupts with a special instruction, known as a INT,

    and is given the number of the interrupt. Thus an

    INT 21h instruction invokes interrupt number 33 decimal.

    In real mode, the lowest 1024 bytes of memory are reserved for a table (IVT, Interrupt

    Vector Table) containing the addresses for each of the 256 possible interrupts.

    When an interrupt occurs (hardware or software), the processor multiplies its number by 4

    and looks at the resulting memory location to find the address of the piece of code which

    handles the interrupt.

    It then places the current address in the program and the processor flags on the stack, and

    jumps to the beginning of the interrupt handler.

    When the interrupt handler finishes, it invokes a special instruction to return from the

    interrupt. This instruction takes the previously saved flags and program address off of the

    stack and places them back in the appropriate registers in the CPU.

    The interrupt handler has to be careful to preserve any registers that it uses which are not

    used to communicate results to the program that invoked the interrupt.

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    If the interrupt can be triggered by a hardware interrupt (only certain ones can on IBM PC's,

    XT's, and AT's), then the interrupt handler has to preserve ALL registers, since the interrupt

    could have happened anywhere.

    ACCESSING THE BIOS

    The IBM PC BIOS uses software interrupts to accomplish various operations. Most of these

    routines require various parameters in the 80x86's registers. Some require additional

    parameters in certain memory locations.

    Ms-Dos Calling Sequence

    MS-DOS is called via the int 21h instruction.

    To select an appropriate DOS function, load the ah register with a function number before

    issuing the int 21h instruction.

    Most DOS calls require other parameters as well. Generally, these other parameters are

    passed in the CPU's register set.

    Terminate Program Execution

    Function (ah): 4Ch

    Entry parameters: al - return code

    Exit parameters: Does not return to your program

    This is the function call normally used to terminate your program.

    It returns control to the calling process. A return code can be passed to the calling process

    in the al register. Exactly what meaning this return code has is entirely up to you.

    Display a Character String

    Function: AH = 09

    Entry Parameter: DS:DX = Address of the character string

    Description: This function displays a string of characters on the screen. The address of the

    string should be in DS:DX register pair. The string must be terminated with the $. The string

    can be of any length and may contain control characters.

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    Buffered Keyboard Input

    Function: AH = 0A

    Entry Parameter: DS:DX = address of a keyboard input buffer

    Description:

    The first byte of the buffer must be the size of the buffer, which can be up to 255 bytes.

    The second byte is filled by the function when it returns. It contains the number of

    character typed.

    The remaining bytes contain the typed characters followed by a carriage return (0D).

    This function continues to read the keyboard until either the buffer is filled or the carriage

    return (Enter key) is pressed.

    The program EX6_1.asm shown in Figure 6.1 is an example of using DOS function calls to

    access the hardware. The program first displays Message 1, What is your name ?, on

    the screen then waits for the user to type his/her name. Then it displays Message 2, It is

    nice to meet you, before placing a dollar sign $ at the end of the stored name and then

    displaying it after Message 2.

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    ; EX6_1.ASM

    ; input the name and display a message

    .MODEL SMALL

    .stack 200h

    .DATA

    message1 DB 'What is your name ? $'

    nam db 32, 33 dup(0)

    message2 db 10,13,'It is nice to meet you $'

    .CODE

    START:

    mov ax,seg message1 ;get segment of message1

    mov ds,ax ; put it in ds

    mov dx, offset message1 ; get offset of message1

    mov ah,09h ; display message1

    int 21h

    mov dx,offset nam ; get offset of name

    mov ah,0Ah ; get name from user

    int 21h

    mov ah,09h

    mov dx,offset message2 ;get offset message2

    int 21h ; display message2

    mov DI,offset nam ; get offset of name

    inc di ; point to number of character entered

    mov bl,[di] ; get no of character

    mov bh,0 ; clear bh, bx = no of character

    inc di

    mov BYTE PTR [Bx+di],'$'; put '$' at end of string

    mov dx,di ; offset of name in dx

    mov ah,09h ; display name

    int 21h

    mov ax,4c00h ;Returns control to DOS

    int 21h ;

    END START

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    Self-Test Questions

    1) The advantages of accessing the hardware by direct programming are:

    a) Speed and efficiency

    b) Control and Speed

    c) Control and Efficiency

    d) None of the above

    2) The Access the hardware using DOS or BIOS, you need to:

    a) Use interrupts

    b) Use DOS function calls

    c) None of the above

    3) In real mode, the interrupt table

    a) Use 1 Kbytes of memory

    b) Has 256 interrupts

    c) All of the above

    d) None of the above

    Review Questions

    1. List 3 addressing methods of accessing the hardwires

    2. List one advantage and one disadvantage of each of the three methods listed in 1

    3. Draw a flowchart for the program given in Ex6_1.asm

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    PROGRAM CONTROLS

    Outcomes

    1. Ability to write assembly programs that performs selection

    2. Ability to write assembly programs that performs Iteration

    Fundamentals

    The Jump Commands

    The jump commands can be used to control of the flow of statements execution within a

    program

    There are two main groups of jump commands:- Conditional and Unconditional jumps

    The Unconditional Jump

    The general syntax of the unconditional jump is: JMP [short/near/far] label

    There are 3 types: - Short, Near and Far jumps

    For short jump the label must be within +127 or -128 bytes from the JMP label instruction

    For near jump the label must be within 32 Kbytes from the JMP label instruction

    For far jump the label can be anywhere in the real memory. The far jump can be obtained

    by:- using the FAR PTR directive or by defining the label as an external label using the

    EXTRN directive

    CONDITIONAL JUMPS

    Conditional jumps are either short or near jumps

    The Carry (C), Sign (S), Zero (0), Parity (P), and Overflow (O) flags are tested to see if they

    are set (equal 1) or reset (equal 0)

    There are conditional jumps commands for signed and unsigned numbers

    Unsigned Conditional Transfers

    Mnemonic Condition Tested "Jump If..."

    JA/JNBE (CF or ZF) = 0 Above/not below nor equal

    JAE/JNB CF = 0 Above or equal/not below

    JB/JNAE CF = 1 Below/not above nor equal

    JBE/JNA (CF or ZF) = 1 Below or equal/not above

    JC CF = 1 Carry

    JE/JZ ZF = 1 Equal/zero

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    JNC CF = 0 Not carry

    JNE/JNZ ZF = 0 Not equal/not zero

    JNP/JPO PF = 0 Not parity/parity odd

    JP/JPE PF = 1 Parity/parity even

    Signed Conditional Transfers

    Mnemonic Condition Tested "Jump If..."

    JG/JNLE ((SF xor OF) or ZF) = 0 Greater/not less nor equal

    JGE/JNL (SF xor OF) = 0 Greater or equal/not less

    JL/JNGE (SF xor OF) = 1 Less/not greater nor equal

    JLE/JNG ((SF xor OF) or ZF) = 1 Less or equal/not greater

    JNO OF = 0 Not overflow

    JNS SF = 0 Not sign (positive, including 0)

    JO OF = 1 Overflow

    JS SF = 1 Sign (negative)

    Since the conditional jump commands depend on the state of the flags, the question is how to

    set or reset the values of these flags to make the jump instruction transfers control to the

    specified location within the program so that we can make selection and iteration? There are

    several ways of setting the values of these registers. The most common method of setting the

    values of the flags is by using logical and arithmetic command. The most common used

    command for performing program control is the Compare command.

    Compare

    1. The CMP instruction compares two binary data items by subtracting the source from the

    destination.

    2. Neither the value of the source nor the destination change by this command. Only the

    status of the flags will be changed.

    3. Almost all addressing methods except memory-to memory and segment registers cannot

    be used

    4. This command is normally used before a conditional jump to check whether a condition

    is true or false

    The general syntax of this command is: CMP destination, source Where: destination can be a register or a memory variable. Source can be a register, a memory

    variable, or an immediate value.

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    Selection

    The program vote.asm shown in Figure 6.1 shows how to use the compare (CMP) command

    and the conditional jump instructions to perform a selection. The flowchart of the program is

    shown in Figure 6.2.

    ; vote.asm

    .MODEL SMALL

    .STACK 200h

    .DATA

    Prompt db 13,10,"Type your age please (0 to 99) $"

    age db 3, 4 dup(?)

    yesmessage db 10,13, "Congragulation, you are eligible to

    vote $"

    nomessage db 10,13, "Sorry, you are under age $"

    .CODE

    START:

    ;display prompt

    mov ax, seg prompt ;

    mov ds,ax

    mov ah,9

    mov dx,offset Prompt

    int 21h ;print a message

    ;input the age

    mov ah,0ah

    mov dx,offset age

    int 21h ;get the age

    ;move age to ax

    mov bx, offset age

    mov ah,[bx+2] ;MSB in ah

    mov al,[bx+3] ;LSB in al

    ; check if age is more than 21

    cmp ax,'21' ; is age > 21

    jae yes ;yes display yesmessage

    mov dx,offset nomessage ; no display nomessage

    jmp dispmessage

    yes:

    mov dx,offset yesmessage

    dispmessage:

    mov ah,9 ; display message

    int 21h

    ;return to dos

    mov ax,4c00h ;Returns control to DOS

    int 21h ;

    END START

    Figure 6.1 The Source Code for Vote.asm

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    Iteration

    The program ASCII.asm shown in Figure 6.3 shows how to use the Compare (CMP) and the

    conditional jump statements to perform iteration, loop. The program makes a loop that repeats

    itself 256 times to print out the entire ASCII code. The flowchart of the program is shown in

    Figure 6.4. Another method of making an iteration is by using the LOOP commands.

    Looping the Loop

    The loop instructions are conditional jumps that use a value placed in ECX to specify the

    number of repetitions of a software loop. All loop instructions automatically decrement ECX and

    terminate the loop when ECX=0. Four of the five loop instructions specify a condition involving

    ZF that terminates the loop before ECX reaches zero.

    The LOOP Instruction

    The LOOP command (Loop while ECX Not Zero) is a conditional transfer that automatically

    decrements the ECX register before testing ECX for the branch condition. If ECX is non-zero,

    the program branches to the target label specified in the instruction. The LOOP instruction

    causes the repetition of a code section until the operation of the LOOP instruction decrements

    ECX to a value of zero. If LOOP finds ECX=0, control transfers to the instruction immediately

    Start

    Input Age

    Display Enter your age

    Is Age > 21?

    Display Congratulation

    Display Sorry

    End

    Figure 6.2 Flowchart of the Vote.asm Program

    No

    Yes

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    following the LOOP instruction. If the value of ECX is initially zero then the LOOP is executed

    2^(32) times.

    Syntax: Loop Label

    LOOPE

    The LOOPE (Loop While Equal) and LOOPZ (Loop While Zero) are synonyms for the same

    instruction. These instructions automatically decrement the ECX register before testing ECX and

    ZF for the branch conditions. If ECX is non-zero and ZF=1, the program branches to the target

    label specified in the instruction. If LOOPE or LOOPZ finds that ECX=0 or ZF=0, control

    transfers to the instruction immediately following the LOOPE or LOOPZ instruction.

    Syntax: Loope Label

    Condition for looping: ECX # 0 and ZF = 1

    LOOPNE

    The LOOPNE (Loop While Not Equal) and LOOPNZ (Loop While Not Zero) are synonyms for the

    same instruction. These instructions automatically decrement the ECX register before testing

    ECX and ZF for the branch conditions. If ECX is non-zero and ZF=0, the program branches to

    the target label specified in the instruction. If LOOPNE or LOOPNZ finds that ECX=0 or ZF=1,

    control transfers to the instruction immediately following the LOOPNE or LOOPNZ instruction.

    Syntax: Loopne Label

    Condition for looping: ECX # 0 and ZF = 0

    ;ascii.asm

    .MODEL SMALL

    .STACK 200h

    .CODE

    START:

    mov cx,0 ; first number in the ASCII table

    mov ah,6 ; DOS function to display a single character

    begin:

    mov dl,cl ; ascii code of first character

    int 21h ; display it

    cmp cx,255

    jae done

    inc cx

    jmp begin

    done:

    .exit

    END START

    Figure 6.3 The Source Code for the ASCII.asm Program

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    EXECUTING A LOOP ZERO TIMES

    JCXZ (Jump if ECX Zero) branches to the label specified in the instruction if it finds a value of

    zero in ECX. JCXZ is useful in combination with the LOOP instruction and with the string scan

    and compare instructions, all of which decrement ECX. Sometimes, it is desirable to design a

    loop that executes zero times if the count variable in ECX is initialised to zero. Because the

    LOOP instructions (and repeat prefixes) decrement ECX before they test it, a loop will execute

    2^(32) times if the program enters the loop with a zero value in ECX. A programmer may

    conveniently overcome this problem with JCXZ, which enables the program to branch around

    the code within the loop if ECX is zero when JCXZ executes. When used with repeated string

    scan and compare instructions, JCXZ can determine whether the repetitions terminated due to

    zero in ECX or due to satisfaction of the scan or compare conditions.

    Syntax: JCXZ Label

    Condition for looping: ECX = 0

    The program ASCII2.asm shown in Figure 6.5 shows how to use the Loop command to

    perform an iteration. The program makes a loop that repeats itself 256 times to print out the

    Start

    Display Char(No)

    Is

    No>255?

    End

    Figure 6.4 Flowchart of the ASCII Program

    No = 0

    No = No + 1

    Yes

    No

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    entire ASCII code in reverse order. The flowchart of the program is shown in Figure 6.6

    Self-Assessment Questions

    1. The jump commands can be classified into 2 groups: _____________ jumps and

    _______________________ jumps

    ;ascii2.asm

    .MODEL SMALL

    .STACK 200h

    .CODE

    START:

    mov cx,255 ; last number in the ASCII table

    mov ah,6 ; DOS function to display a single character

    begin:

    mov dl,cl ; ascii code of first character

    int 21h ; display it

    loop begin

    done:

    .exit

    END START

    Figure 6.5 The Source Code for the ASCII2.asm Program

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    2. The number of bytes between the jmp Short label instruction and the label should be

    between ________________________ and ______________________ bytes

    3. The conditional jump can only be ____________ and _____________

    4. The conditional jump statement JA is used with unsigned number, the equivalent

    conditional jump statement used with signed number is ________________

    5. For the Repeat until loop, the condition that controls the loop is placed at _________

    _________________________ of the loop

    Review Questions

    1. Draw a flowchart and then write the source code for an assembly language program

    that displays the EVEN numbers from 0 to 100 on the screen

    2. The ASCII program shown in Figure 6.3 uses the Compare and conditional jumps

    commands to display the ASCII codes starting from 0 to 255. You are required to modify

    the ASCII program so that it uses the Loop command to display the ASCII code

    3. Draw a flowchart and then write the source code for an assembly language program

    that:

    a. Request the user to enter his or her sex

    b. If the user is a male then the message Hi Handsome Guy is displayed. If the

    user is a female, then the message Hi Beautiful Lady is displayed.

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    ARITHMETIC AND LOGIC OPERATIONS

    Outcomes

    1. Ability to write assembly programs that perform arithmetic operations on integers

    2. Ability to write assembly programs that perform logic operations

    Logic Operations

    The AND Instruction

    1. The AND instruction performs the logical AND operation on the bits of two data items

    2. Can be used to clear selected bits of a binary number by using a mask

    The general syntax is: AND destination, source

    Where: destination can be a register or a memory variable while source can be a register, a

    memory variable or an immediate value. However, both source and destination cannot be

    memory variables. After the operation is completed the destination = destination AND

    source

    Example 7.1

    and al, 0F0h

    and num1,00Fh

    and byte ptr[bx],0F5h

    and ax, bx

    The OR Instruction

    1. The OR instruction performs the logical OR operation on the bits of two data items

    2. Can be used to set selected bits of a binary number by using a mask

    The general syntax is: OR destination, source

    Where: destination can be a register or a memory variable while source can be a register, a

    memory variable or an immediate value. However, both source and destination cannot be

    memory variables. After the operation is completed the destination = destination OR

    source

    Example 7.2

    OR al, 0F0h

    OR num1,00Fh

    OR byte ptr[bx],0F5h

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    OR ax, bx

    The XOR Instruction

    1. The XOR instruction performs the logical XOR operation on the bits of two data items

    2. Can be used to invert (complement) selected bits of a binary number by using a mask

    The general syntax is: XOR destination , source

    Where: destination can be a register or a memory variable while source can be a register, a

    memory variable or an immediate value. However, both source and destination cannot be

    memory variables. After the operation is completed the destination = destination XOR

    source

    Example 7.3

    XOR al, 0F0h

    XOR num1,00Fh

    XOR byte ptr[bx],0F5h

    XOR ax, bx

    The NOT Instruction

    The NOT operation performs the logical NOT operation. Thus, it invert or performs the 1s

    complement on the binary data item

    The general syntax is: NOT destination.

    Where: The destination can be a register or a memory variable. After the command is

    completed the destination = 1s complement of the destination.

    Example 7.4

    NOT num1

    NOT byte ptr[bx]

    NOT ax

    The TEST Instruction

    1. The TEST instruction performs a logical AND operation on the destination and the source.

    However, unlike the AND operation only the flags are changed

    2. Like the CMP command, this command is normally followed by a conditional jump

    instruction

    3. All the addressing mode that can be used for the AND instruction can be used for this

    command

    The general syntax is: TEST destination, source

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    Where: destination can be a register or a memory variable. Source can be a register, a memory

    variable, or an immediate value.

    Example 7.5

    test al, 0F0h

    test num1,00Fh

    test byte ptr[bx],0F5h

    test ax, bx

    The BT Instruction

    1. The BT instruction is used to test a single bit by placing it in the carry flag (C) which can

    then be used to control the flow program execution

    2. This command can also be used to clear, set, or complement the bit under test as shown in

    the table below

    The general syntax is: BT/BTS/BTC/BTR Operand, location

    Where: operand can be a register or a memory variable. Location can be a register, or an

    immediate value representing the location of the bit as an offset from the low-order end of the

    operand

    Instruction Effect on CF Effect on Selected Bit

    BT (Bit Test) CF BIT (none)

    BTS (Bit Test and Set) CF BIT BIT 1

    BTR (Bit Test and Reset) CF BIT BIT 0

    BTC (Bit Test and Complement) CF BIT BIT NOT(BIT)

    Example 7.6

    BT ax, 3

    BTS num1, 6

    BTC ax, 7

    BTR num2, ax

    The Bit Scan Instructions

    The BSF (Bit Scan Forward) and BSR (Bit Scan Reverse) scans a source data item forward or

    reverse respectively until a 1 bit (a bit whose value is 1) is found. The position where the 1 is

    found is stored in the destination.

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    The general syntax is: BSF/BSR destination, source

    Where: Destination is a 16-bit register while Source can be a 16-bit register, or a memory

    variable.

    Example 7.7

    BSF BX,AX

    BSR BX,num1

    Arithmetic Operations

    Binary Arithm