lg kf300 svc eng 0422

Date: February, 2008 / Issue 1.0

Serv

ice M

an

ual

Mo

del : K

F300

Service ManualKF300

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1. INTRODUCTION ........................... 51.1 Purpose .................................................. 51.2 Regulatory Information............................ 51.3 Abbreviations .......................................... 7

2. SYSTEM SPECIFICATION............... 92.1 H/W Features.......................................... 92.2 Technical Specification ......................... 10

3. TECHNICAL BRIEF ....................... 153.1 Digital Main Processor(AD6900, U101). 153.2 Analog Main Processor(AD6855, U100) 183.3 Power Amplifier Module(SKY77318, U601)

.............................................................. 253.4 FEM (DGM1110M014, FL601) ............. 263.5 RTC(FC-135, X100).............................. 273.6 Crystal(26 MHz, X601).......................... 283.7 RF Tranceiver(AD6548, U602) ..............303.8 MEMORY(PF38F5060M0Y0BE, U202)..363.9 BT Module with integrated FM tuner

(EWFMLBAXX, U201) ...........................393.10 SIM Card Interface...............................413.11 Micro-SD Card Interface ......................423.12 LCD Interface.......................................433.13 Battery Charger Interface.....................463.14 Keypad Interface..................................473.15 Audio Interface.....................................493.16 Camera Interface

(2M Fixed Focus Camera) ...................563.17 KEY BACLKLIGHT LED Interface .......593.18 Vibrator Interface .................................60

4. TROUBLE SHOOTING ...................614.1 RF Component.......................................614.2 RX Trouble.............................................624.3 TX Trouble .............................................674.4 Power On Trouble..................................734.5 Charging Trouble ...................................754.6 Vibrator Trouble .....................................774.7 LCD Trouble...........................................794.8 Camera Trouble .....................................834.9 Speaker Trouble ....................................874.10 Earphone Trouble ................................894.11 Receiver Trouble..................................914.12 Microphone Trouble .............................934.13 SIM Card Interface Trouble..................95

4.14 KEY backlight Trouble .........................974.15 RTC Trouble ........................................994.16 Folder on/off Trouble..........................1014.17 Micro SD Trouble ...............................1034.18 Bluetooth Trouble...............................1054.19 FM Radio Trouble ..............................107

5. DOWNLOAD.....................................1095.1 Download .............................................109

6. BLOCK DIAGRAM ........................116

7. CIRCUIT DIAGRAM ......................117

8. BGA IC Pin Check ........................127

9. PCB LAYOUT................................133

10. ENGINEERING MODE................13910.1 BB Test [MENU 1]..............................14010.2 RF Test [MENU 2]..............................14210.3 MF mode [MENU 3] ...........................14210.4 Trace option [MENU 4] ......................14310.5 Call timer [MENU 5] ...........................14310.6 Fact. Reset [MENU 6] ........................14310.7 S/W version........................................143

11. STAND ALONE TEST .................14411.1 Introduction ........................................14411.2 Setting Method...................................14411.3 Means of Test ....................................145

12. AUTO CALIBRATION .................14712.1 Overview............................................14712.2 Equipment List ...................................14712.3 Test Jig Operation..............................14812.4 Procedure ..........................................14912.5 AGC ...................................................15112.6 APC....................................................15112.7 ADC ...................................................151

13. EXPLODED VIEW &REPLACEMENT PART LIST ..... 153

13.1 Exploded View .................................. 153

13.2 Replacement Parts ............................15513.3 Accessory ......................................... 168

Table Of Contents

LGE Internal Use OnlyCopyright © 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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1. INTRODUCTION

1.1 Purpose

This manual provides the information necessary to repair, calibration, description and download thefeatures of this model.

1.2 Regulatory Information

A. Security

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,persons other than your company’s employees, agents, subcontractors, or person working on yourcompany’s behalf) can result in substantial additional charges for your telecommunications services.System users are responsible for the security of own system. There are may be risks of toll fraudassociated with your telecommunications system. System users are responsible for programming andconfiguring the equipment to prevent unauthorized use. The manufacturer does not warrant that thisproduct is immune from the above case but will prevent unauthorized use of common-carriertelecommunication service of facilities accessed through or connected to it.The manufacturer will not be responsible for any charges that result from such unauthorized use.

B. Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and possiblycausing harm or interruption in service to the telephone network, it should disconnect telephoneservice until repair can be done. A telephone company may temporarily disconnect service as long asrepair is not done.

C. Changes in Service

A local telephone company may make changes in its communications facilities or procedure. If thesechanges could reasonably be expected to affect the use of the this phone or compatibility with thenetwork, the telephone company is required to give advanced written notice to the user, allowing theuser to take appropriate steps to maintain telephone service.

D. Maintenance Limitations

Maintenance limitations on this model must be performed only by the manufacturer or its authorizedagent.The user may not make any changes and/or repairs expect as specifically noted in this manual.Therefore, note that unauthorized alternations or repair may affect the regulatory status of the systemand may void any remaining warranty.

1. INTRODUCTION


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1. INTRODUCTION

E. Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by local

regulatory agencies. In accordance with these agencies, you may be required to provide information

such as the following to the end user.

F. Pictures

The pictures in this manual are for illustrative purposes only; your actual hardware may look slightlydifferent.

G. Interference and Attenuation

Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference fromunsuppressed engines or electric motors may cause problems.

H. Electrostatic Sensitive Devices

ATTENTION

Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign.Following information is ESD handling:• Service personnel should ground themselves by using a wrist strap when exchange system boards.• When repairs are made to a system board, they should spread the floor with anti-static matb which is

also grounded.• Use a suitable, grounded soldering iron.• Keep sensitive parts in these protective packages until these are used.• When returning system boards or parts like EEPROM to the factory, use the protective package as

described.

LGE Internal Use Only Copyright © 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

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1. INTRODUCTION

1.3 AbbreviationsFor the purposes of this manual, following abbreviations apply:


APC Automatic Power Control

BB Baseband

BER Bit Error Ratio

CC-CV Constant Current - Constant Voltage

DAC Digital to Analog Converter

DCS Digital Communication System

dBm dB relative to 1 milli watt

DSP Digital Signal Processing

EEPROM Electrical Erasable Programmable Read-Only Memory

ESD Electrostatic Discharge

FPCB Flexible Printed Circuit Board

GMSK Gaussian Minimum Shift Keying

GPIB General Purpose Interface Bus

GSM Global System for Mobile Communications

IPUI International Portable User Identity

IF Intermediate Frequency

LCD Liquid Crystal Display

LDO Low Drop Output

LED Light Emitting Diode

OPLL Offset Phase Locked Loop

- 8 -

1. INTRODUCTION


PAM Power Amplifier Module

PCB Printed Circuit Board

PGA Programmable Gain Amplifier

PLL Phase Locked Loop

PSTN Public Switched Telephone Network

RF Radio Frequency

RLR Receiving Loudness Rating

RMS Root Mean Square

RTC Real Time Clock

SAW Surface Acoustic Wave

SIM Subscriber Identity Module

SLR Sending Loudness Rating

SRAM Static Random Access Memory

PSRAM Pseudo SRAM

STMR Side Tone Masking Rating

TA Travel Adapter

TDD Time Division Duplex

TDMA Time Division Multiple Access

UART Universal Asynchronous Receiver/Transmitter

VCO Voltage Controlled Oscillator

VCTCXO Voltage Control Temperature Compensated Crystal Oscillator

WAP Wireless Application Protocol

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2. SYSTEM SPECIFICATION

2.1 H/W Features



Item Feature Comment

Standard Battery Li-ion Polymer, 3.7V 800mAh

Stand by TIME Up to 200 hrs : Paging Period 5, RSSI 85dBm

Talk time Up to 200min : GSM Tx Level 7

Stand by time Up to 200 hours (Paging Period: 5, RSSI: -85 dBm)

Charging time Approx. 3 hours

RX Sensitivity GSM850/EGSM: -109dBm, DCS/PCS: -109dBm

TX output powerGSM850, EGSM: 32.4dBm(Level 5),DCS , PCS: 29.5dBm(Level 0)

GPRS compatibility Class 10

SIM card type 3V Small

DisplayMAIN : TFT 240 × 320 pixel 262K Color

SUB : TFT 128 × 160 pixel 262K Color

Hard icons. Key Pad

Status Indicator0 ~ 9, #, *, Up/Down/Left/Right/Ok Navigation KeyMenu Key, Clear Key, Back Key, Confirm KeySend Key, Volume Key, PWR Key, Camera Key, Hot Key

ANT Internal

EAR Phone Jack Yes

PC Synchronization Yes

Speech coding EFR/FR/HR

Data and Fax Yes

Vibrator Yes

Loud Speaker Yes

Voice Recoding Yes

Microphone Yes

Speaker/Receiver 16Ø Speaker / 11x07 Receiver

Travel Adapter Yes

MIDI SW MIDI (Mono SPK)

Camera 2M

Bluetooth / FM Radio Bluetooth version 2.0 / 76~108MHz supported

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2.2 Technical Specification


Item Description Specification

GSM850TX: 824 ~ 849MHzRX: 869 ~ 894MHz

EGSMTX: 880 ~ 915MHzRX: 925 ~ 960MHz

DCS18001 Frequency Band TX: 1710 ~ 1785MHz

RX: 1805 ~ 1880MHzPCS1900

TX: 1850 ~ 1910MHzRX: 1930 ~ 1990MHz

2 Phase ErrorRMS < 5 degreesPeak < 20 degrees

3 Frequency Error < 0.1 ppm

GSM850/EGSM

Level Power Toler. Level Power Toler.

5 33 dBm 2dB 13 17 dBm 3dB

6 31 dBm 3dB 14 15 dBm 3dB

7 29 dBm 3dB 15 13 dBm 3dB

8 27 dBm 3dB 16 11 dBm 5dB

9 25 dBm 3dB 17 9 dBm 5dB

10 23 dBm 3dB 18 7 dBm 5dB

11 21 dBm 3dB 19 5 dBm 5dB

4 Power Level 12 19 dBm 3dB

DCS/PCS

Level Power Toler. Level Power Toler.



2 26 dBm 3dB 10 10 dBm 4dB






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GSM850/EGSM

Offset from Carrier (kHz). Max. [dBc]

100 0.5

200 -30

250 -33

400 -60

600 ~ 1,200 -60

1,200 ~ 1,800 -60

1,800 ~ 3,000 -63

3,000 ~ 6,000 -65

5Output RF Spectrum 6,000 -71

(due to modulation) DCS/PCS

Offset from Carrier (kHz). Max. [dBc]

100 0.5

200 -30

250 -33

400 -60

600 ~ 1,200 -60

1,200 ~ 1,800 -60

1,800 ~ 3,000 -65

3,000 ~ 6,000 -65

6,000 -73

GSM850/EGSM

Offset from Carrier (kHz) Max. [dBm]

Output RF Spectrum 400 -196

(due to switching transient) 600 -21

1,200 -21

1,800 -24

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DCS/PCS

Offset from Carrier (kHz) Max. [dBm]

Output RF Spectrum 400 -226

(due to switching transient) 600 -24

1,200 -24

1,800 -27

7 Spurious Emissions Conduction, Emission Status

GSM850/EGSM

8 Bit Error RatioBER (Class II) < 2.439% @-102 dBm

DCS/PCSBER (Class II) < 2.439% @-100 dBm

9 RX Level Report Accuracy

10 SLR 8 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 -

200 0 -

300 0 -12

11 Sending Response 1,000 0 -6

2,000 4 -6

3,000 4 -6

3,400 4 -9

4,000 0 -

12 RLR 2 3 dB

Frequency (Hz) Max.(dB) Min.(dB)

100 -12 -

200 0 -

300 0 -12

13 Receiving Response1,000 0 -6

3,000 4 -6

3,400 4 -6

4,000 4 -9

*Mean that Adopt a straight line in between 300 Hz

and 1,000 Hz to be Max. level in the range.

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14 STMR 13 5 dB

15 Stability Margin > 6 dB

dB to ARL (dB) Level Ratio (dB)

-35 17.5

-30 22.5

16 Distortion-20 30.7

-10 33.3

0 33.7

7 31.7

10 25.5

17 Side Tone Distortion Three stage distortion < 10%

18System frequency

≤ 2.5 ppm(13 MHz) tolerance

19 32.768KHz tolerance ≤ 30 ppm

At least 65 dBspl under below conditions:20 Ringer Volume 1. Ringer set as ringer.

2. Test distance set as 50 cm

Fast Charge : Typ. 430 mA21 Charge Current Slow Charge : Typ. 80mA

Total Charging Time : < 3 hours

Bar Number Power

7 -93~

7 → 5 -93 2

22 Antenna Display 5 → 4 -98 2

4 → 2 -101 2

2 → 1 -104 2

1 → 0 -106 2

0 → OFF ~-106

Battery Bar Number Voltage

3 ≤ 3.75 0.05 V

23 Battery Indicator 3 → 2 3.75 0.05 V

2 → 1 3.64 0.05 V

1 → 0 3.54 0.05 V


24Low Voltage Warning ≤ 3.54 0.05V (Call)

(Blinking Bar) ≤ 3.4 0.05V (Standby)

25Forced shut down

3.33 0.05VVoltage

26 Sustain RTCwithout battery Over 50 hours

Li-Ion Battery

27 Battery TypeStandard Voltage = 3.7 VBattery full charge voltage = 4.2 VCapacity: 800mAh

Switching-mode charger28 Travel Charger Input: 100 ~ 350V, 50/60 Hz

Output: 5.1 V, 700 mA

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3. TECHNICAL BRIEF

3. TECHNICAL BRIEF


3.1 Digital Main Processor(AD6900, U101)

The AD6900 is an advanced, low-power baseband processing solution from Analog Devices, and ispart of the AD20msp500 SoftFone® chipset family. The AD6900 is intended for use in a wide variety offeature-rich phones with GSM/GPRS/EGPRS based system connectivity requirements. It is designedto interface easily to an application/OS processor, or to stand alone as a fully integrated and easy-to-use solution for mobile handset and wireless modem applications.

Figure. 3-1 AD6900 FUNCTIONAL BLOCK DIAGRAM

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3. TECHNICAL BRIEF


3.1.1 Features of AD6900

Complete Single-Chip Programmable Digital Baseband Processor with four main subsystems

MCU Control Processor Subsystem:

32-bit ARM926EJ-S® MCU Control Processor260 MHz operation at 1.5Vdedicated caches, 16K bytes each, for instructions and data4kB Instruction Tightly Coupled Memory (TCM)2-Mbit On-chip System SRAMCiphering coprocessor for GPRS supporting GEA1 and GEA2 encryption algorithmsKasumi cipher coprocessor for GEA3 encryptionDedicated multichannel DMA controller

DSP Subsystem:

Blackfin 16-bit fixed-point DSP Processor260 MHz operation at 1.5VMemory:

→ L1 program space: 64 kB SRAM and 16 kB configurable as instruction cache or SRAM→ L1 data space: Two banks of 16K bytes, each with 8K bytes of dedicated SRAM and an

additional 8K bytes that can be configured as either cache or SRAM→ L2 space: 64KB SRAM

Ciphering coprocessor (GEA1 and GEA2)Kasumi cipher coprocessor for GEA3 encryptionDedicated multichannel DMA controller

Peripherals Subsystem:

Shared on-chip peripherals and off-chip interfaces:Support for Burst-mode, Page-mode, and NAND Flash memorySupport for SRAM, SDRAM, and PSRAM (cellular RAM)Full-Speed USB 2.0 Dual-Role Interface with OTG (On-The-Go) Host Mode or traditional Peripheral-only mode

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3. TECHNICAL BRIEF


Applications Subsystem for Enhanced Multimedia:

Parallel Peripheral Interface (PPI) for 10-bit dedicated camerasensor or video input interface (including ITU-656 and ITU-601 digital video)Separate external bus interface for parallel LCD displays (or camera module inputs)- reduces noise and loading on themain EBUS interfaceDedicated multi-channel DMA controller

OTHER FEATURES

Real-Time Clock (RTC) with AlarmFour General-Purpose TimersBaseband Converter InterfaceCompatible with Othello® radio subsystemHighly configurable interrupt controller architectureProgrammable bus arbitration to optimize system performanceSupports 13 MHz and 26 MHz Input ClocksProgrammable Power Management and Clock Management

- Slow Clocking Scheme for Low Idle Mode Current- Power Down modes- Dynamic Core Voltage Scaling from 1.1 - 1.5V

Independent I/O Voltage DomainsOn-chip support for EGPRS Data Services up to Class 10Embedded Trace Macrocell for MCU DebugJTAG Interface for Test and In-Circuit Emulation of both the MCU and DSP Advanced features forsecurity


3. TECHNICAL BRIEF

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3.2 Analog Main Processor(AD6855, U100)

The AD6855 is a complete mixed-signal baseband processor that combines all of the data convertersand power supply regulators required for a GSM 900 / GSM 850 / DCS 1800 / PCS 1900 mobile on asingle device, including HSCSD, GPRS and EGPRS.

Figure. 3-2-1 AD6855 FUNCTIONAL BLOCK DIAGRAM

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3. TECHNICAL BRIEF


3.2.1 General DescriptionThe AD6855 baseband transmit section supports the following mobile station GMSK modulation powerclasses:

GSM 900/850 power classes 4 and 5,DCS 1800 power classes 1 and 2, andPCS 1900 power classes 1 and 2.

The AD6855 baseband transmit section supports the following mobile station 8-PSK modulation powerclasses:

GSM 900/850 power classes E2 and E3,DCS 1800 power classes E2 and E3, andPCS 1900 power classes E2 and E3.

The AD6855 baseband receive section supports GMSK and 8-PSK applications.The AD6855 auxiliary section provides a voltage reference, an automatic frequency control DAC, anauxiliary ADC, and light controllers. The auxiliary ADC provides two channels for measuringtemperature using discrete external devices placed in critical locations. The AD6855 audio sectionprovides 8 kHz and 16 kHz sampling rates for voiceband data input and output and provides ninestandard sample rates ranging from 8kHz to 48 kHz for personal audio output on two PCM Audio serialports. The two Audio serial ports allow support for concurrency. The AD6855 power managementsection provides voltage regulators for digital and analog components, a battery charger, batteryprotection circuitry, and power supply activation logic. The AD6855 digital processor interface providesserial ports for control data, baseband transmit and receive data, and two for audio data.

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3. TECHNICAL BRIEF


3.2.2 Power BlockCSPORT interface, power management control interface and the circuit that generates power upRESET pulses (RESET2P8 and RESET1P8) for use by the DBB chip.All regulators except the USB interface regulator are powered from the main battery.The USB regulator is powered from USB VBUS.And the user presses KEYON which puts the AD6855 power management system into ACTIVATIONstate (see definitions below) and signals DBB software that it’s time to wake up and operate using theKEYOUT signal.

Figure. 3-2-2 AD6855 POWER BLOCK DIAGRAM

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3. TECHNICAL BRIEF


Figure. 3-2-3 AD6855 KEYON/KEYOUT BLOCK DIAGRAM

Figure. 3-2-4 AD6855 RESET GENERATION BLOCK DIAGRAM

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3. TECHNICAL BRIEF


Power On Reset Generator

The power-on reset signals (RESET1P8 and RESET2P8) are asserted based on the VCORE (ifVAPPCFG = 0), VMEM, VEXT, and VPLL regulators. RESET1P8 and RESET2P8 are low when resetis enabled and high when reset is disabled.When the outputs of all four regulators reach their corresponding threshold voltages, reset will bedisabled after a nominal reset period of 130ms.The outputs of all four regulators must remain at or above their corresponding threshold voltages forthe duration of the reset period for reset to be disabled (pulled high).The nominal 130ms reset period is restarted whenever all four regulators reach their thresholdvoltages. The nominal reset period of 130ms can be extended by connecting an external capacitor toCRST. This capacitor is charged using a small current when reset is enabled. Once the capacitorreaches the threshold, reset is disabled.Reset will be enabled immediately if any one of the four regulators falls below their correspondingthreshold voltages. In addition, reset will be enabled if VBAT falls below VRTC. The PWREN signal isthe logical AND of all the state controls that enable or disable many of the regulators on the chip. If theregulators enabled by PWREN are disabled by PMT state controls described below then PWRENmust go low.When PWREN goes low reset will be immediately enabled causing RESET1P8 and RESET2P8 to bepulled low.When reset is enabled, both RESET1P8 and RESET2P8 are actively pulled low. CRST is also activelypulled low when reset is enabled.

VABB Regulator Enable/Disable Logic Operation

The VABB regulator powers many on-chip analog circuits on the ABB. The VCXOEN signal, theVABBEn bit in the LDOControl1 Bit Positions ( Addr 0x35) register, and the AFCDACMode andAFCDACOn bits in the AuxControl1 Bit Positions ( Addr 0x13) register all particpate in controlling theVABB enable/disable.When the ABB power management system transitions from Off state, DDLO state, UVLO state, orThermal Shutdown State to Power Key Activation, Charger Activation, USB Charger Activation, orActive State VABB will be enabled. During these state transitions ABBEn = 0 and AFCDACMode = 0,VRF is enabled.Once the ABB power management system is in Power Key Activation, Charger Activation, USBCharger Activation, Active-Standby or Active State the VABB regulator enable/disable is controlled bythe information written to the VABBEn and AFCDACMode register bits by system software.

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3. TECHNICAL BRIEF


Digital Baseband Core (VCORE)

The Digital Baseband Core regulator supplies the digital baseband processor (DBB) core.The voltage on VCORE is selectable using the VCOREControl register.The VCOREActive code selects the voltage on VCORE in high power mode and the VCOREStandbycode selects the voltage on VCORE in low-power mode.

DBB Interface (VINT)

The DBB interface regulator supplies the DBB/ABB digital interfaces. The output voltage of the VINTregulator is nominal 1.8V.

Memory (VMEM)

The VMEM regulator supplies the external memory(s) and the interface to the external memory on thedigital baseband processor. The output voltage of the Memory Interface regulator can be selected as1.8V nominal or 2.8V nominal using the VMEMSEL terminal.

External Interface (VEXT)

The External Interface regulator supplies the Radio digital interface and the high voltage (>1.8V)interface between the digital baseband processor and various peripherals, such as the LED indicatorsand the LCD display.

SIM Interface (VSIM)

AD6855 is designed to support 3.0 V and 1.8 V SIMs exclusively (i.e. no 5 V SIMs).The SIM Interface regulator supplies the SIM interface circuitry on the digital processor and the SIMcard. By default the SIM Interface regulator output is 2.85 V, which can be decreased to 1.8 V if a 1.8V SIM is detected.

Real-Time Clock (VRTC)

The Real-Time Clock regulator supplies the Real-Time Clock module. The Real-Time Clock regulatoris optimized for low ground current.

Baseband Analog (VABB)

The Baseband Analog regulator supplies the analog portions of the AD6855. Operation of the VABBregulator is controlled by the VABBEn bit in the LDOControl1 register.If VABBEn = 0, the VABB regultor will be disabled unless the AFCDAC is enabled or VCXOEN = 1. IfVABBEn = 1 (the default state) VABB is enabled along with VCORE, VMEM, and VEXT. TheBaseband Analog regulator is optimized for high ripple rejection and low noise. The output of theBaseband Analog regulator should not be used as a supply for any external components.

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3. TECHNICAL BRIEF


Microphone (VMIC)

The Microphone regulator supplies the microphone interface circuitry. The Microphone regulator isoptimized for extremely high ripple rejection up to 217 Hz and low noise.

VRF (VRF)

The VCXO regulator supplies the voltage controlled crystal oscillator (VCXO). The VCXO regulator isoptimized for high ripple rejection and low noise.

USB Interface (VUSB)

The VUSB regulator supplies the USB transceiver located in the DBB. Digital Baseband PLL (VPLL)The VPLL regulator supplies the phase locked loop on the digital baseband (DBB).

General Purpose Regulator (VGP)

The General Purpose regulator is intended primarily to serve as a supply rail for camera modules. Itsvoltage is programmable by setting VGPSel[3:0] in theLDOControl2 Register. VGP is enabled bysetting the VGPEn bit in LDOControl1 to 1.

Applications Regulator (VAPP)

The VAPP regulator is an adjustable regulator that uses an off chip pass device. It has two modes ofoperation selected by the state of the VAPPCFG terminal. If VAPPCFG is pulled low the VAPPregulator functions as a programmable voltage applications supply.In this mode, VAPP is enabled or disabled using the VAPPEn bit of LDOControl1.

3.3 Power Amplifier Module(SKY77318, U601)

3.3.1 Internal Block Diagram

3.3.2 General DescriptionThe SKY77318 Power Amplifier Module (PAM) is designed in a low profile (1.2 mm), compact formfactor for quad-band cellular handsets comprising GSM850/900, DCS1800, and PCS1900 operation.The PAM also supports Class 12 General Packet Radio Service (GPRS) multi-slot operation.The module consists of separate GSM PA and DCS1800/PCS1900 PA blocks, impedance-matchingcircuitry for 50 ßŸ input and output impedances and a Power Amplifier Control (PAC) block with aninternal current-sense resistor. The custom BiCMOS integrated circuit provides the internal PACfunction and interface circuitry.Fabricated onto a single Gallium Arsenide (GaAs) die, one Hetero-junction Bipolar Transistor (HBT)PA block supports the GSM bands and the other supports the DCS1800 and PCS1900 bands. BothPA blocks share common power supply pins to distribute current.

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3. TECHNICAL BRIEF


Figure. 3-3-1 SKY77318 FUNCTIONAL BLOCK DIAGRAM

3.4 FEM (DGM1110M014, FL601)

The FEM is integrated of quadband RX SAWs, internal diplexer and ESD protection at Ant port to 8kVacc.

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3. TECHNICAL BRIEF


Figure 3-4-2 FEM CIRCUIT DIAGRAM

Figure 3-4-1 Band SW Logic Table

100pC644

2V75_VCXO

15

GSM850_RX11

GSM850_RX223

GSM900_RX1GSM900_RX2

4

VC11413

VC2

12VDD

FL601DGM1110M014

AN

T17

GND19

11GND2

16GND3

18GND4GND5

1920

GND6GSM1800_1900_TX

10

5GSM1800_RX1GSM1800_RX2

67


8

GSM850_900_TX

C63239p

C6280.1u

C643100p

10

R612

ANT_SW2ANT_SW1

ANT_SW1 ANT_SW2

GSM850/900 TX L H

DCS/PCS TX H H

GSM850/900 RX L L

DCS/PCS RX H L

3.5 RTC(FC-135, X100)

The AD6900 supports a Real Time Clock function. A total of 25pF+/-10% capacitance to graound isrequired (including board trace capacitance) on each OSCIN and OSCOUT.RTC functionality allows the application software to implement standard clock, calendar, or organizerfunctions.

A 32KHz clock is required in AD6900 based systems to take advantage of power saving “slowclocking” mode. A combination of an oscillator circuit within the AD6900 IC and an external 32KHzcrystal results in a stable 32kHz clock for use in the system. The purpose of this application note is todiscuss the system issues that affect operation of the 32kHz oscillator circuit.

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3. TECHNICAL BRIEF


Figure. 3-5-1 32.768KHz Crystal Basic Connections

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3. TECHNICAL BRIEF


3.6 Crystal(26 MHz, X601)

The AD6548 requires only an external low cost as the frequency reference. The circuitry to oscillatethe crystal and tune its frequency is fully integrated. The Oscillator is a balanced implementationrequiring the crystal to be connected across 2 pins. There is a programmable capacitor arrayincluded for coarse tuning of fixed offsets, and an integrated varactor for dynamic control. Theoscillator is designed for use with a 26MHz crystal. The crystal is connected as shown in figure 3-3.

Figure. 3-6-1 Crystal Oscillator External Connection

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3. TECHNICAL BRIEF


Dedicated control software ensures excellent frequency stability under all circumstances. The AD6548reference oscillators provides a 26MHz 600mVpp (typical) output (REF_OP), for use as the basebandclock input.

The AD6548 integrates this frequency tuning range the tuning section comprises a switchablecapacitor array for discrete steps and varactor for fine tuning. Contol of the tuning process is driven bysoftware, whereby the frequency can be maintained accurately during reception gaps and initialfrequency upon startup can be accurately estimated without the need for temperature sensors.

Figure. 3-6-2 Crystal Circuit Block Diagram

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3. TECHNICAL BRIEF


3.7 RF Tranceiver(AD6548, U602)

3.7.1 GENERAL DESCRIPTIONThe AD6548 provides a highly integrated direct conversion radio solution that combines, on a singlechip, all radio and power management functions necessary to build the most compact GSM radiosolution possible. The only external components required for a complete radio design are the RxSAWs, PA, Switchplexer and a few passives enabling an extremely small cost effective GSM Radiosolution.The AD6548 uses the industry proven direct conversion receiver architecture of the OthelloTM family.For Quad band applications the front end features four fully integrated programmable gain differentialLNAs. The RF is then downconverted by quadrature mixers and then fed to the basebandprogrammable-gain amplifiers and active filters for channel selection. The Receiver output pins can bedirectly connected to the baseband analog processor. The Receive path features automatic calibrationand tracking to remove DC offsets.

Figure. 3-7-1 CIRCUIT DIAGRAM of RF Tranceiver

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3. TECHNICAL BRIEF

The transmitter features a translation-loop architecture for directly modulating baseband signals ontothe integrated TX VCO. The translation-loop modulator and TX VCO are extremely low noise removingthe need for external SAW filters prior to the PA.The AD6548 uses a single integrated LO VCO for both the receive and the transmit circuits. Thesynthesizer lock times are optimized for GPRS applications up to and including class 12.

3.7.2 FUNCTIONAL DESCRIPTION


Figure. 3-7-2 RECEIVER CHAIN BLOCK DIAGRAM

- 32 -

3. TECHNICAL BRIEF


3.7.2.1 RECEIVER CHAIN

The AD6548/9 receiver section fully integrates all the RF and baseband signal processing. Each majorblock is described in the following sections.

Low Noise Amplifiers

The AD6548 includes four fully integrated Low Noise Amplifiers (LNAs), to support quad bandapplications without further external active components. The LNAs have differential inputs whichminimize the effect of unwanted interferers. The inputs are easily matched to industry standardFront End Modules (FEMs) or discrete Rx SAW filters. The outputs of the LNAs are directly coupledto the down-converting mixers.The voltage gain of the LNAs are typically 24 dB. Each LNA can be switch to a low gain mode whenreceiving large input signals as part of the AGC system.Down-Converting Mixers Two quadrature mixers are used to mix down the signals from the LNAs,one for the high bands (1800 and 1900 MHz) and one for the low bands (850 and 900 MHz). Theoutputs of the mixers are connected to the baseband section through an integrated single pole filterwith nominal cut-off frequency of 800kHz. This acts as a “roofing filter” for the largest blockingsignals (i.e. those ≥ 3MHz) and prevents the baseband amplifiers from being overloaded.

Baseband Amplifiers / Low Pass Filters

The baseband amplifiers provide the majority of the analog receiver gain. The filtering is provided byan integrated 5th order Chebyshev filter giving the necessary adjacent channel and blocking filtering,it is also acting as an anti-alias filtering for Baseband IC’s converters. A final low pass pole ispossible Baseband Output D.C. Offset Correction In order to minimize D.C. offsets inherent in thereceiver and maximize dynamic range a D.C offset correction circuit is integrated. This correction istriggered over the serial bus and then an offset tracking loop is enabled to minimize residual offsetsunder all conditions. The tracking loop is fully hardware integrated, requiring no softwareintervention.

Receiver Local Oscillator (LO) Generator

The Rx LO generator is used to avoid DC offset problems associated with LO leakage into thereceiver RF path. By operating the VCO at a frequency other than the desired receive frequencies,any leakage of the VCO will fall out of band. The LO generator is used to convert the offsetsynthesized VCO output to the on-frequency quadrature LO required by the chipset. The LOgenerator is implemented as a regenerative frequency divider, performing a 2/3 multiplication of theVCO output for the high band (DCS1800/PCS1900) and a 1/3 multiplication for low band (E-GSM900/GSM850).


3. TECHNICAL BRIEF

- 33 -

3.7.2.2 Transmit Path

Overview

The transmit section of the AD6548/9 radio implements a translation loop modulator.This consists of a quadrature modulator, high speed phase-frequency detector (PFD) with chargepump output, loop filter, TX VCO and a feedback down converting mixer. The VCO output (dividedby 2 for low band) is fed to the power amplifier with a portion internally fed back into the down-converting feedback mixer to close the feedback loop.

Quadrature Modulator

The Quadrature modulator takes the baseband I & Q signals and translates these into a GMSKsignal at the Transmit Intermediate Frequency (TX IF). After bandpass filtering and limiting the TX IFsignal is used as the reference input to the Phase Frequency Detector (PFD) of the transmit PLL.

Figure. 3-7-3 TRANSMIT PATH BLOCK DIAGRAM


3. TECHNICAL BRIEF

- 34 -

Phase Frequency Detector (PFD)

The PFD ensures that the transmitted signal contains the required modulation and is accuratelylocked to the desired GSM channel. The downconverted feedback signal from the TX VCO and theQuadrature Modulator output are phase compared by the PFD.The PFD charge pump generates a current pulse proportional to the difference in phase which isapplied to the loop filter.

Loop filter

To minimize complexity of the external PCB layout the TX loop filter is fully integrated into the IC. Atpower up the filter is automatically calibrated as part of the baseband filter cal, eliminating processtolerances. The calibration is fully integrated and requires no extra programming.

TX VCO

The Transmit Voltage Controlled Oscillator (TX VCO) and tank components are a fully integratedsubsystem. The subsystem includes PA drivers so the outputs are used to directly drive the externalPAs. The low noise oscillator design and internal filtering mean that external TX SAW filters are notrequired. In Low band operation the TX VCO output is divided by two and filtered. The TX VCO isautomatically calibrated to ensure optimum performance over its operating frequency of 1648 to1910 MHz.

Feedback Down-Converting Mixer

The feedback down converting mixer is used to translate the TX VCO output frequency to the TX IF.An integrated band pass filter exists between the mixer and the PFD to filter the mixers unwantedside band and higher order mixing products.

- 35 -

3. TECHNICAL BRIEF


3.7.2.3 Main Frequency Synthesizer

The AD6548 has a single fast-locking fractional synthesizer used for VCO control in both receive andtransmit mode. The entire system including VCO, tank, fractional N dividers, sigma deltacompensation, charge pump and loop filters are fully integrated.The only external component is the frequency reference. The synthesizer is controlled via the serialinterface. The VCO is fed into the respective dividers to generate the appropriate LO frequencies forthe RX and TX bands.

Fractional N Dividers

The fractional N divider allows the PLL system to have a smaller step size than theb comparisonfrequency which is set by the external reference to 26 MHz. This feature allows all the GSMfrequency band rasters to be achieved, with fast lock times and good phase noise characteristics.The divider section consists of a dual modulus 8/9 prescaler, integer M & A dividers, and fractionalN system based on sigma-delta modulation to generate the required fractional divide ratio. TheDenominator of the fractional divider can be set to 3 different values, (1040, 1170, 1235), dependingon the mode of operation. For example a denominator of 1040 with an input fraction F maintains anaverage value of F/1040 allowing 25 kHz steps when operated at a reference of 26 MHz.The Overall count value is thus:

8*M + A + FractionWhere: M is 4 bits, but the MSB is set to 1. A is 3 Bits. Fraction is N/ Denominator.The Denominator is set to one of 3 values: 1040, 1170, 1235. N is a 11 bit value.Values for M, A and N are loaded from serial interface word, but the denominator is automaticallyset according to the mode.Refer to the Programming Procedures for more details.

Phase Frequency Detector/Charge Pump

A Phase Frequency Detector (PFD) is used for the PLL phase detector. The charge pump isdesigned such that good matching of up and down currents is achieved over a wide outputoperating range. The charge pump output is internally routed to the integrated synthesizer loop filter.

Synthesizer Loop filter

To minimize complexity of the external PCB layout the Main Synthesizer loop filter is also fullyintegrated into the IC. No external components or adjustments are required.

Voltage Controlled Oscillator

The integrated voltage controlled oscillator (VCO) is a complete self-calibrating subsystem. Thisemploys a fully automated digital self-calibration function to ensure optimum phase noiseperformance over the entire frequency range. The VCO generates frequencies between 2520MHzand 2985MHz as required to operate in the four GSM bands for RX and TX.

- 36 -

3. TECHNICAL BRIEF

3.8 MEMORY(PF38F5060M0Y0BE, U202)

The 512Mbit Ballaire Wireless Flash memory with LPSDRAM stacked device family offers multiplehigh-performance solutions. The Ballaire flash die is manufactured on 65 n m ETOX™IX ProcessTechnology. It delivers 108 MHz synchronous burst and pagemode read rates with supports multi-partitioning with Read-While-Write (RWW) or Read-While-Erase (RWE) dual operations. TheLPSDRAM is a high-performance volatile memory operating at speeds up to 133 MHz withconfigurable burst lengths.The Ballaire stacked device features programmable driver strength and low-power operation.This Stacked Chip Scale Package (SCSP) device is packaged in a standard Intel® x16D footprint andsignal ballout.This model uses 512Mbits Flash memory and 128Mbits LPSDRAM memory with stacked.


Figure. 3-8-1 MEMORY BLOCK DIAGRAM

- 37 -

3. TECHNICAL BRIEF

The DBB External Bus Interface provides a memory-mapped interface to external devices such asNOR Flash, NAND Flash, SRAM, SDRAM, PSRAM, and other custom devices.The External Memory Interface contains three distinct memory controllers: a NAND Flash Controller(NFC), an SDRAM Controller (SDC), and the External Bus Controller (EBC).These three controllers share the external pins. They also share an arbiter through which the DMAcontrollers (via DDBUS, ADBUS, and DMABUS) and the processor cores (via DSPBUS andMCUEBUS) access external devices. The following figure shows the external memory interface blockdiagram.

The following table shows the pin list for the external memory interface which supportedby Main Base Band chipset(AD6900).


Figure. 3-8-2 DBB EBU SUBSYSTEM BLOCK DIAGRAM

- 38 -

3. TECHNICAL BRIEF


NFC Busy Request nNDBUSY

SDC Clock Output SDCLKOUT

SDC Clock Enable SDCKE

SDC address 10 SDA10

SDC Write Enable nSDWE

SDC Column Address Strobe nSDCAS

SDC Row Address Strobe nSDRAS

External Device Wait Input nWAIT

Burst Memory Clock BURSTCLK

Low Write / Byte Strobe / Data Mask / Address Latch Enable nLWR / nLBS / SDQM[0] / ALE

High Write / Byte Strobe / Data Mask/ Command Latch Enable nHWR / nUBS/ SDQM[1] / CLE

Auxiliary Chip Select nB1CS

Auxiliary Chip Select nB0CS

NAND Flash Chip Select nNDCS

SDRAM Chip Select nSDCS

General Purpose Chip Select nA5CS






Valid Address nADV

Read Enable nRD

Write Enable nWE

Address ADDR[25:0]

Data DATA[15:0]

Function Signal Name

- 39 -

3. TECHNICAL BRIEF

3.9 BT Module with integrated FM tuner (EWFMLBAXX, U201)


Figure. 3-9-1 Bluetooth ModuleBLOCK DIAGRAM

Figure. 3-9-2 BCM2048 POWERBLOCK DIAGRAM

- 40 -

3. TECHNICAL BRIEF

3.9.1 Power Block

To reduce the external BOM, the BCM2048 features three internal voltage regulators for the Bluetoothand FM sections that eliminate the need for filtering between the digital and noise sensitive RF circuits.These regulators operate from either 2.3V to 5.5V input supplies that support direct connection toLithium batteries, or to a 1.7V to 3.6V input supply.The pre-regulator, PRE-REG, regulates battery power supply down to a level acceptable to the internalmain regulators, BT REG and FM REG. The PRE-REG and the BT REG are enabled by an externalinput VREG_CTL. If VREG_CTL is low, the BCM2048 is shut down. If preregulation is not requiredbecause the input power supply is in the range 1.7V to 3.6V, VDDR5V and VDDR3V should be tiedtogether to form the input power supply.For more on supplying power to the BCM2048, refer to the reference schematic document, availablefrom your Broadcom representative.

3.9.2 Operational Description

The BCM2048 Bluetooth radio transceiver provides enhanced radio performance to meet the moststringent industrial temperature applications and the tightest integration into mobile handsets andportable devices. It is fully compatible with all standard TCXO frequencies and provides full radiocompatibility to operate simultaneously with GPS and cellular radios. It also integrates a complete FMand RDS/RBDS solution. The integrated solution saves power and board space, minimizes the BOM,and maximizes interface flexibility over a separate Bluetooth and FM solution. The FM subsystem canoperate independently of Bluetooth and achieve full performance while Bluetooth is operating.It is designed to cover from 76 MHz, up to 108 MHz, bands (US, Europe, Japan) and to operate fromeither the Bluetooth reference clock or a 32-kHz LPO input. The FM subsystem supports aconventional I2C compatible interface and analog outputs for legacy systems, as well as digitalinterface options, such as I2S and PCM. The I2S and PCM interfaces supports 48-kHz operation andcan be either master or slave. The analog interface consists of high-quality, line-level stereo DACs.The BCM2048 FM subsystem includes advanced RDS/RBDS capability. The BCM2048 synchronizes,demodulates, and decodes RDS/RBDS signals including CRC processing, post data filter detection,signal quality estimation, and buffering thus making it easy for an external application to read andprocess the RDS/RBDS data. The FM radio provides excellent reception, with 1 •ÏV for 26 dB (S+N)/Ntypical sensitivity and greater than 60-dB SNDR capability, allowing easier system integration andantenna design. The FM subsystem includes many sought-after features, including signal-dependantmono/stereo blend, soft mute, and signal bandwidth control. The system has digital RSSI, signalquality, and IF frequency error indicators for system monitoring. The FM subsystem containsembedded automatic search and scan features, and large RDS data buffers to simplify the interfacewith an external host.


- 41 -

3. TECHNICAL BRIEF

3.10 SIM Card Interface

The Main Base Band Processor(AD6900) provides SIM Interface Module.The AD6900 checks status Periodically During established call mode whether SIM card is inserted ornot, but it doesn't check during deep sleep mode. In order to communicate with SIM card, 3 signalsSIM_DATA, SIM_CLK, SIM_RST.And This model supports only 3V SIM Card.


(5000-6T-1.8SL)

(GPIO_100)

220n

C318

2V85_VSIM

C324

22p

2V85_VSIM

C3251000p

4C5C6

5

C76

GND178

GND2GND39

10GND4

J3001

C12

C2C3

3

C323

DNI

R316

15KSIM_RST

SIM_DATA SIM_CLK

Figure 3-10. SIM CARD Interface

Signals Description

SIM_RST This signal makes SIM card to HW default status.

SIM_CLK This signal is transferred to SIM card.

SIM_DATA This signal is interface datum.

- 42 -

3. TECHNICAL BRIEF

3.11 Micro-SD Card Interface

AD6900 provides an interface for Multi-Media Cards (MMC), Secure Digital Memory Cards (SD Card),and Secure Digital Input/Output Cards (SDIO). All of these cards use similar interface protocols. Themain difference between MMC and SD support is the initialization sequence. The main differencebetween SD card and SDIO support is the use of interrupt and read wait signals for SDIO.Features of the MMC/SD interface (MMCI) include:

Support for a single MMC, SD Memory or SDIO cardSupport for 1-bit and 4-bit SD modes (SPI mode is not supported)A six-pin external interface with clock, command, and up to 4 data linesCard detection using one of the data pinsCard interface clock generation from SYSCLKSDIO interrupt and read wait features

The following table lists the six pins in the MMCIThe MMCI consists of an MMC/SD controller along with a peripheral bus interface. The controller handles the multi-media and secure digital card functions. This includes clockgeneration, power management, command transfer, and data transfer. The bus interface contains 32-bit memory mapped registers, converts 16-bit PBUS accesses to 32-bit register accesses,


(SCHB1A0202)

R325 0 9

GND210

GND31112

GND4

4VDD

6VSS

J301

5CLK

3CMD

7DAT0DAT1

8DAT2

1

DAT32

GND1

1M

R328

R319

100K 100K

R323

C329

2.2u

2V93_VEXT

100K

R320

2V93_VEXT

R321

100K

2V93_VEXT

MC_D3

MC_DET

MC_D0MC_D1MC_D2

MC_CMDMC_CLK

Figure 3-11. Micro-SD Interface

- 43 -

3. TECHNICAL BRIEF

3.12 LCD Interface

LCD Module provides 2 LCD, Primary LCD(240x320, 262K Color) and Secondary LCD(128x160, 262kColor).The controller handles the multi-media and secure digital card functions. This includes clockgeneration, power management, command transfer, and data transfer. The bus interface contains 32-bit memory mapped registers, converts 16-bit PBUS accesses to 32-bit register accesses,Two LCD shared Data bus, RD, WR and RS but CS (chip select signal).BLU (Back Light Unit) is shared primary and secondary LCD and include 5 white LEDs. White LCDdriver is AAT3169 and it is descripted at next page.


(SUB LCD VSYNC)

(0.15mm)

(0.15mm)

(0.15mm)

(0.2mm/ Shield)

(0.2mm/ Shield)(0.15mm)

(IF_MODE = LOW : 16BIT)

(LCD_RD : Internally Pulled Up)

(0.1

5mm

)

(0.15mm)

(0.15mm)(0.4mm)

789

G1 G2

G3 G4

313233343536373839

44041424344

56

171819

2

202122 23

242526272829

3

30

CN802

1

10111213141516

2V93

_VE

XT

RCV_PRCV_N

LCD_DATA02

LCD_DATA00

LCD_DATA06

LCD_DATA04LCD_DATA11LCD_DATA10

LCD_DATA08LCD_DATA09



LCD_DATA01

LCD_DATA03

LCD_DATA05

LCD_DATA07

MLED5

MLED3

MLED1

LCD_RS

LCD_SUB_CS

LCD_MAIN_CS

LCD_WR

LCD_VSYNC

LCD_RESET

MLED

MLED2

MLED4

LCD_IDVIBRATOR_P

Figure 3-12-1. LCD Interface

- 44 -

3. TECHNICAL BRIEF

The AAT3169 is a low noise, constant frequency charge pump DC/DC converter that uses a tri-modeload switch (1X), fractional (1.5X), and doubling (2X) conversion to maximize efficiency for white LEDapplications. The AAT3169 is capable of driving six LEDs for a total of 180mA from a 2.7V to 5.5Vinput. The current sinks may be operated individually or in parallel for driving higher current LEDs.A low external parts count (two 1µF flying capacitors and two small 1µF capacitors at IN and OUTCP)make this part ideally suited for small, battery-powered applications.AnalogicTech's AS2Cwire™ (Advanced Simple Serial Control™) serial digital input is used to enable,disable, and set current for each LED with a 16-level logarithmic scale plus four low-current settingsdown to 115µA. For optimized efficiency, low-current settings require only 65µA of housekeepingcurrent.Each output of the AAT3169 is equipped with builtin protection for output short-circuit and auto-disablefor load short-circuit conditions. Built-in softstart circuitry prevents excessive inrush current duringstart-up. A low-current shutdown feature disconnects the load from the input and reduces quiescentcurrent to less than 1µA.


LCD BACKLIGHT

D50

3R

SB

6.8C

ST2

R

C518

1u

R50

3

100K

1u C51

7

VBAT

C5191u

EN_SET3

10GND

9IN

OUTCP6

PGND15

C5201u

AAT3169IFO-T1U501

C1+4

5C1-

C2+7

C2-8

11D1D2

1213

D314

D41

D52

D6MLED5

MLED

LCD_BACKLIGHT_CTRT

MLED1MLED2MLED3MLED4

Figure 3-12-2. AAT3169 CIRCUIT DIAGRAM

- 45 -

3. TECHNICAL BRIEF

The AAT3169 can setup three group as Maximum current, 15mA, 20mA and 30mA Each group has 16steps of 2 stages as current level, so totally has 32 steps.One stage is about high current and the other stage is about low current.Refer to Detail feature below.

This model uses level 5 in maximum 20mA group and level 15 in low current mode. But it don’t uselow current stage.


Figure 3-12-3 AAT3169 High Current Stage Figure 3-12-4 AAT3169 Low Current Stage

- 46 -

3. TECHNICAL BRIEF

3.13 Battery Charger Interface

The ISL6299 is a fully integrated low-cost single-cell Li-ion or Li-polymer battery charger. The chargeraccepts two power inputs, normally one from a USB port and the Other from a desktop cradle. TheISL6299 is an ideal charger for smart handheld devices that need to communicate with a personalcomputer via USB.The ISL6299 features 28V and 7V maximum voltages for the cradle and the USB inputs respectively.Due to the 28V rating for the cradle input, low-cost, large output tolerance adapters can be usedsafely. When both inputs are powered, the cradle input is used to charge the battery.


(GPIO_037)(GPIO_059)

(1%)

R21610K

R21336K

R214100K R212

100K

CHG_ABB

R21010K

VUSBIN

BAT10

CRDL1

8GND

9ICDL

6IMIN

PGND11

2USB

USBON7

4_CHG

_EN5

_PPR3

ISL6299U203

C215

1u

VBAT

USB_DETCHG_EN

Figure 3-13 BATTERY CHARGER BLOCK

From External Source(Wall Adaptor or Computer)

- 47 -

3. TECHNICAL BRIEF

3.14 Keypad Interface


UP

4

DOWN

# SEND

OK

RIGHT

8

7

MENU

1

CLEAR

(VOLUME_DOWN)

0

END

LEFT

CONF

3

*

6

(VOLUME_UP)

5

9

SIDEKEY_PAD

2

F1

KB420

KB412

KB409

VA502EVLC18S02015

680

R614

KB418

VA

402

EV

LC18

S02

015

KB421

KB416

KB404KB402

KB413KB411

VBAT

KB410

KB408

CN

400

1234

KB422

680R402

R404 680

VA

404

EV

LC18

S02

015

KB403

KB405

KB400 KB401

VA

403

EV

LC18

S02

015

KB406 KB407

680R403

KB415

680

R405

KB419

VA503EVLC18S02015

KB414

10K

R40

6

KB417

KEY_COL1

KEY_ROW4

KEY_ROW3

KEY_ROW2

KEY_COL0

KEY_ROW1

POWERKEY

KEY_COL3

KEY_COL4

KEY_ROW0

KEY_ROW5

KEY_COL2

Figure 3-14-1 MAIN KEY STRUCTURE

HOT 3 HOT 4

Match Two Column Lines

HOT 1 HOT 2to Outer Circle of Buttons

KB702KB701 KB703 KB704

KEY_ROW5

KEY_COL3

KEY_COL4

KEY_ROW4

Figure 3-14-2 HOT KEY STRUCTURE

- 48 -

3. TECHNICAL BRIEF

The keypad interface supports a row/column decoding of a keyboard matrix of up to 8 rows and 8columns. The interface generates an interrupt when any key is pressed, and the interrupt is routedthrough the system interrupt controller to the MCU. Software must scan the columns to determinewhich key was pressed. Debouncing must also be implemented in software. The keypad interfaceconsists of eight tristateable KEYPADCOL outputs and eight KEYPADROW inputs. Pressing a keypulls the corresponding KEYPADROW input low. When all KEYPADCOL outputs are driven low,pulling any KEYPADROW input low generates an interrupt.In the interrupt service routine, the keypad must be scanned by setting only one column output low ata time and reading the row inputs. A zero is read anywhere a key is pressed on that column. The scanshould be repeated at regular intervals until no key is being pressed. To implement debouncing, thesoftware must require the same scan result for several scans. The keypad interrupt should not becleared until no key has been pressed for several scans.The 8 by 8 matrix of rows and columns provides the possibility of up to 64 keys (with an additional 8 ifa ghost column is used). Full flexibility in enabling and disabling individual rows and columns isprovided. Any rows or columns not used should be disabled in the Keypad Control Register. Thefollowing figure shows the keypad interface and interrupt generation logic.


Figure 3-14-3 keypad interface and interrupt generation logic

- 49 -

3. TECHNICAL BRIEF

3.15 Audio Interface

The AD6855 Audio Section supports communications and personal audio applications.The Audio Section provides an audio codec with two digital-to-analog converters and an analog-to-digital converter, a microphone interface, and analog input and output channels.

Audio and Music Serial Ports

The AD6855 Audio Serial Port is described in detail in the Audio Serial Port (ASPORT) section below.AD6855 Music serial port (MSPORT) is described in detail in the Music Serial Port (MSPORT) sectionbelow.

Audio Codec

The AD6855 audio codec supports communications applications with digital sample rates of 8 kHz or16kHz. DAC 1 is used for receiving speech. An ADC is used for sending speech. The AD6855 audiocodec supports personal audio applications with digital sample rates of 8 kHz, 11.025kHz, 12 kHz, 16kHz, 22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, or 48 kHz. DAC 1 and DAC 2 are used for monophonicaudio. The channels are common in the digital section. DAC 1 and DAC 2 are used together for stereoaudio, with DAC 1 decoding the left-channel digital input and DAC 2 decoding the right-channel digitalinput.


Figure 3-15-1 ABB Internal Audio Block Diagram

- 50 -

3. TECHNICAL BRIEF

Audio codec operating modes can be controlled by writing 5 bit codes in the AudMode field of theAudControl1 register and in the AudMode_M field of the AudControl4 register.AudControl1 programs the sampling rate and stereo or monophonic operating mode for PCM audiosamples input via the ASPORT.AudControl4 programs the sampling rate and stereo or monophonic operating mode for PCM audiosamples input via the MSPORT.The AudControl1 and AudControl4 contain control bits that allow system software to turn on threeaudio loudness enhancement techniques meant for use when driving 8 ohm loudspeakers. These arehigh pass filter, dynamic range compressor, and x4 gain boost.These loudness enhancement techniques can be used with any AudMode or AudMode_M setting. Andare programmed seperately and independently for the ASPORT and MSPORT PCM audio decoderdata streams.

Analog Audio Output & Input Configurations

Output configurations are set by AudOS[4:0] bits in the AudControl2 register. Input configurations areset by AudIS[3:0] bits in the AudControl2 register.AudIn3LMute bit high in the AudMuteControl register (0x27). For configurations using “DAC2+AIN3R”,the AIN3R input may be muted by setting AudIn3RMute bit high in the AudMuteControl register. Forconfigurations using “AIN3(L)”, the AIN3L and AIN3R inputs may be used as a differential input or theAIN3L input may be used as a single-ended input.Single ended configuration is chosen by setting AudIn3Cfg bit high in the AudControl3 register (0x32).

Audio DACs and Analog Filters

The Audio DACs are over-sampled switched-capacitor DACs. The analog filters are switched-capacitor filters followed by active-RC filters.


- 51 -

3. TECHNICAL BRIEF

Analog Audio Output Drivers

Audio Output 1

PGA gain for Audio Output 1 can be set by using bits AudOut1Gain[4:0] in the AudOut12Control(0x21 ) register. Output 1 is used for 32ßŸ interface with differential output but can be used bysingle ended interface.And this model only uses passive filters between output port and Receiver.

Audio Output 2

PGA gain for Audio Output 2 can be set by using bits AudOut2Gain[4:0] in the AudOut12Control(0x21) register. Output 2 is used for 8ßŸ. This port supports only a differential interface. And thismodel only uses passive filters and Class D audio amplifier between output port and speaker. Audioamplifier Gain is set by hardware component and gain is 6 times.


Figure 3-15-2 ABB Audio OUTPUT1


- 52 -

3. TECHNICAL BRIEF

Audio Output 3

PGA gain for Audio Output 3 Stereo Configuration can be set by using bits AudOutLGain[4:0] andAudOutRGain[4:0] in the AudOutLRControl (0x22) register. When Audio Output 3 configured asmonophonic differential output PGA gain can be set by using bits AudOut3Gain[4:0] in theAudOut3Control register (0x23).This port is used for headset speaker in stereo. This port must use DC-coupling capacitor as outputDC. It uses two 100uF capacitor each other in left and right output.

Analog Audio Input

The AD6855 provides two analog input channels, AIN1 and AIN2, that may be used for bothmicrophone and line inputs. The AIN1 and AIN2 channels are identical. One of the two channels istypically used with microphone built into a handset. The other channel is typically used with an externalmicrophone or external line input.



Figure 3-15-4 Audio Input Block Diagram

- 53 -

3. TECHNICAL BRIEF

Analog Input AIN1, AIN2 and VMIC configurations can be chosen by setting bits AudIS[3:0] in theAudControl2 register (0x1E ). Additional gain of 9dB can be inserted into Analog Audio Input signalchain by setting AudPreampGainSel bit high in the AudControl3 register (0x32 ).

Microphone Interface

The microphone pre-amplifier and associated integrated resistors support electret microphones. Aninternal (Configuration 11) or external (Configuration 01 or 10) load resistor converts the current inputof the microphone to a voltage signal which is amplified using a low-noise pre-amplifier. TheMicrophone signal path also includes an additional programmable gain of +9 dB gain directly after thepre-amplifier. Different microphones require different DC bias currents for optimum sensitivity.

Audio ADC and PGA

The Audio ADC is a high-order single-bit sigma-delta ADC that includes a switchedcapacitor PGA atthe input.

Digital Filters

The AD6855 Audio Section provides two digital filters. The voiceband filter is used for applications witha 8 kHz digital sample rate. The high-quality audio filter is used for applications with higher digitalsample rates.

Audio Accessory Detection

The AD6855 provides for detection of audio headset accessory insertion, extraction, and hookswitchevents. The detector circuit is designed to operate with minimum power in standby mode. There aretwo pins dedicated to the accessory detector. AccDet is intended to interface to the externalmicrophone and monitor its bias voltage. The ACCDET terminal is used to sense hookswitch eventswhile a headset accessory is inserted. The JackSense terminal is interfaced to the switch pin of theJack socket or a Jack Sense terminal on a handset system connector.


- 54 -

3. TECHNICAL BRIEF

Use of the AccDet Terminal for Hookswitch Event Detection

The AccDet terminal may be connected directly to the Ain2P pin in the case of a DC coupling of theaccessory microphone. If the accessory microphone is connected via a capacitor then the AccDet pinmay be connected to the microphone side of the coupling capacitor. The AccDet terminal is used todetect hookswitch events. Hookswitch events cause the system to answer an incoming phone call orhang up on an active phone call.The detector circuit is in operation only if an accessory is inserted. It monitors the voltage at theAccDet terminal using a comparator as shown Figure below.Associated logic then provides the AudAccInt interrupt and updates the contents of the DetectorControl register as follows on each comparator transition.


Figure 3-15-5 Audio Accessory Detection Block Diagram

- 55 -

3. TECHNICAL BRIEF

Use of the JackSense Terminal for Accessory Insertion and Removal Detection

Accessory insertion and removal is detected using the JackSense terminal.The JackSense terminal is connected to a signal produced by a mechanical connection that indicatesthe presence or absence of the headset accessory. The insertion/removal sense circuit fed byJackSense is flexible as far as the characteristics of the mechanical connection are concerned. Themechanical connection will often times be pulled down in one state and floating in the other. In suchcases a 1uA on chip current source is used to pull JsckSense to VBAT when the mechanicalconnection is floating.To avoid false interrupts the Accessory detect logic has a hardware polling loop which will preventInterrupt generation from comparator transitions with a duration of no less than 10 mSec.


Figure 3-15-6 Accessory Insertion/Removal Detector Block Diagram

- 56 -

3. TECHNICAL BRIEF

3.16 Camera Interface(2M Fixed Focus Camera)

3.16.1 AD6900 Camera Interface (PPI Block)AD6900 provides a Parallel Peripheral Interface (PPI) that can connect directly to camera modules.The PPI is an input-only parallel external port that accommodates up to 10 bits of data, in a variety ofRGB and YUV color formats. In addition, ITU-656 (CCIR656) and ITU-601 (CCIR601) compatible datatransfers are supported.

The PPI feature set includes:Eight dedicated data pins and two data pins muxed with GPIOsParallel data transfer rates up to 32.5 MB/sTwo frame syncs (horizontal and vertical), with programmable polarityA bidirectional clock pin, with programmable output clock rate up to 65 MHzSynchronization by detection of embedded preamble codes or by using frame synchronization pinsITU standard and counter controlled data transfers8-bit data packing to reduce DMA bandwidth for image dataData re-ordering to reduce DMA bandwidth for YUV 4:2:2 dataA 32 word by 16 bit input FIFO

The PPI offers specific configurations to support still image and video data inputs.The PPI supports ITU-601 and ITU-656 standards. It also provides Active Video Only and Entire Fieldoperational modes. In all modes, data packing options optimize DMA transfer bandwidth for YUV 4:2:2and other data formats.The PPI pins are listed in the following table.


- 57 -

3. TECHNICAL BRIEF

PPI Architecture

A simplified PPI block diagram is shown in the following figure. The PPI contains a 32 word by 16 bitFIFO, interrupt request (IRQ) generation logic, clock dividers, and memory mapped registers(MMRs).The PPI provides a parallel interface to camera modules.


Bi-Directional Input Clock PPI_CLK

Input Frame Sync PPI_VSYNC

Input Frame Sync PPI_HSYNC

Input Optional Data PPI_DATA_10B_LSB[0]

Input Optional Data PPI_DATA_10B_LSB[1]

Input Data PPI_DATA[0]








Direction Default Function Signal Name

Figure 3-16-1 PPI Block Diagram

- 58 -

3. TECHNICAL BRIEF

FIFO Operation

The PPI FIFO is 32 words by 16 bits. Received data is stored in the FIFO either as 16- bit words or as8-bit words. The data is only stored a 8-bit words when the DLEN and PACK_EN bits in the PPIControl register are cleared. The data in the FIFO may be read whenever the FIFO is not empty. TheDMA controllers may burst read the FIFO data whenever at least four words are contained in theFIFO. These FIFO status conditions are reported in the PPI Status register and can be unmasked inthe PPI DMA Interrupt Mask register to generate interrupts.

Interrupt Request Generation

The PPI generates interrupt requests for the DMA controllers, MCU, and DSP.An interrupt can be generated for the following conditions:

Start of a frameFIFO overflowFIFO underflowIncorrect number of data words in a line or lines in a framePreamble code error (in ITU-656 mode)

PPI Clock Frequency

The PPI transfer clock may be provided either by an external source or internally by the PPI. BCLK isthe source for the PPI clock divider. The clock may be divided by 1, 2, 3, 4, 5, 6, 7,8, 16, 32 or 64 fromBCLK. However, the maximum frequency supported is 32.5 MHz for packed 8-bit transfers and 16.25MHz for 10-bit or unpacked 8-bit transfers. At higher clock frequencies, the APPDMA does not supportthe incoming data bandwidth. A PPI FIFO (32 words deep, 16-bits wide) is provided to compensate forarbitration latency encountered by APP DMA accessing system resources.


- 59 -

3. TECHNICAL BRIEF

3.17 KEY BACLKLIGHT LED Interface

The AD6855 Auxiliary Section provides three independent PWM light controllers.The PWM output controllers regulate the average current through active lights.

The output frequencies of the LIGHTx PWM output controllers are set by the Light12Period (0x2F) andLight3Period (0x31) control registers.With fMCLK = 13 MHz, frequencies ranging from 50.781 kHz to 49.591 Hz may be specified.

fLIGHT1 = ( fMCLK / 256 ) / ( Light12Period[9:0] + 1)fLIGHT2 = ( fMCLK / 256 ) / ( Light12Period[9:0] + 1)fLIGHT3 = ( fMCLK / 256 ) / ( Light3Period[9:0] + 1)

he output duty cycles of the PWM output controllers are set by the LightxDutyCycle[7:0] controlregisters - Light1DutyCycle (0x2D), Light2DutyCycle (0x2E) and Light3DutyCycle (0x30).

This model use only Light3 port and 2 high luminance white LED with light guard film.


Figure 3-17 ABB Light Controller Block Diagram

- 60 -

3. TECHNICAL BRIEF

3.18 Vibrator Interface

Vibrator is drived by Dual BJT with bias resistor.VIBRATOR_P is connected with + terminal of vibrator and - terminal is connected with Ground. It iscontrolled by VIBRATOR signal of DBB with only ON/OFF function.


2.2

R408

2

Q1_B

6

Q1_C

1

Q1_E

Q2_B

5

Q2_C

3

Q2_E

4

Q400

VBAT

VIBRATOR_P

VIBRATOR

Figure 3-18 Vibrator Driver Block Diagram

4.1 RF Component

U601 Power Amp Module (SKY77318)

U602 (AD6548) RF Main Chip (Transceiver)

X601 Crystal, 26MHz Clock

FL601 FEM

- 61 -

4. TROUBLE SHOOTING

4. TROUBLE SHOOTING


TEST POINT

U601FL601

U602

X601

Figure 4-1


- 62 -

4. TROUBLE SHOOTING

4.2 RX Trouble

START

Re-download SW or Do calibration again

HP8960 : Test mode62 CH, 7 level setting (TCH)

62CH, -60dBm setting (BCCH)Spectrum analyzer setting

Oscilloscope setting

(1) CheckCrystal Circuit

(2) CheckMobile SW &FEM

(3) CheckRX I/Q Signal

CHECKING FLOW


4. TROUBLE SHOOTING

- 63 -

(1) Checking Crystal Circuit

C120(b)

C619(a)

26 MHzO.K?

NoNo

Crystal Circuit is OKSee next Page to check Mobile SWSee next Page to check Mobile SW

Yes

Change 601


(GPIO_072)

0.1uC634

C6250.1u

VLDO1

VLDO1

47pC618

82pC617

C62927p

C6270.1u

16

9VLDO3

3029

RX900B

SC

LK65

SD

ATA

7S

EN

11TXOP_HI

TXOP_LO10

18V

AFC

_NC

VBAT14

VC

C_B

BI

4

24V

CC

_BB

Q1

VC

C_F

E

VC

C_R

EF

17

12VCC_TXVCO

13VDD

15VLDO1VLDO2

GND33

I2 3

IB NC

8

Q23 22

QB

20R

EFI

NR

EFI

NB

19

RE

F_O

P21

RX18002827

RX1800BRX1900

26RX1900B

25

RX8503231

RX850BRX900

AD6548U602

2 34

C641100p

26M

Hz X60

1TS

X-3

225_

26M

HZ1

0.1u

2V75_VCXO

C626C6300.1u

C640100p

220n

C622

C63639p

0.1u

C62

0

82p

VBAT

C642

100pC639

2V93_VEXT VLDO1

10K

R611

1uC619

S_DATA

IP

QP

QN

IN

S_CLK

26M

S_EN

AFC

PPI_HSYNCAB21AA22

PPI_VSYNC

K19SIMCLK

L19SIMDATAIO

PPI_CLKY21L22

KEYPADROW_4AA12

F22MC_CLK

J19MC_CMD

J17MC_DAT_0

E21MC_DAT_1MC_DAT_2

F21K17

MC_DAT_3

GPIO_010P4

L21EB2_ADDR_07EB2_ADDR_08

P22

EB2_ADDR_09N22U19

EB2_ADDR_10T17

EB2_ADDR_11EB2_ADDR_12

W18

P19EB2_NRD

EB2_NWAITW17

EB2_NWEN17

EB2_ADDR_00P21P17


R19T19


U22R17

EB2_ADDR_05K21

EB2_ADDR_06

B14CLKIN

1000pC120

BT_LDO_EN

26M

CAM_PWDN

LOUD_SPK_EN

CAM_LDO_EN

BT_RESETCAM_RESETLCD_RESET

CAM_HSYNCCAM_VSYNC

CAM_PCLK

KEY_ROW4

MC_D1MC_D2MC_D3

SIM_CLKSIM_DATA

MC_CLKMC_CMDMC_D0

LCD_RSLCD_VSYNC

CAM_I2C_DATACAM_I2C_CLK

LCD_WR

FOLDER_DET

TEST POINT CHECKING FLOW

CIRCUIT

WAVEFORM

Graph 4-2-1(a) Graph 4-2-1(b)

Figure 4-2-1


4. TROUBLE SHOOTING

- 64 -

(2) Checking Mobile SW & FEM

ANT_SW1ANT_SW2

2V75_VCXO

100pC644

2V75_VCXO

15

GSM850_RX11

GSM850_RX223


4

VC11413

VC2

12VDD

FL601DGM1110M014

AN

T17

GND19

11GND2

16GND3

18GND4GND5

1920

GND6GSM1800_1900_TX

10


67


8

GSM850_900_TX

C63239p

C6280.1u

C643100p

10

R612

ANT_SW2ANT_SW1

TEST POINT

CIRCUIT

Figure 4-2-2

WAVEFORM

EGSM RX

ANT_SW1

ANT_SW2

Low

Low

Graph 4-2-2 FEM Control Signal


4. TROUBLE SHOOTING

- 65 -

Check C643,C644,C632

Check whether Ant SW

Set as RX mode

Refer to Table 4.2.2 Yes

Check SW601 Pin ANT,RF

with RF Cable connected. Open

Yes

Changing SW601

Check SW601 Pin ANT,RF

with No RF Cable ConnectedShort

Yes

Changing SW601

For these 2 test case,

No Call connection is needed

No

No

Changing the Board.

Check RF Level of

FL601.3(for EGSM) & FL601.5&7(for DCS&PCS)

Ant SW & Mobile SW is OK

See next Page to check

Rx I/Q Signal

Pin 16 : ~ -62dBmPin 14 & 12 : ~ -63dBm

No Changing FL601

Yes

No

For this RF Level test case,

RX Stand alone Mode is needed refer to chapter 10

Check Vctrl 1,2 & Vcxo

CHECKING FLOW

Table 4.2.1

Switch Mode Vc1 Vc2

GSM850/900 Tx 0 1

GSM1800/1900 Tx 1 1

GSM850/900 Rx 0 0

GSM1800/1900 Rx 1 0

(3) Checking RX I/Q


4. TROUBLE SHOOTING

- 66 -

Redownload software and calibration again

Similar?

No

Replace U602

Yes

NoCheck C617, C642.

Check if there is any

Major difference

Refer to graph 4.2.3

U602 U617

C642

SW601

TEST POINT

WAVEFORM

CIRCUIT

Graph 4-2-3

Figure 4-2-3


(GPIO_072)

0.1uC634

C6250.1u

VLDO1

VLDO1

47pC618

82pC617

C62927p

C6270.1u

16

9VLDO3

3029

RX900B

SC

LK65

SD

ATA

7S

EN

11TXOP_HI

TXOP_LO10

18V

AFC

_NC

VBAT14

VC

C_B

BI

4

24V

CC

_BB

Q1

VC

C_F

E

VC

C_R

EF

17

12VCC_TXVCO

13VDD

15VLDO1VLDO2

GND33

I2 3

IB NC

8

Q23 22

QB

20R

EFI

NR

EFI

NB

19

RE

F_O

P21

RX18002827

RX1800BRX1900

26RX1900B

25

RX8503231

RX850BRX900

AD6548U602

2 34

C641100p

26M

Hz X60

1TS

X-3

225_

26M

HZ1

0.1u

2V75_VCXO

C626C6300.1u

C640100p

220n

C622

C63639p

0.1u

C62

0

82p

VBAT

C642

100pC639

2V93_VEXT VLDO1

10K

R611

1uC619

S_DATA

IP

QP

QN

IN

S_CLK

26M

S_EN

AFC

CHECKING FLOW


4. TROUBLE SHOOTING

- 67 -

START

Redownload SW or Do calibration again

HP8960 : Test mode62 CH, 7 level setting (TCH)

62CH, -60dBm setting (BCCH)Spectrum analyzer setting

Oscilloscope setting

(1)CheckCrystal Circuit

(3)CheckPAM control

signal

(4)CheckTX I/Q Signal

(2)CheckMobile SW

& FEM

4.3 TX Trouble

CHECKING FLOW

(1) Checking Crystal Circuit


C120(b)

C619(a)

26 MHzO.K?

NoNo

Crystal Circuit is OKSee next Page to check Mobile SWSee next Page to check Mobile SW

Yes

Change 601

TEST POINT CHECKING FLOW

CIRCUIT

WAVEFORM

Graph 4-3-1(a) Graph 4-3-1(b)

Figure 4-3-1


(GPIO_072)

0.1uC634

C6250.1u

VLDO1

VLDO1

47pC618

82pC617

C62927p

C6270.1u

16

9VLDO3

3029

RX900B

SC

LK65

SD

ATA

7S

EN

11TXOP_HI

TXOP_LO10

18V

AFC

_NC

VBAT14

VC

C_B

BI

4

24V

CC

_BB

Q1

VC

C_F

E

VC

C_R

EF

17

12VCC_TXVCO

13VDD

15VLDO1VLDO2

GND33

I2 3

IB NC

8

Q23 22

QB

20R

EFI

NR

EFI

NB

19

RE

F_O

P21

RX18002827

RX1800BRX1900

26RX1900B

25

RX8503231

RX850BRX900

AD6548U602

2 34

C641100p

26M

Hz X60

1TS

X-3

225_

26M

HZ1

0.1u

2V75_VCXO

C626C6300.1u

C640100p

220n

C622

C63639p

0.1u

C62

0

82p

VBAT

C642

100pC639

2V93_VEXT VLDO1

10K

R611

1uC619

S_DATA

IP

QP

QN

IN

S_CLK

26M

S_EN

AFC

PPI_HSYNCAB21AA22

PPI_VSYNC

K19SIMCLK

L19SIMDATAIO

PPI_CLKY21L22

KEYPADROW_4AA12

F22MC_CLK

J19MC_CMD

J17MC_DAT_0

E21MC_DAT_1MC_DAT_2

F21K17

MC_DAT_3

GPIO_010P4


P22

EB2_ADDR_09N22U19

EB2_ADDR_10T17


W18

P19EB2_NRD

EB2_NWAITW17

EB2_NWEN17

EB2_ADDR_00P21P17


R19T19


U22R17

EB2_ADDR_05K21

EB2_ADDR_06

B14CLKIN

1000pC120

BT_LDO_EN

26M

CAM_PWDN

LOUD_SPK_EN

CAM_LDO_EN


CAM_HSYNCCAM_VSYNC

CAM_PCLK

KEY_ROW4

MC_D1MC_D2MC_D3

SIM_CLKSIM_DATA

MC_CLKMC_CMDMC_D0

LCD_RSLCD_VSYNC


LCD_WR

FOLDER_DET

- 69 - LGE Internal Use OnlyCopyright © 2008 LG Electronics. Inc. All right reserved. Only for training and service purposes

(2) Checking Mobile SW & FEM

ANT_SW1ANT_SW2

2V75_VCXO

TEST POINT

CIRCUIT

Figure 4-3-2

WAVEFORM

Graph 4-3-2 FEM Control Signal100pC644

2V75_VCXO

15

GSM850_RX11

GSM850_RX223


4

VC11413

VC2

12VDD

FL601DGM1110M014

AN

T17

GND19

11GND2

16GND3

18GND4GND5

1920

GND6GSM1800_1900_TX

10


67


8

GSM850_900_TX

C63239p

C6280.1u

C643100p

10

R612

ANT_SW2ANT_SW1


4. TROUBLE SHOOTING

- 70 -

Check SW601.ANT, RF with RF Cable connected. Open

Yes

Changing SW601

Check SW601.ANT,RF

with RF Cable disconnectedShort

Yes

Changing SW601No

No

Check C643,C644,C632

Check whether Ant SW

Set as TX mode

Refer to Graph 4.3.2

Refer to Table 4.3.2Yes

Check Vctrl 1,2 & Vcxo

Check RF Level of

FL601.15(for EGSM) & FL601.10(for DCS&PCS)

Pin15 : ~29.5dBm

Pin10 : ~26.5dBmNo

Yes

NoChanging board

Go to 4.3.4 Checking PAM control signal

END

For the test,

TX Stand alone Mode is needed. Refer to chapter 10 (PL=7 for EGSM, PL=2 for

DCS&PCS)

CHECKING FLOW

Table 4-3-1

Switch Mode Vc1 Vc2

GSM850/900 Tx 0 1

GSM1800/1900 Tx 1 1

GSM850/900 Rx 0 0

GSM1800/1900 Rx 1 0


4. TROUBLE SHOOTING

- 71 -

(3) Checking PAM Control Signal

Similar?

Yes

No

Check TX_RAMP and PAM_EN

Any Major Difference or not

¨

Similar?

Yes

No

Go to Next Step

Similar?

Yes

No Re-download S/W

Check if there is

Any Major Difference or not

R̈efer to Graph 4.3.3

C614 PA_ENC613 PA_BAND

C604 Tx_Ramp(GPIO_060)

(GPIO_070)

0.01uC606

DNIC615

C60439p

27pC614

22uC601

0.01uC605

VBAT

DNIC610

C612 4.3nH

0R613

C60233p

27pC613

1K R603

R610

82

C603

C616

2.7p

0.01u

0.5pC609

51

R607

7G

ND

2G

ND

38

GN

D4

910G

ND

512

GN

D6

13G

ND

7G

ND

814

GN

D9

16

P_GND21

19RSVD_GND

VA

PC

20

VB

ATT

17 2V

CC

1A

6V

CC

1B

U601SKY77318

BS1

3DCS_PCS_INDCS_PCS_OUT

15

4EGSM_IN

11EGSM_OUT

ENABLE18

GN

D1

5

TX_RAMP

PA_EN

PA_BAND

TEST POINT

CHECKING FLOW

WAVEFORM

CIRCUIT

Graph 4-3-3

Figure 4-3-3


4. TROUBLE SHOOTING

- 72 -

(4) Checking TX I/Q

Re-download the SoftwareAnd calibrate

Check if there isAny Major Difference

R̈efer to Graph4.3.4

Similar?

Yes

No Replace U602

U602 U617

C642

SW601

TEST POINT

WAVEFORM

CIRCUIT

Graph 4-3-4

Figure 4-3-4


(GPIO_072)

0.1uC634

C6250.1u

VLDO1

VLDO1

47pC618

82pC617

C62927p

C6270.1u

16

9VLDO3

3029

RX900B

SC

LK65

SD

ATA

7S

EN

11TXOP_HI

TXOP_LO10

18V

AFC

_NC

VBAT14

VC

C_B

BI

4

24V

CC

_BB

Q1

VC

C_F

E

VC

C_R

EF

17

12VCC_TXVCO

13VDD

15VLDO1VLDO2

GND33

I2 3

IB NC

8

Q23 22

QB

20R

EFI

NR

EFI

NB

19

RE

F_O

P21

RX18002827

RX1800BRX1900

26RX1900B

25

RX8503231

RX850BRX900

AD6548U602

2 34

C641100p

26M

Hz X60

1TS

X-3

225_

26M

HZ1

0.1u

2V75_VCXO

C626C6300.1u

C640100p

220n

C622

C63639p

0.1u

C62

0

82p

VBAT

C642

100pC639

2V93_VEXT VLDO1

10K

R611

1uC619

S_DATA

IP

QP

QN

IN

S_CLK

26M

S_EN

AFC

CHECKING FLOW

4.4 Power On Trouble


4. TROUBLE SHOOTING

- 73 -

1V88_VMEM

2V75_VCXO

2V85_VSIM

VCORE

2V93_VEXT

1V8_VRTC

1V8_VGP

2V5_VMIC2V5_VABB

1V82_VINT

U100

1V5_VPLL

D100R101

(2012)1u

C128C124

22u

VUSB

2V5_VABB

2V75_VCXO

1V5_VPLL

1V88_VMEM

1u

C127

22u

C125

VCORE

L100 4.7uH

1V82_VINT

2V85_VSIM

1V8_VGP

1u

C122C121

1u

C132

2.2u

VMEMOUT2

J12VMIC

F12VPLL

VRFC12

M6VSIM

VUSBC11

VCOREPWR1F1

VCOREPWR2F2

E1VCORESW1VCORESW2

E2

VEXT1A3B3

VEXT2

VGPM5

VINTK2

VINTOUTK1

L4VMEMOUT1

M4

G12VABB

D12VAPPGATE

A8PA

QNA11A12

QP

INA10A9

IP

FB100

1u

C126

VBAT

1u

C130C129

1u

C123

1u

C131

1u

2V5_VMIC

VBAT

2V93_VEXT

INIP

TX_RAMP

QNQP

TEST POINT

CIRCUIT

Figure 4-4

100K

R101

3

1

2

KDR331V

D100

EXT_PWRONRPWRON

PWRON

END

VBAT

KB42210K

R40

6

POWERKEY

M10KEYONKEYOUT

L10

POWERKEYKEY_ROW4


4. TROUBLE SHOOTING

- 74 -

START

Check Battery Voltage> 3.35V

Push power-on keyAnd check the level change

into low of POWERKEY

Check the voltage ofThe LDO outputs at U100

Logic level at RPWRON(DBBON) of D100

= HIGH(above 1.2V)?

Is the phone power on?

The phone willProperly operating.

Charge or Change Battery

Check the contact of power keyOr dome-switch

Replace U100

VCORE=1.2V~1.5V 2V75_VCXO=2.75V1V88_VMEM=1.88V 2V85_VSIM= 2.85V 2V93_VEXT=2.93V 1V5_VPLL=1.5V 2V5_VMIC=2.5V 2V5_VABB=2.5V

Re-download software

Does it work properly?

Replace the main board

YES

YES

YES

YES

YES

NO

NO

NO

NO

NO

NO

Replace U100 and Re-download software

CHECKING FLOW

- 75 -

4. TROUBLE SHOOTING


4.5 Charging Trouble

CN300

U204

U203

C310

R213

TEST POINT


(1%)

R21610K

R21336K

R214100K R212

100K

CHG_ABB

R21010K

VUSBIN

BAT10

CRDL1

8GND

9ICDL

6IMIN

PGND11

2USB

USBON7

4_CHG

_EN5

_PPR3

ISL6299U203

C215

1u

VBAT

USB_DETCHG_EN

(GPIO_013)

30K

R217

IN35

11NC1NC2

12

OUT16

7OUT2

_EN10

3_FLAG

VCHARGE

NCP348MTR2GU204

GATE8

9GATE_OUT

GND2

1IN1

4IN2

CHG_ABB

R211

30KCHG_DET

CIRCUIT

Figure 4-5


4. TROUBLE SHOOTING

- 76 -

START

Is I/O Connector(CN300)well-soldered ?

Check the voltage atC310 = 5.1V ?

Is the voltageat pin6 of U204 = 5.1V?

YES

YES

YES

Is Voltage across R213about 1.2V?

YES

Battery is charged?

YES

Charging isproperly operating

NO

NO

NO

NO

NO

Resolder the CN300(Pin 12,13 : VCHARGE)

The TA is out of orderChange the TA

Replace theU204

Replace theU203

Replace the main board

Battery is charged?

NO

Change the battery

Charging isproperly operating

YES

CHECKING FLOW


4. TROUBLE SHOOTING

- 77 -

4.6 Vibrator Trouble

Q400

PIN 1

Vibrator PAD

TEST POINT

2.2

R408

2

Q1_B

6

Q1_C

1

Q1_E

Q2_B

5

Q2_C

3

Q2_E

4

Q400

VBAT

VIBRATOR_P

VIBRATOR

CIRCUIT

Figure 4-6

LCD ModuleVIBRATOR

- 78 -

4. TROUBLE SHOOTING


SETTING : Enter the engineering mode, and set vibrator on at vibration of BB test menu

START

Is the voltage at pin 2of Q400 high?

YES

NO

Is the voltage at pin 4of Q400 high (VBAT) ?

YES

Check the solderingof vibrator ?

YES

Replace vibrator

YES

VibratorWorking well !

Check the solderingQ400

NOCheck the soldering

of Q400

Resolder or Replace vibratorNO

CHECKING FLOW

- 79 -

4. TROUBLE SHOOTING


4.7 LCD Trouble

TEST POINT

CN500

FL501

FL504

FL505

FL507

FL508

U501

C519

CN802

CN803

LCD Connector

R504

R503

Figure 4-7


4. TROUBLE SHOOTING

- 80 -

FPCB CONNECTOR

0.1u0.1uC508 C509

D50

6R

SB

6.8C

ST2

R

C50456p

DNIC522

4.7K

R502

L500

INOUT_B46

18nH

FL506 ICVE10184E150R500FR

G1

5

G2

10

INOUT_A11

INOUT_A22

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

2V8_IOVDD

RS

B6.

8CS

T2R

D50

1

G1

5

G2

10

INOUT_A11

2INOUT_A2

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

INOUT_B46

39p


C502

C500DNI

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

7INOUT_B3

6INOUT_B4

7

6INOUT_B4

ICVE10184E150R101FRFL508

5G

110

G2

1INOUT_A1


5G

110

G2

1INOUT_A1

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B3

59

6

60

789

G1G2

G3G4

43444546474849

5

505152535455565758 3

30313233343536373839

4

404142

1516171819

2

20212223242526272829

CN500

1

1011121314

C5030.1u

RS

B6.

8CS

T2R

D50

2

100ohm R504

2

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

6INOUT_B4


5G

110

G2

1INOUT_A1

INOUT_A2

D50

5R

SB

6.8C

ST2

R

2V93_VEXT

INOUT_B37

6INOUT_B4

DNI

C521

5G

110

G2

1INOUT_A1

2INOUT_A2

INOUT_A33

INOUT_A44

INOUT_B19

8INOUT_B2


C510

L50118nH

2V8_

AV

DD

0.1u

2V8_

IOV

DD

ZD501RSB6.8CST2R

VA

501

ICV

N05

05X

150F

R


5G

110

G2

1INOUT_A1

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

6INOUT_B4

C51127p

C50139p

RS

B6.

8CS

T2R

D50

4

DNI

R505

1V8_

DV

DD

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

INOUT_B46

R501

4.7K


5G

110

G2

1INOUT_A1

INOUT_A22

INOUT_A33


G1

5

G2

10

INOUT_A11

2INOUT_A2

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

INOUT_B46


MLED5MLED4MLED3

MLED1MLED2

CAM_RESET

CAM_VSYNCCAM_HSYNC

RCV_N

RCV_P

KEY_COL3

MLED

CAM_DATA3CAM_DATA2CAM_DATA1CAM_DATA0

LCD_VSYNC

LCD_MAIN_CS

CAM_PCLKCAM_MCLK



LCD_SUB_CS

KEY_COL4

CAM_PWDN

VIBRATOR_P

LCD_ID_L


KEY_ROW5

LCD_RSLCD_WR

LCD_RESET




KEY_ROW4




CIRCUIT

LCD BACKLIGHT

D50

3R

SB

6.8C

ST2

R

C518

1u

R50

3

100K

1u C51

7

VBAT

C5191u

EN_SET3

10GND

9IN

OUTCP6

PGND15

C5201u

AAT3169IFO-T1U501

C1+4

5C1-

C2+7

C2-8

11D1D2

1213

D314

D41

D52

D6MLED5

MLED

LCD_BACKLIGHT_CTRT



4. TROUBLE SHOOTING

- 81 -

Waveform

Graph 4-7-1. LCD Backlight Control Signal Waveform

Graph 4-7-2. LCD Data Waveform

- 82 -

4. TROUBLE SHOOTING


START

Is the connection ofCN802 with LCD

connector ok ?

YES

NOReassemble FPCB with LCD connector

NO

Check the Voltage Level of

C519 is about Battery voltage ?(LCD_BACKLIGHT_CTRT signal

is high Level)

NO

YES

YES

Check the Waveform ofEMI filter ?

Resoldering or Replace U501

NO

Resoldering EMI filter.(FL501,FL504,FL505,FL507,FL508)

Does LCD workproperly ?

Replace LCD module

LCD working well !

YES

Is the connection ofCN803 with CN500

connector ok ?

YES

NOReassemble FPCB with Main connector

NO

YES

Check the Waveform ofData pins on CN802 ?

Replace Main FPCB

CHECKING FLOW

- 83 -

4. TROUBLE SHOOTING


4.8 Camera Trouble

CN500

FL500

FL502

FL503

FL506

Camera Connector

CN801

CN803

CN701 CN702

R501

R502

U500

C5

06

C523

C5

07

FB500

TEST POINT

Figure 4-8


4. TROUBLE SHOOTING

- 84 -

CIRCUIT

FPCB CONNECTOR

0.1u0.1uC508 C509

D50

6R

SB

6.8C

ST2

R

C50456p

DNIC522

4.7K

R502

L500

INOUT_B46

18nH


G1

5

G2

10

INOUT_A11

INOUT_A22

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

2V8_IOVDD

RS

B6.

8CS

T2R

D50

1

G1

5

G2

10

INOUT_A11

2INOUT_A2

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

INOUT_B46

39p


C502

C500DNI

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

7INOUT_B3

6INOUT_B4

7

6INOUT_B4


5G

110

G2

1INOUT_A1


5G

110

G2

1INOUT_A1

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B3

59

6

60

789

G1G2

G3G4

43444546474849

5

505152535455565758 3

30313233343536373839

4

404142

1516171819

2

20212223242526272829

CN500

1

1011121314

C5030.1u

RS

B6.

8CS

T2R

D50

2

100ohm R504

2

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

6INOUT_B4


5G

110

G2

1INOUT_A1

INOUT_A2

D50

5R

SB

6.8C

ST2

R

2V93_VEXT

INOUT_B37

6INOUT_B4

DNI

C521

5G

110

G2

1INOUT_A1

2INOUT_A2

INOUT_A33

INOUT_A44

INOUT_B19

8INOUT_B2


C510

L50118nH

2V8_

AV

DD

0.1u

2V8_

IOV

DD

ZD501RSB6.8CST2R

VA

501

ICV

N05

05X

150F

R


5G

110

G2

1INOUT_A1

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

6INOUT_B4

C51127p

C50139p

RS

B6.

8CS

T2R

D50

4

DNI

R505

1V8_

DV

DD

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

INOUT_B46

R501

4.7K


5G

110

G2

1INOUT_A1

INOUT_A22

INOUT_A33


G1

5

G2

10

INOUT_A11

2INOUT_A2

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

INOUT_B46


MLED5MLED4MLED3

MLED1MLED2

CAM_RESET

CAM_VSYNCCAM_HSYNC

RCV_N

RCV_P

KEY_COL3

MLED


LCD_VSYNC

LCD_MAIN_CS

CAM_PCLKCAM_MCLK



LCD_SUB_CS

KEY_COL4

CAM_PWDN

VIBRATOR_P

LCD_ID_L


KEY_ROW5

LCD_RSLCD_WR

LCD_RESET




KEY_ROW4




CAMERA POWER

(EB2_ADDR_00)

2.2uC506

2.2uC523

R500100K

2V8_AVDD

C5051u

2V8_IOVDD

FB50

0

1V8_DVDD

C5071u

RT9011-MGPQWU500

EN123

EN2GND

54NC1

6NC2

9P

GN

D

VIN1 8

VOUT1VOUT2

7

VBAT

CAM_LDO_EN


4. TROUBLE SHOOTING

- 85 -

Waveform

Graph 4-8-1 I2C Data Waveform Graph 4-8-2 MCLK Waveform

Graph 4-8-3 CAM_VSYNC vs.CAM_HSYNC Waveform

Graph 4-8-4 CAM_HSYNC vs.CAM_PCLK Waveform


4. TROUBLE SHOOTING

- 86 -

Is the connection ofCN702 with Camera

connector ok ?

Check the each voltage Level of

C506(1.8V), C507(2.8V), C523(2.8V) is right ?(CAM_LDO_EN

signal is high Level)

Check the Waveform ofI2C_CLK, I2C_DATA ?

Does Camera workproperly ?


connector ok ?


connector ok ?

Check the Waveform ofCAM_MCLK(13MHz) ?

Check the Waveform ofEMI filter ?

Check the Waveform ofData pins on CN701 ?

START

Camera working well !

YES

NO Reassemble KEY PCBwith camera connector.

NO

NO

YES

YES

Resoldering or Replace U500

NO

Resoldering R501, R502

Replace U101 or Change the board

YES

YES

NO Reassemble FPCB with KEY PCB connector

YES

YES

NOReassemble FPCB with Main connector

YES

NOReplace U101 or Change the board

YES

NO Resoldering EMI filter.(FL500,FL502,FL503,FL506)

NOReplace Camera Module.

CHECKING FLOW


4. TROUBLE SHOOTING

- 87 -

4.9 Speaker Trouble

R313

R314

U100

U303

TEST POINT

C156DNI39p

C154DNIC155C152

39p

D1TCK

B1TDI

TDOC2

TMSC1

F10AOUT3R

G10

AOUT1NF11E11

AOUT1P

L8AOUT2N_1

M8AOUT2N_2

L9AOUT2P_1AOUT2P_2

M9

AOUT3L

39pC153C151

39p

C158100p

HP_LOUT

RCV_NRCV_PSPK_N

SPK_P

HP_ROUT

SPEAKER

(GAIN x6)

100K

R317

EVLC14S02050VA305

GN

D5

D2

GN

D6

GN

D7

D3

IN+C1

IN-D1

B1NC

B4VDD1

C4VDD2

D4VO+

VO-A4

A1_SD

TPA2005D1ZQYRU303

GN

D1

A2

A3

GN

D2

GN

D3

B3

C2

GN

D4

C3 C319

10u

1

2

CN302

0.01uC316

1000pC321

FB304

C3221000p

R314 47K

47KR315

DNIC320

VBAT

VA304EVLC14S02050

FB305

C317 0.01u

LOUD_SPK_EN

SPK_N

SPK_P

CIRCUIT

Figure 4-9


4. TROUBLE SHOOTING

- 88 -

START

Check the state of contact of speaker

Speaker Working well!!

Check the Audio signalR313,R314

No

Yes

Change the U100

Replace/Change speakerNo

Check the Power voltageU303 = VBAT

And work properly ?

No

Yes

Change the Speaker

Yes

CHECKING FLOW


4. TROUBLE SHOOTING

- 89 -

4.10 Earphone Trouble

TEST POINT

CIRCUIT

C303C302

C158

R307R309 R300

R302U304

FB301FB300

FB302L301

U100

C142

CN300

C331

(TX)

(GPIO_009)

(RX)

2V5_VJACK

10p

TX

DSR

C305FB301

VUSBIN VBAT

EV

LC14

S02

050

VA

303

EV

LC5S

0250

VA

301

100K

R305

1u

C310

100uVCHARGE

C302

100K

R304

47R310

R309 4.7

L301 100nH

R311 47

2V93_VEXT

R302

2.2K39p

C301

15161718

19

2

20

21

22

3456789

CN300

1

1011121314

C300

10u

R307 4.7

NO1

10NO2

1VCC

COM13

COM29

GND6

4IN1

8IN2

NC15

7NC2

2

NLAS5223BMNR2GU301

EXT_PWRON

10uC307

C30947p

1uC304

R300

1.5K

FB302

RX

2V93_VEXT

RS

B6.

8CS

T2R

ZD

300

47pC311

DNIC332

C308

1u

100uC303

VA

300

EV

LC5S

0250

100K

R306

1800FB300

DNIR303

1

R312

HP_MIC_P

L300270nH

HOOK_DETECTHP_MIC_N

HP_ENHP_ROUT

HP_LOUT

HP_EN

FM_ANT

MULTI_PORT_RXMULTI_PORT_TX

USC1USC2

EXT_PWRON

JACK_DETECT

DSR_DET

Figure 4-10

1VDD VOUT

3U304 R1114D251D

6CE

GND12

GND25

NC4

R32

9

100K C330 C331

1u

2V5_VJACKVBAT

1u

VJACK_LDO_EN

0.1uC139

0.1uC142

JACKSENSEK9

M12AIN1NAIN1P

M11

L12AIN2N

L11AIN2P

MIC_NMIC_P

HP_MIC_PHP_MIC_N

JACK_DETECT


4. TROUBLE SHOOTING

- 90 -

START

Is FB303(JACK DETECT)LOW?

NO

YES

Resolder CN300

YES

Earphone will work properly

Can you hear yourvoice from

the earphone?

Set the audio part of the testEquipment to echo mode

Change the earphoneand try again

NOCan you hearthe sound fromthe earphone?

Set the audio part of the test equipment to PRBS or Continuous wave mode

YES

YES

Resolder pin8 in CN300 Check the

pin(#8) in CN300 is LOW?

Resolder FB303

NO

YES

Can you hearthe sound fromthe earphone?

NO

Change the earphoneand try again

NO Can you hear yourvoice from

the earphone?

NO

Resolder C302, C303, R307 & R309, FB301&FB302

Resolder C142,FB300, R300 & R302 Or Change the U304 &U100

CHECKING FLOW

4.11 Receiver Trouble


4. TROUBLE SHOOTING

- 91 -

TEST POINT

U100

L500L501

C156DNI39p

C154DNIC155C152

39p

D1TCK

B1TDI

TDOC2

TMSC1

F10AOUT3R

G10

AOUT1NF11E11

AOUT1P

L8AOUT2N_1

M8AOUT2N_2

L9AOUT2P_1AOUT2P_2

M9

AOUT3L

39pC153C151

39p

C158100p

HP_LOUT

RCV_NRCV_PSPK_N

SPK_P

HP_ROUT

L50018nH

39pC502

C500DNI

5960

G1G2

565758 3

4

2

CN500

1

L50118nH

2V8_

AV

DD

2V8_

IOV

DD

C50139p

1V8_

DV

DD

RCV_N

RCV_P

CAM_PWDN

Figure 4-11

CIRCUIT


4. TROUBLE SHOOTING

- 92 -

START

Does waveform atL500 and L501

fluctuate?

NOChange the U100

YES

Receiver will work properly.

SETTING : After initialize Agilent 8960, Test GSM850, PCS mode

Set the property of audio as PRBS or continuous wave. Set the receiving volume of mobile as Max.

Is receiver connectedProperly?

YES

NOResolder/Change the receiver

CHECKING FLOW


4. TROUBLE SHOOTING

- 93 -

4.12 Microphone Trouble

TEST POINT

C139

R233

R317

R235

MIC200

CIRCUIT

MIC

2.2K

R32

7

10uC327

EV

LC14

S02

050

VA306

R31

8

1K

2V5_VMIC

100ohm

R324

VA307

EV

LC14

S02

050

R32

2

2.2K

R326

100ohm

OBG-415L42-C33LHMIC300

39pC328

C32639p

MIC_P

MIC_N

Figure 4-12


4. TROUBLE SHOOTING

- 94 -

START

NO

YES

Microphone will workproperly.

SETTING : After initialize Agilent 8960, Test GSM850, PCS mode

YES

Check the signalLevel at each side

of MIC300.Is it a few tens

mV AC?

Check the soldering ofR323, R325 & C139

Make a phone call, then check R317 mic bias signal

comes from U100?

NO

Change the microphone

YES

NOResolder component

1. Check mic Bias signal line2. Change the U100

Check microphone sound hole

CHECKING FLOW


4. TROUBLE SHOOTING

- 95 -

4.13 SIM Card Interface Trouble

TEST POINT

PIN1 PIN3

PIN6 PIN4

J300

C318

TEST POINT

(5000-6T-1.8SL)

(GPIO_100)

220n

C318

2V85_VSIM

C324

22p

2V85_VSIM

C3251000p

4C5C6

5

C76

GND178

GND2GND39

10GND4

J3001

C12

C2C3

3

C323

DNI

R316

15KSIM_RST

SIM_DATA SIM_CLK

Figure 4-13

- 96 -

4. TROUBLE SHOOTING


START

Does the SIM cardsupport 3V or 1.8V ?

NO Change the SIM Card. This phone supports 3V or 1.8V SIM card.

YES

Is Voltage at the pin1of J300 2.85V or 1.8V?

NOChange the U100

NO

YES

Resolder J300YES

Voltage output of VSIM LDO

Is 2.85V?

Change the SIM CardAnd try again.Does it work

Properly?

YES

SIM card is properly working

Redownload SW.Does it work

Properly?

NOChange the main board

NO

YES

SIM card is properly working.

CHECKING FLOW

- 97 -

4. TROUBLE SHOOTING


4.14 KEY backlight Trouble

TEST POINT

LD400 LD401

VA400R400VA401R401

TOP

BOTTOM

Figure 4-14

- 98 -

4. TROUBLE SHOOTING


47

R401

VBAT

LD400LEWWS44-E

ICV

N05

05X

150F

R

VA

401

VA

400

ICV

N05

05X

150F

R

LEWWS44-E LD401

R400

47KEY_BACKLIGHT3

CIRCUIT

Is the level Period at VA400,VA401 High Duty(80%)?

START

Is the level Period at VA400,VA401 Low Duty(20%)?

NOCheck U100

YES

Are all LEDsWorking?

NO

YES

Check the solderingeach R and LED

Backlight will work properly.

NO

Replace or resoldercomponent

NOCheck U100

YES

CHECKING FLOW

- 99 -

4. TROUBLE SHOOTING


4.15 RTC Trouble

TEST POINT

X100

R103

CIRCUIT

22p

C141

OSCINA17A16

OSCOUT

PPI_DATA_1M22

PPI_DATA_2N21

PPI_DATA_3M21

PPI_DATA_4V22

PPI_DATA_5V21

PPI_DATA_6W22W21

PPI_DATA_7V19

PPI_DATA_8PPI_DATA_9

Y22

L1GPIO_000GPIO_001

M4

GPIO_002M1

GPIO_003M2

GPIO_004N6

12

32.768KHz

X100

FC-135

C135

22p

DNI

R104

10M

R103

BT_UART_RTSBT_UART_CTS

CAM_DATA7

CAM_DATA0CAM_DATA1CAM_DATA2CAM_DATA3CAM_DATA4CAM_DATA5CAM_DATA6

BT_UART_TXBT_UART_RX

Figure 4-15

- 100 -

4. TROUBLE SHOOTING


RTC will work properly

Is frequencyat R103 about 32.768KHz?

START

Resolder the X100 or change the X100

NO

YES

YES

Is voltageat R103 about 400mV?

Resolder the X100 or change the X100

NO

Is RTC properly working?NO

Re-download software and try again

YES

CHECK FLOW

- 101 -

4. TROUBLE SHOOTING


4.16 Folder on/off Trouble

TEST POINT

U400

R407

CIRCUIT

3N

CO

UT

21V

DD

4V

SS

U400

EM

-078

1-T5

C4021u

VA

405

ICV

N05

05X

150F

R

2V93_VEXT

R407

0FOLDER_DET

Figure 4-16

- 102 -

4. TROUBLE SHOOTING


Folder on/off willwork properly

Is there the magnetin the Folder?

START

Replace U100

Place the magnet properly.NO

YES

Voltage at pin 1of U400 = 2.93V?

YES

NOVoltage of VEXT at U100

= 2.93V?

NO

Resolder U400

YES

Open Folder.Voltage at pin 1 of U400

=2.93V

Resolder U400NO

YES

Close folder.Voltage at pin 1 of U400

= 0V

YES

Replace U400NO

YES

Check the solderingof R407

Resolder R407NO

CHECKING FLOW

- 103 -

4. TROUBLE SHOOTING


4.17 Micro SD Trouble

TEST POINT

J301

R325 C329

CIRCUIT

(SCHB1A0202)

R325 0 9

GND210

GND31112

GND4

4VDD

6VSS

J301

5CLK

3CMD

7DAT0DAT1

8DAT2

1

DAT32

GND1

1M

R328

R319

100K 100K

R323

C329

2.2u

2V93_VEXT

100K

R320

2V93_VEXT

R321

100K

2V93_VEXT

MC_D3

MC_DET

MC_D0MC_D1MC_D2

MC_CMDMC_CLK

Figure 4-17

- 104 -

4. TROUBLE SHOOTING


Micro SD Card willwork properly

Micro SD DetectOK?

START

Re-attach orReplace J301

NO

YES

MC_DET(R325)Is High?

NO

YES

Check out MC_CLK & DataTiming OK?

Re-download SWNO

YES

YES

Replace Micro SD Card

Check theC329=2.93V?

YES

NO

Change U100

CHECKING FLOW

- 105 -

4. TROUBLE SHOOTING

4.18 Bluetooth Trouble


TEST POINT

C217R218

U201C212

X200

CIRCUIT

(EB2_ADDR_10)


(EB2_ADDR_04)

BT_D_IQ

DNIR202

C2111u

47R219

2V93_VEXT

R206

47K

C2101u

47K

R207

FM_L

R203DNI

1V8_VGP

4

VBAT

19.2MHz

X200CSC3M192000EEVRS00

2GND

3OUT

TRI_OPEN1

VDD

BT_TX

100K

R218

BT_RTSBT_CTS

C217C218DNI 1u

C201

GND201

1000p

DNI

C202

2V93_VEXT

ANT201

FM_R

D_BT_IQ

BT_RX

VREG_CTL

XTALNI5I6

XTALP

B2

C2PCM_SYNC

A4REGBT

RESETB4C4

SLEEP_CLK

G4TM0

G3TM3

UART_CTSH2

UART_RTSG2

UART_RXG1H1

UART_TX

I3VAFLVAFR

I4

VBATTA3A2

VDDR3V

I2VIO

C3

GND4E6

GND5E7

GND6F1

GND7F2

GND8GND9

F3

H5GPIO0

H4GPIO1GPIO2

G6

GPIO3G5C6

GPIO4GPIO5

H7

GPIO6B3C7

GPIO7

PCM_CLKC1

PCM_INB1

PCM_OUT

D2

GND16D3

GND17D4

GND18D5

GND19D6

GND2E3

GND20D7A1

GND21GND22

H6I7

GND23I1

GND24A5

GND25GND26

A7

GND27B5B6

GND28

E4GND3

E5G7

A_GPIO4A_GPIO5

H3C5

A_GPIO6A_GPIO7

B7

BT_ANTE1A6

FM_ANT

GND1E2

GND10F4

GND11F5F6

GND12F7

GND13GND14

D1

GND15

U201 EWFMLBAXX

1000p

C203

1uC212C216

DNI

R201 0

BT_PCM_TX

BT_PCM_SYNC

BT_PCM_RX

BT_PCM_CLK

FM_LFM_R

BT_MAIN_CLK_EN

BT_19.2MHZ

BT_MAIN_CLK_ENBT_19.2MHZ

BT_32K

BT_LDO_EN

FM_ANT

BT_RESET

BT_WAKEUPBT_INT



Figure 4-18

- 106 -

4. TROUBLE SHOOTING


Check Bias Voltage2V93_Vext at C217

Vbat at C212

START

NO

YES

ReplaceU100

BT_MAIN_CLK_EN check at R218?

NO ReplaceU201

YES

19.2MHz checkat R 219?

YES

NO ReplaceX200

BT_Reset check at C203?

YES

NO ReplaceU101

Bluetooth on is OK?

YES

NORe-download SW and try again

Bluetooth willwork properly

CHECKING FLOW

- 107 -

4. TROUBLE SHOOTING


4.19 FM Radio Trouble

TEST POINT

C202

U201

C217

C212

CIRCUIT

(EB2_ADDR_10)


(EB2_ADDR_04)

BT_D_IQ

DNIR202

C2111u

47R219

2V93_VEXT

R206

47K

C2101u

47K

R207

FM_L

R203DNI

1V8_VGP

4

VBAT

19.2MHz


2GND

3OUT

TRI_OPEN1

VDD

BT_TX

100K

R218

BT_RTSBT_CTS

C217C218DNI 1u

C201

GND201

1000p

DNI

C202

2V93_VEXT

ANT201

FM_R

D_BT_IQ

BT_RX

VREG_CTL

XTALNI5I6

XTALP

B2

C2PCM_SYNC

A4REGBT

RESETB4C4

SLEEP_CLK

G4TM0

G3TM3

UART_CTSH2

UART_RTSG2

UART_RXG1H1

UART_TX

I3VAFLVAFR

I4

VBATTA3A2

VDDR3V

I2VIO

C3

GND4E6

GND5E7

GND6F1

GND7F2

GND8GND9

F3

H5GPIO0

H4GPIO1GPIO2

G6

GPIO3G5C6

GPIO4GPIO5

H7

GPIO6B3C7

GPIO7

PCM_CLKC1

PCM_INB1

PCM_OUT

D2

GND16D3

GND17D4

GND18D5

GND19D6

GND2E3

GND20D7A1

GND21GND22

H6I7

GND23I1

GND24A5

GND25GND26

A7

GND27B5B6

GND28

E4GND3

E5G7

A_GPIO4A_GPIO5

H3C5

A_GPIO6A_GPIO7

B7

BT_ANTE1A6

FM_ANT

GND1E2

GND10F4

GND11F5F6

GND12F7

GND13GND14

D1

GND15

U201 EWFMLBAXX

1000p

C203

1uC212C216

DNI

R201 0

BT_PCM_TX

BT_PCM_SYNC

BT_PCM_RX

BT_PCM_CLK

FM_LFM_R

BT_MAIN_CLK_EN

BT_19.2MHZ


BT_32K

BT_LDO_EN

FM_ANT

BT_RESET

BT_WAKEUPBT_INT



Figure 4-19

- 108 -

4. TROUBLE SHOOTING


A condition is good?

STARTCheck of ear_jack condition

NO

YES

YES

FM_radio willwork properly

Check condition of matching components

(L300, C305)

A condition is good?NO

YES

Give the additory solder inL300, C305

Replace CN300

Check Bias Voltage2V93_Vext at C217

Vbat at C212

YES

NO ReplaceU100

Check BT_32k?

YES

NO ReplaceU101

FM_Radio work is good?NO Replace

U201

CHECKING FLOW

- 109 -

5. DOWNLOAD

5. DOWNLOAD


5.1 Download

A. Download Setup

Figure 5-1 describes Download setupp

Figure 5-1 Download Setup


5. DOWNLOAD

- 110 -

B. Multi Download Procedure

1. Run GSM Multi Download program and select Setting

- 111 -

5. DOWNLOAD


2. Select Configuration from the menu and you may see this window

3. Press key to select DLL file and press Open

KF300.dll

KF300_DLL

OPEN

OPEN

CANCLE

File Name

File Type

Location


- 112 -

5. DOWNLOAD

4. Press key to select the mot files

5. Select AlchemyData.mot and press open

6. Repeat step 4-5 to select CodeData.mot

KF300.dll

OPEN

CANCLE

File Name

File Type

Location

OPEN

KF300Model


- 113 -

5. DOWNLOAD

7. Check if the ADI option is set to Hermes

8. Press OK to end Configuration

Select Rate

KF300.dllKF300Model

KF300ModelKF300Model KF300

KF300


- 114 -

5. DOWNLOAD

9. “Waiting phone connecting” pops up when you pushe the “Start” button in Multi download screen.

Then you need to conncect the mobile phone with I/O Cable to get downloaded.

10. Once downloading is started,

press STOP button to keep from re-downloading after downloading is completed.


- 115 -

5. DOWNLOAD


- 116 -

6. BLOCK DIAGRAM

6. BLOCK DIAGRAM

- 117 -

PWRURXDUTXD

3G 2.5G

GNDRXTXVCHARON_SWVBAT

26MHz

8

(2012)

105

H

G

1 95

NOR BOOT

(GPIO_036)

2

2V93_VEXT

1V82_VINT

DOWNLOAD USB

ADI Application NOTE GSM-0164)

2

E

NAND BOOT

H

E

11

B B

(1%)

1

H

53

(CHANG TO 1K USING TRACE 32)

76

B

(MUXOUT_2)

0

LCD ID

6

D

4

3 12

1GPIO_099

BACK-UP BATTERY

9

6 9 12

7

C

(MUXOUT_1)

(1.8V LOGIC LEVEL)

1

1V88_VMEM

8

G

7

107

1V88_VMEM

8

E

F

4

4 5

1V88_VMEM

H

E

F

C

A

1

A

F

DOWNLOAD UART

F

BOOT CONTROL

1V88_VMEM

G

12

D

(USE GHOST FUNC. OF ROW4 ON POWER-UP)

2

2

A

(Change to Schemetic, Because of

4

0

D

(1%)

G

11

A

PIN

1V82_VINT

1

C

11 12

C

JTAG

11

106

13MHz

0

GPIO_098

D

83

GPIO_113

1

9

B

3

10

22p

C102

22p

C105

1u

C136

OJ101

R120 120K

C156DNI

VBAT

100K

1u

R101

0.1u

C128

C112

ANT_SW3

3

1

2

2V93_VEXT 1V5_VPLL

KDR331V

D100

C111

1u

39pC154

2V93_VEXT

VUSBIN

2V93_VEXT

VCXO_EN

ABBRESET

C149 0.1u

R109

10K

2V85_VSIM

1V8_VRTC

47K

R107

C124

22u

DNIC155

VUSB

C106

22u

C110

22p

2V5_VABB

0.1u

C100

C152

2V75_VCXO

1V5_VPLL

OJ100

39p

R110

10K

22p

C141

C133 1u

39p

VV

ID3

R14

K22WDDI

J22WDDQ

J21WUDI

WUDQH21

1V88_VMEM

C143

VE

XT2

P8

VE

XT3

R10

VE

XT4

R9

VIN

T1H

14L1

5V

INT2

VM

EM

1H

10H

9V

ME

M2

J8V

ME

M3

VM

EM

4K

8

J15

VM

MC

A15

VP

LL

VR

TCB

15

VS

IMK

15

H19VUSB

N19

VV

ID1

VV

ID2

P15

W12USC_2

AB10USC_3USC_4

W11AA10

USC_5U12

USC_6

VC

OR

E01

H11

H12

VC

OR

E02

VC

OR

E03

H13

L8V

CO

RE

04V

CO

RE

05M

15M

8V

CO

RE

06V

CO

RE

07N

15V

CO

RE

08R

11R

12V

CO

RE

09V

CO

RE

10R

13

VE

XT1

N8

PPI_HSYNCAB21AA22

PPI_VSYNC

PWRONA18

SCKEL6

SCLKOUTK1

K2SDA10

K19SIMCLK

L19SIMDATAIO

TESTMODEA2

H22UCLK

USB_DME22D22

USB_DP

USB_IDH17

USB_VBUSF19

USC_0U13AA11

USC_1

NSDWEJ2

NWAITC2

NWEB1

OSCINA17A16

OSCOUT

PPI_CLKY21L22


M22

PPI_DATA_2N21

PPI_DATA_3M21

PPI_DATA_4V22

PPI_DATA_5V21

PPI_DATA_6W22W21

PPI_DATA_7V19


Y22

E2NA1CS

E1NA2CS

H4NA3CS

NADVC1

NC1M17

V4NC2

NHWR_UBSB4

NLWR_LBSA3

M6NNDBUSY

NNDCSL4

NNDWPL2

A4NRD

G1NRESET

NSDCASH1

NSDCSJ1H2

NSDRAS

AA14KEYPADCOL_1

W14KEYPADCOL_2KEYPADCOL_3

AB14AB13

KEYPADCOL_4

U14KEYPADROW_0KEYPADROW_1

AA13

KEYPADROW_2AB12

KEYPADROW_3W13

KEYPADROW_4AA12

F22MC_CLK

J19MC_CMD

J17MC_DAT_0

E21MC_DAT_1MC_DAT_2

F21K17

MC_DAT_3

NA0CSD1

AB19GPIO_148GPIO_149

AA19

GPIO_150AB20

GPIO_151AA20U21

GPIO_152T21

GPIO_153T22

GPIO_154GPIO_155

R21R22

GPIO_156AB15

GPIO_172GPIO_173

U15

GPIO_174W16U16

GPIO_175V2

GPIO_177

JTAGENT2

KEYPADCOL_0W15

AB8GPIO_085

W9GPIO_086

U11GPIO_087

GPIO_098W10

GPIO_099AB9

GPIO_100L17

AA9GPIO_113

GPIO_123G22

GPIO_124G21

GPIO_141AA15

GPIO_142AB16AA16

GPIO_143AB17

GPIO_144GPIO_145

AA17AB18

GPIO_146GPIO_147

AA18

AA5GPIO_061

C22GPIO_062

GPIO_063C21W6

GPIO_064GPIO_065

U8

GPIO_066W7U9

GPIO_067GPIO_068

W8

GPIO_069AB5

GPIO_070AA6AB6

GPIO_071GPIO_072

AA7

GPIO_073AB7U10

GPIO_074

GPIO_076B22

GPIO_078AA8

T6GPIO_035GPIO_036

W5AB2

GPIO_037AA3

GPIO_038F2

GPIO_049K6

GPIO_050F1

GPIO_051J4

GPIO_052G2

GPIO_053GPIO_054

K4

GPIO_055U7

AB3GPIO_056

D21GPIO_057

E19GPIO_058

GPIO_059AA4

AB4GPIO_060

GPIO_011R1P6

GPIO_012GPIO_013

R4R2

GPIO_014T1

GPIO_015R6

GPIO_016U1

GPIO_017T4

GPIO_018GPIO_019

U2V1

GPIO_020GPIO_021

U4W1

GPIO_022GPIO_024

A13D15

GPIO_032GPIO_033

W2

GPIO_034Y2

N10

GN

D24

N11

GN

D25

N12

GN

D26

N13

GN

D27

GN

D28

Y1

L1GPIO_000GPIO_001

M4

GPIO_002M1

GPIO_003M2

GPIO_004N6N1

GPIO_005

N2GPIO_006

N4GPIO_007

P1GPIO_008

P2GPIO_009

GPIO_010P4

GN

D08

B16

B17

GN

D09

G19

GN

D10

GN

D11

K10

GN

D12

K11

K12

GN

D13

GN

D14

K13

GN

D15

L10

GN

D16

L11

L12

GN

D17

GN

D18

L13

M10

GN

D19

GN

D20

M11

GN

D21

M12

GN

D22

M13

M19

GN

D23


P22

EB2_ADDR_09N22U19

EB2_ADDR_10T17


W18

P19EB2_NRD

EB2_NWAITW17

EB2_NWEN17

GN

D01

A1

A14

GN

D02

A22

GN

D03

GN

D04

AA

1A

B1

GN

D05

AB

22G

ND

06B

13G

ND

07

DATA_07A8

DATA_08B9

DATA_09A9

DATA_10B10

DATA_11A10

DATA_12B11

DATA_13A11

DATA_14A12

DATA_15B12

EB2_ADDR_00P21P17


R19T19


U22R17

EB2_ADDR_05K21

EB2_ADDR_06

BSOFSB19

BURSTCLKD2

B14CLKIN

CLKONAB11

CLKOUTA21G17

CLKOUT_GATE

B20CSDI

CSDOA20D18

CSFS

B5DATA_00DATA_01

A5

DATA_02B6

DATA_03A6

DATA_04B7

DATA_05A7

DATA_06B8

ADD_14D9

F11ADD_15ADD_16

D10

ADD_17F12D11

ADD_18ADD_19

F13D12

ADD_20ADD_21

F14

ADD_22D13D14

ADD_23

B18ASDI

ASDOF15

ASFSD16

BSDID17

BSDOF16A19

BSIFS

ADD_00J6G4

ADD_01H6

ADD_02ADD_03

F4G6

ADD_04ADD_05

E4

ADD_06D5F7

ADD_07ADD_08

D6

ADD_09F8D7

ADD_10ADD_11

F9D8

ADD_12F10

ADD_13

RXON

AD6900XBCZ

U101

1u

C127

1u

C108

C117

C144

1u

39p

22u

C125

C104

TXON

0.1u

SD_CS

VCORE

OJ102

BAT100

C116

0.1u

C137 1u

0.1u

12

VCORE

C13932.768KHz

X100

FC-135

L100

OJ103

4.7uH

39p

C146

1uC134

1V82_VINT

2V93_VEXT

22p

C101

0.1u

C150

nWE

2V85_VSIM

1V8_VGP

1u

C122

C115

NC278

NC3

NC49

ON_SW5

RTS11

2RX

TX3

VBAT6

0.1u

UART

12CTS

10DSR

1GND

4NC1

22p

C107

C135

22p

2V93_VEXTC103

0.1u

C121

1u

2V93_VEXT

R1024.7K

0.1uC142

1V8_VRTC

VCORE

VBAT

CLKOUT

DNI

R104

VBAT

10K

R105

2V93_VEXT

R113 0

22pC140

C132

2.2u

1000pC120

C113

0.1u

VMEMOUT2

J5VMEMSEL

J12VMIC

F12VPLL

VRFC12

M7VRTC

VRTCSELJ6

M6VSIM

VUSBC11

A4VUSBCHG

VU

SB

IND

11

E3

E4

VC

OR

EG

ND

2

VCOREPWR1F1

VCOREPWR2F2

E1VCORESW1VCORESW2

E2

B2VCXOEN

VEXT1A3B3

VEXT2

C6

VG

ND

11D

6V

GN

D12

VGPM5

VINTK2

VINTOUTK1

VM

EM

FBL5

L4VMEMOUT1

M4

L1

G12VABB

VA

PP

E12

D3VAPPCFG

D12VAPPGATE

C4

VB

AT1

VB

AT2

D9

D10

VB

AT3

E10

VB

AT4

H4

VB

AT5

J4V

BA

T6K

5V

BA

T7K

6V

BA

T8

VBATSENSEB6

A1VCHG

VC

OR

EFB

D2

VC

OR

EG

ND

1

REFOUT

RESET1P8L3

RESET2P8C3

K4RXON

SG

ND

1K

7 L7S

GN

D2

SPWR1J9

SPWR2J10

D1TCK

B1TDI

TDOC2

C9TEMP1

A7TEMP2

TMSC1

B11TRKCHG1TRKCHG2

B10

TXON

H11

LIGHT2G11H12

LIGHT3

L2MCLK

K3MCLKEN

MP

WR

F4

MSCLKC5D4

MSDIMSFS

D5

A8PAPWREN

J11

QNA11A12

QPREFB9

REFBBB7

REFCHGB12

B8

CRST

J1CSDICSDO

H2

CSFSM1

L6DBBON

H5

DG

ND

GATEDRIVEA5

GN

D_J

07J7

INA10

F3INT

A9IP

A6ISENSE

JACKSENSEK9

M10KEYONKEYOUT

L10

H10

LGN

D

LIGHT1

F10AOUT3R

G10

G4ASDIASDO

G3

G1ASFS

J2ASM

C8AUXADC1AUXADC2

C7

BATTEMPB4

BATTYPEB5

H1BSDI

BSDOH3

J3BSIFS

G2BSOFS

A2CHGDET

K8CHGLIGHT

M3

AG

ND

09

AG

ND

2D

7E

9A

GN

D3

G9

AG

ND

4

M12AIN1NAIN1P

M11

L12AIN2N

L11AIN2P

K11AIN3LAIN3R

K12

AOUT1NF11E11

AOUT1P

L8AOUT2N_1

M8AOUT2N_2

L9AOUT2P_1AOUT2P_2

M9

AOUT3L

F9

AG

ND

012

G6

G7

AG

ND

013

G8

AG

ND

014

H6

AG

ND

015

AG

ND

016

H7

AG

ND

017

H8

H9

AG

ND

018

J8A

GN

D01

9

F5A

GN

D02

G5

AG

ND

03D

8A

GN

D04

AG

ND

05E

6E

7A

GN

D06

AG

ND

07E

8 F6A

GN

D08

F7

CHG_ABB

U100

AD6855ABCZ

ABBRESETM2

K10ACCDETECT

AFCDACC10

AG

ND

01E

5

AG

ND

010

F8

AG

ND

011

FB100

1u

1V82_VINT

C126

ABB_INT

DNI

R112

C145

39p

VUSB

100KR100

22u

VBAT

C118C119

CHG_ABB

2V93_VEXT

22p

1u

C130C129

1u

C123

1u

2V93_VEXT

C138 0.1u

C109

22p

ROM_CS

C131

1u

39p

10M

R103

C153

1V88_VMEM

68KR106

VUSBIN

CHG_ABB

VBAT

C15139p

C114

0.1u

1V88

_VM

EM

C158100p

2V5_VMIC

VBAT

DNI

R111

C157

0.1u

2V93_VEXT

USC5

HOOK_DETECT

VJACK_LDO_EN

HP_LOUT

LCD_ID_L

BT_UART_RTS

HP_EN

nRESET

BT_LDO_EN

RCV_N

LCD_SUB_CS

VBACKUP

FM_R

LCD_ID

MIC_N

GENIE_TXGENIE_RX

USB_DET

LCD_ID

26M

ADD24

MIC_P

HP_MIC_PHP_MIC_N

KEY_ROW5

KEY_BACKLIGHT3

CAM_MCLK

MC_DET

JACK_DETECT

LCD_DATA15

BT_UART_CTS

EXT_PWRON

RCV_P

VIBRATOR

ANT_SW2

CAM_PWDN

LOUD_SPK_EN

JTAGEN

TCK

FM_L

CAM_LDO_EN

BT_WAKEUP

BT_PCM_CLK

BT_PCM_SYNC

VBACKUP


BT_PCM_RX

ADD25

DATA00DATA01DATA02DATA03DATA04DATA05DATA06DATA07DATA08DATA09DATA10DATA11DATA12

BT_PCM_TX

DSR_DET RTCK

PA_BAND

S_ENS_DATAS_CLK

SIM_RST

RPWRONPWRON

LCD_BACKLIGHT_CTRT

CAM_DATA7

CAM_DATA0CAM_DATA1CAM_DATA2

CAM_HSYNCCAM_VSYNC

CAM_PCLK

nRESET

PA_EN

ANT_SW1

BURSTCLK

SD_CLKSD_CKE

KEY_COL0KEY_COL1KEY_COL2KEY_COL3KEY_COL4

KEY_ROW1KEY_ROW2KEY_ROW3KEY_ROW4


ADD20ADD21ADD22ADD23

DATA13DATA14DATA15

nWE

nADV

ROM_CS0

SD_RASSD_WE

SD_CASSD_CS

DQM0

DQM1

nWAIT

ADD04ADD05ADD06ADD07ADD08ADD09ADD10ADD11ADD12ADD13ADD14ADD15ADD16ADD17ADD18ADD19

ADD01ADD02ADD03

INIP

POWERKEYKEY_ROW4

TX_RAMP

QNQP

USC3USC4USC5USC6

AFC

SPK_N

SPK_P

HP_ROUTBATT_TEMP

RPWRON

MC_D1MC_D2MC_D3

nRD

PWRON

SIM_CLKSIM_DATA

USB_NUSB_P

USC0USC1USC2

LCD_DATA10LCD_DATA09LCD_DATA08LCD_DATA07LCD_DATA06LCD_DATA05LCD_DATA04LCD_DATA03LCD_DATA02LCD_DATA01LCD_DATA00

LCD_MAIN_CS

KEY_ROW0

MC_CLKMC_CMDMC_D0

TMSTDI

TDO

F_DPDBT_32K

BT_INT

CHG_EN

LCD_DATA14LCD_DATA13LCD_DATA12LCD_DATA11

LCD_RSLCD_VSYNC


LCD_WR


FOLDER_DET

CHG_DET

USC4

RPWRON

USC1

DSR_DET

USC2

7. CIRCUIT DIAGRAM


- 118 -

(INTEL, 512Mbit NOR + 128Mbit SDRAM)

11

1

ON BOARD JTAG

H

A

3

B

10

(RX)

G

2

D

(TX)

8

C

1

F

(EB2_ADDR_10)

2 9

MEMORY

4

7

E

12

(RTS)

5

E

A

F

G

95

7

H

G

96 118

E

10

1 127

C

E

1

(GPIO_055)

B

12

C

3

D

F

H

122

(GPIO_037)

Charging IC

8

11

BLUETOOTH & FM RADIO

C

44

6

(GPIO_059)

(1%)

6 10

6 9

A

F

H

G

4

3

D

(GPIO_172)

3

2 8

A

(CTS)

D

5

B

7 11

B

(GPIO_013)

10

5

(EB2_ADDR_04)

BT_D_IQ

R21610K

DNIR202

0.1u

R213

C204

36KR214100K

0.1uC207

C2111u

30K

R217

47R219

1V88_VMEM

2V93_VEXT

R206

47K

C2101u

47K

R207

R212100K

CHG_ABB

FM_L

R203DNI

100K

R205

1V8_VGP

R21010K

4

VBAT

19.2MHz


2GND

3OUT

TRI_OPEN1

VDD

BT_TX

0.1uC205

100K

R218

1V88_VMEM

BT_RTSBT_CTS

VUSBIN

18192021222324

G1 G2

G3 G4

23456789

16

252627282930

17

CN201

1

101112131415

BAT10

CRDL1

8GND

9ICDL

6IMIN

PGND11

2USB

USBON7

4_CHG

_EN5

_PPR3

ISL6299U203

C217C218DNI 1u

C201

1V88_VMEM

GND201

1000p

DNI

C202

2V93_VEXT

1V88_VMEM

ANT201

IN35

11NC1NC2

12

OUT16

7OUT2

_EN10

3_FLAG

VCHARGE

FM_R

NCP348MTR2GU204

GATE8

9GATE_OUT

GND2

1IN1

4IN2

2V93_VEXT

D_BT_IQ

CHG_ABB

BT_RX

C215

R208 DNI

1u

VREG_CTL

XTALNI5I6

XTALP

R211

30K

B2

C2PCM_SYNC

A4REGBT

RESETB4C4

SLEEP_CLK

G4TM0

G3TM3

UART_CTSH2

UART_RTSG2

UART_RXG1H1

UART_TX

I3VAFLVAFR

I4

VBATTA3A2

VDDR3V

I2VIO

C3

GND4E6

GND5E7

GND6F1

GND7F2

GND8GND9

F3

H5GPIO0

H4GPIO1GPIO2

G6

GPIO3G5C6

GPIO4GPIO5

H7

GPIO6B3C7

GPIO7

PCM_CLKC1

PCM_INB1

PCM_OUT

D2

GND16D3

GND17D4

GND18D5

GND19D6

GND2E3

GND20D7A1

GND21GND22

H6I7

GND23I1

GND24A5

GND25GND26

A7

GND27B5B6

GND28

E4GND3

E5G7

A_GPIO4A_GPIO5

H3C5

A_GPIO6A_GPIO7

B7

BT_ANTE1A6

FM_ANT

GND1E2

GND10F4

GND11F5F6

GND12F7

GND13GND14

D1

GND15

VBAT

U201 EWFMLBAXX

1000p

C203

1uC212

C209

R204

100K

0.1u

C6VSS4VSS5

C7C8

VSS6K2

VSS7VSS8

K3K4

VSS9

_ADVD5

_OEH7

E2_WE

E5N_CLE

N_RY__BYH1

F6N__RE_S__CS1N__WE_S_CS2

H2

G1RFU

S_VCCD2

VCCQ1J2J3

VCCQ2J7

VCCQ3VCCQ4

J8

C2VSS1

K6VSS10VSS11

K7K8

VSS12

VSS2C3C4

VSS3

D4F1_VCC1

J4F1_VCC3

G3F1__CE

D6F2_VCC2

J6F2_VCC4

F2__CEG2

F3__CEH3E6

F4__CE_A27F_CLK

K5

B6F_DPD

J1F_VPP

F_WAITJ9

F__RSTG7

E1F__WP1

F1F__WP2

D8N_ALE

M9DU4

D_BA0G4H4

D_BA1

G6D_CKE

J5D_CLK

D_DM0_S__LBH9H8

D_DM1_S__UB

D_LDQSM3M7

D_UDQS

D_VCC1C5D3

D_VCC2D7

D_VCC3

F3D__CAS

H5D__CLK

F4D__RAS

D__WEH6

L7DQ11DQ12

L8

DQ13K9L9

DQ14M8

DQ15

DQ2K1

DQ3L2M4

DQ4L3

DQ5DQ6

L4L5

DQ7DQ8

M5

DQ9L6

A1DU1

A9DU2DU3

M1

A6A23

A7A24A25

A8B8

A26

B2A3A4

A2B3

A5A3

A6A7

A4G8

A8F8

A9

D1__CSF2

D2__CSE3

M2DQ0

L1DQ1

M6DQ10

A0D1C1

A1

E8A10

G9A11A12

F9

A13E9

A14D9C9

A15A16

B9B4

A17A18

B5A5

A19

A2B1

A20F7

A21E7

A22B7

U202 PF38F5060M0Y0BE

C216DNI

R201 0

USB_DET

BT_PCM_TX

BT_PCM_SYNC

BT_PCM_RX

BT_PCM_CLK

FM_LFM_R

BT_MAIN_CLK_EN

BT_19.2MHZ


BT_32K

BT_LDO_EN

FM_ANT

BT_RESET

BT_WAKEUPBT_INT



USC5USC6JTAGEN

TDITMSTCK

RTCKTDO

nRESET

CHG_EN

CHG_DET

ADD14ADD15ADD16

ROM_CS0

nRESET

USC0USC1USC2USC3USC4

F_DPD

ADD01ADD02ADD03ADD04ADD05ADD06ADD07ADD08ADD09ADD10ADD11ADD12ADD13

ADD18ADD19

nADV

SD_RASSD_CAS

BURSTCLK

nWAITnWE

nRD

SD_WE

DQM0DQM1

SD_CS

SD_CLK

SD_CKE

ADD24ADD25

DATA01DATA02DATA03DATA04DATA05DATA06DATA07DATA08DATA09DATA10DATA11DATA12DATA13DATA14DATA15

DATA00

ADD17ADD18ADD19ADD20ADD21ADD22ADD23

7. CIRCUIT DIAGRAM


- 119 -

D

SPEAKER

H

USB & DEBUG

9

9

1

10

(USB & DEBUG PATH Control)

(5000-6T-1.8SL)

(TX)

8

(GPIO_009)

C

DEBUG_TX/ RX

A

3

6

8

G

A

10

(GAIN x6)

4 11

H

EARJACK / I_O

A

F

SIM CONNECTOR

8

2 118

E

F

C

6

5 6

12

(GPIO_100)

A

B

10

73

E

95

USB_DET

9

11

12

51 6

G

H

GG

D

1 4

C

MIC

F

12

D

2

11

(RX)

(SCHB1A0202)

E

B

E

3

5

4

3

B

MICRO SD Connector

2

H

C

1

10

F

D

USB & DEBUG Links to

H

2

7

1277

B

4

L

USB_LINEP/ N

100K

R317

123

4

0.1uC306

2V5_VJACK

CN301

R325 0

10p

VBAT

TX

DSR

C305FB301

2.2K

R32

7

EVLC14S02050VA305

VUSBIN

GN

D5

D2

GN

D6

GN

D7

D3

IN+C1

IN-D1

B1NC

B4VDD1

C4VDD2

D4VO+

VO-A4

A1_SD

VBAT

TPA2005D1ZQYRU303

GN

D1

A2

A3

GN

D2

GN

D3

B3

C2

GN

D4

C3

EV

LC14

S02

050

VA

303

C31910u

VBAT

R30

8

100K

10uC327

EV

LC5S

0250

VA

301

100K

R305

3pC314

9

GND210

GND31112

GND4

4VDD

6VSS

J301

5CLK

3CMD

7DAT0DAT1

8DAT2

1

DAT32

GND1

1u

C310

100uVCHARGE

1

2

C302

CN302

1uC312

1VDD VOUT

3

0.01uC316

U304 R1114D251D

6CE

GND12

GND25

NC4

100K

R304

1000p

47

C321

R310

220n

C318

EV

LC14

S02

050

VA306

R309 4.7

NC15

7NC2

2NO1

10NO2

1VCC

SLAS4717EPMTR2GU302

COM13

COM29

GND6

4IN1

8IN2

L301 100nH

R31

8

1K

FB304

1M

R328

R311 47

2V93_VEXT

R302

2.2K39p

C301

15161718

19

2

20

21

22

3456789

CN300

1

1011121314

C300

R319

100K

10u

R307 4.7

NO1

10NO2

1VCC

2V5_VMIC

100K

R323

COM13

COM29

GND6

4IN1

8IN2

NC15

7NC2

2

C329

2V85_VSIM

NLAS5223BMNR2GU301

100ohm

R324

2.2u

R32

9

100K

2V93_VEXT

EXT_PWRON

10u

C315

C322

10uC307

C309

1000p

47p

1uC304

R300

1.5K

R314 47K

100K

R320

47pC313

VA307

EV

LC14

S02

050

FB302

RX

R32

2

2.2K

C324

22p

2V85_VSIM

2V93_VEXT

RS

B6.

8CS

T2R

ZD

300

47pC311

DNIC332

C308

1u

2V93_VEXT

100uC303

D+IC6

D-3

D-IC4

2GND

5VBUS

C3251000p

U300 STF203-22-TC1

D+

R321

4C5C6

5

C76

GND178

GND2GND39

10GND4

100K

J3001

C12

C2C3

3

2V93_VEXT

47KR315

DNI

VA

300

EV

LC5S

0250

C320C323

2V93_VEXT

100K

R306

DNI

1800

VBAT

FB300

R326

100ohm

VA304EVLC14S02050

C330 C3311u

2V5_VJACKVBAT

1u

DNIR303

OBG-415L42-C33LHMIC300

R316

15KFB305

39pC328

1

R312

C317

C32639p

0.01u

HP_MIC_P

GENIE_RX

USB_LINEN

L300270nH

HOOK_DETECT

VJACK_LDO_EN

BATT_TEMP

SIM_RST

HP_MIC_N

HP_ENHP_ROUT

HP_LOUT

HP_EN

FM_ANT

MULTI_PORT_RXMULTI_PORT_TX

USC1USC2

EXT_PWRON

JACK_DETECT

DSR_DET

USB_LINEN

USB_LINEPUSB_P

USB_N

MIC_P

MIC_N

USB_LINEP

GENIE_TX

MULTI_PORT_TX

MULTI_PORT_RX

USB_DET

USB_DET

MC_D3

MC_DET

SIM_DATA SIM_CLK

MC_D0MC_D1MC_D2

MC_CMDMC_CLK

LOUD_SPK_EN

SPK_N

SPK_P

7. CIRCUIT DIAGRAM


- 120 -

A

G

UP

4

B

108

B

12

5

B

7

8

DOWN

12

C

#

10

1

D

VIBRATOR

C

7

5

KEYPAD

2

SEND

F

7 8

11

OK

E

6

99

RIGHT

10

8

7

HH

E

MENU

7 11

1

CLEAR

FLIP

3

5

G

D

3

FF

H

(VOLUME_DOWN)

D

A

4

0

G

B

113 5

1

END

LEFT

4

G

C

2

CONF

8

3

*

E

32

H

9

E

KEY BACKLIGHT

1211

C

6

(VOLUME_UP)

1264

1

5

21

9

SIDEKEY_PAD

D

9

2

F1

6

6

A

10

A

4

F

47

3N

CO

UT

21V

DD

4V

SS

R401

KB420

U400

EM

-078

1-T5

C402

KB412

1u

2.2

R408

KB409

VA502EVLC18S02015

680

R614

2

Q1_B

6

Q1_C

1

Q1_E

Q2_B

5

Q2_C

3

Q2_E

4

KB418

VBAT

Q400

VA

402

EV

LC18

S02

015

VA

405

ICV

N05

05X

150F

R

2V93_VEXT

KB421

KB416

KB404

LD400LEWWS44-E

KB402

KB413

ICV

N05

05X

150F

R

VA

401

KB411

VBAT

KB410

VA

400

ICV

N05

05X

150F

R

KB408

CN

400

1234

KB422

R407

0

680R402

R404 680

VA

404

EV

LC18

S02

015

KB403

KB405

KB400 KB401

VA

403

EV

LC18

S02

015

KB406

VBAT

KB407

680R403

LEWWS44-E LD401

KB415

R400

47

680

R405

KB419

VA503EVLC18S02015

KB414

10K

R40

6

KB417

KEY_COL1

KEY_ROW4

KEY_ROW3

KEY_ROW2

KEY_COL0

KEY_ROW1

POWERKEY

KEY_COL3

KEY_COL4

VIBRATOR_P

VIBRATOR

KEY_BACKLIGHT3

FOLDER_DET

KEY_ROW0

KEY_ROW5

KEY_COL2

7. CIRCUIT DIAGRAM


- 121 -

A

G

A

1

D

B

5 91

11

E

127

C

G

73 4

D

FPCB CONNECTOR B

H

G

F

9

9

12

8

3

C

E

B

F

112

C

2 83

2

72

3

1 12

C

4 105

12

5

A

116

4

105

7 10

8

6

6

B

G

E

CAMERA POWER

D

11

HH H

F

4

D

10

8 9

(EB2_ADDR_00)

E

F

6

A

LCD BACKLIGHT

1

0.1u0.1uC508 C509

D50

3R

SB

6.8C

ST2

R

C518

D50

6R

SB

6.8C

ST2

R

1u

2.2uC506

R50

3

100K

C50456p

DNIC522

2.2uC523

4.7K

R502

1u C51

7

L500

INOUT_B46

18nH


G1

5

G2

10

INOUT_A11

INOUT_A22

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

2V8_IOVDD

RS

B6.

8CS

T2R

D50

1

R500100K

G1

5

G2

10

INOUT_A11

2INOUT_A2

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

INOUT_B46

39p


C502

2V8_AVDD

C500DNI

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

7INOUT_B3

6INOUT_B4

VBAT

7

6INOUT_B4


5G

110

G2

1INOUT_A1


5G

110

G2

1INOUT_A1

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B3

59

6

60

789

G1G2

G3G4

43444546474849

5

505152535455565758 3

30313233343536373839

4

404142

1516171819

2

20212223242526272829

CN500

1

1011121314

C5030.1u

C5191u

C5051u

RS

B6.

8CS

T2R

D50

2

100ohm R504

2

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

6INOUT_B4


5G

110

G2

1INOUT_A1

INOUT_A2

D50

5R

SB

6.8C

ST2

R

2V93_VEXT

2V8_IOVDD

INOUT_B37

6INOUT_B4

DNI

C521

5G

110

G2

1INOUT_A1

2INOUT_A2

INOUT_A33

INOUT_A44

INOUT_B19

8INOUT_B2


C510

L50118nH

2V8_

AV

DD

0.1u

FB50

0

2V8_

IOV

DD

ZD501RSB6.8CST2R

VA

501

ICV

N05

05X

150F

R


5G

110

G2

1INOUT_A1

INOUT_A22

3INOUT_A3

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

6INOUT_B4

1V8_DVDD

EN_SET3

10GND

9IN

OUTCP6

PGND15

C5201u

AAT3169IFO-T1U501

C1+4

5C1-

C2+7

C2-8

11D1D2

1213

D314

D41

D52

D6

C5071u

C51127p

C50139p

RS

B6.

8CS

T2R

D50

4

RT9011-MGPQWU500

EN123

EN2GND

54NC1

6NC2

9P

GN

D

VIN1 8

VOUT1VOUT2

7

DNI

R505

1V8_

DV

DD

INOUT_A44

INOUT_B19

8INOUT_B2

INOUT_B37

INOUT_B46

R501

4.7K


5G

110

G2

1INOUT_A1

INOUT_A22

INOUT_A33


G1

5

G2

10

INOUT_A11

2INOUT_A2

INOUT_A33

4INOUT_A4

9INOUT_B1

INOUT_B28

7INOUT_B3

INOUT_B46

VBAT


MLED5MLED4MLED3

MLED1MLED2

CAM_RESET

CAM_VSYNCCAM_HSYNC

RCV_N

RCV_P

KEY_COL3

MLED


LCD_VSYNC

LCD_MAIN_CS

CAM_PCLKCAM_MCLK



MLED5

LCD_SUB_CS

KEY_COL4

CAM_LDO_EN

CAM_PWDN

VIBRATOR_P

LCD_ID_L


KEY_ROW5

LCD_RSLCD_WR

LCD_RESET

MLED

LCD_BACKLIGHT_CTRT





KEY_ROW4




7. CIRCUIT DIAGRAM


- 122 -

12

C

F

1212

H

2

G

RX1900_N

A

8

A

D

5

D

9

B

RX850_P

65

3

2

H

G

8

E

GSM/EGSM TX L

D

A

(GPIO_060)

L

B

64

10

91

2

(GPIO_070)

L

H

1

ANT_SW2

12

10

F

RX1900_P

4

H

E

4

10

E

L

C

7

72

H

H

11

A

RX900_N

C

L

PCS RX

(GPIO_074)

9

B

G

(GPIO_073)

DCS RX

DCS/PCS TX

6

11

L

85

5

B

EGSM RX

ANT_SW1

L

GSM RX

RX850_N

4

3 7

H

3

H

(GPIO_072)

RX1800_N

11

H

11

D

6

F

1

E

1

8

RX1800_P

3 7

C

G

10

F

9

RX900_P

100pC644

0.1uC634

C6250.1u

VLDO1

0.01u

L604

18nH

C606

VLDO1

DNIC615

47pC618

C60439p

27pC614

2V75_VCXO4.7nHL601

R606 DNI

22uC601

0

R60

8

82pC617

0.01uC605

C629

15

GSM850_RX11

GSM850_RX223


4

VC11413

VC2

12VDD 27p

FL601DGM1110M014

AN

T17

GND19

11GND2

16GND3

18GND4GND5

1920

GND6GSM1800_1900_TX

10


67


8

GSM850_900_TX

4.7p

C6270.1u

C631

C608 22p

16

9VLDO3

5.6nHL602

3029

RX900B

SC

LK65

SD

ATA

7S

EN

11TXOP_HI

TXOP_LO10

18V

AFC

_NC

VBAT14

VC

C_B

BI

4

24V

CC

_BB

Q1

VC

C_F

E

VC

C_R

EF

17

12VCC_TXVCO

13VDD

15VLDO1VLDO2

GND33

I2 3

IB NC

8

Q23 22

QB

20R

EFI

NR

EFI

NB

19

RE

F_O

P21

RX18002827

RX1800BRX1900

26RX1900B

25

RX8503231

RX850BRX900

AD6548U602

2 34

C641100p

VBAT

26M

Hz X60

1TS

X-3

225_

26M

HZ1

0.1u

2V75_VCXO

C626

AN

TG

1

G2

RF

C6300.1u

DNI

SW601

RF500

C610

C640100p

C632

220n

C622

39p C633 10p

6pC621

C63639p

0.1u

C62

0

C612 4.3nH

82p

VBAT

C642

10pC637

0R613

C628

100p

0.1u

C639

TP603 TP604

C643100p

C60233p

27pC613

1K R603

L603

2V93_VEXT

18nH

6pC623

10pC638

R610

82

VLDO1

C603

C616

2.7p

0.01u

10K

R611

0.5pC609

51

R607

C624

10

R612

4.7p

10pC635

7G

ND

2G

ND

38

GN

D4

910G

ND

512

GN

D6

13G

ND

7G

ND

814

GN

D9

16

P_GND21

19RSVD_GND

VA

PC

20

VB

ATT

17 2V

CC

1A

6V

CC

1B

U601SKY77318

BS1

3DCS_PCS_INDCS_PCS_OUT

15

4EGSM_IN

11EGSM_OUT

ENABLE18

GN

D1

5

C611 33pDNIR609

1uC619

S_DATA

IP

QP

QN

IN

S_CLK

ANT_SW2

TX_RAMP

PA_EN

PA_BAND

26M

S_EN

AFC

ANT_SW1

7. CIRCUIT DIAGRAM


- 123 -

HOT 3 HOT 4

E

1

KEY MATRIX (4 pi Dome)

MAIN-FPCB to KEY-PCB INTERFACE CONNECTORENBY0023901 (AXK7L30225G, 30pin, 0.9t, Socket)

B

7

G

D

F

C

9 12

A

F

5

3

E

66

D

8

B

H

8

H

9

D

3 4

4 5

2

E

2 9

10

A

4

9

B

G

D

Match Two Column Lines

11

KEY-PCB to CAMERA INTERFACE CONNECTORENBY0020401 (AXK7L24227J, 24pin, 0.9t, Socket)

G

8

E

1 11

21

CC

12

1 8

7

10

A

C

7

11

A

12

103

B

G

HOT 1

11

HOT 2

52 3 7

H

126

F

H

4 6

F

5 10

to Outer Circle of Buttons

VA

701

EV

LC18

S02

015

KB702

VA

702

EV

LC18

S02

015

R702 680

680R701

89

KB701 KB703

141516171819

2

2021222324

34567

CN702G1 G2

G3 G4

1

101112 13

2V8_

IOV

DD

2V8_

AV

DD

18192021222324

G1 G2

G3 G4

23456789

16

252627282930

17

CN701

1

101112131415

2V8_

AV

DD

1V8_

DV

DD

2V8_

IOV

DD

KB704

1V8_

DV

DD

CAM_DATA7

CAM_DATA3

CAM_DATA1

CAM_PWDN

CAM_VSYNCCAM_I2C_DATA

CAM_HSYNC

KEY_COL4

KEY_ROW5

KEY_COL3

KEY_COL4

KEY_ROW4


KEY_ROW5

CAM_DATA5

CAM_PCLK

CAM_I2C_CLK

MUXOUT_1

KEY_COL3

CAM_DATA6

CAM_DATA4

CAM_DATA2

CAM_DATA0

KEY_ROW4

CAM_RESET

CAM_I2C_DATA

CAM_VSYNCCAM_HSYNCMUXOUT_1

CAM_I2C_CLK

CAM_PWDNCAM_RESET

CAM_PCLKCAM_DATA0CAM_DATA1CAM_DATA2CAM_DATA3

7. CIRCUIT DIAGRAM


- 124 -

7. CIRCUIT DIAGRAM


H

6

FPCB to LCD INTERFACE CONNECTORENBY0023201 (AXK8L44125, 44pin, 0.9t, Header)

8

(0.1

5mm

)

(0.1

5mm

)

11

A

(SUB LCD VSYNC)

10

VISION MARK

G

(0.1

5mm

)

(0.1

5mm

)

(0.15mm)

(0.15mm)

(0.15mm)

(0.15mm)

(0.15mm)

(0.15mm)

(0.15mm)

(0.15mm)

(0.4mm)

(0.2mm/ Shield)

(0.15mm)

(0.2mm/ Shield)

(0.2mm/ Shield)

(0.2mm/ Shield)(0.15mm)

B

10

4

2

11

7

D

C

H

(IF_MODE = LOW : 16BIT)

(LCD_RD : Internally Pulled Up)

G

5

2

(0.1

5mm

)

(0.2

mm

)

(0.1

5mm

)

1

D

98

3

(0.2

mm

)

1 9

F

7

4

F

FPCB to KEY-PCB INTERFACE CONNECTOR

MAIN to FPCB INTERFACE CONNECTOR

(0.15mm)

(0.15mm)(0.4mm)

ENBY0023801 (AXK8L30125BG, 30pin, 0.9t, Header)

12

E

A

3

12

C

ENBY0020202 (AXK8L60125J, 60pin, 0.9t, Header)

B

E

2V8_

IOV

DD

789

G1 G2

G3 G4

313233343536373839

44041424344

56

171819

2

202122 23

242526272829

3

30

CN802

1

10111213141516

1V8_

DV

DD

2V93

_VE

XT

G2

G3 G4

2V8_

IOV

DD

16

252627282930

1718192021222324

G1

1

101112131415

23456789

CN801

575859

6

60

789

G1

G2

4243444546474849

5

50515253545556

2829

3

30313233343536373839

4

4041

13141516171819

2

2021222324252627

CN803

1

101112

2V8_

AV

DD

2V8_

AV

DD

1V8_

DV

DD

TP803TP804TP802TP801

MLED4MLED5


LCD_RESET

LCD_ID

LCD_RS

2V93

_VE

XT

CAM_DATA2

KEY_ROW5

MUXOUT_1

KEY_ROW4

CAM_PWDN

CAM_I2C_CLKCAM_I2C_DATACAM_VSYNCCAM_HSYNC

MLED3MLED2MLED1

RCV_PRCV_N

KEY_COL4

CAM_DATA1CAM_DATA0

CAM_PCLK

CAM_RESET

KEY_COL3

CAM_DATA7CAM_DATA6CAM_DATA5CAM_DATA4CAM_DATA3

LCD_DATA15

LCD_DATA02

LCD_DATA00

LCD_DATA06

LCD_DATA04LCD_DATA11LCD_DATA10




LCD_DATA01

LCD_DATA03

LCD_DATA05

LCD_DATA07

RCV_N

MLEDVIBRATOR_PKEY_COL4

LCD_DATA02LCD_DATA03LCD_DATA04LCD_DATA05LCD_DATA06LCD_DATA07

KEY_COL3

LCD_DATA08LCD_DATA09LCD_DATA10LCD_DATA11LCD_DATA12LCD_DATA13LCD_DATA14

CAM_PWDN

KEY_ROW4KEY_ROW5

LCD_SUB_CSLCD_MAIN_CS

RCV_P

CAM_DATA1CAM_DATA0


CAM_PCLK

LCD_WR

CAM_VSYNCCAM_HSYNC

LCD_VSYNC

CAM_RESET

MUXOUT_1

MLED5

MLED3

MLED1

LCD_RS

LCD_SUB_CS

LCD_MAIN_CS

LCD_WR

LCD_VSYNC

LCD_RESET

MLED

MLED2

MLED4

LCD_IDVIBRATOR_P


CAM_DATA3CAM_DATA2

- 125 -

7. CIRCUIT DIAGRAM


F

109

F

11

A

SUB KEY MATRIX

SIDEKEY_PAD

8

B

E

4

D

9

G

C

11

7 105

G

2 7

41

1

C

H

B

8

3

12

E

H

2

D

A

3

12

6

VOLUME_UP

VOLUME_DOWN

CN501

1 2 3 4


- 127 -

8. BGA IC Pin Check

8. BGA IC Pin Check

USE

NOT IN USE

- 128 -

8. BGA IC Pin Check


AD6855 Terminal Locations (Top view)

USE

NOT IN USE

- 129 -

8. BGA IC Pin Check


USE

NOT IN USE

- 130 -

8. BGA IC Pin Check


USE

NOT IN USE

- 131 -

8. BGA IC Pin Check


USE

NOT IN USE


- 132 -

- 133 -

9. PCB LAYOUT


- 134 -

9. PCB LAYOUT


SW601 (mobile switch)- Can't make a call-Tx Low Power- Not good Rx BER- No service

U601 (RF PAM)- Can't make a call- Tx Low Power- No service

CN500- Can't take a picture- No LCD display

U501- Can't turn on the LCD Backlight

U303- The speaker working bad

FL601 (RF Front End module)- Can't make a call- Tx Low Powe- Not good Rx BER- No service

U602 (Transceiver)- Can't make a call- Tx Low Power- Not good Rx BER- No service

U500- The camera working bad

X100- RTC trouble

Q400- The vibrator working bad

U201- The Bluetooth working bad- The FM Radio working bad

- 135 -

9. PCB LAYOUT


CN701Key_PCB conn.NO CameraNo Hot_Key

CN7022M CAM conn.NO Camera

- 136 -

9. PCB LAYOUT


CN801Key_PCB Conn.No CameraNo Hot_Key

CN802LCD_Conn.No Display

- 137 -

9. PCB LAYOUT



- 139 -

10. ENGINEERING MODE


A. About Engineering Mode

Engineering mode is designed to allow a service man/engineer to view and test the basic functionsprovided by a handset.

B. Access Codes

The key sequence for switching the engineering mode on is 2945#*#. Pressing END will switch back tonon-engineering mode operation.

C. Key Operation

Use Up and Down key to select a menu and press ‘select’ key to progress the test. Pressing ‘back’ keywill switch back to the original test menu.

D. Engineering Mode Menu Tree

Engineering Mode

BB Test RF Test MF Mode Traceoption

Call Timer

CAMERA

LCD

Backlight

Buzzer

Vibrator

ADC

Battery

Audio

DAI

Bluetooth

SAR Test All Auto Test

Backlight

Buzzer

Vibrator

LCD

Key PAD

MicSpkTest

Camera

Video Camera

UART On

UART Off

Bluetooth on

Bluetooth off

All Calls

Reset

Fact.Reset

S/WVersion


- 140 -


10.1 BB Test [MENU 1]

10.1.1 CAMERA

This menu is to test the Camera.1) Main LCD preview: It shows the picture on Main LCD.

10.1.2 LCD

1) COLOUR : WHITE, RED, GREEN, BLUE, BLACK2) Contrast Value

10.1.3 Backlight

This menu is to test the LCD Backlight and Keypad EL Backlight.1) Backlight on : LCD Backlight and Keypad EL Backlight light on at the same time.2) Backlight off : LCD Backlight and Keypad EL Backlight light off at the same time.3) Backlight value: This controls brightness of Backlight. When entering into the menu,the present

backlight-value in the phone is displayed. Use Left/Right key to adjust the level ofbrightness. The value of the brightness set at last will be saved in the NVRAM.

10.1.4 Buzzer

This menu is to test the melody sound.1) Melody on : Melody sound is played through the speaker.2) Melody off : Melody sound is off.

10.1.5 Vibrator

This menu is to test the vibration mode.1) Vibrator on : Vibration mode is on.2) Vibrator off : Vibration mode is off.


- 141 -


10.1.6 ADC (Analog to Digital Converter)

This displays the value of each ADC.1) MVBAT ADC : Main Voltage Battery ADC2) AUX ADC : Auxiliary ADC3) TEMPER ADC : Temperature ADC

10.1.7 BATTERY

1) Bat Cal: This displays the value of Battery Calibration. The following menus are displayedin order : BAT_LEV_4V, BAT_LEV_3_LIMIT, BAT_LEV_2_LIMIT,BAT_LEV_1_LIMIT, BAT_IDLE_LI MIT, BAT_INCALL_LIMIT,SHUT_DOWN_VOLTAGE, BAT_RECHARGE_LMT

2) TEMP Cal: This displays the value of Temperature Calibration. The following menus aredisplayed in order : TEMP_HIGH_LIMIT, TEMP_HIGH_RECHARGE_LMT,TEMP_LOW_RECHARGE_LMT, TEMP_LOW_LIMIT

10.1.8 Audio

This is a menu for setting the control register of Voiceband Baseband Codec chip.Although the actual value can be written over, it returns to default value after switching off and on thephone.1) VbControl1 : VbControl1 bit Register Value Setting2) VbControl2 : VbControl2 bit Register Value Setting3) VbControl3 : VbControl3 bit Register Value Setting4) VbControl4 : VbControl4 bit Register Value Setting5) VbControl5 : VbControl5 bit Register Value Setting6) VbControl6 : VbControl6 bit Register Value Setting

9.1.9 DAI (Digital Audio Interface)

This menu is to set the Digital Audio Interface Mode for Speech Transcoder and Acoustic testing.1) DAI AUDIO : DAI audio mode2) DAI UPLINK : Speech encoder test3) DAI DOWNLINK : Speech decoder test4) DAI OFF : DAI mode off


- 142 -


10.2 RF Test [MENU 2]

10.2.1 SAR test

This menu is to test the Specific Absorption Rate.1) SAR test on: Phone continuously process TX only. Call-setup equipment is not required.2) SAR test off: TX process off

10.3 MF mode [MENU 3]

This manufacturing mode is designed to do the baseband test automatically. Selecting this menu willprocess the test automatically, and phone displays the previous menu after completing the test.

10.3.1 All auto test

LCD, Backlight, Vibrator, Buzzer, Key Pad, Mic&Speaker,

10.3.2 Backlight

LCD Backlight is on for about 1.5 seconds at the same time, then off.

10.3.3 Buzzer

This menu is to test the volume of Melody. It rings in the following sequence. Volume 1, Volume 2,Volume 3, Volume 0 (mute), Volume 4, Volume 5.

10.3.4 Vibrator

Vibrator is on for about 1.5 seconds.

10.3.5 LCD

1)LCDMain LCD screen resolution tests horizontally and vertically one by one and fills the screen.

10.3.6 Key pad

When a pop-up message shows °ÆPress Any Key°Ø, you may press any keys including side keys,but not [Soft2 Key]. If the key is working properly, name of the key is displayed on the screen. Test willbe completed in 15 seconds automatically.


- 143 -


10.3.7 MicSpk Test

The sound from MIC is recorded for about 3 seconds, then it is replayed on the speaker automatically.

10.3.8 Camera Test

This menu is to test camera(preview and capture automatically)

10.4 Trace option [MENU 4]

This is NOT a necessary menu to be used by neither engineers nor users.

10.5 Call timer [MENU 5]

This menu is to set the Digital Audio Interface Mode for Speech Transcoder and Acoustic testing.1) All calls : This displays total conversation time. User cannot reset this value.2) Reset settings : This resets total conversation time to this, [00:00:00].

10.6 Fact. Reset [MENU 6]

This Factory Reset menu is to format data block in the flash memory and this procedure set up thedefault value in data block.

Attention1 Fact. Reset (i.e.Factory Reset) should be only used during the Manufacturing process.2 Servicemen should NOT progress this menu, otherwise some of valuable data such as Setting

value, RF Calibration data, etc. cannot be restored again.

10.7 S/W version

This displays software version stored in the phone.


- 144 -

11. STAND ALONE TEST

11.1 Introduction

This manual explains how to examine the status of RX and TX of the model.

A. Tx Test

TX test - this is to see if the transmitter of the phones is activating normally.

B. Rx Test

RX test - this is to see if the receiver of the phones is activating normally.

11.2 Setting Method

A. COM port

a. Move your mouse on the ‘Connect’ button, then click the right button of the mouse and select “Comsetting’.

b. In the “Dialog Menu”, select the values as explained below.- Port : select a correct COM port- Baud rate : 38400- Leave the rest as default values

B. Tx

1. Selecting Channel- Select one of GSM or DCS Band and input appropriate channel.

2. Selecting APCa. Select either Power level or Scaling Factor.b. Power level- Input appropriate value GSM (between 5 ~19) or DCS (between 0 ~15)

c. Scaling Factor- A ‘Ramp Factor’ appears on the screen.- You may adjust the shape of the Ramp or directly input the values.

C. Rx

1. Selecting Channel- Select one of GSM or DCS Band and input appropriate channel.

2. Gain Control Index (0 ~ 26) and RSSI level- See if the value of RSSI is close to -16dBm when setting the value between 0 ~ 26 in Gain Control

Index.- Normal phone should indicate the value of RSSI close to -16dBm.



- 145 -


11.3 Means of Test

a. Select a COM portb. Set the values in Tx or Rxc. Select band and channeld. After setting them all above, press connect button.e. Press the start button

Connect Button

Figure 11-1. HW test program

- 146 -



Figure 11-2. HW test setting

Figure 11-3. Ramping profile


- 147 -

12. AUTO CALIBRATION

12.1 Overview

Auto-cal (Auto Calibration) is the PC side Calibration tool that perform Tx, Rx and Battery Calibrationwith Agilent 8960(GSM call setting instrument) and Tektronix PS2521G(Programmable Power supply).Auto-cal generates calibration data by communicating with phone and measuring equipment then writeit into calibration data block of flash memory in GSM phone.

12.2 Equipment List


Equipment for Calibration Type / Model Brand

Wireless Communication Test Set HP-8960 Agilent

RS-232 Cable and Test JIG LG

RF Cable LG

Power Supply HP-66311B Agilent

GPIO interface card HP-GPIB Agilent

Calibration & Final test software LG

Test SIM Card

PC (for Software Installation) Pentium II class above 300MHz

Table 12-2-1. Calibration Equipment List.

Figure 12-2-2. Equipment Setup


- 148 -


Figure 12-2-3 The top view of Test JIG

12.3 Test Jig Operation

1 2 3 4

ADI-REMOTETI-REMOTE

PSVBAT

JTAG2 JTAG1 USB

TA +

PS

_

POWERON

OFF

TA

POWER

MON Status

UART Status

ON

OFF

MO

NU

AR

T

PH

ON

EPower Source Description

Power Supply Usually 4.2V

Table 12-3-1 Jig Power

Switch Number Name Description

Switch 1 ADI-REMOTE In ON state, phone is awaked. It is used ADI chipset.

Switch 2 TI-REMOTE In ON state, phone is awaked. It is used TI chipset.

Switch 3 VBAT Power is provided for phone from battery

Switch 4 PS Power is provided for phone from Power supply

Table 12-3-2 Jig DIP Switch

LED Number Name Description

LED 1 POWER Power is provided for Test Jig

LED 2 TA Indicate charging state of the phone battery

LED 3 UART Indicate data transfer state through the UART port

LED 4 MON Indicate data transfer state through the MON port

Table 12-3-3 LED Description


- 149 -


1. Connect as Fig 12-2(RS232 serial cable is connected between COM port of PC and MON port ofTEST JIG, in general)

2. Set the Power Supply 4.0V3. Set the 3rd, 4th of DIP SW ON state always4. Press the Phone power key, if the Remote ON is used, 1st ON state

12.4 Procedure

1. Copy the file to C:\Cm_Gsm_Multi2. Copy the files of((Windows XXX)MFCD DLL, vsflex7l_ocx_regist to C:\Cm_Gsm_Multi\dll,ocx3. Select MFCD DLL of your computer OS4. Click on “vsflex7l_ocx_regist”5. Click on “Multi_HK reg”6. Connect as Fig 12-2 (RS232 serial cable is connected between COM port of PC, in general.)7. Run HK_30exe to start calibration.8. Click “Logic Operation” of “SETTING” menu bar

9. Set PORT (using RS232 cable) that PC can communicate with the phone10. Select “LOGIC MODE” that you want

Logic mode: 1-> Calibration only2-> Auto test only3-> Cal & Auto

- 150 -


11. Select the model name “KF300d/KF300/KF300c”

12. Click “start” button


Model name Start button

- 151 -


12.5 AGC

This procedure is for Rx calibration.

In this procedure, We can get RSSI correction value. Set band EGSM and press Start button the resultwindow will show correction values per every power level and gain code and the same measure isperformed per every frequency.

12.6 APC

This procedure is for Tx calibration.In this procedure you can get proper scale factor value and measured power level.

12.7 ADC

This procedure is for battery calibration.You can get main Battery Config Table and temperature Config Table will be reset.



- 152 -

- 153 -

1

2

3

4

7

8

9

10

1112

1314

18

7219

20

2122

23

24

25

2829

33

34

74

68

70

69

66

67

65

64

63

60

59

58

57

736261

55

54

53

52

48

47

4544

43

42

46

1

51

50

49

35

32

71

36

37

38

40

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

3130

27

26

5

6

15

1617

13. EXPLODED VIEW & REPLACEMENT PART LIST

13.1 EXPLODED VIEW


- 154 -

A

CD

E F GJ

KM

NO

PQ

R S

L

S

R

Q

P

O

N

M

L

K

J

I

H

G

F

E

D

C

B

A

HI

ASS’Y EXPLODED VIEW


- 155 -



13.2 Replacement Parts<Mechanic component>

LevelLocation

No.Description Part number Spec Remark

1 GSM(FOLDER) TGFF0099601 Black

4 MCJZ00 COVER MCJZ0030501 1146*996*105_TDR_Reliance Without Color

4 MPCY00 PALLET MPCY0013701 COMPLEX, (empty), , , , , Without Color

4 MSCY00 SLEEVE MSCY0001001 Deadspace Keeping Off_TDR_RLC Without Color

2 APEY00 PHONE APEY0494001 Black

3 ACGG00 COVER ASSY,FOLDER ACGG0086101 Without Color

4 ACGH00COVERASSY,FOLDER(LOWER)

ACGH0051001 Without Color K

5 MCJH00 COVER,FOLDER(LOWER) MCJH0041001 MOLD, PC LUPOY SC-1004A, , , , , Black 32

5 MFBB01 FILTER,RECEIVER MFBB0024301 COMPLEX, (empty), , , , , Without Color 33

5 MMAA00 MAGNET,SWITCH MMAA0000601 LG-G510,511,512 common use, DIA : 3.0mm+1.5t Silver 28

5 MPBJ00 PAD,MOTOR MPBJ0048401 COMPLEX, (empty), , , , , Without Color 30

5 MPBM00 PAD,RECEIVER MPBM0020401 COMPLEX, (empty), , , , , Without Color 31

5 MTAK00 TAPE,CAMERA MTAK0004201 COMPLEX, (empty), , , , , Without Color 29

4 ACGJ00COVERASSY,FOLDER(UPPER)

ACGJ0067101 Without Color A

5 MCJJ00 COVER,FOLDER(UPPER) MCJJ0050201 MOLD, PC LUPOY SC-1004A, , , , , Black 10

5 MDAE00 DECO,FOLDER(UPPER) MDAE0041401 PRESS, STS, , , , , Without Color 4

5 MGAD00 GASKET,SHIELD FORM MGAD0157901 COMPLEX, (empty), , , , , Without Color 18

5 MICC00 INSERT,FRONT(UPPER) MICC0010201 CUTTING, BeCu, , , , , Black

5 MPBJ00 PAD,MOTOR MPBJ0048301 COMPLEX, (empty), , , , , Without Color 15

5 MPBM00 PAD,RECEIVER MPBM0020301 COMPLEX, (empty), , , , , Without Color 16

5 MPBQ00 PAD,LCD(SUB) MPBQ0033701 COMPLEX, (empty), , , , , Without Color 17

5 MPBT00 PAD,CAMERA MPBT0049401 COMPLEX, (empty), , , , , Without Color 14

5 MPBU00 PAD,CONNECTOR MPBU0013301 COMPLEX, (empty), , , , , Without Color 12



5 MPBZ00 PAD MPBZ0202001 COMPLEX, (empty), , , , , Without Color

5 MPFZ00 PLATE MPFZ0030901 PRESS, STS, , , , , Without Color 5

5 MTAA00 TAPE,DECO MTAA0148601 COMPLEX, (empty), , , , , Without Color 9

5 MTAB00 TAPE,PROTECTION MTAB0197701 COMPLEX, (empty), , , , , Without Color 1

5 MTAD00 TAPE,WINDOW MTAD0076501 COMPLEX, (empty), , , , , Without Color 8

5 MTAE00 TAPE,WINDOW(SUB) MTAE0032801 COMPLEX, (empty), , , , , Without Color 3

5 MTAZ00 TAPE MTAZ0198001 COMPLEX, (empty), , , , , Without Color 6

Note: This Chapter is used for reference, Part orderis ordered by SBOM standard on GCSC

- 156 -



LevelLocation


5 MWAE00 WINDOW,CAMERA MWAE0029401 COMPLEX, (empty), , , , , Without Color 7

5 MWAF00 WINDOW,LCD(SUB) MWAF0039001 COMPLEX, (empty), , , , , Without Color 2

4 ACGK00 COVER ASSY,FRONT ACGK0098801 Without Color O

5 MBJL00 BUTTON,SIDE MBJL0047101 COMPLEX, (empty), , , , , Without Color 48

5 MCCE00 CAP,RECEPTACLE MCCE0040901 COMPLEX, (empty), , , , , Without Color 50

5 MCJK00 COVER,FRONT MCJK0079201 MOLD, PC LUPOY SC-1004A, , , , , Black 44

5 MDAC01 DECO,SIDE MDAC0021301 MOLD, PC LUPOY SC-1004A, , , , , Without Color 43

5 MDAG00 DECO,FRONT MDAG0031401 MOLD, PC LUPOY SC-1004A, , , , , Without Color 49

5 MICC00 INSERT,FRONT(UPPER) MICC0008901 Silver

5 MPBH00 PAD,MIKE MPBH0033801 COMPLEX, (empty), , , , , Without Color 46

5 MSGB00 STOPPER,HINGE MSGB0022901 MOLD, Urethane Rubber S190A, , , , , Without Color 42

5 MSGC00 STOPPER,FOLDER MSGC0001801 MOLD, Urethane Rubber S190A, , , , , Without Color 41



4 ADBY00 DECO ASSY ADBY0011601 LOWER Without Color L

5 MDAF00 DECO,FOLDER(LOWER) MDAF0009801 PRESS, STS, , , , , Black 35

5 MTAA00 TAPE,DECO MTAA0148901 COMPLEX, (empty), , , , , Without Color 34

4 AWAB00 WINDOW ASSY,LCD AWAB0030501 Without Color M

5 MTAD00 TAPE,WINDOW MTAD0076601 COMPLEX, (empty), , , , , Without Color 36

5 MWAC00 WINDOW,LCD MWAC0087401 COMPLEX, (empty), , , , , Without Color 37

4 GMEY00 SCREW MACHINE,BIND GMEY0011201 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK Without Color 74

4 MBFF00 BRACKET,LCD MBFF0015901 CASTING, Mg Alloy, , , , , Without Color 19,B

4 MBJA00 BUTTON,DIAL MBJA0026401 COMPLEX, (empty), , , , , Black 25,J

4 MBJA01 BUTTON,DIAL MBJA0026601 COMPLEX, (empty), , , , , Black 52,P

4 MCCH01 CAP,SCREW MCCH0128401 COMPLEX, (empty), , , , , Black 39

4 MDAC00 DECO,SIDE MDAC0021201 MOLD, PC LUPOY SC-1004A, , , , , Without Color 45

4 MHFD00 HINGE,FOLDER MHFD0015701 CASTING, STS, , , , , Without Color 71,N


4 MTAK00 TAPE,CAMERA MTAK0009601 COMPLEX, (empty), , , , , Without Color 72

4 MFBC00 FILTER,SPEAKER MFBC0035201 COMPLEX, (empty), , , , , Without Color 60

4 MLAB00 LABEL,A/S MLAB0001102 C2000 USASV DIA 4.0 White 73

4 MLEA00 LOCKER,BATTERY MLEA0041901 MOLD, PC LUPOY SC-1004A, , , , , Black 65

4 MPBH00 PAD,MIKE MPBH0034201 COMPLEX, (empty), , , , , Without Color 61

4 MPBN00 PAD,SPEAKER MPBN0048501 COMPLEX, (empty), , , , , Without Color 59



- 157 -

LevelLocation


4 SACY00 PCB ASSY,FLEXIBLE SACY0065001 KF300_MAIN_FPCB 22,E

5 SACE00 PCB ASSY,FLEXIBLE,SMT SACE0059301 KF300_MAIN_FPCB

6 SACD00PCB ASSY,FLEXIBLE,SMTTOP

SACD0049001

7 CN801CONNECTOR,BOARD TOBOARD

ENBY0023801 30 PIN,.4 mm,ETC , ,H=0.9, Header


ENBY0023201 44 PIN,0.4 mm,ETC , ,H=0.9, Header


ENBY002020260 PIN,0.4 mm,STRAIGHT ,AU ,STACKING HEIGHT 0.9/ HEADDER FOR KEYPAD TO MAIN

6 SPCY PCB,FLEXIBLE SPCY0129001 FR-4 , mm,MULTI-6 , ,; , , , , , , , , ,

4 SAEY00 PCB ASSY,KEYPAD SAEY0060001 23,F

5 SAEB00PCBASSY,KEYPAD,INSERT

SAEB0022201

6 ADCA00 DOME ASSY,METAL ADCA0072801 FOLDER Without Color 24,G

5 SAEE00 PCB ASSY,KEYPAD,SMT SAEE0027001

6 SAEC00PCB ASSY,KEYPAD,SMTBOTTOM

SAEC0025401


ENBY0023901 30 PIN,0.4 mm,ETC , ,H=0.9, Socket


ENBY0020401 24 PIN,0.4 mm,ETC , ,H=0.9, Socket

7 R701 RES,CHIP,MAKER ERHZ0000505 680 ohm,1/16W ,J ,1005 ,R/TP


7 VA701 VARISTOR SEVY0003801 18 V, ,SMD ,


6 SPEY PCB,KEYPAD SPEY0054801 FR-4 ,0.5 mm,BUILD-UP 4 , ,; , , , , , , , , ,

4 SJMY00 VIBRATOR,MOTOR SJMY00084053 V,.08 A,10pi*2.7t ,12mm ,; ,3V , , ,12000rpm , , ,,31ohm

26,H

4 SURY00 RECEIVER SURY0013401 ASSY ,107 dB,32 ohm,11*07 , ,; , , , , , ,CONNECTOR , 27,I

4 SVCY00 CAMERA SVCY0016001 CMOS ,MEGA ,2M FF Toshiba 1/4" Sensor 21,D

4 SVLM00 LCD MODULE SVLM0026701MAIN ,M_240*320 S_128*160 ,41*57.5*3.3 ,262k ,TFT,TM ,M_LGDP4531 S_LGDP4512 ,

20,C

3 ACGM00 COVER ASSY,REAR ACGM0099701 Without Color

4 MCCF00 CAP,MOBILE SWITCH MCCF0047801 COMPLEX, (empty), , , , , Black 66

4 MCJN00 COVER,REAR MCJN0074801 MOLD, PC LUPOY SC-1004A, , , , , Black 63

4 MSDB00 SPRING,COIL MSDB0004501 COMPLEX, (empty), , , , , Silver

4 SNGF00 ANTENNA,GSM,FIXED SNGF00311013.0 ,-2.0 dBd,, ,internal, GSM850/1800/1900 ,; ,TRIPLE ,-2.0 ,50 ,3.0

57

<Main component> Note: This Chapter is used for reference, Part orderis ordered by SBOM standard on GCSC



- 158 -

LevelLocation


4 SNGF01 ANTENNA,GSM,FIXED SNGF00312023.0 ,-2.0 dBd,, ,internal, bluetooth ,; ,SINGLE ,-2.0 ,50,3.0

62

4 SUSY00 SPEAKER SUSY0025801 PIN ,8 ohm,89 dB,16 mm, ,; , , , , , , ,CONTACT 58

3 GMEY00 SCREW MACHINE,BIND GMEY0011201 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK Without Color 38



3 MLAK00 LABEL,MODEL MLAK0010802 PRINTING, (empty), , , , , Without Color

3 SAFY00 PCB ASSY,MAIN SAFY0245001 54

4 SAFB00 PCB ASSY,MAIN,INSERT SAFB0080301

5 ADCA00 DOME ASSY,METAL ADCA0073101 LOWER Without Color 53

5 MCBA00 CAN,SHIELD MCBA0024301 COMPLEX, (empty), , , , , Without Color 55

5 MGAD00 GASKET,SHIELD FORM MGAD0158101 COMPLEX, (empty), , , , , Without Color

5 SPKY00 PCB,SIDEKEY SPKY0056601 FR-4 , mm,DOUBLE , ,; , , , , , , , , ,

5 SUMY00 MICROPHONE SUMY0010301 FPCB ,-42 dB,4*1.5T ,Standard Holder

4 SAFF00 PCB ASSY,MAIN,SMT SAFF0162201

5 MLAZ00 LABEL MLAZ0038301 PID Label 4 Array Without Color

5 SAFC00PCB ASSY,MAIN,SMTBOTTOM

SAFC0103201

6 BAT100 BATTERY,CELL,LITHIUM SBCL00017012 V,0.5 mAh,CYLINDER ,Reflow type BB, Max T 1.67, phi4.8, Pb-Free

6 C100 CAP,CHIP,MAKER ECZH0003103 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP

6 C101 CAP,CERAMIC,CHIP ECCH0000115 22 pF,50V,J,NP0,TC,1005,R/TP





6 C106 CAP,CHIP,MAKER ECZH002550222000000 pF,6.3V ,M ,X5R ,HD ,2012 ,R/TP ,; ,0.85t,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty]


6 C108 CAP,CERAMIC,CHIP ECCH0004904 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP










- 159 -



LevelLocation




6 C120 CAP,CERAMIC,CHIP ECCH0000143 1 nF,50V,K,X7R,HD,1005,R/TP












6 C132 CAP,CERAMIC,CHIP ECCH0000198 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP





















- 160 -



LevelLocation



6 C158 CAP,CHIP,MAKER ECZH0000813 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP












6 C300 CAP,CERAMIC,CHIP ECCH0005604 10 uF,6.3V ,M ,X5R ,TC ,1608 ,R/TP


6 C302 CAP,TANTAL,CHIP ECTH0005202100 uF,4V ,M ,L_ESR ,2012 ,R/TP ,; , ,[empty] ,[empty] ,,[empty] , ,[empty] ,[empty] ,[empty] ,[empty]

6 C303 CAP,TANTAL,CHIP ECTH0005202100 uF,4V ,M ,L_ESR ,2012 ,R/TP ,; , ,[empty] ,[empty] ,,[empty] , ,[empty] ,[empty] ,[empty] ,[empty]


6 C305 CAP,CERAMIC,CHIP ECCH0000110 10 pF,50V,D,NP0,TC,1005,R/TP



6 C308 CAP,CHIP,MAKER ECZH0003503 1 uF,25V ,K ,X5R ,HD ,1608 ,R/TP


6 C310 CAP,CHIP,MAKER ECZH0003503 1 uF,25V ,K ,X5R ,HD ,1608 ,R/TP




6 C314 CAP,CERAMIC,CHIP ECCH0000104 3 pF,50V,C,NP0,TC,1005,R/TP




6 C318 CAP,CHIP,MAKER ECZH0001216 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP





- 161 -



LevelLocation
































6 C609 CAP,CHIP,MAKER ECZH0001002 0.5 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP


6 C612 INDUCTOR,CHIP ELCH0004733 4.3 nH,S ,1005 ,R/TP ,Coil



6 C616 CAP,CERAMIC,CHIP ECCH0000175 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP

- 162 -



LevelLocation







6 C622 CAP,CHIP,MAKER ECZH0001216 220 nF,10V ,K ,X5R ,TC ,1005 ,R/TP


6 C624 CAP,CHIP,MAKER ECZH0000839 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP







6 C631 CAP,CHIP,MAKER ECZH0000839 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP














6 CN300 CONNECTOR,I/O ENRY000680118 PIN,0.4 mm,ETC , , ,; ,18 ,0.40MM ,ANGLE,RECEPTACLE ,SMD ,R/TP ,

6 CN301 CONNECTOR,ETC ENZY0020401 3 PIN,2.5 mm,BOTTOM , ,


ENBY002040260 PIN,0.4 mm,STRAIGHT ,AU ,STACKING HEIGHT 0.9/ SOCKET FOR KEYPAD TO MAIN

6 D100 DIODE,SWITCHING EDSY0017301 VSM ,15 V,100 mA,R/TP ,PB-FREE

6 D501 DIODE,TVS EDTY0009401VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW,[empty] ,[empty] ,2P ,1


- 163 -



LevelLocation






6 FB100 FILTER,BEAD,CHIP SFBH0008101 600 ohm,1005 ,

6 FB300 FILTER,BEAD,CHIP SFBH0008105 1800 ohm,1005 ,Chip bead ,; ,1800ohm ,; ,[empty] ,R/TP



6 FB304 FILTER,BEAD,CHIP SFBH0007101 120 ohm,1005 ,Ferrite Bead

6 FB305 FILTER,BEAD,CHIP SFBH0007101 120 ohm,1005 ,Ferrite Bead

6 FB500 FILTER,BEAD,CHIP SFBH0008101 600 ohm,1005 ,

6 FL500 FILTER,EMI/POWER SFEY0011601 SMD ,SMD ,18 V,4ch. EMI_ESD Filter (50 Ohm,15pF)








6 FL508 FILTER,EMI/POWER SFEY0010501SMD ,SMD ,18 V,4ch. EMI_ESD Filter (100Ohm,15pF),Pb-free

6 FL601 FILTER,SEPERATOR SFAY0011101850.900 ,1800.1900 ,3.8 dB,4.1 dB, dB, dB,4532,4.5X3.2 Size Quad Band FEM

6 J300 CONN,SOCKET ENSY0018701 6 PIN,ETC , ,2.54 mm,H=1.8

6 J301 CONN,SOCKET ENSY0017701 8 PIN,ETC , , mm,Micro-SD, Hinge type

6 L100 INDUCTOR,SMD,POWER ELCP0008001 4.7 uH,M ,2.5*2.0*1.0 ,R/TP ,

6 L300 INDUCTOR,CHIP ELCH0010402 270 nH,M ,1005 ,R/TP ,CHIP

6 L301 INDUCTOR,CHIP ELCH0003842 100 nH,J ,1005 ,R/TP ,MLCI

6 L500 INDUCTOR,CHIP ELCH0004714 18 nH,J ,1005 ,R/TP ,

6 L501 INDUCTOR,CHIP ELCH0004714 18 nH,J ,1005 ,R/TP ,

6 L601 INDUCTOR,CHIP ELCH0005013 4.7 nH,S ,1005 ,R/TP ,

6 L602 INDUCTOR,CHIP ELCH0005014 5.6 nH,S ,1005 ,R/TP ,

6 L603 INDUCTOR,CHIP ELCH0001052 18 nH,J ,1005 ,R/TP ,PBFREE

6 L604 INDUCTOR,CHIP ELCH0001052 18 nH,J ,1005 ,R/TP ,PBFREE

6 Q400 TR,BJT,ARRAY EQBA0004902TES6 ,200 mW,R/TP ,NPN/PNP dual, Vo1=50V,Io1=100mA, Vo2=-50V,Io2=-100mA

- 164 -



LevelLocation


6 R100 RES,CHIP,MAKER ERHZ0000406 100 Kohm,1/16W ,J ,1005 ,R/TP



6 R103 RES,CHIP ERHY0000512 10M ohm,1/16W,J,1608,R/TP


6 R106 RES,CHIP,MAKER ERHZ0000312 68 Kohm,1/16W ,F ,1005 ,R/TP




6 R120 RES,CHIP,MAKER ERHZ0000213 120 Kohm,1/16W ,F ,1005 ,R/TP








6 R213 RES,CHIP ERHY0000140 36K ohm,1/16W,F,1005,R/TP






6 R300 RES,CHIP,MAKER ERHZ0000529 1.5 Kohm,1/16W ,J ,1005 ,R/TP






6 R307 RES,CHIP,MAKER ERHZ0000488 4.7 ohm,1/16W ,J ,1005 ,R/TP








- 165 -



LevelLocation










6 R324 RES,CHIP ERHY0003301 100 ohm,1/16W ,J ,1005 ,R/TP
























6 SW601 CONN,RF SWITCH ENWY0004501 ,SMD , dB,H=3.6, Straight type

6 U100 IC EUSY0313101 BGA ,144 PIN,R/TP ,EGPRS Quad band ABB Stratos-S

6 U101 IC EUSY0313501 BGA ,291 PIN,R/TP ,EGPRS Digital Base band, LEMANS

6 U201 MODULE,ETC SMZY0015001 6.3 * 5.3 * 1.3mm , 63 PIN, Bluetooth Module(BT+FM)

- 166 -



LevelLocation


6 U202 IC EUSY0286002BGA ,105 PIN,R/TP ,512M 65nm Nor+128MSDRAM,1.8V I/O,Pb Free , ,IC,MCP

6 U203 IC EUSY0254701DFN 3*3*0.9 ,10 PIN,R/TP ,Charger IC, I Max 1A, WallAdaptor/USB Charger

6 U204 IC EUSY0319201 DFN ,10 PIN,R/TP ,OVP

6 U300 DIODE,TVS EDTY0006501 SC70-6L ,5.25 V,100 W,R/TP ,

6 U301 IC EUSY0300101WQFN ,10 PIN,R/TP ,Small package Dual SPDT analogSwitch, PB-Free

6 U302 IC EUSY0317101 WQFN ,10 PIN,R/TP ,1.8*1.4*0.75

6 U303 IC EUSY0160001MicroStar Junior ,15 PIN,R/TP ,1.1W Class-D Mono AudioAMP

6 U304 IC EUSY0299301 SON1612-6 ,6 PIN,R/TP ,2.5V 150mA LDO Pb-Free

6 U500 IC EUSY0319001WDFN-8L ,8 PIN,R/TP ,300mA/300mA 2.8V/1.8V DualLDO

6 U501 IC EUSY0336502 , PIN,R/TP , ,; ,IC,Charge Pump

6 U601 PAM SMPY0014001 35.5 dBm,56 %, A, dBc, dB,6x6x1.15 ,SMD ,Tri Band

6 U602 IC EUSY0280101LFCSP-32 ,32 PIN,R/TP ,GSM QUAD BANDTRANSCEIVER, Othello G.

6 VA300 VARISTOR SEVY0005201 5.5 V, ,SMD ,1005, 50pF

6 VA301 VARISTOR SEVY0005201 5.5 V, ,SMD ,1005, 50pF

6 VA303 VARISTOR SEVY0001001 14 V, ,SMD ,50pF, 1005





6 VA400 VARISTOR SEVY0004101 5.6 V, ,SMD ,360pF, 1005








6 X100 X-TAL EXXY001870132.768 KHz,20 PPM,12.5 pF,70 Kohm,SMD ,3.2*1.5*0.9,

6 X200 OSCILLATOR EXSY002220119.2 MHz,20 PPM,15 pF,SMD ,3.2*2.5*1.0 ,1.71V ~1.89V, -20'C ~ +70'C ,; ,19.2MHz ,20PPM ,1.8V ,3.2 ,2.5,1.0 , ,SMD ,R/TP

6 X601 X-TAL EXXY002440126 MHz,10 PPM,10 pF,.5 ohm,SMD ,32*25*0.6 ,. ,. ,.,10PPM ,10 ,. ,. ,SMD ,P/TP

6 ZD300 DIODE,TVS EDTY0009401VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW,[empty] ,[empty] ,2P ,1

- 167 -



LevelLocation


6 ZD501 DIODE,TVS EDTY0009401VMN2 ,5 V,10 W,R/TP ,1.0*0.6*0.4 ,; , ,7.82V , , ,100mW,[empty] ,[empty] ,2P ,1

5 SAFD00 PCB ASSY,MAIN,SMT TOP SAFD0101701


6 LD400 DIODE,LED,CHIP EDLH0013701WHITE ,ETC ,R/TP ,SIDEVIEW ,; ,[empty] ,2.9~3.75,30mA , , ,120mW ,[empty] ,[empty] ,2P

6 LD401 DIODE,LED,CHIP EDLH0013701WHITE ,ETC ,R/TP ,SIDEVIEW ,; ,[empty] ,2.9~3.75,30mA , , ,120mW ,[empty] ,[empty] ,2P

6 SPFY00 PCB,MAIN SPFY0173101 FR-4 ,0.8 mm,STAGGERED-8 , ,; , , , , , , , , ,

6 U400 IC EUSY0313401QFN ,4 PIN,R/TP ,1.8X1.2X0.5 size wide input voltageHall Switch


3 SMZY00 MODULE,ETC SMZY0014202 256MB MicroSD

- 168 -



LevelLocation


3 MCJA00 COVER,BATTERY MCJA0051801 MOLD, PC LUPOY SC-1004A, , , , , Black 70,S

3 SBPL00 BATTERY PACK,LI-ION SBPL00929013.7 V,800 mAh,1 CELL,PRISMATIC ,KM500 LatinAmerica BATT, Pb-Free ,; ,3.7 ,800 ,0.2C ,PRISMATIC,50x34x36 , ,BLACK ,Innerpack ,Latin America Label

Black 69

3 SGDY00 DATA CABLE SGDY0010904; ,[empty] ,[empty] ,[empty] ,18 ,BLACK ,6.2mm PlugDatacable ,[empty]

3 SGEY00EAR PHONE/EAR MIKESET

SGEY0005537 , , , , , , , , , ,

3 SSAD00 ADAPTOR,AC-DC SSAD0024601100-240V ,5060 Hz,5.1 V,.7 A,NOM ,AC-DC ADAPTOR ,;,85Vac~264Vac ,5.1V +0.15V, -0.2V ,700mA ,5060 ,,WALL 2P ,I/O CONNECTOR ,

ADAPTOR,AC-DC SSAD0024602100-240V ,5060 Hz,5.1 V,.7 A,NOM ,AC-DC ADAPTOR ,;,85Vac~264Vac ,5.1V (+0.15V, -0.2V) ,700mA ,5060 ,,WALL 2P ,I/O CONNECTOR ,

13.3 Accessory Note: This Chapter is used for reference, Part orderis ordered by SBOM standard on GCSC

lg kf300 svc eng 0422

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