linear integrated circuits course outline.pdf

7/30/2019 Linear Integrated Circuits Course Outline.pdf

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DETAILED STUDY SCHEME

Introduction to Linear ICs and Systems:

I. List a number of ways that linear ICs are currently being used in industry and the home.

II. Define the following:

Discrete component Integrated circuit Linear Circuit

Operational Amplifiers:

I. Define Op-amp

II. Draw:

1. Op amp schematic symbol and identify the power supply lines and the signal lines2. Some common op-amp circuits

III. Describe:

1.

Op-amps and why they are used.2. Effects of negative feedback on an op-amp circuit3. Ways to compensate for bias currents and offset voltage

IV. Discuss op-amp parameters and use data sheets to determine them

V. Calculate the gain for a inverting, non-inverting, and voltage-follower op-amp circuits

VI. Define:

Frequency Response Pole Roll-Off Rate Bandwidth Open loop gain Closed loop gain Gain-bandwidth product Feedback Positive feedback Negative feedback Stability Compensation


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VII. Calculate:

Open loop gain Closed loop gain Open loop bandwidth Closed loop bandwidth

VIII. Analyse op-amp frequency response

Basic Op-amp Applications:

I. Define, draw, label, and discuss the following circuits:

Comparators Summing amplifiers Integrators Differentiators Peak Detectors

II. Analyse the following op-amp circuits:

Comparators Summing amplifiers Integrators Differentiators Window comparators Peak detectors

III. Troubleshoot an op-amp circuit

Active Filters:

I. Describe, draw, and analyse the following active filters and explain why they are used

Low pass

High pass Band pass Band stop (notch)

II. Describe the shape of several filter frequency response curves

III. State the difference between "active" and "passive" filters

IV. Describe several system applications for active filters

V. Calculate the centre frequency, bandwidth, and Q for active filters


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Oscillators:

I. Define the following:

Sinusoidal oscillator Non-sinusoidal oscillator

II. Explain the conditions required for oscillation

III. Discuss the following:

Why oscillators are used Where oscillators are used Basic types of oscillators, including RC, LC, crystal, and voltage controlled The benefits of each type of oscillator

IV. Identify and analyze

Wien-bridge oscillator Phase-shift oscillator Colpitts oscillator Hartley oscillator Crystal controlled oscillator

V. Calculate the operating frequency for oscillator circuits

555 Timer Circuits:

I. Build and analyze the following circuits:

Monostable Pulse Generator Astable Oscillator

II. Discuss the applications of a 555 Timer IC

Voltage Regulators:

I. Define:

Voltage regulation Line regulation Load regulation

II. Describe what voltage regulators are and why they are used.


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III. Analyze the operation of each of the following regulator circuits:

Series Shunt Switching IC regulators

IV. Describe several system applications for IC regulators

Fixed positive Fixed negative Adjustable Dual-tracking

V. Calculate the following:

Line regulation Load regulation Maximum load current Maximum input voltage


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EXPERIMENTS

List of Experiments:

1. To study differential amplifier configurations.2. To measure the performance parameters of an Op amp.3. Application of Op amp as Inverting and Non Inverting amplifier.4. To study frequency response of an Op Amp.5. To use the Op-Amp as summing, scaling & averaging amplifier.6. To use the Op-Amp as Instrumentation amplifier.7. Design differentiator and Integrator using Op-Amp.8. Application of Op Amp as Log and Antilog amplifier. Design Low pass, High pass

and Band pass 1st order butterworth active filters using Op Amp.

9. Design Phase shift oscillator using Op-Amp.10.Design Wein Bridge oscillator using Op-Amp.11.Application of Op Amp as Sawtooth wave generator.12.Application of Op Amp as Zero Crossing detector and window detector.13.Application of Op Amp as Schmitt Trigger.14.Design a series regulator with an error amplifier to provide an output voltage of 5 volt

at a load current of 1.5 Amp. Use a 741 Op-Amp and specify the Zener voltage

necessary transistor gain and the maximum power dissipation of the transistor.

15.Design a delay circuit using 555.16.To examine the operation of a PLL and to determine the free running frequency, the

capture range and the lock in range of PLL.

17.Verification of hardware results obtained using SPICE.


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STUDY OF OP-AMP

An operational amplifier or op-amp is a linear integrated circuit that has a very high

voltage gain, high input impedance and low output impedance. Op-amp is basically a

differential amplifier whose basic function is to amplify the difference between two inputsignals.

Op-amp has five basic terminals, that is, two input terminals, one o/p terminal and two power

supply terminals. Pin2 is called the inverting input terminal and it gives opposite polarity at

the output if a signal is applied to it. It produces a phase shift of 180o between input and

output. Pin3 is called the non-inverting terminal that amplifies the input signal without

inversion, i.e., there is no phase shift or i/p is in phase with o/p. The op-amp usually amplifies

the difference between the voltages applied to its two input terminals. Two further terminals

pins 7 and 4 are provided for the connection of positive and negative power supply voltages

respectively. Terminals 1 and 5 are used for dc offset. The pin 8 marked NC indicates No

Connection.

The block diagram of op-amp shows 2 difference amplifiers, a buffer for less loading, a level

translator for adjusting operating point to original level and o/p stage. An ideal op-amp

should have the following characteristics:

1. Infinite bandwidth

2. Infinite input resistance

3. Infinite open loop gain4. Zero output resistance

5. Zero offset.

Op-amps have two operating configurations; open loop and closed loop. In open loop

configuration, it can operate as a switch but gain is uncontrolled. In closed loop

configuration, gain can controlled by feedback resistance Rf and input resistance Rin.


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Experiment No. 1

AIM: To design and test the operation of Differential amplifier.

APPARATUS REQUIRED:

DESIGN:

Gain = 100, & Let R1 = 1 KW

AD = R2 / R1

So R2 = AD * R 1

R2 = 100 * 1KW = 100KW.

THEORY:

A Circuit that amplifies the difference between two signals is called a differential amplifier.This type of amplifier is very useful in instrumentation circuits.

For differential amplifier, though the circuit is not symmetric, but because of the mismatch,

the gain at the output with respect to positive terminal is slightly different in magnitude to

that of negative terminal. So even with the same voltage applied to both the inputs, the output

is not zero.

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. Set the input Voltages V1 = 50mV & V2 =40mV.3. Note down the Output Voltage

4. Vary the input Voltages and note down the output voltages.

5. Calculate the gain & Compare it with the Theoretical gain.

RESULT:

Thus the Differential amplifier is designed & tested.


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CIRCUIT DIAGRAM:

DIFFERENTIATOR:

INTEGRATOR:

SPECIFICATION FOR IC741:

+Vcc = +15V, - Vcc = -15V

Ambient Temparature : 250 CInput offset voltage : 6 mV(Max)

Input offset current : 200nA(Max)

Input bias current : 500nA(Max)

Input resistance : 2MW

Output resistance : 75W

Total Power dissipation : 85mW.


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Experiment No. 2

AIM: To design amplifiers using IC 741 in the inverting and non-inverting modes.

APPARATUS REQUIRED:

DESIGN:

INVERTING AMPLIFIER:

NON- INVERTING AMPLIFIER:


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THEORY:

The basic equation for the op-amp is Ae = V0 where A is open loop gain of the

Op-amp at an operating frequency f and is positive. e is measured as per the arrow direction

shown in the fig 1. This equation is valid for the open loop condition and closed loop

condition [only for negative feedback]. Using the above formula all the gain equations for thedifferent amplifier configuration can be derived. It is very important to note that A varies

with frequency.

A is of the order of 105 to 106 at 5 Hz

Hence e = 0 for range of frequencies.

This implies that the non-inverting terminal voltage follows the inverting terminal voltage or

the inverting terminal voltage follows the non-inverting terminal voltage. In other words the

potential difference between the inverting and non-inverting terminal is zero volt at aspecified frequency the above condition will not be valid.

PROCEDURE:

1. Connections are made as shown in circuit diagrams.

2. The input voltage is given and the output voltage is noted. The maximum input voltage that

can be given to the circuit is VI[max].

3. In all the config when VI = 0, V0 = 0.

4. The close loop gain is calculated for each input voltage and transfer characteristics is

drawn for each configuration.

5. The slope of the characteristics between input and output voltage gives the small signal AC

closed loop gain as represented in model graph.

RESULT:

Slope of the DC characteristics between input and output voltage gives the small signal AC

closed loop gain provided the condition outlined in theory regarding open loop gain with

frequency is maintained.


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CIRCUIT DIAGRAM:

TABULAR COLUMN:


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Experiment No. 3

AIM: To construct the Instrumentation amplifier using IC-741.

APPARATUS REQUIRED:

THEORY:

The output of the transducer has to be amplified to drive the indicating or driving system.

This function is performed by instrumentation amplifier. The important features are: 1) High

gain accuracy, 2) High Common mode rejection ratio, 3) High gain stability with low

temperature coefficient, 4) Low DC offset, 5) Low output impedance.

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. Set the DC input voltage as 1 mV.3. Note down the output voltage.

4. Calculate the gain and compare it with theoretical gain.

5. Repeat it for different input values.

RESULT:

Thus the Instrumentation amplifier was constructed & verified.

CIRCUIT DIAGRAM:


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PIN DIAGRAM FOR IC741:

SPECIFICATION FOR IC741:

+Vcc = +15V, - Vcc = -15V

Ambient Temperature: 250 C

Input offset voltage: 6 mV(Max)

Input offset current: 200nA(Max)

Input bias current: 500nA(Max)

Input resistance: 2MW

Output resistance: 75WTotal Power dissipation: 85mW.


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Experiment No. 4

Aim: To design the Wein Bridge Oscillator using op-amp.

Components Required:

S.No Components Range Quantity

1. Op-amp IC 741 1

2. Dual trace supply (0-30) V 1

3. Function Generator (0-2) MHz 1

4. Resistors

5. Capacitors

6 CRO (0-30) MHz 1

7 Probes -- --

Equations Related to the Experiment:

Wein Bridge Oscillator

Closed loop gain Av = (1+Rf/R1) = 3

Frequency of Oscillation fa = 1/(2RC)

Design:

Gain required for sustained oscillation is Av = 1/ = 3

(PASS BAND GAIN) (i.e.) 1+Rf/R1 = 3

Rf= 2R1

Frequency of Oscillation fo = 1/2 R C

Given fo = 1 KHz

Let C = 0.05 F

R = 1/2 foC

R = 3.2 K

Let R1 = 10 K Rf = 2 * 10 K


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Model Graph:

Procedure:

1. Connect the components as shown in the circuit 5.1Circuit 5.1:

2.

Switch on the power supply and CRO.3. Note down the output voltage at CRO.4. Plot the output waveform on the graph.5. Redesign the circuit to generate the sine wave of frequency 2KHz.6. Compare the output with the theoretical value of oscillation.

Observation:

Peak to peak amplitude of the output = Volts.

Frequency of oscillation = Hz.

Result:Thus wien bridge was designed using op-amp and tested.

t

+ Vp

V O

Vp

CRO

+

+10V

7

6

4

-10V

2

3

ICY41

R1=10 k Rf =20 k

3.2k

R

C0.05 f

3.2kR = C 0.05f

VO


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Experiment No. 5

Aim: To design the Phase Shift Oscillator using op-amp.

Components Required:


1. Op-amp IC 741 1



4. Resistors

5. Capacitors

6 CRO (0-30) MHz 1

7 Probes -- --

Equations Related to the Experiment:

RC Phase shift Oscillator:

Gain Av = [Rf/R1] = 29

Frequency of oscillation fa = 1 6 * 2 * * RC

Design:

Frequency of oscillation fo = 1/(6*2**RC)

Av = [Rf/R1] = 29

R1 = 10 R

Rf= 29 R1

Given fo = 200 Hz.

Let C = 0.1F

( )

( )6R 1 / 6 * 2 * fo * C

1/ 6 * 2 * * 200 *0.1*10

K

To prevent the loading of amplifier by RC network, R1 10R

R1 10 * K

Since Rf 29R1

Rf 29 *

M

=

=

=

= =

=

=

=


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Model Graph:

Procedure:

1. Connect the circuits as shown in the circuit 5.22. Switch on the power supply.

Circuit 5.2:

3. Note down the output voltage on the CRO.4. Plot the output waveforms on the graph.5. Redesign the circuit to generate the sine wave of 1 KHz.6. Plot the output waveform on the graph.7. Compare the practical value of the frequency with the theoretical value.

VO

t

CRO

+

+10V

7

6

4

-10V

2

3

IC741

R1 1 m

3.3k

C

VO0.01f

CC

RRR 3.3k3.3k

0.01f0.01f

32k

33kRf

DRB


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Observation:

Peak to peak amplitude of the sine wave = Volts

Frequency of Oscillation (obtained) = Hz.

Result:

Thus RC Phase shift oscillator was designed using op-amp and tested.


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Experiment No. 6

Aim: ToDesign differentiator and Integrator using Op-Amp.

Apparatus required:


1. Op-amp IC 741 1



4. Resistors

5. Capacitors

6 CRO (0-30) MHz 1

Differentiator:

Design:

Step1: Select fa equal to the highest frequency of the input signal to be differentiated.

Then assuming a value of C1 < 1F. Calculate the value of Rf.

Step2: Choose fb = 20 fa and calculate the values of R1 and Cfso that R1C1 = RfCf.

fa = KHz ; fb = KHz ;C1 = 0.1 f; RCOMP = Rf; RL = 10K

fa = 1/ [2RfC1]; Rf= 1/2 C1 fa ; fb = 1/ [2R1C1];R1 = 1/2 C1 fb;R1C1 = RfCf;

Cf= R1C1/ Rf

Circuit Diagram

Vin

RL

R1

+12V

-12V

Cf

Rf

Vo = -Rf C1[dVin/dt]

Rom

C1

+

-

IC 741

3

2

6

7

4

0

RCOMP


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Observation:

For sine wave input:

Peak to peak amplitude of the input = volts.

Frequency of the input = Hz

Peak to peak amplitude of the output = volts.

Frequency of the output = Hz

For square wave input:





Model Graph:

IV

Vin

Vo

t

t

-IV

Model graph

2V

-2V

IV

Vin

Vo

t

t

-IV

Model graph


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Integrator:

Design:

Generally the value of the fa and in turn R1Cfand RfCfvalues should be selected such that fa

< fb. From the frequency response we can observe that fa is the frequency at which the gain is

0 db and fb is the frequency at which the gain is limited. Maximum input signal frequency = 1

KHz.

Condition is time period of the input signal is larger than or equal to RfCf(i.e.) T 1 fR C

fb = KHz ; fa = fb/10; Rf= 10R1; RCOMP = R1; RL & R1 = 10K

fa = 1/ [2RfCf]; RfCf= 1msec &; Cf = 1msec/100K

Circuit Diagram:

Observation:

For sine wave input:





For square wave input:





Vin

RL

R1

+12V

-12V

Rf

Cf

Rom = R1

+

-

IC 741

3

2

6

7

4

0

VO = - [1/R1Cf] Vin dt

RCOMP


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Model Graph:

Procedure:

1. Connect the components as per the circuit diagram.2. Set the input voltage using {F.G [for 1 to 5]. and DC Supply [for 6 & 7]}observe the

output waveform at Pin no.6

3. Connect CRO at Pin no.6 and measure 0/p voltage and note it down.4. Plot the output waveforms

Result:

Thus Differentiator & Integrator using op-amp was designed and tested.

Vin

Vo

t

t

Model graph

t

t


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Experiment No. 7

Aim: ToDesign Crossing detector and window detector using Op-Amp.

Apparatus Required.

S.No Component Range Quantity

1. Op amp IC 741 1

2. F.G (0-1) MHz 1

3. Resistors

4. CRO (0-30) MHz 1

5. DTS (0-30) V 1

6. Diode 1N4007 2

1) Zero Crossing Detector: [Sine wave to square wave converter]

Model Graph:

+12V

D2 +

-

IC 741

3

2

6

7

4

0

D1

10K1K

1K

5V/1KHz

-12V

Vo

Vin


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2) Window Detector:

Circuit Diagram:

Model Graph:

Condition Output

VTL < Vi > VTH VO= VCC

Vi > VTH OR Vi < VTL VO = 0

VTH

Vi

VTL

1K

1K

+12V

0

0

1K

1K

+

-LM339

7

6

1

3

12

LM339

5

4

3

12

2Vo

10K

+12V


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Observation:

S.No VTH VTL Vi Vo

1 6V 3V 5V/1KHz2 3V 0V 5V/1KHz

3 0V 6V 5V/1KHz

Procedure

1. Connect the circuit as shown in the circuit2. Set the input voltage as 5V (p-p) at 1KHz. (Input should be always less than Vcc)3. Note down the output voltage at CRO4. To observe the phase difference between the input and the output, set the CRO in dual

Mode and switch the trigger source in CRO to CHI.

5. Plot the input and output waveforms on the graph.

Observation:


Frequency = Hz.

Upper threshold voltage = Volts.

Lower threshold voltage = Volts.

Result:

Thus crossing detector and window detector using op-amp was designed & tested.


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Experiment No. 8

Aim: ToDesign Schmitt trigger using Op-Amp.

Apparatus Required.

S.No Component Range Quantity

1. Op amp IC 741 1

2. F.G (0-1) MHz 1

3. Resistors

4. CRO (0-30) MHz 1

5. DTS (0-30) V 1

6. Diode 1N4007 2

Schmitt Trigger:

Design

VCC = 12 V; VSAT = 0.9 VCC; R1= 47K; R2 = 120

VUT = + [VSAT R2] / [R1+R2] & VLT = - [VSAT R2] / [R1+R2] & HYSTERSIS [H] = VUT -VLT

Circuit Diagram

Vin

+12V

R1

-12V

R2

0

+

-

3

2

6

7

4

RL = 10K


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Model Graph

Observation:

S.No VTH VTL Vi Vo

1 6V 3V 5V/1KHz

2 3V 0V 5V/1KHz

3 0V 6V 5V/1KHz

Procedure

1. Connect the circuit as shown in the circuit2. Set the input voltage as 5V (p-p) at 1KHz. (Input should be always less than Vcc)3. Note down the output voltage at CRO4. To observe the phase difference between the input and the output, set the CRO in dual

Mode and switch the trigger source in CRO to CHI.

5. Plot the input and output waveforms on the graph.Observation:


Frequency = Hz.

Upper threshold voltage = Volts.

Lower threshold voltage = Volts.

Result: Thus Schmitt trigger using op-amp was designed & tested.


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VIVA Questions

1. What is an op-amp?2. Give the characteristics of an ideal op-amp:3. How a non-inverting amplifier can be courted into voltage follower?4. What is the necessity of negative feedback?5. What are 4 building blocks of an op-amp?6. What is the purpose of shunting Cf across Rf and connecting R1 in series with the

input signal?

7. What are the applications of Differentiator?8. What do you mean by unity gain bandwidth?9. What did you observe at the output when the signal frequency is increased above fa?10.How would you eliminate the high frequency noise in integrator?11.What are the main applications of the Integrator?12.Is it possible to design an analog computer using integrator and differentiator?13.What happens to the output of integrator when input signal frequency goes below fa?14.What is Hysteresis? What parameter determines Hysteresis?15.How would you recognize that positive feedback is being used in the Op-amp circuit?16.What do you mean by upper and lower threshold voltage in Schmitt Trigger?17.What is the difference between a basic comparator and the Schmitt trigger?18.What is a sample and hold circuit? Why is it needed?19.What is a voltage limiting, and why is it needed?20.What is the name of the circuit that is used to detect the peak value of the Non-

sinusoidal input waveforms?

21.How will you produce, definite Hysteris in a Schmitt trigger using op-amp?22.What is other name for Astable Multivibrators?23.How an Op-amp is used to generate square wave?24.What are the changes to be done in a symmetric square wave generator to generate

asymmetric square wave?

25.What are the features of 555 timer?26.What are the applications of 555 timer?27.Define duty cycle ratio.28.What are the applications of monostable Multivibrators?


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29.What is meant by quasi stable state?30.What should be the amplitude of trigger pulse?31.State the two conditions for oscillations.32.Classify the Oscillators?33.Define an oscillator?34.What is the frequency range generated by Wein Bridge Oscillator?35.What is frequency stability?36.What is the frequency range generated by RC phase shift Oscillator?37.In RC phase shift oscillator how the total phase shift of 180 around the loop is

achieved?


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Assignment No. 1

1. What are the advantages of Integrated circuits?

1. Miniature size and hence increases equipment density2. Cost reduction due to batch processing3. Increased system reliability due to the elimination of soldered joints.4. Reduction in power consumption5. Increasing operation speed6. Improved functional performance.

2. Classify the types of ICs.

Integrated Circuits can be classified based on:

(i) Based on Mode of operation

(a)Digital I.C.(b)Analog I.C. (Linear IC)

(ii) Based on fabrication

(a)Monolithic I.C.(b)Hybrid I.C.

(iii) Based on Integration level(a)SSI: Small Scale I.C.(b)MSI: Medium Scale I.C.(c)LSI: Large Scale I.C.(d)VLSI: Very Large Scale I.C.

3. What are the characteristics of Ideal OP-Amp?

1. Infinite Voltage gain A.2. Infinite input Impedance.3. Zero Output Impedance.4. Zero Output Voltage5. Infinite Bandwidth.6. Infinite Common-mode Rejection ratio.7. Infinite slew rate.


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4. What is the Basic op amp applications?

1. Scale changer inverter2. Summing amplifier3. Inverting summing amplifier4. Non inverting summing amplifier5. sub tractor6. Adder subtractor7. Comparator8. Oscillators9. Detectors10.Multi-vibrator

5. What are the basic requirements of the input stage of Op-amp?

1. High voltage gain.2. High input impedance3. Two input terminals.4. Small input offset voltage.5. Small input offset current.6. High CMRR.7. Low input bias current.

6. What are the basic requirements of the output stage of Op-amp?

1. Large output voltage swing capability.2. Large output current swing capability.3. Low output impedance.4. Low quiescent power dissipation.5. Short circuit protection


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Assignment No. 2

1. Explain Op-amp as Differentiator.


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2. Explain Op-amp as Integrator.


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3. In the following circuit for the non inventing amplifier R1 = 1 K and Rf =

10K.Calculate the maximum output offset voltage due to Vos and IB.The op amp is

LM 307 quirt Vos = 10 mv and IB=300nA, Ios = 50 nA.

4. A non inventing amplifier with a gain of 100 is mulled at 25C. What will happen

to the output voltage if the temperature rises to 500C for an offset voltage drift of 0.15

V/C?


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Assignment No. 3

1. Discuss about clamper circuits.


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2. Name the important features of an Instrumentation amplifier?

1. High gain Accuracy2. High CMRR3. High gain stability4. Low dc offset5. Low O/P impedance6. Low power loss7. High output Impedance

3. List the applications of Instrumentation Amplifier?

(a)Temperature Indicator(b)Temperature controller(c)water flow meter(d)Thermal conductivity meter(e)Analog weight scale.

4. What is common mode rejection ratio.

The relative sensitivity of an op amp to a difference signal as compared to a common

mode signal is called common mode rejection ratio.

5. What are the methods to improve slew rate?


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Assignment No. 4

1. What is an Op amp?

An operational Amplifier is a direct-coupled high-gain amplifier consisting of one or more

differential amplifiers and usually followed by a level translator and an output stage.

It is a versatile device that can be used to amplify dc as well as ac input signals.

2. Draw block diagram of a typical OP-Amp.

3. Design an amplifier with a gain of -10 and Input resistance equal to 10 K.


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4. What you mean by balanced and unbalanced output?

The differential amplifier uses two transistors in CE configuration. If the output is taken

across the two collectors, it is called balanced output or double ended output. If the output is

taken across one of the collectors with respect to ground it is called unbalanced output or

single ended output

5. What is loading effect? How can you reduce it?

In an amplifier only a particular percentage of output voltage (V0) will be available to the

load as load voltage (VL). This is because of the drop across the output resistance (R0) of the

amplifier. Such an effect is called loading effect. To reduce the loading effect the output

resistance (R0) must be as low as possible. So we can get load voltage almost same as output

voltage.

6. What is active load? Where it is used and why?

The requirement to increase the gain is same that the collector resistance (RC) should not

disturb d.c conditions while it must provide large resistance for a.c purposes. The current

mirror which has very low d.c resistance (dV/dI) and higher a.c resistance (dv/di) can be used

as a collector load instead of RC. Such a load is called as active load.

7. What is thermal drift?

In an op-amp the bias current, offset current and off set voltage changes with change in

temperature. Offset current drift is measured in nA/ 0C and offset voltage drift is measured in

mV/ 0C. These indicate the change in offset current or voltage for each degree Celsius

change in temperature. Forced air cooling may be used to stabilize the ambient temperature

Input offset voltage drift = Vos/TInput offset current drift = Ios/T


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Assignment No. 5

1. Define gain margin and phase margin

Gain margin:

The gain measured at phase cross over frequency is called gain margin.

Gain margin in dB = -20 log G (j) where =pc

Phase margin:

The phase margin is the amount of additional phase lag at gain cross over frequency gcrequired to bring the system to the very large instability.

Phase margin = 180 + gcWhere gc = [G (j)/] = gcFor negative values of phase margin and gain margin the system becomes unstable

2. Discuss in detail about comparator.

Comparator as its name implies, compares a signal voltage on one input of an op-amp with a

known voltage called a reference voltage on the other input. Comparators are used in circuits

such as,

Digital Interfacing

Schmitt Trigger

DiscriminatorVoltage level detector and oscillators

1. Non-inverting Comparator:

A fixed reference voltage Vref of 1 V is applied to the

negative terminal and time varying signal voltage Vin is applied to the positive

terminal.When Vin is less than Vref the output becomes V0 at Vsat [Vin < Vref => V0 (-

Vsat)]. When Vin is greater than Vref, the (+) input becomes positive, the V0 goes to +Vsat.

[Vin > Vref => V0 (+Vsat)]. Thus the V0 changes from one saturation level to another. The

diodes D1 and D2 protect the op-amp from damage due to the excessive input voltage Vin.

Because of these diodes, the difference input voltage Vid of the op-amp diodes are called


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clamp diodes. The resistance R in series with Vin is used to limit the current through D1 and

D2 . To reduce offset problems, a resistance Rcomp = R is connected between the (-ve) input

and Vref.

Input and Output Waveforms:


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2. Inverting Comparator:

This fig shows an inverting comparator in which the reference voltage Vref is applied to the(+) input terminal and Vin is applied to the (-) input terminal. In this circuit Vref is obtained

by using a

10K potentiometer that forms a voltage divider with dc supply volt +Vcc and -1 and the

wiper connected to the input. As the wiper is moved towards +Vcc, Vref becomes more

positive. Thus a Vref of a desired amplitude and polarity can be obtained by simply adjusting

the 10k potentiometer.


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3. Explain Full wave Rectifier using Op-amp.

The Full wave Rectifier circuit commonly used an absolute value circuit is shown in figure.

The first part of the total circuit is a half wave rectifier circuit considered earlier in figure.

The second part of the circuit is an inverting

For positive input voltage Vi > 0V and assuming that RF =Ri = R, the output voltage VOA =

Vi . The voltage V0 appears as (-) input to the summing op-amp circuit formed by A2 , The

gain for the input V0 is R/(R/2), as shown in figure. The input Vi also appears as an input tothe summing amplifier. Then, the net output is V0 = -Vi -2V0

= -Vi -2(-Vi ) = Vi

Since Vi > 0V, V0 will be positive, with its input output characteristics in first quadrant. For

negative input Vi < 0V, the output V0 of the first part of rectifier circuit is zero. Thus, one

input of the summing circuit has a value of zero. However, Vi is also applied as an input to

the summer circuit formed by the op-amp A2 . The gain for this input id (-R/R) = -1, and

hence the output is V0 = -Vi . Since Vi is negative, v0 will be inverted and will thus be

positive. This corresponds to the second quadrant of the circuit.

To summarize the operation of the circuit,

V0 = Vi when Vi < 0V and V0 = Vi for Vi > 0V, and hence V0 = |Vi |

It can be observed that this circuit is of non-saturating form. The input and output waveformsare shown in the figure.


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Assignment No. 6

1. Explain Positive and Negative clippers.

Positive Clipper:

A Circuit that removes positive parts of the input signal can be formed by using an op-amp

with a rectifier diode. The clipping level is determined by the reference voltage Vref, which

should less than the i/p range of the op-amp (Vref < Vin). The Output voltage has the

portions of the positive half cycles above Vref clipped off.

The circuit works as follows:

During the positive half cycle of the input, the diode D1 conducts only until Vin = Vref. This

happens because when Vin Vref => the V0 becomes +ve to derive D1 into off. It open the feedback loopand op-amp operates open loop. When Vin drops below Vref (Vin


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Ex: for high speed op-amp HA 2500, LM310, A 318. In addition the difference inputvoltage (Vid=high) is high during the time when the feedback loop is open (D1 is off) hence

an op-amp with a high difference input voltage is necessary to prevent input breakdown. If

Rp (pot) is connected to VEE instead of +Vcc, the ref voltage Vref will be negative (Vref =

-ve). This will cause the entire o/p waveform above Vref to be clipped off.

Negative Clipper:

The positive clipper is converted into a ve clipper by simply reversing diode D1 and

changing the polarity of Vref voltage. The negative clipper -> clips off the ve parts of the

input signal below the reference voltage. Diode D1 conducts -> when Vin > -Vref and

therefore during this period o/p volt V0 follows the i/p volt Vin. The Ve portion of the

output volt below Vref is clipped off because (D1 is off) Vin Vref and off for Vin.


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2. Discuss the advantages of active filter over Passive filters and list commonly used

filters.

1. Gain and Frequency adjustment flexibility:Since the op-amp is capable of providing a gain, the i/p signal is not attenuated as it is

in a passive filter. [Active filter is easier to tune or adjust].

2. No loading problem:Because of the high input resistance and low o/p resistance of the op-amp, the active

filter does not cause loading of the source or load.

3. Cost:Active filters are more economical than passive filter. This is because of the variety of

cheaper op-amps and the absence of inductors.

The most commonly used filters are these:

1. Low pass Filters2. High pass Filters3. Band pass filters4. Band reject filters5. All pass filters.


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3. Discuss in PLL in detail with help of well labeled diagram.

PHASE LOCKED LOOP

The PLL consists of i) Phase detector ii) LPF iii) VCO. The phase detector orcomparator compares the input frequency fIN with feedback frequency fOUT.

The output of the phase detector is proportional to the phase difference between fIN &fOUT. The output of the phase detector is a dc voltage & therefore is often referred to

as the error voltage.

The output of the phase detector is then applied to the LPF, which removes the highfrequency noise and produces a dc level. This dc level in turn, is input to the VCO.

The output frequency of VCO is directly proportional to the dc level. The VCOfrequency is compared with input frequency and adjusted until it is equal to the input

frequencies.

PLL goes through 3 states, i) free running ii) Capture iii) Phase lock.(a) Phase Detector:

Phase detector compares the input frequency and VCO frequency and generates DC voltage

i.e., proportional to the phase difference between the two frequencies. Depending on whether

the analog/digital phase detector is used, the PLL is called either an analog/digital type

respectively. Even though most monolithic PLL integrated circuits use analog phasedetectors.

(b) Low Pass filter:

The function of the LPF is to remove the high frequency components in the output of the

phase detector and to remove the high frequency noise. LPF controls the characteristics of the

phase locked loop. i.e, capture range, lock ranges, bandwidth

Lock range(Tracking range):

The lock range is defined as the range of frequencies over which the PLL system follows thechanges in the input frequency fIN.


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Capture range:

Capture range is the frequency range in which the PLL acquires phase lock. Capture range is

always smaller than the lock range.

Filter Bandwidth:

Filter Bandwidth is reduced, its response time increases. However reduced Bandwidth

reduces the capture range of the PLL. Reduced Bandwidth helps to keep the loop in lock

through momentary losses of signal and also minimizes noise.

(c) Voltage Controlled Oscillator (VCO):

The third section of PLL is the VCO; it generates an output frequency that is directly

proportional to its input voltage. The maximum output frequency of NE/SE 566 is 500 Khz.

Feedback path and optional divider:

Most PLLs also include a divider between the oscillator and the feedback input to the phase

detector to produce a frequency synthesizer. A programmable divider is particularly useful in

radio transmitter applications, since a large number of transmit frequencies can be produced

from a single stable, accurate, but expensive, quartz crystalcontrolled reference oscillator.

linear integrated circuits course outline.pdf

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