m16c family product overview - part 1 - renesas e-learning · pdf fileuser may view slides...

1© 2008, Renesas Technology America, Inc., All Rights Reserved

Course Introduction

Purpose

� This training course provides an introduction to the M16C family of 16-bit

microcontrollers (MCUs) and describes key device features and benefits

Objectives

� Learn the M16C MCU architecture

� Discover the design features that make designing with M16C MCUs

simpler then other architectures

Content

� 39 pages (including this page)

� 7 questions

Learning Time

� 36 minutes


Key Features and Benefits

Flexible and

Trusted Flash

Broad Platform

Powerful

Architecture

Quiet

Reliable

Efficient

Compatibility


Broad Platform


Key Features and Benfits

Flexible and

Trusted Flash

Broad Platform

Powerful

Architecture

Quiet

Reliable

Efficient

Compatibility


Powerful Architecture

3. Combined Instructions

• Loops

• If then else

• Function calls

• Jump tables

• Stack multiple

• Division

• 4-bit isolation

• Bit tables

• Bit pre-inversion

1. Variable Length Instructions

• Vary instruction DATA

• Vary instruction OPCODES

• Combine same source & destination

2. Memory operands

• SINGLE memory operands

• DUAL memory operands

• Shrinks program size

• Saves opcode cycles

• Requires fewer CPU registers


Powerful ArchitectureFlow Control

ADJNZ SBJNZ

JMP JMPI JMPS BCnd JCnd

JSR JSRI JSRS REIT RTS

ENTER EXITD INT INTO

Data Transfer

MOV MOVA MOVhl XCHG

LDC STC LDE STE

LDCTX STCTX LDINTB LDIPL

STNZ STZ STZX

PUSH PUSHM PUSHC PUSHA

POP POPM POPC

SMOVB SMOVF SSTR

Misc.

BRK NOP UND WAIT

Arithmetic

ADD ADDCF ADC SUB SSB

DADD DSUB DADC DSBB

CMP TST INC DEC

ABS NEG EXTS

MUL MULU RMPA

DIV DIVU DIVX

Logical

AND OR XOR NOT

ROLC RORC ROT SHA SHL

Bit Manipulation

BAND BOR BXOR BNOT

BNAND BNOR BNXOR BNTST

BTST BTSTC BTSTS

BSET BCLR FSET FCLR

•• Many instructions typically replace 2 or 3 traditional instructMany instructions typically replace 2 or 3 traditional instructions ions



register->register, register->memory32bits/32bits=32bitsDIV

register->register, register->memory32bits*32bits=32bits

(Built-in Multiplier)MUL

register, memory32bits Logic shift

(Built-in barrel shifter)SHL

register, memory32bits Arithmetic shift

(Built-in barrel shifter)SHA

Immediate, register, memory32bits SavePUSH/POP

Immediate->register, immediate->memory, register->register,

register->memory, memory->register, memory->memory

32bits TransferMOV



32bits CompareCMP



32bits+32bits=32bits

(SUBtraction without borrow)SUB



32bits+32bits=32bits

(ADDition without carry)ADD

Addressing ModeFunctionInstruction


Cycles

• 72% of M16C/60 instructions execute in 3 cycles or less

• 20 execute in a single cycle and/or require only 1 byte

0 10 20 30 40 50 60

1

2

3

4

5

6

7

8

9

10

> 11

Percent

M16C/60 MCUs

Other 16-bit MCUs

Quicker Instruction Execution



Stack Base RegisterStatic Base Register

015

R2 (Data Register)

R3 (Data Register)

A0 (Address Register)


FB (Frame Base Register)

R1H (DR) R1L (DR)

R0H (DR) R0L (DR)

R2 (Data Register)

R3 (Data Register)



FB (Frame Base Register)

R1H (DR) R1L (DR)

R0H (DR) R0L (DR)

07815

23

23

LEGEND

Families:M16/Tiny, R8C, M16C/60, M16C/80

Examples in each family….(M16C/26, R8C/25, M16C/62P, M16C/80)

Families:M32C/80, R32C/100

Examples in this family….M32C/87, R32C/111

16 Bit Multiplier

16/32 Bit Barrel Shifter

019

User Stack Pointer

Interrupt Stack Pointer

Flag Register

015

Interrupt Table Register

23

Program Counter

015

Flag Save Register (SVF)

PC Save Register (SVP)

Vector Register (VCT)

23

015

23

PROPERTIES

On passing, 'Finish' button: Goes to Next Slide

On failing, 'Finish' button: Goes to Slide

Allow user to leave quiz: After user has completed quiz

User may view slides after quiz: After passing quiz

User may attempt quiz: Unlimited times