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Mac and Intel Mac and Intel The Merge The Merge

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Mac and Intel. The Merge. Introduction. http://www.apple.com/intel/ads/ Every Apple computer will come with an Intel Core Duo inside New core processor = new computer What about the Mac OS X under a new core?. Introduction. Answer: Look at the Core Processor (Eder) - PowerPoint PPT Presentation

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Page 1: Mac and Intel

Mac and IntelMac and Intel

The MergeThe Merge

Page 2: Mac and Intel

IntroductionIntroduction

http://www.apple.com/intel/ads/http://www.apple.com/intel/ads/ Every Apple computer will come with Every Apple computer will come with

an Intel Core Duo insidean Intel Core Duo inside

New core processor = new computerNew core processor = new computer

What about the Mac OS X under a What about the Mac OS X under a new core?new core?

Page 3: Mac and Intel

IntroductionIntroduction

Answer:Answer:– Look at the Core Processor (Eder)Look at the Core Processor (Eder)– Look at Mac OS X (Jared)Look at Mac OS X (Jared)

Page 4: Mac and Intel

What makes a What makes a computer tick?computer tick?

The processor is a set of The processor is a set of instructions that can be addressed instructions that can be addressed by the OSby the OS

Each processor requires a specific Each processor requires a specific system architecture to work: the system architecture to work: the motherboardmotherboard

Page 5: Mac and Intel

G5 (IBM) vs Intel Core G5 (IBM) vs Intel Core DuoDuo

G5G5 90 nm transistor90 nm transistor 64 bit64 bit IBM Instruction IBM Instruction

RISCRISC

IntelIntel 65 nm transistor65 nm transistor 32 bit32 bit

Page 6: Mac and Intel

The RISC processorThe RISC processor

BLNV Branch with Link NeVerBLNV Branch with Link NeVer BLEQ Branch with Link if EQual BLEQ Branch with Link if EQual

SWI "OS_DoSomethingOrOther" ; call the SWISWI "OS_DoSomethingOrOther" ; call the SWI MVNVS R0, #0 ; If failed, set R0 to -1MVNVS R0, #0 ; If failed, set R0 to -1 MOVVC R0, #0 ; Else set R0 to 0 MOVVC R0, #0 ; Else set R0 to 0

From http://www.heyrick.co.uk/assembler/riscvcisc.html

Page 7: Mac and Intel

G5 (IBM) and Intel core G5 (IBM) and Intel core duoduo

G5G5 90 nm transistor90 nm transistor 64 bit64 bit IBM Instruction IBM Instruction

RISCRISC

IntelIntel 65 nm transistor65 nm transistor 32 bit32 bit Intel Instruction Intel Instruction

set + 13 CISC set + 13 CISC and RISCand RISC

Page 8: Mac and Intel

The CISC processorThe CISC processor

JA Jump if AboveJA Jump if Above JAE Jump if Above or EqualJAE Jump if Above or Equal JB Jump if BelowJB Jump if Below JPO Jump if Parity OddJPO Jump if Parity Odd JS Jump if SignJS Jump if Sign JZ Jump if Zero JZ Jump if Zero

INT $...whatever... ; call the interruptINT $...whatever... ; call the interrupt CMP AX, 0 ; did it return zero?CMP AX, 0 ; did it return zero? JE failed ; if so, it failed, jump to fail codeJE failed ; if so, it failed, jump to fail code MOV DX, 0 ; else set DX to 0MOV DX, 0 ; else set DX to 0 ReturnReturn RET ; and returnRET ; and return failedfailed MOV DX, 0FFFFH ; failed - set DX to -1MOV DX, 0FFFFH ; failed - set DX to -1 JMP return JMP return

From http://www.heyrick.co.uk/assembler/riscvcisc.html

RISCRISC SWI "OS_DoSomethingOrOther" ; call SWI "OS_DoSomethingOrOther" ; call

the SWIthe SWI MVNVS R0, #0 ; If failed, set R0 to -1MVNVS R0, #0 ; If failed, set R0 to -1 MOVVC R0, #0 ; Else set R0 to 0 MOVVC R0, #0 ; Else set R0 to 0

Page 9: Mac and Intel

G5 (IBM) and Intel core G5 (IBM) and Intel core duoduoG5G5 90 nm transistor90 nm transistor 64 bit64 bit IBM Instruction RISCIBM Instruction RISC

IntelIntel 65 nm transistor65 nm transistor 32 bit32 bit Intel Instruction set Intel Instruction set

+ 13 CISC and RISC+ 13 CISC and RISC http://www.intel.cohttp://www.intel.co

m/products/processm/products/processor/coreduo/smartcacor/coreduo/smartcache.htmhe.htm

A new deep sleep A new deep sleep statestate

Page 10: Mac and Intel

The bottom lineThe bottom line

The Mac basically has become a PCThe Mac basically has become a PC Or has it?Or has it? It is just a box with a set of instructions It is just a box with a set of instructions

that need an OS to be controlled that need an OS to be controlled

Maybe a new Mac OSMaybe a new Mac OS Maybe LinuxMaybe Linux Maybe WindowsMaybe Windows

Page 11: Mac and Intel

The OS X kernel:The OS X kernel: XNU – “X is Not Unix” XNU – “X is Not Unix”

Hybrid Kernel design – both Hybrid Kernel design – both Monolithic and MicrokernelMonolithic and Microkernel

Based on the Mach (developed at Based on the Mach (developed at Carnegie Mellon University) and Carnegie Mellon University) and BSD kernels. BSD kernels.

Uses the I/O Kit device driver Uses the I/O Kit device driver frameworkframework

Page 12: Mac and Intel

Mach FeaturesMach Features

Kernel threadsKernel threads ProcessesProcesses Pre-emptive multitaskingPre-emptive multitasking Message-passing (used in IPC)Message-passing (used in IPC) Protected memoryProtected memory Virtual memory managementVirtual memory management Very soft real-time supportVery soft real-time support Kernel debugging supportKernel debugging support Console I/OConsole I/O

Page 13: Mac and Intel

BSD FeaturesBSD Features

POSIX API (BSD system calls)POSIX API (BSD system calls) Unix process model atop Mach tasksUnix process model atop Mach tasks basic security policiesbasic security policies user and group idsuser and group ids PermissionsPermissions the network stackthe network stack the virtual file system codethe virtual file system code cryptographic frameworkcryptographic framework System V IPCSystem V IPC

Page 14: Mac and Intel

I/O KitI/O Kit

Driver Framework, written in a Driver Framework, written in a subset of C++subset of C++

Drivers can be written quickly, Drivers can be written quickly, using less codeusing less code

The I/O Kit is multi-threaded, SMP The I/O Kit is multi-threaded, SMP safe, and allows for hot pluggable safe, and allows for hot pluggable devices and automatic, dynamic devices and automatic, dynamic device configurationdevice configuration

Page 15: Mac and Intel

Where are we now?Where are we now?

April 3April 3rdrd, 2006:, 2006:

OS X 10.4.6 – OS X 10.4.6 – TigerTiger

August 2006:August 2006:

OSX 10.5 -OSX 10.5 -LeopardLeopard

Page 16: Mac and Intel

Transfer to x86Transfer to x86

RosettaRosetta ““The most amazing The most amazing

software you’ll never software you’ll never see”see”

Universal SoftwareUniversal Software Includes dual binariesIncludes dual binaries

Page 17: Mac and Intel

Macs take over the Macs take over the world!world!

Boot CampBoot Camp For Core Duo MacsFor Core Duo Macs Allows you to install Allows you to install

Windows XP / Vista Windows XP / Vista on a Mac!on a Mac!

Retrives Drivers from Retrives Drivers from the Macthe Mac

Page 18: Mac and Intel
Page 19: Mac and Intel