Electrical and Computer Engineering

lMicroelectronicsfor Radiation Detectors

Gianluigi De Geronimogianluigi.degeronimo@stonybrook.edu,  degeronimo@ieee.org 

Lawrence Berkeley National LaboratoryDecember 20th, 2016

OutlineOutline

• Introduction• Introduction

• Charge Amplification in CMOS• Charge Amplification in CMOS• Evolution of FE ASICs• Evolution of FE ASICs• Conclusions• Conclusions

2

Sources of Electronic NoiseSources of Electronic NoiseEl i i reset

CFElectronic noise: from components directly connected to input node

reset

v(t)Sv

K(f,τ)

connected to input node 

Q∙δ(t) SiCS CG

fK1

fH

overall transfer function

,fKfC2j1

,fHF

need minimum 2 poles!

22GS

2v

2i df)f(HCCSdf),f(HS

2max

002

thENC

Time‐variant →  me‐domain analysis (noise weighting function)3

10-14

Noise from Input TransistorNoise from Input Transistor

10-15

S v [V²/H

z]

1/fwf

v gA

fCA

S CG intrinsic gate capacitanceproportional to the gate size

10-17

10-16

ectra

l den

sity

1/f

hi

mG gfC

CG = CS (capacitive matching)

p p g

10-18

Noi

se s

pe white G  S ( p g)

101 102 103 104 105 106 10710-19

Frequency f [Hz]

G

2GS

G

ww

G

2GS

ff2v C

CCCg

AaCCC

AaENC

From input transistor:

S C i

GGmG CCgC

ASIC: power constraints ƒTmax (max current)ƒT4

Input Transistor in CMOSInput Transistor in CMOS 2CCAF i ' Fix power = fix

G

2GS

GDm

ww2vw C

CCCIg

AaENC

From transistor'swhite noise:

Fix power   fix drain current ID→ size (W,L) ?

VGS >> Vth (strong inversion) VGS << Vth (weak inversion)

→ ( , )

2DG

Dox

Dm LIC

ILW

nµc2

Ig DT

DDm I

nVI

Ig load

2GS2 CCLENC

2GS2 CC

ENC

↓ ↓

VGS

GDvw CI

ENC D

GSvw I

ENC

• minimum L • independent of L

GS

• minimum L• CG = CS/3

independent of L• CG = 0     pushes back towards

strong inversion

→  VGS ≈ Vth (moderate inversion): model?5

Moderate InversionModerate Inversion

gm [mS]

IC 1

dk

IC=1

moderate strongweak

ID [mA]

IC2

1IC41nVI

Ig DDm

ox2T

D

µcnV2I

WL

IC From EKV modelIC2nVT inversion coefficient

De Geronimo, IEEE TNS 52, 2005alternative: extract from simulators (BSIM)6

Gate CapacitanceGate CapacitanceC [pF]

2

n‐MOSp‐MOS

CG [pF]2Wcov+2/3coxWL

n‐MOSp‐MOScoxWL

IC=1 CoxWL1overlap

h l

10 3 0 01 0 1 1 10 1000

ID [mA]bulk

channel

)IC(1

n1n

)IC(WLCWc2IC CCoxovDG

10 0.01 0.1 1 10 100

3/2

2C IC1IC41

31

23

)IC(

n IC32

Both g and CG push towards using n‐channel and L = L iBoth gm and CG push towards using n channel and L = Lmin

7 De Geronimo, IEEE TNS 52, 2005

10-14

Low‐Frequency NoiseLow‐Frequency Noise

10-15

10 14

/Hz] wf

vAA

S wf AAS

10-16

10si

ty S

v [V²/

mGv gfC mGv gfC

S

10-17

ectra

l den

s

n‐MOS

10-18

Noi

se s

pe

p‐MOS

102 103 104 105 106 10710-19

Frequency f [Hz]

2GS2 CC 2GSf2 CCA)(ENC

dependsFrom transistor's G

GSff

2vf C

CCAaENC

G

GS1f

f2vf C

)(aENC

dependson τ

From transistor slow‐freq. noise:

8

Low‐Frequency Noise vs LLow‐Frequency Noise vs L100]

CMOS 180nm, IC=1

n-MOSnt A

feq [a

.u.

wf ALAS

10 0.3 at3xLmin

se c

oeffi

cie

mGv gfC

S 1 0.6 at

2xLmin p-MOS

quen

cy n

ois

1/f i l t I TNS 58 2011

180 270 360 450 5400.1

Low

freq 1/f equivalent, IEEE TNS 58, 2011

2

180 270 360 450 540

Channel length [nm]

G

2GS

1f

f2vf C

CCLA)(aENC

From transistor'slow‐freq. noise:

LF noise pushes towards p‐channel & L > Lmin9

Discharge Network (Reset)Discharge Network (Reset)RF

• dc stabilization • discharge of C C

RFreset

• discharge of CF

S

CF

v(t)Sv

K(f,τ)‐∞

Q∙δ(t) SiCS CA

i2iR R

kT4aENC

FF

iiR RF

kT4S

F

qI2RkT4

)mV50(~

q2kT4

IR SF "50mV rule"

sensor shot noisefrom leakage current IS

examples CZT: IS = 1nA → RF >> 50 MΩSi: IS = 1pA → RF >> 50 GΩ10

Reset in CMOSReset in CMOS• linear region saturation• linear region ?

RF ?MF

VG• noise self‐adjusts to IS

THGSmMi VVqI2

VVkTg4S

F

RF ?MF

CIS

j S

S

THGSS VVqI2F CFS

v(t)Sv

K(f,τ)‐∞IS

Q∙δ(t) SiCS CA

1mTHGS V40

kTq

Ig

VVat

use large L, small  W to push 

S kTI

MF towards strong inversionNoise at discharge ?11

Reset in CMOS ‐ Discharge NoiseReset in CMOS ‐ Discharge NoiseVG Q/C

CF

MFQ/C MF noise increases

at discharge

Sv

CF

‐∞

τ

Q∙δ(t) SiCS CA

‐∞ τd t

i2 Q2a

ENC

use large τ /τd

i2id qQ2

2ENC

use large τd/τ

De Geronimo, NIM A 421, 1999

At high rate qQ2a

ENC i2

V

At high rate τd decreases

qQ22

ENCidr

t

alternative: use MF as switch or adopt time‐variant discharge

t

12

Reset in CMOS ‐ Pole LinearityReset in CMOS ‐ Pole Linearity

MF

VG V

CF

MF

∞Q∙δ(t) CS+CA

‐∞

τdt

τd depends on amplitude and may affect baseliney

H t li li l ll ti ?How to realize a linear pole‐zero cancellation ?

13

Reset in CMOS ‐ Pole‐Zero CancellationReset in CMOS ‐ Pole‐Zero Cancellation

VG

non‐linearlinear

1st stage of filter

C

MF

GRS

N×MVG

RS

Q∙δ(t)

CF

N×CF

N×MFG

CS

Q∙δ(t)

CS+CA

‐∞N CF

‐∞~N×Q∙δ(t)

2RikT4

S filter noise contribution: 2S

Ri NRS

Ste o se co t but o

Effective linear "charge amplification" by NDe Geronimo, IEEE TNS 47, 200014

Delayed Dissipative Feedback (DDF)delay feedback of dissipative element (i.e. resistor RS ) Q∙N

RS

CS

CF

C N

CSQ∙N V1

‐∞

Q

CF∙N‐∞ other poles

Vout

Qcharge gain N shaperDDF shaper

high analog dynamic range DRaDRa ≈≈QmaxQmax

ENC +ENCENC +ENCg g y g aa ENCca+ENCshENCca+ENCsh

15

De Geronimo, IEEE TNS 58, 2011

Front‐End ASIC for X‐Ray SpectrometersFront‐End ASIC for X‐Ray Spectrometers10610

55Fe, T = -44 CPeaktime 1 µsRate 1 kcps50 Msamples

Mn K

FWHM = 145 eV (~10e-)

106

104

50 MsamplesCh. 14

s

105

Rate = 200 kcps 55Fe, T = -44 CPeaktime = 1 µs50 MsamplesCh. 9

Mn KFWHM = 180 eV

eV100FWHMidr

102

Cou

nt

104

FWHM = 1 7 FWHM

Ch. 9nt

s

10

no PUR102

103 FWHM2 = 1.7 FWHM(efficiency ~ 0.6)no PUR

Cou

n

100

0 1 2 3 4 5 6 7 8 9

PUR

101 PUR

ASIC for x‐ray spectroscopy16 ch 2 1x4 6mm² 1mW/ch

Energy [keV]100

0 3 6 9 12 15 18

Energy [keV]ASIC functionscharge amplifier 16 ch., 2.1x4.6mm², 1mW/ch.

Collaboration with NASADe Geronimo, IEEE TNS 57, 2010     

Energy [keV]charge amplifier,shaper, discriminator, peak detector,pile‐up rejector, amplitude/address multiplexer

Circuits in a Front‐End ASICCircuits in a Front‐End ASIC• Low‐noise, low‐power charge amplifiers

• gas, liquid, solid state detectors• capacitances from ~ fF to ~ nF

• Switched and continuous adaptive reset• High‐order filters, stabilizers, drivers

• peak time / gain adjustment• Single‐ and multi‐level discriminatorsg• Peak and time detectors, derandomizers• Analog memories and multiplexers• Digital memories and counters• Digital memories and counters• Configuration registers• ESD protectionsC lib i l 64‐ch. VMM ASIC

ATLAS Muon Upgrade14x8.5 mm², ~0.4W/cm²

• Calibration pulse generators• Analog‐to‐digital converters• Digital‐to‐analog converters , /

> 6M MOSFETs (> 90k/ch.), 2016• Precision band‐gap references• Temperature sensors• Readout control logic• Digital signal processing (DSP)• Low‐voltage differential signaling (LVSD, SLVS)

Pace of FE ASIC Evolution?

VMM (2012‐16) for P1 Muon UpgradeVMM (2012‐16) for P1 Muon Upgradell h lATLAS Muon New Small Wheels

‐ sTGC and MicroMegas technologies2 3M channels 50 to 2000 pF‐ 2.3M channels, 50 to 2000 pF

orneighbor

ART (flag + serial address)ART clock

logic

or ART (flag + serial address)

d t /TGC l k

TGC out (ToT, TtP, PtT, PtP, 6bADC)64 channels

data1CA shaper

6‐b ADC

10‐bADCpeak

data/TGC clock

DSP

analog1

data2

analog2

10 b ADC

8‐b ADCtime4XFIFO

mux

test

DSP

analog2

addr.12‐b BC

tk clock

trim

testanalog mon.

Gray countBC clock

logic tk clockpulser bias registerstp clock

tempDAC resetprompt

18

Physical Layout

400 icustom 400‐pin21 x 21 mm² BGA

13.5 mm13.5 mm1.5 mm1.5 mm300 µm300 µm70 µm70 µm15 µm15 µm5 µm5 µm manual place & route~ 400 bonding pads fabrication at commercial foundriespackagingwirebonding

Impact on Radiation DetectorImpact on Radiation Detector

2005 ‐ ASM 2015 ‐ VMM• 60x sensing elements, 10x element density, 3x power dissipation• data‐driven, trigger primitives, peak, timing, ADCs, DSP, ...

2005  ASM 2015  VMM

, gg p , p , g, , ,

Advances in radiation detectors areti htl l d t d i f t d ASIC

Advances in radiation detectors areti htl l d t d i f t d ASICtightly coupled to advances in front‐end ASICstightly coupled to advances in front‐end ASICs

Front‐end ASICs are rapidly becoming very Front‐end ASICs are rapidly becoming very o t e d S Cs a e ap d y beco g e yhigh functionality systems‐on‐chip (SOC)o t e d S Cs a e ap d y beco g e yhigh functionality systems‐on‐chip (SOC)

20

Gamma spectrometer Designers

Evolution of Front‐End ASICsEvolution of Front‐End ASICs1 ‐ 2

~ year 2001CMOS 500nm, 3.3V, ~2mm²~ 10k transistors (~100/ch)preamplifier/filter

Gamma spectrometer

Compton imager

ATLAS upgrade

DesignersYearsRevisionsSimul time

1  21 ‐ 21 ‐ 21m/chpreamplifier/filter

~ 2006 250nm, 2.5V, 25mm²

ATLAS upgrade Simul. time 1m/ch

~ 100k transistors (1k/ch)+ discrim/peakdet/count/mux

~ 2011

2 ‐ 42 ‐ 42 4 2011

130nm, 1.2V, 50mm²~ 1M transistors (~ 10k/ch)+ timedet/multifunc/trigprim

2 ‐ 41h/ch

~ 2016 to 2020< 90nm, < 1.2V, >100mm²> 10M transistors (>100k/ch)

> 53 ‐ 5> 10M transistors (>100k/ch)

+ ADCs+DSPSOC = System on ChipEOC = Experiment on Chip

3 ‐ 5>1d/ch

VMM is 90k!

Complexity and functionality are rapidly increasing

The Rapid Evolution of MicroelectronicsThe Rapid Evolution of Microelectronics

10µ L 10 µm 12Vfirst MOSFET

10G

100G

10µ > 3GHz

Xbox One 28nmL 10 µm 12Vfirst MOSFET

5V10G

100G

1µ

10µ

engt

h L

100M

1G

rs /

die

1µ

10µ

800nm 5V 6-core I7 45nm10-core XEON 32nm

V1 5Vm

1.8V250nm 2.5V

500nm 3.3V1.2µm 5V

engt

h L 3µm 5V

100M

1G

rs /

die

100n

hann

el le

1M

10M

rans

isto

r

100n32nm 1.1V

nm 0.9V45nm 1.1V

Intel 80486 4nm FinFET 0.7V

28nm 1.0V65nm 1.2V

90nm 1.2V

130nm 1.5

180nm 12505

hann

el le

1M

10M

rans

isto

r

10n

sist

or c

h

10k

100k

1M

mbe

r of t

r

10n

320nm

Intel 80286

Intel 8048616-14n28n

sist

or c

h

10k

100k

1M

mbe

r of t

r

1n

1MHzfirst IC

Intel 4004Tran

s

1k

10k

Num1n

first IC

Tran

s

1MHzIntel 4004 1k

10k

Num

1960 1970 1980 1990 2000 2010 2020 2030 2040

Year

1001960 1970 1980 1990 2000 2010 2020 2030 2040

Year

100

22

The Rapid Evolution of MicroelectronicsThe Rapid Evolution of Microelectronics

10µ > 3GHz

Xbox One 28nmL 10 µm 12Vfirst MOSFET

5V10G

100G

1µ

10µ

800nm 5V 6-core I7 45nm10-core XEON 32nm

V1 5V1.8V250nm 2.5V

500nm 3.3V1.2µm 5V

engt

h L 3µm 5V

100M

1G

rs /

die

Exotic Transistors• single‐electron• carbon‐nanotube• ...

Exotic Transistors• single‐electron• carbon‐nanotube• ...

100n32nm 1.1V

nm 0.9V45nm 1.1V

Intel 80486 4nm FinFET 0.7V

28nm 1.0V65nm 1.2V

90nm 1.2V

130nm 1.5

180nm 12505

hann

el le

1M

10M

rans

isto

r......

10n

3220nm

Intel 80286

Intel 8048616-14n28n

sist

or c

h

10k

100k

1M

mbe

r of t

r

1n Si lattice spacing 0.54nm

first IC

Tran

s

1MHzIntel 4004 1k

10k

Num

1960 1970 1980 1990 2000 2010 2020 2030 2040

Year

100

Introduced in the ’90s, exotic transistors made considerable progress, but are still far from achieving reproducibility and reliability required for microelectronics23

3D (FF) + 3D

The Rapid Evolution of MicroelectronicsThe Rapid Evolution of Microelectronics

10µ

Through-Si Vias (TSV)

3D (FF) + 3D3D

2.5D > 3GHzXbox One 28nmL 10 µm 12Vfirst MOSFET

5V10G

100GTSVTSV

1µ

10µ

800nm 5V 6-core I7 45nm10-core XEON 32nm

V1 5V1.8V250nm 2.5V

500nm 3.3V1.2µm 5V

engt

h L 3µm 5V

100M

1G

rs /

die

Exotic Transistors• single‐electron• carbon‐nanotube• ...

Exotic Transistors• single‐electron• carbon‐nanotube• ...

100n32nm 1.1V

nm 0.9V45nm 1.1V

Intel 80486 4nm FinFET 0.7V

28nm 1.0V65nm 1.2V

90nm 1.2V

130nm 1.5

180nm 12505

hann

el le

1M

10M

rans

isto

r......

10n

3220nm

Intel 80286

Intel 8048616-14n28n

sist

or c

h

10k

100k

1M

mbe

r of t

r

1n Si lattice spacing 0.54nm

first IC

Tran

s

1MHzIntel 4004 1k

10k

Num

1960 1970 1980 1990 2000 2010 2020 2030 2040

Year

100

Progress heavily driven by consumer electronics24

AMPLEX (1988) ‐ First Large ScaleAMPLEX (1988) ‐ First Large ScaleParticle ph sics ASICParticle ph sics ASICParticle physics ASIC16 channels, ~800 MOSFETs (~50/ch)3µm CMOS 5V 1 1 mW/ch 16 mm²

Particle physics ASIC16 channels, ~800 MOSFETs (~50/ch)3µm CMOS 5V 1 1 mW/ch 16 mm²3µm CMOS, 5V, 1.1 mW/ch, 16 mmamplifier/filter/track & hold/muxfor Silicon micro‐strips at UA2

3µm CMOS, 5V, 1.1 mW/ch, 16 mmamplifier/filter/track & hold/muxfor Silicon micro‐strips at UA2for Silicon micro strips at UA2for Silicon micro strips at UA2

25

Institute WG1Radiation

WG2Top level

WG3Sim./Ver

WG4I/O

WG5Analog

WG6IPs

FE‐I5 (2016‐17) FE‐I5 (2016‐17) Particle physics ASICParticle physics ASIC Radiation Top level Sim./Ver I/O Analog IPs

Bari C A ABergamo-Pavia A C A BBonn C A A B B ACERN B(*) (*) A C(*) A B(*)

CPPM A B C C B AFermilab A B ALBNL B A B B A A

Particle physics ASIC260k pixels, 1G MOSFETs (~4,000/px)65nm 1 2V 0 5‐1 W/cm² >400mm²

Particle physics ASIC260k pixels, 1G MOSFETs (~4,000/px)65nm 1 2V 0 5‐1 W/cm² >400mm²

19 institutionsspecialized working groups

19 institutionsspecialized working groups

LPNHE Paris A B A ANIKHEF A A ANew Mexico APadova A APerugia B A BPisa B A A APSI B A C A ARAL B B A C

65nm, 1.2V, 0.5 1 W/cm , >400mmhigh complexity/functionality, DSPfor ATLAS vertex hybrid pixels

65nm, 1.2V, 0.5 1 W/cm , >400mmhigh complexity/functionality, DSPfor ATLAS vertex hybrid pixels

p g g p100 collaborators

(~50 ASIC designers)

p g g p100 collaborators

(~50 ASIC designers)

Torino C B C B A AUCSC C B C A

y py p

2X2 pixel unit2X2 pixel unitARCHITECTUREARCHITECTURE 2X2 pixel unit2X2 pixel unit

26

Compare to Evolution of MicroelectronicsCompare to Evolution of Microelectronics

10µ Xbox One5VL 10 µm 12Vfirst MOSFET

10G

100G

1µ

10µ6-core I7 FE-I53µm 5V

800nm

L

1.2µm 5V

engt

h L

250nm 100M

1G

rs /

die

100n VMM

hann

el le

130nmm

25

1M

10M

rans

isto

r

10n

sist

or c

h 1365nm

45nm32nm

28nm

10k

100k

1M

mbe

r of t

r

1n

FILASAMPLEX

first IC

Tran

s

1k

10k

Num

1960 1970 1980 1990 2000 2010 2020 2030 2040

Year

100

Front‐end ASICs keep pace, but with  ~decade delay27

80

Front‐end ASICs / Year (Particle Physics)Front‐end ASICs / Year (Particle Physics)80

f f S C f

2013~ 60 FE (out of ~140)

60

gns

Number of front-end ASICs for PPrunning and in design ~ 35 FE in design

40

r of d

esig

20Num

ber

01980 1990 2000 2010 2020

0

Year arXiv:1307.3241

Exponential increase in demand for FE ASICs28

Advances in radiation detectors are tightlyParadigmParadigm

Advances in radiation detectors are tightly coupled to advances in front‐end ASICs

DemandDemand

ComplexityFE ASICs Complexity

Technology

FE ASICs

• Design resources must be increased• Collaborations must be promoted

29

Impact of R&D on Front‐End ASICs at BNLImpact of R&D on Front‐End ASICs at BNLYear Novel Circuit Collaborator Patent Publications Impact areas

1998 adaptive reset eV Products * * RHIC ATLAS NSLS Nonproliferation Security Medical1998 adaptive reset eV Products RHIC, ATLAS, NSLS, Nonproliferation, Security, Medical

1998 high order complex shaper eV Products * ATLAS, LBNE, LEGS, SANS, NSLS, Nonproliferation, Security, Medical

1999 band‐gap references R&D ATLAS, LBNE, LEGS, SANS, NSLS, Nonproliferation, Security, Medical

2001 multi‐phase peak detector R&D * * ATLAS upgrades, LEGS, SANS, NSLS, Nonproliferation, Security, Medical

2003 l i lk i d LEGS TPC * ATLAS d LEGS NSLS N lif i S i M di l2003 low time‐walk time detector LEGS TPC * ATLAS upgrades, LEGS, NSLS, Nonproliferation, Security, Medical

2003 neighboring logic LEGS TPC * ATLAS upgrades, LEGS

2004 peak‐detector derandomizer eV Products * * NSLS, Nonproliferation

2004 low voltage adaptive reset LEGS TPC * * ATLAS upgrades, LEGS, SANS, NSLS, Nonproliferation, Security, Medical

2005 coplanar grid time correction LANL * * Nonproliferation

2006 coplanar grid ampl. correction R&D * * Nonproliferation

2006 multi‐window photon counting eV Products * * NSLS, Medical

2006 current‐mode ADC He3 SANS * * SANS, ATLAS upgrades2006 current mode ADC He SANS SANS, ATLAS upgrades

2007 sub 10‐electron front‐end NASA * NSLS

2008 bipolar cathode timing DoD * * Nonproliferation

2010 threshold‐peak pile‐up rejector NASA * * NSLS

2011 delayed dissipative feedback ATLAS * * ATLAS upgrades NSLS Nonproliferation2011 delayed dissipative feedback ATLAS * * ATLAS upgrades, NSLS, Nonproliferation

2011 multiphase current‐mode ADC LBNE * * LBNE, ATLAS upgrades

2012 sub‐hysteresis discrimination ATLAS * * ATLAS upgrades

2013 current‐output peak detector ATLAS * * ATLAS upgrades

2016 low‐noise termination ATLAS * ATLAS upgrades

R&D

2011‐ cryogenic circuits R&D, Physics * LBNE, Neutrinoless, Dark matter, Nonproliferation, NSLS II

2011‐ flip‐chip interconnects R&D NSLSII, Nonproliferation, Neutrinoless

30

2013‐ 2D front‐ends R&D, NSLS * NSLSII, Nonproliferation, Physics

2013‐ ADCs for front‐ends R&D, SBU, LDRD? all areas

2014‐ Integrated DSP & SOC R&D, SBU all areas

commercialization

LAr Calorimeter P2 UpgradeLAr Calorimeter P2 Upgrade• Capacitance up to 2.5nF• Termination 25/50 • Current up to 10mA• Current up to 10mA• ENI 60nA rms• Linearity 0.2%

ATLAS LAr Calorimetery

• 180k channels

ns20@nA110RkT4

ENI 2/1R

Can we use a termination resistor? R P

is ZsZ0 = 50 Ω

transmission amplifier50 ΩSnR

31

lineamplifier

LAr Calorimeter Reference DesignLAr Calorimeter Reference Design

Newcomer ResciaNewcomer‐Rescia∙ TWEPP 2009https://inspirehep.net/record/1196637/files/ATL‐LARG‐PROC‐2009‐017 pdf

32

ENI 73nA @ 1nF/files/ATL LARG PROC 2009 017.pdf

HLC ‐ Fully‐Differential FE with Passive FeedbackRR

‐ vovi = ‐vo/N +

vn

+ ‐ ‐voinRii

‐vo/NC

• Input impedance  Rin = R/(N+1)C∙(N‐1)

• Resistor noise  4kT/R << 4kT/Rin• Very stable termination (R, N indep. of signal current and active components)

• Fully‐differential output• High linearity, ENI<60nA G. De Geronimo33

ConclusionsConclusions

• Advances in radiation detectors are tightly coupled to advances in front‐end ASICs• Advances in radiation detectors are tightly coupled to advances in front‐end ASICs

• Successful ASIC design needs close collaboration with lead scientists and detector experts• Successful ASIC design needs close collaboration with lead scientists and detector expertslead scientists and detector experts

• Increase in demand, complexity and functionality 

lead scientists and detector experts

• Increase in demand, complexity and functionality (towards front‐end systems‐on‐chip)

• Maintaining front‐end ASIC design capability requires

(towards front‐end systems‐on‐chip)

• Maintaining front‐end ASIC design capability requiresMaintaining front end ASIC design capability requires substantial increase in resourcesMaintaining front end ASIC design capability requires 

substantial increase in resources

Brookhaven National Laboratory and the ATLAS Collaboration

AcknowledgmentAcknowledgmentBrookhaven National Laboratory and the ATLAS Collaboration

Kai Vetter (LBL)34