Assignment No.01

Q.1.

i. Function of Queue:

The 8086/8088 instruction queue is a buffer that holds opcode bytes that have been pre-fetched by the

bus interface unit. This speed up operations of the processor by helping to reduce fetches latency, i.e.

to improve the probability that an opcode byte fetched by the processor is already available.

This works best when there is no branching, as a branch would invalidate the queue. Advanced

processors attempt to "predict" the branch, making the probability even better.

ii. Function of Execution unit:

Basically the function of execution unit in 8086 is to perform all arithmetic and logic operations. It tells

the Bus Interface unit(BIU) where to fetch instructions and data from. It has 4 components: Control

circuitry, ALU, Flag registers and general purpose registers.

1.control circuits-it directs all the internal operations.

2.ALU-performs all logic operations.

3.general purpose registers-used to store data during execution.

4.flag registers-it has a 16bit flag register containing 9 flags that are set for certain conditions during

any operation. Ex-carry flag (whenever there is a carry).

It also has a decoder to decode the fetched instructions.

iii. Function of Bus Interference Unit:

The BIU provides various functions, including generation of the memory and I/O addresses for the

transfer of data between outside the CPU, and the EU.

Q.2. Register organization of 8086:

Explanation of General Purpose Register of 8086:

The registers AX, BX, CX, and DX are the general 16-bit registers.

AX Register:

Accumulator register consists of two 8-bit registers AL and AH, which can be combined together and used as a 16- bit register AX. AL in this case contains the low-order byte of the word, and AH contains the high-order byte. Accumulator can be used for I/O operations, rotate and string manipulation.

BX Register:

This register is mainly used as a base register. It holds the starting base location of a memory region within a data segment. It is used as offset storage for forming physical address in case of certain addressing mode.

CX Register:

It is used as default counter or count register in case of string and loop instructions.

DX Register:

Data register can be used as a port number in I/O operations and implicit operand or destination in case of few instructions. In integer 32-bit multiply and divide instruction the DX register contains high-order word of the initial or resulting number.

Q.3. Flag Register:

(i) Carry Flag (CF): Carry flag is set if there was a carry from or borrow to the most

significant bit during last result calculation. (ii) Auxiliary Flag (AF): Auxiliary flag (AF) is set if there was a carry from or borrow to

bits. (iii) Zero flag (ZF): ZF is set if the result is zero. (iv)

Q.4. Functions of the given pins:

(𝑖) 𝑅𝐷̅̅ ̅̅ (ii) CLK (iii) M/𝐼𝑂̅̅ ̅

(𝒊) 𝑹𝑫̅̅̅̅̅ : Whenever the read signal is at logic 0. The data bus receives the data from the memory.

(ii) CLK: Clock is input, the clock input signal provides the basic timing input signal for processor and

bus control operation. It is asymmetric square wave with 33% duty cycle.

(iii) M/𝑰𝑶̅̅̅̅ : This signal is issued by the processor to distinguish memory access from I/O access.

When it is high, memory is accessed. When it is low, I/O devices are accessed.

Assignment No.02

Q.1. Architecture Diagram of 8086 Microprocessor:

The internal architecture diagram of 8086 microprocessors is shown in figure given below:

The architecture of 8086 can be divided into two parts

1. Bus Interface Unit (BIU). 2. Execution Unit (EU).

1. Bus interface unit (BIU):

The BIU fetches instructions, reads and writes data, and computes the 20-bit address.

BIU handles all the data transfers and addresses on the buses for EU.

EU executes instructions from the instruction system byte queue.

2. Execution Unit (EU):

The EU contains Control Circuitry, Instruction Decoder, ALU, Pointer and Index register, Flag

register.

EU tells the BIU where to fetch instructions and data.

The EU decodes and executes the instructions using the 16-bit ALU.

Decoder translates instructions into series of actions which EU carries out.

ALU can perform arithmetic and Logical operations.

Control Circuitry directs internal operations.

Q.2. Pin diagram of 8086:

Q.3. Data Transfer, Arithmetic and Logic Instructions of 8086:

1. Data transfer: The data transfer functions are those which transfers the data from one source to any

one destination.

(1). MOV Destination, Source;

• There will be transfer of data from source to destination.

• Source can be register, memory location or immediate data.

• Destination can be register or memory operand.

• Both Source and Destination cannot be memory location or segment registers at the same time.

• E.g.

• (1). MOV CX, 037A H;

• (2). MOV AL, BL;

• (3). MOV BX, [0301 H];

(2). Push Source;

• Source can be register, segment register or memory.

• This instruction pushes the contents of specified source on to the stack.

• In this stack pointer is decremented by 2.

• The higher byte data is pushed first (SP-1).

• Then lower byte data is pushed (SP-2).

• E.g.:

• (1). PUSH AX;

• (2). PUSH DS;

• (3). PUSH [5000H];

(3). POP Destination;

• Destination can be register, segment register or memory.

• This instruction pops (takes) the contents of specified destination.

• In this stack pointer is incremented by 2.

• The lower byte data is popped first (SP+1).

• Then higher byte data is popped (SP+2).

• E.g.

• (1). POP AX;

• (2). POP DS;

• (3). POP [5000H];

(4). XCHG Destination, source;

• This instruction exchanges contents of Source with destination.

• It cannot exchange two memory locations directly.

• The contents of AL are exchanged with BL.

• The contents of AH are exchanged with BH.

• E.g.

(1). XCHG BX, AX;

(2). XCHG [5000H], AX;

(5). XLAT;

• Also known as translate instruction.

• It is used to find out codes in case of code conversion.

• i.e. it translates code of the key pressed to the corresponding 7-segment code.

• After execution this instruction contents of AL register always gets replaced.

E.g. XLAT;

(6). IN AL/AX, 8-bit/16-bit port address

• It reads from the specified port address.

• It copies data to accumulator from a port with 8-bit or 16-bit address.

• DX is the only register is allowed to carry port address.

• E.g.

(1). IN AL, 80H;

(2). IN AX, DX; //DX contains address of 16-bit port.

(7). OUT 8-bit/16-bit port address, AL/AX;

• It writes to the specified port address.

• It copies contents of accumulator to the port with 8-bit or 16-bit address.

• DX is the only register is allowed to carry port address.

• E.g.

(1). OUT 80H, AL;

(2). OUT DX, AX; //DX contains address of 16-bit port.

(2). Arithmetic Instructions

(1). ADD destination, source;

• This instruction adds the contents of source operand with the contents of destination operand.

• The source may be immediate data, memory location or register.

• The destination may be memory location or register.

• The result is stored in destination operand.

• AX is the default destination register.

• E.g. (1). ADD AX,2020H;

• (2). ADD AX, BX;

(2). ADC destination, source

• This instruction adds the contents of source operand with the contents of destination operand

with carry flag bit.

• The source may be immediate data, memory location or register.

• The destination may be memory location or register.

• The result is stored in destination operand.

• AX is the default destination register.

• E.g. (1). ADC AX,2020H;

• (2). ADC AX, BX;

(3). SUB destination, source;

• This instruction subtracts the contents of source operand from contents of destination.

• The source may be immediate data, memory location or register.

• The destination may be memory location or register.

• The result is stored in the destination place.

• E.g. (1). SUB AX,1000H;

• (2). SUB AX, BX;

(4). SBB destination, source;

• Also known as Subtract with Borrow.

• This instruction subtracts the contents of source operand & borrow from contents of destination

operand.

• The source may be immediate data, memory location or register.

• The destination may be memory location or register.

• The result is stored in the destination place.

• E.g. (1). SBB AX,1000H;

• (2). SBB AX, BX;

(5). MUL operand

• Unsigned Multiplication.

• Operand contents are positively signed.

• Operand may be general purpose register or memory location.

• If operand is of 8-bit, then multiply it with contents of AL.

• If operand is of 16-bit, then multiply it with contents of AX.

• Result is stored in accumulator (AX).

• E.g. (1). MUL BH // AX= AL*BH; // (+3) * (+4) = +12.

• (2). MUL CX // AX=AX*CX;

(6). DIV operand

• Unsigned Division.

• Operand may be register or memory.

• Operand contents are positively signed.

• Operand may be general purpose register or memory location.

• AL=AX/Operand (8-bit/16-bit) & AH=Remainder.

• E.g. MOV AX, 0203 // AX=0203

• MOV BL, 04 // BL=04

• IDIV BL // AL=0203/04=50 (i.e. AL=50 & AH=03)

(3). Logical Instructions

(1). AND destination, source

• Destination operand may be register, memory location.

• Source operand may be register, immediate data or memory location.

• Result is stored in destination operand.

• E.g. MOV AX, 3F0FH // AX=3F0FH

• MOV BX, 0008H // BX=0008H

• AND AX, BX // AX=0008H

(2). OR destination, source

• Destination operand may be register, memory location.

• Source operand may be register, immediate data or memory location.

• Result is stored in destination operand.

• E.g. MOV AX, 3F0FH // AX=3F0FH

• MOV BX, 0098H // BX=0098H

• OR AX, BX // AX=3F9FH

(3). NOT operand;

• Operand may be register, memory location.

• This instruction inverts (complements) the contents of given operand.

• Result is stored in Accumulator (AX).

• E.g. MOV AX, 0200FH // AX=200FH

NOT AX // AX=DFF0H

(4). XOR:

Syntax = XOR AL, BL

Q.4. Read and write diagram of 8086 Microprocessor: