mostafa soliman, ph.d. may 12th...

1 Mostafa Soliman, Ph.D.

Mostafa Soliman, Ph.D.

May 12th 2014

Wet etching

Anisotropic Si etching

Silicon Crystalline Structure

Miller indices

Bulk micromachining of Si


Silicon has a cubic diamond lattice structure.

The unit cell of the lattice is Face Centered Cubic (FCC).

The density of atoms is dependent on the angle the crystal is viewed from.

Miller indices are used to define the different planes of the crystal.

(100) (111) (110)

The plane that defines the faces of the cube intersects axes 1, 2,

and 3 at (1, ∞, ∞).

The miller indices of this plane is give by the reciprocal of theses

intersects, that is (1,0,0), or (100).

Silicon crystal has 6 face planes.

Those 6 face planes are called “{100} planes family”.

1

3

2

[100]

[010]

[001]

(100)

{100} (001)

(010)

[abc] in a cubic crystal is just a direction vector

(abc) is any plane perpendicular to the [abc] vector

{…}/<…> indicate equivalent planes/direction

[100]

[010]

[001]

(110)

(111)

Planes {100} are called face planes (6 planes).

Planes {110} are called edge planes (12 planes). (lowest atomic density)

Planes {111} are called diagonal planes (8 planes). (highest atomic density)

Silicon crystal as viewed from different

angles

Angles between the different planes can be calculated from the scalar (dot)

product of their normal vectors.

Angle between (100) and (110) planes can be calculated as follows:

Angle between (100) and (111) planes can be calculated as follows:

cosbaba

45

cos2001

cos21)110()100(

74.54

cos3001

cos31)111()100(

<111>

<100>

Silicon Substrate

54.7

Anisotropic etchants have “direction dependent etch rates” in crystals

Typically the etch rates are slower perpendicularly to the crystalline planes with the highest

density, i.e. (111)

Commonly used anisotropic etchants in silicon include Potasium Hydroxide (KOH),

Tetramethyl Ammonium Hydroxide (TMAH), and Ethylene Diamine Pyrochatecol (EDP)

Etch rate in different directions, (100) (110) or (111), depends on:

The chemical used for etching (etchant)

Temperature of the etchant.

Concentration of the etchant.

Good

mask

Wet etching can be stopped by:

Time controlled etch process

Inserting etch stop layer

Different bulk michromachined structures

Mostafa Soliman, Ph.D. 16

MEMS based pressure sensor:

Mostafa Soliman, Ph.D. 17

MEMS based pressure sensor:

The fabrication process for a pressure

sensor using plain silicon wafer as the

substrate is shown in this figure.

In the first step, the wafer is selectively

doped with boron or phosphorous atoms to

create

piezoresistors on the front side (a). The

wafer is then passivated with a thermally

grown silicon dioxide thin film (b). In the

ensuing step, the silicon dioxide film on the

backside is patterned and selectively

etched to expose the silicon (c). The

exposed silicon material will be etched

when the wafer is immersed in an

anisotropic silicon etchant (d). In order to

form the silicon diaphragm with desired

thickness,


Mostafa Soliman, Ph.D.

May 12th 2014

Deep reactive Ion Etching (DRIE)

SOI Micromachining Process

Sacrificial Surface Micromachining

PolyMUMPS Micromachining Process


DRIE Deep Reactive Ion Etching.

First step, the process starts with dry (plasma) etching of silicon protected,

or masked, by a thin film of SiO2.

In addition to the vertical etch in the substrate there will be lateral etch but

with smaller rate R(vertical) >>> R(lateral)

Second step is to deposit a thin layer of polymer on the surface.

The polymer deposition has to be conformal in order to cover all

the surface and all side walls of the pit (trench). This step is

called “Passivation”

Third step is to do etching again by plasma (dry) etching. As a

result, the polymer will be removed at the bottom of the trench

and will be staying on (or protecting) the sidewalls from the

previous etching step.

Then we repeat second and third steps to etch deeply in the

substrate. In other words, the process alternates between

passivation and etching steps.

Etch rate dependence on trench aspect ratio

In the figure shown, we can notice two effects:

1- Scalloping effect of the etched sidewalls:

This is due to the alternation between etching and

passivation steps as discussed before.

2- Different etching rate for different trench widths:

The non-uniformity of the etch depths is a result of their

different widths.

The transport of the etchant into the narrow trenches is

slower.

Therefore, the etch rate slows down for narrow

trenches.

High aspect ratio (up to 50)

vertical structures

1) Begin with a bonded SOI wafer. Grow

and etch a thin thermal oxide layer to act

as a mask for the silicon etch.

2) Etch the silicon device layer to expose

the buried oxide layer.

3) Etch the buried oxide layer in buffered

HF to release free-standing structures.

Si device layer, 20 µm thick

buried oxide layer

Si handle wafer

oxide mask layer

silicon

Thermal oxide

Moving mirrors

Variable Optical Attenuator

Thermal actuator

moves the VOA

Si Mirror


Sacrificial surface micromachining represents a different process than bulk

micromachining.

Instead of forming mechanical structures into the silicon substrates, devices

are fabricated in thin films deposited on the substrate surface.

Surface micromachined structures are always built upwards and remain on

the surface of the substrate during the whole fabrication process and in the

application.

First isolating layers (SiO2 and/or Si3N4) are deposited on the substrate to

isolate it from the mechanical structures that may be actuated by electric

potential.

Sacrificial surface micromachining offer a wide range of possible structures

because multiple structural and sacrificial layers can be deposited.

Mainly there are two kinds of layers to be deposited in this fabrication technique:

Structural layer:

This is the mechanical layer which forms the MEMS structure. This layer is not removed and

stays on the substrate.

Usually Pollycrystalline Silicon (poly silicon) is used as structural layer in surface

micromachining. It is deposited using LPCVD method (highly conformal layers)

Sacrificial layer:

This is a layer deposited in-between layers will be staying on the substrate to define the

clearance regions between the structural layers.

After building the MEMS structure on the substrate, the sacrificial layer is selectively etched

(removed).

Usually PSG (Phosphosilicate glass) is used as the sacrificial layer. It is deposited using LPCVD

method (highly conformal layers)

Sacrificial Surface Micromachining

Surface micromaching process with 7 layers:

• 3 Poly(silicon) (Structural layers)

• 2 levels of PSG (phospho-silicate glass)

• 1 level of metallization

• 1 insulating level of silicon nitride

• Minimum feature DRC : 2µm

• Price: Open to Public : 3000 Euros / cm² for 15

chips Developped at BSAC (1993) ; commercialized by Cronos (1998) ; Owned by MEMSCAP (2001)

MUMPS Process Flow-chart (1)

N-type Si (100)

• Nitride deposition 600nm (LPCVD) electrical insulation

• Poly0 deposition 500nm (LPCVD) : electrical ground

• Photo 1 : Poly0 etch by RIE (POLY0)

• PSG1 deposition : 2µm (LPCVD) sacrificial layer 1

• Photo 2 : etch of PSG1 (750/2000 nm) (DIMPLES)

For stiction reduction

• Photo 3 : RIE etch of PSG1 (ANCHOR1)

• Poly1 LPCVD deposition : 2µm

• Thin PSG deposition 200nm

(doping and mask material for Poly1 etching)

• 1h baking at 1050° (doping of Poly1 and stress

reduction

• Photo 4 : PSG and Poly1 RIE etching (POLY1)

• Deposition of PSG2 : 0,75µm (LPCVD) sacrificial layer 2

• Photo 5 : RIE PSG2 RIE etch (POLY1-POLY2-VIA)

‘contact Poly1’

• Photo 6 : RIE etching of PSG1 and PSG2 (ANCHOR2)

‘anchr to Poly0’

• Poly2 LPCVD deposition : 1.5µm

• Deposition of thin PSG 200nm

• Annealing 1h at 1050°C (Poly1 doping and stress

reduction)

• Photo 7 : RIE etching of PSG then Poly2 (POLY2)

Cleaning and PSG removal (200nm)


• Photo 8 : Gold Metallisation by Lift Off 0,5µm (METAL)

• Protection with photoresist and dicing for Chip delivery

• Structure release by wet etching :

HF 49% (1.5 to 2 mn) : Etching of PSG1 and PSG2

• DI water and alcohol rince then baking at 110°C…

Poly1 & Poly2 & Metal:

Stator (polarisation)

Poly1 : Rotor

Poly2 : Axe Rotor


More tensile on top

More compressive on top

Just right! The bottom line: anneal

poly between oxides with similar

phosphorous content. ~1000C for

~60 seconds is enough.

A need to have a good control of thin film deposition conditions.

Usually, annealing helps a lot in flatening the structures

mostafa soliman, ph.d. may 12th...

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