mto & heterogeneous integration lumos_proposers_day...mto vision 1. embedded microsystem...
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MTO & Heterogeneous Integration
Dr. Mark Rosker, MTO Director
Briefing prepared for LUMOS Proposers Day
November 20, 2019
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Microsystems Technology Office (MTO)
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MTO’s Mission
DE
MTO’s core mission is the development of high-performance, intelligent microsystems and next-generation components to enable dominance in national security C4ISR, EW, and DE applications
The effectiveness, survivability, and lethality of these systems depends critically on microsystems
C4ISR Electronic Warfare Directed Energy
UNCLASSIFIED
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MTO Vision
1. Embedded Microsystem Intelligence / Localized Processing
2. Next-Generation EMComponents & Technologies
3. Microsystem Integration for Functional Density & Security
4. Disruptive Defense Microsystem Applications
C4ISRElectronicWarfare
Directed Energy
UNCLASSIFIED
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Heterogeneous IntegrationMillimeter Wave Digital Arrays (MIDAS)
Provide Full Coverage for Multi-Beam Networked Communication
• High-gain in all directions for improved network performance
• Wide bandwidth & frequency agility to adapt to future needs
Unclassified
1. Embedded Microsystem Intelligence / Localized Processing
2. Next-Generation Components &
Technologies for Spectrum Dominance
3. Microsystem Integration for Functional Density & Security
4. Disruptive Defense Microsystem Applications
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Electronics Resurgence Initiative (ERI)
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Modern electronics development waves
Unclassified
Perf
orm
ance
, N
um
ber
of
Tra
nsi
stors
1990 2000 2010 2020 20301980
1st Wave Geometric
Scaling
• DUV lithography• Automatic
Place/Route
2nd WaveBEOL Scaling
• More scaling• Low-κ/Cu interconnects• Bus width scaling• Logic Synthesis
3rd Wave3D Devices
• Even more scaling• FinFETs• High-κ dielectric• Strain engineering • Multi-core architectures
Intel 486
Device Innovations Architecture InnovationsDesign Innovations
Dennard Scaling Ends
4th Wave3D Heterogeneous Integration
• A little more scaling• 3D architectures• Specialized processors• Domain-specific architectures• Design & security automation
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ERI strategy: Innovating the 4th waveTHE ELECTRONICS RESURGENCE INITIATIVE
3D Heterogeneous Integration
New Materials & Devices
Specialized Functions
Design & Security
Unclassified
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Compound Semiconductor Materials On Silicon (COSMOS)
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1 10 100 1k 10k 100k 1M 10M 100M 1G
The FutureInP HEMT
GaAs HBT
InP HBT
SiGe HBT
SOI
CMOS
SiGe BiCMOS
GaAs pHEMT
ABCS HBT
ABCS HEMT
Level of Integration
Perf
orm
an
ce
III-V’s offer key
performance advantages
Si offer incredible
integration levels
Heterogeneous Integration Offers Best of Both Worlds
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CSMANTECH / April 2008 / 11
Compound Semiconductor Materials
On Silicon (COSMOS)
Program Objective: Heterogeneous integration all the way to the transistor scale
• Enable materials selection within circuits – without loss of transistor performance
• Exploit existing SOA CMOS infrastructure & integration levels – without process modification
DoD Benefits
• Achieve higher functional density: dense integration of analog, mixed-signal, & digital electronics
• Enable circuits with lower dissipated power & far higher I/O throughput
Today
Flip-chip
Reflow solder bumps
200 μm pitch
Chip size
~1 mm
COSMOS Vision
Allow the circuit designer to select the optimal
transistor technology everywhere in the circuit
Heterogeneous integration exists only on a
very coarse scale – and not in the signal path
Si CMOS
Compound
Semiconductor (CS)
“Chiplets”
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CSMANTECH / April 2008 / 12
Interfaces
OthersABCS
What is COSMOS About?
InP HBT
Si CMOS
Yield
GaAs pHEMT
Thermal management
Avoid any
process change
• Manage the dislocations and
defects at the interfaces that
could degrade transistor
performance
• Accommodate CTE mismatch
between materials
• Place (or grow) very small CS “chiplets” in exactly
the right position on a processed CMOS wafer/die
• High-density process
• Process consistent
with integration
approach
• Remove heat
from “chiplets”
• High interconnect yield
Interconnects
Assembly
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